{ | |
"area": 20.7792, | |
"cell_footprint": "o32ai", | |
"cell_leakage_power": 0.0, | |
"pg_pin VGND": { | |
"pg_type": "primary_ground", | |
"voltage_name": "VGND" | |
}, | |
"pg_pin VNB": { | |
"pg_type": "primary_ground", | |
"voltage_name": "VNB" | |
}, | |
"pg_pin VPB": { | |
"pg_type": "primary_power", | |
"voltage_name": "VPB" | |
}, | |
"pg_pin VPWR": { | |
"pg_type": "primary_power", | |
"voltage_name": "VPWR" | |
}, | |
"pin A1": { | |
"capacitance": 0.00529, | |
"clock": "false", | |
"direction": "input", | |
"internal_power": { | |
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0.03903, | |
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0.08782, | |
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0.19757, | |
0.29634, | |
0.44449, | |
0.6667, | |
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"max_transition": 1.0, | |
"related_ground_pin": "VGND", | |
"related_power_pin": "VPWR" | |
}, | |
"pin A2": { | |
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"internal_power": { | |
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"related_power_pin": "VPWR" | |
}, | |
"pin A3": { | |
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}, | |
"pin B1": { | |
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"related_power_pin": "VPWR" | |
}, | |
"pin B2": { | |
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"clock": "false", | |
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"internal_power": { | |
"fall_power hidden_pwr_template13": { | |
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0.00848, | |
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"rise_power hidden_pwr_template13": { | |
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"related_ground_pin": "VGND", | |
"related_power_pin": "VPWR" | |
}, | |
"pin Y": { | |
"direction": "output", | |
"function": "(!A1&!A2&!A3) | (!B1&!B2)", | |
"internal_power": [ | |
{ | |
"fall_power pwr_template13x16": { | |
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}, | |
"related_pin": "A1", | |
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