Updates to spice PE and PXI files as well as the addition of lvs reports
diff --git a/cells/a211o/sky130_fd_sc_hdll__a211o_1.lvs.report b/cells/a211o/sky130_fd_sc_hdll__a211o_1.lvs.report
new file mode 100644
index 0000000..5b4e291
--- /dev/null
+++ b/cells/a211o/sky130_fd_sc_hdll__a211o_1.lvs.report
@@ -0,0 +1,486 @@
+
+LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_1.spice"
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------
+
+Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_1.spice"
+
+
+
+
+                  ##################################################
+                  ##                                              ##
+                  ##         C A L I B R E    S Y S T E M         ##
+                  ##                                              ##
+                  ##             L V S   R E P O R T              ##
+                  ##                                              ##
+                  ##################################################
+
+
+
+REPORT FILE NAME:         sky130_fd_sc_hdll__a211o_1.lvs.report
+LAYOUT NAME:              svdb/sky130_fd_sc_hdll__a211o_1.sp ('sky130_fd_sc_hdll__a211o_1')
+SOURCE NAME:              /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_1.spice ('sky130_fd_sc_hdll__a211o_1')
+RULE FILE:                /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_
+CREATION TIME:            Wed Sep  2 08:15:39 2020
+CURRENT DIRECTORY:        /home/hlusk/repos/SkyWater/osugooglelib/calibre
+USER NAME:                hlusk
+CALIBRE VERSION:          v2018.4_34.26    Mon Dec 3 14:40:54 PST 2018
+
+
+
+                               OVERALL COMPARISON RESULTS
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+
+**************************************************************************************************************
+                                      CELL  SUMMARY
+**************************************************************************************************************
+
+  Result         Layout                        Source
+  -----------    -----------                   --------------
+  CORRECT        sky130_fd_sc_hdll__a211o_1    sky130_fd_sc_hdll__a211o_1
+
+
+
+**************************************************************************************************************
+                                      LVS PARAMETERS
+**************************************************************************************************************
+
+
+o LVS Setup:
+
+   // LVS COMPONENT TYPE PROPERTY
+   // LVS COMPONENT SUBTYPE PROPERTY
+   // LVS PIN NAME PROPERTY
+   // LVS POWER NAME
+   // LVS GROUND NAME
+   LVS CELL SUPPLY                        NO
+   LVS RECOGNIZE GATES                    ALL
+   LVS IGNORE PORTS                       NO
+   LVS CHECK PORT NAMES                   YES
+   LVS IGNORE TRIVIAL NAMED PORTS         NO
+   LVS BUILTIN DEVICE PIN SWAP            YES
+   LVS ALL CAPACITOR PINS SWAPPABLE       NO
+   LVS DISCARD PINS BY DEVICE             YES
+   LVS SOFT SUBSTRATE PINS                NO
+   LVS INJECT LOGIC                       NO
+   LVS EXPAND UNBALANCED CELLS            YES
+   LVS FLATTEN INSIDE CELL                NO
+   LVS EXPAND SEED PROMOTIONS             NO
+   LVS PRESERVE PARAMETERIZED CELLS       NO
+   LVS GLOBALS ARE PORTS                  YES
+   LVS REVERSE WL                         NO
+   LVS SPICE PREFER PINS                  YES
+   LVS SPICE SLASH IS SPACE               NO
+   LVS SPICE ALLOW FLOATING PINS          YES
+   LVS SPICE ALLOW INLINE PARAMETERS      NO
+   LVS SPICE ALLOW UNQUOTED STRINGS       YES
+   LVS SPICE CONDITIONAL LDD              NO
+   LVS SPICE CULL PRIMITIVE SUBCIRCUITS   NO
+   // LVS SPICE EXCLUDE CELL SOURCE
+   // LVS SPICE EXCLUDE CELL LAYOUT
+   LVS SPICE IMPLIED MOS AREA             NO
+   // LVS SPICE MULTIPLIER NAME
+   LVS SPICE OVERRIDE GLOBALS             YES
+   LVS SPICE REDEFINE PARAM               YES
+   LVS SPICE REPLICATE DEVICES            YES
+   LVS SPICE SCALE X PARAMETERS           NO
+   LVS SPICE STRICT WL                    YES
+   // LVS SPICE OPTION
+   LVS STRICT SUBTYPES                    YES
+   LVS EXACT SUBTYPES                     NO
+   LAYOUT CASE                            NO
+   SOURCE CASE                            NO
+   LVS COMPARE CASE                       NO
+   LVS DOWNCASE DEVICE                    NO
+   LVS REPORT MAXIMUM                     50
+   LVS PROPERTY RESOLUTION MAXIMUM        ALL
+   LVS SIGNATURE MAXIMUM                  ALL
+   // LVS FILTER UNUSED OPTION
+   // LVS REPORT OPTION
+   LVS REPORT UNITS                       YES
+   // LVS NON USER NAME PORT
+   LVS NON USER NAME NET                  "^n[0-9]*$" "^net[0-9]*$"
+   // LVS NON USER NAME INSTANCE
+   // LVS IGNORE DEVICE PIN
+   // LVS PREFER NETS FILTER SOURCE
+   // LVS PREFER NETS FILTER LAYOUT
+
+   // Device Type Map
+
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_2p85" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT
+
+   // Reduction
+
+   LVS REDUCE SERIES MOS                  NO
+   LVS REDUCE PARALLEL MOS                NO
+   LVS REDUCE SEMI SERIES MOS             NO
+   LVS REDUCE SPLIT GATES                 YES [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE PARALLEL BIPOLAR            NO
+   LVS REDUCE SERIES CAPACITORS           NO
+   LVS REDUCE PARALLEL CAPACITORS         NO
+   LVS REDUCE SERIES RESISTORS            NO
+   LVS REDUCE PARALLEL RESISTORS          NO
+   LVS REDUCE PARALLEL DIODES             NO
+
+   LVS REDUCE  condiode  PARALLEL
+   LVS REDUCE  condiodeHvPsub  PARALLEL
+   LVS REDUCE  p20vhv1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  n20vhviso1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  nvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  pvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MP  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  M  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MN  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  Q(npnpar1x1)  PARALLEL
+   LVS REDUCE  Q(npnpar1x2)  PARALLEL
+   LVS REDUCE  Q(npn_1x1_2p0_hv)  PARALLEL
+   LVS REDUCE  Q(pnppar)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  Q(pnppar5x)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  D  PARALLEL [ TOLERANCE a 1 p 1 ]
+   LVS REDUCE  D  SERIES POS NEG NO
+   LVS REDUCE  C(xcmimc1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  C(xcmimc2)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R(mrp1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  SERIES POS NEG NO
+   LVS REDUCE  R(short)  PARALLEL
+   LVS REDUCE  R(short)  SERIES POS NEG NO
+   LVS REDUCE  R(fuse)  PARALLEL NO
+   LVS REDUCE  R(fuse)  SERIES POS NEG NO
+   LVS REDUCE  R(metop)  PARALLEL [ TOLERANCE metopNumber 0 ]
+   LVS REDUCE  R(metop)  SERIES POS NEG NO
+   LVS REDUCTION PRIORITY                 PARALLEL
+   
+   LVS SHORT EQUIVALENT NODES             NO
+
+   // Filter
+
+   LVS FILTER  R(cds_thru)  SHORT SOURCE
+   LVS FILTER  R(cds_thru)  SHORT LAYOUT
+   LVS FILTER  Dpar  OPEN SOURCE
+   LVS FILTER  Dpar  OPEN LAYOUT
+   LVS FILTER  Probe  OPEN SOURCE
+   LVS FILTER  Probe  OPEN LAYOUT
+   LVS FILTER  icecap  OPEN SOURCE
+   LVS FILTER  s8fmlt_iref_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_neg_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_vdac_termx  OPEN SOURCE
+   LVS FILTER  D  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN LAYOUT
+   LVS FILTER  tap_dev  OPEN SOURCE
+   LVS FILTER  tap_dev  OPEN LAYOUT
+   LVS FILTER  cad_dummy_open_device  OPEN SOURCE
+   LVS FILTER  cad_dummy_open_device  OPEN LAYOUT
+
+   // Trace Property
+
+   TRACE PROPERTY  xcnwvc  m m 0
+   TRACE PROPERTY  xcnwvc  w w 0
+   TRACE PROPERTY  xcnwvc  l l 0
+   TRACE PROPERTY  xcnwvc2  m m 0
+   TRACE PROPERTY  xcnwvc2  w w 0
+   TRACE PROPERTY  xcnwvc2  l l 0
+   TRACE PROPERTY  xchvnwc  m m 0
+   TRACE PROPERTY  q(npnpar1x1)  m m 0
+   TRACE PROPERTY  q(npnpar1x2)  m m 0
+   TRACE PROPERTY  q(npn_1x1_2p0_hv)  m m 0
+   TRACE PROPERTY  q(pnppar)  barea barea 0
+   TRACE PROPERTY  q(pnppar)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar)  earea earea 0
+   TRACE PROPERTY  q(pnppar)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar)  m m 0
+   TRACE PROPERTY  q(pnppar5x)  barea barea 0
+   TRACE PROPERTY  q(pnppar5x)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar5x)  earea earea 0
+   TRACE PROPERTY  q(pnppar5x)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar5x)  m m 0
+   TRACE PROPERTY  d(ndiode)  a a 1
+   TRACE PROPERTY  d(ndiode)  p p 1
+   TRACE PROPERTY  d(ndiode)  m m 0
+   TRACE PROPERTY  d(ndiode_h)  a a 1
+   TRACE PROPERTY  d(ndiode_h)  p p 1
+   TRACE PROPERTY  d(ndiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  m m 0
+   TRACE PROPERTY  d(pdiode)  a a 1
+   TRACE PROPERTY  d(pdiode)  p p 1
+   TRACE PROPERTY  d(pdiode)  m m 0
+   TRACE PROPERTY  d(pdiode_h)  a a 1
+   TRACE PROPERTY  d(pdiode_h)  p p 1
+   TRACE PROPERTY  d(pdiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub)  a a 1
+   TRACE PROPERTY  d(dnwdiode_psub)  p p 1
+   TRACE PROPERTY  d(dnwdiode_psub)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  m m 0
+   TRACE PROPERTY  xcmvpp  m m 0
+   TRACE PROPERTY  xcmvpp_2  m m 0
+   TRACE PROPERTY  xcmvpp2_nhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp2_phv5x4  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap2_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l40  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l20  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l10  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x1  m m 0
+   TRACE PROPERTY  xcmvppx4_2xnhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym50p4shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m5shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_lim4shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m4shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4m5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp5  m m 0
+   TRACE PROPERTY  xcmvpp4  m m 0
+   TRACE PROPERTY  xcmvpp3  m m 0
+   TRACE PROPERTY  r(mrdn)  w w 1
+   TRACE PROPERTY  r(mrdn)  l l 1
+   TRACE PROPERTY  r(mrdn)  m m 0
+   TRACE PROPERTY  r(mrdn_hv)  w w 1
+   TRACE PROPERTY  r(mrdn_hv)  l l 1
+   TRACE PROPERTY  r(mrdn_hv)  m m 0
+   TRACE PROPERTY  r(mrdp)  w w 1
+   TRACE PROPERTY  r(mrdp)  l l 1
+   TRACE PROPERTY  r(mrdp)  m m 0
+   TRACE PROPERTY  r(mrdp_hv)  w w 1
+   TRACE PROPERTY  r(mrdp_hv)  l l 1
+   TRACE PROPERTY  r(mrdp_hv)  m m 0
+   TRACE PROPERTY  r(mrl1)  w w 1
+   TRACE PROPERTY  r(mrl1)  l l 1
+   TRACE PROPERTY  r(mrl1)  m m 0
+   TRACE PROPERTY  r(xpwres)  w w 1
+   TRACE PROPERTY  r(xpwres)  l l 1
+   TRACE PROPERTY  r(xpwres)  m m 0
+   TRACE PROPERTY  r(short)  m m 0
+   TRACE PROPERTY  r(fuse)  w w 1
+   TRACE PROPERTY  r(fuse)  l l 1
+   TRACE PROPERTY  r(fuse)  m m 0
+   TRACE PROPERTY  r(metop)  metopnumber metopnumber 0
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  m m 0
+   TRACE PROPERTY  d(nwdiode_victim)  a a 10
+   TRACE PROPERTY  d(nwdiode_victim)  p p 10
+   TRACE PROPERTY  d(nwdiode_victim)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  m m 0
+   TRACE PROPERTY  d(nwdiode_aggressor)  a a 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  p p 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  m m 0
+
+   // User Trace Property
+
+   TRACE PROPERTY  mn(nshort)  m mult w l
+   TRACE PROPERTY  mn(npass)  m mult w l
+   TRACE PROPERTY  mn(nlowvt)  m mult w l
+   TRACE PROPERTY  m(sonos_e)  m mult w l
+   TRACE PROPERTY  m  m mult w l
+   TRACE PROPERTY  m(fnpass)  m mult w l
+   TRACE PROPERTY  mn(nhv)  m mult w l
+   TRACE PROPERTY  mn(nhvnative)  m mult w l
+   TRACE PROPERTY  mn(ntvnative)  m mult w l
+   TRACE PROPERTY  mp(pshort)  m mult w l
+   TRACE PROPERTY  mp  m mult w l
+   TRACE PROPERTY  mp(phighvt)  m mult w l
+   TRACE PROPERTY  mp(plowvt)  m mult w l
+   TRACE PROPERTY  mp(phv)  m mult w l
+   TRACE PROPERTY  mn(nshortesd)  m mult w l
+   TRACE PROPERTY  mn(nhvesd)  m mult w l
+   TRACE PROPERTY  mn(nhvnativeesd)  m mult w l
+   TRACE PROPERTY  mp(phvesd)  m mult w l
+   TRACE PROPERTY  nvhv  m mult w l
+   TRACE PROPERTY  n20vhv1  m mult w l
+   TRACE PROPERTY  n20nativevhv1  m mult w l
+   TRACE PROPERTY  n20vhviso1  m mult w l
+   TRACE PROPERTY  n20nativevhviso1  m mult w l
+   TRACE PROPERTY  pvhv  m mult w l
+   TRACE PROPERTY  p20vhv1  m mult w l
+   TRACE PROPERTY  c(xcmimc1)  w l m
+   TRACE PROPERTY  c(xcmimc2)  w l m
+   TRACE PROPERTY  r(mrp1)  m w l
+   TRACE PROPERTY  xhrpoly_0p35  m w l
+   TRACE PROPERTY  xuhrpoly_0p35  m w l
+   TRACE PROPERTY  xhrpoly_0p69  m w l
+   TRACE PROPERTY  xuhrpoly_0p69  m w l
+   TRACE PROPERTY  xhrpoly_1p41  m w l
+   TRACE PROPERTY  xuhrpoly_1p41  m w l
+   TRACE PROPERTY  xhrpoly_2p85  m w l
+   TRACE PROPERTY  xuhrpoly_2p85  m w l
+
+
+
+                   CELL COMPARISON RESULTS ( TOP LEVEL )
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+LAYOUT CELL NAME:         sky130_fd_sc_hdll__a211o_1
+SOURCE CELL NAME:         sky130_fd_sc_hdll__a211o_1
+
+--------------------------------------------------------------------------------------------------------------
+
+INITIAL NUMBERS OF OBJECTS
+--------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:              9         9
+
+ Nets:              14        13    *
+
+ Instances:          5         5         MN (4 pins)
+                     5         5         MP (4 pins)
+                     1         0    *    Dpar (2 pins)
+                     1         0    *    Probe (2 pins)
+                ------    ------
+ Total Inst:        12        10
+
+
+NUMBERS OF OBJECTS AFTER TRANSFORMATION
+---------------------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:              9         9
+
+ Nets:              10        10
+
+ Instances:          3         3         MN (4 pins)
+                     1         1         MP (4 pins)
+                     1         1         SMN2 (4 pins)
+                     1         1         SPMP_2_1_1 (6 pins)
+                ------    ------
+ Total Inst:         6         6
+
+
+       * = Number of objects in layout different from number in source.
+
+
+
+**************************************************************************************************************
+                               INFORMATION AND WARNINGS
+**************************************************************************************************************
+
+
+                  Matched    Matched    Unmatched    Unmatched    Component
+                   Layout     Source       Layout       Source    Type
+                  -------    -------    ---------    ---------    ---------
+   Ports:               9          9            0            0
+
+   Nets:               10         10            0            0
+
+   Instances:           3          3            0            0    MN(NSHORT)
+                        1          1            0            0    MP(PHIGHVT)
+                        1          1            0            0    SMN2
+                        1          1            0            0    SPMP_2_1_1
+                  -------    -------    ---------    ---------
+   Total Inst:          6          6            0            0
+
+
+o Statistics:
+
+   2 layout instances were filtered and their pins removed from adjoining nets.
+
+   1 layout net had all its pins removed and was deleted.
+
+
+o Initial Correspondence Points:
+
+   Ports:        VNB VPB A2 A1 B1 C1 X VPWR VGND
+
+
+**************************************************************************************************************
+                                         SUMMARY
+**************************************************************************************************************
+
+Total CPU Time:      0 sec
+Total Elapsed Time:  0 sec
diff --git a/cells/a211o/sky130_fd_sc_hdll__a211o_1.pex.spice b/cells/a211o/sky130_fd_sc_hdll__a211o_1.pex.spice
index 58fbf9e..b8bb8fb 100644
--- a/cells/a211o/sky130_fd_sc_hdll__a211o_1.pex.spice
+++ b/cells/a211o/sky130_fd_sc_hdll__a211o_1.pex.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a211o_1.pex.spice
-* Created: Thu Aug 27 18:51:24 2020
+* Created: Wed Sep  2 08:15:42 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * Nominal Temperature: 27C
diff --git a/cells/a211o/sky130_fd_sc_hdll__a211o_1.pxi.spice b/cells/a211o/sky130_fd_sc_hdll__a211o_1.pxi.spice
index a56a147..2a4d663 100644
--- a/cells/a211o/sky130_fd_sc_hdll__a211o_1.pxi.spice
+++ b/cells/a211o/sky130_fd_sc_hdll__a211o_1.pxi.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a211o_1.pxi.spice
-* Created: Thu Aug 27 18:51:24 2020
+* Created: Wed Sep  2 08:15:42 2020
 * 
 x_PM_SKY130_FD_SC_HDLL__A211O_1%A_80_21# N_A_80_21#_M1006_d N_A_80_21#_M1009_d
 + N_A_80_21#_M1000_d N_A_80_21#_c_52_n N_A_80_21#_M1003_g N_A_80_21#_c_56_n
diff --git a/cells/a211o/sky130_fd_sc_hdll__a211o_1.spice b/cells/a211o/sky130_fd_sc_hdll__a211o_1.spice
index 840c14e..932c592 100644
--- a/cells/a211o/sky130_fd_sc_hdll__a211o_1.spice
+++ b/cells/a211o/sky130_fd_sc_hdll__a211o_1.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a211o_1.spice
-* Created: Thu Aug 27 18:51:24 2020
+* Created: Wed Sep  2 08:15:42 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * 
diff --git a/cells/a211o/sky130_fd_sc_hdll__a211o_2.lvs.report b/cells/a211o/sky130_fd_sc_hdll__a211o_2.lvs.report
new file mode 100644
index 0000000..f209b56
--- /dev/null
+++ b/cells/a211o/sky130_fd_sc_hdll__a211o_2.lvs.report
@@ -0,0 +1,493 @@
+
+LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_2.spice"
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------
+
+Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_2.spice"
+
+
+
+
+                  ##################################################
+                  ##                                              ##
+                  ##         C A L I B R E    S Y S T E M         ##
+                  ##                                              ##
+                  ##             L V S   R E P O R T              ##
+                  ##                                              ##
+                  ##################################################
+
+
+
+REPORT FILE NAME:         sky130_fd_sc_hdll__a211o_2.lvs.report
+LAYOUT NAME:              svdb/sky130_fd_sc_hdll__a211o_2.sp ('sky130_fd_sc_hdll__a211o_2')
+SOURCE NAME:              /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_2.spice ('sky130_fd_sc_hdll__a211o_2')
+RULE FILE:                /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_
+CREATION TIME:            Wed Sep  2 08:15:46 2020
+CURRENT DIRECTORY:        /home/hlusk/repos/SkyWater/osugooglelib/calibre
+USER NAME:                hlusk
+CALIBRE VERSION:          v2018.4_34.26    Mon Dec 3 14:40:54 PST 2018
+
+
+
+                               OVERALL COMPARISON RESULTS
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+
+**************************************************************************************************************
+                                      CELL  SUMMARY
+**************************************************************************************************************
+
+  Result         Layout                        Source
+  -----------    -----------                   --------------
+  CORRECT        sky130_fd_sc_hdll__a211o_2    sky130_fd_sc_hdll__a211o_2
+
+
+
+**************************************************************************************************************
+                                      LVS PARAMETERS
+**************************************************************************************************************
+
+
+o LVS Setup:
+
+   // LVS COMPONENT TYPE PROPERTY
+   // LVS COMPONENT SUBTYPE PROPERTY
+   // LVS PIN NAME PROPERTY
+   // LVS POWER NAME
+   // LVS GROUND NAME
+   LVS CELL SUPPLY                        NO
+   LVS RECOGNIZE GATES                    ALL
+   LVS IGNORE PORTS                       NO
+   LVS CHECK PORT NAMES                   YES
+   LVS IGNORE TRIVIAL NAMED PORTS         NO
+   LVS BUILTIN DEVICE PIN SWAP            YES
+   LVS ALL CAPACITOR PINS SWAPPABLE       NO
+   LVS DISCARD PINS BY DEVICE             YES
+   LVS SOFT SUBSTRATE PINS                NO
+   LVS INJECT LOGIC                       NO
+   LVS EXPAND UNBALANCED CELLS            YES
+   LVS FLATTEN INSIDE CELL                NO
+   LVS EXPAND SEED PROMOTIONS             NO
+   LVS PRESERVE PARAMETERIZED CELLS       NO
+   LVS GLOBALS ARE PORTS                  YES
+   LVS REVERSE WL                         NO
+   LVS SPICE PREFER PINS                  YES
+   LVS SPICE SLASH IS SPACE               NO
+   LVS SPICE ALLOW FLOATING PINS          YES
+   LVS SPICE ALLOW INLINE PARAMETERS      NO
+   LVS SPICE ALLOW UNQUOTED STRINGS       YES
+   LVS SPICE CONDITIONAL LDD              NO
+   LVS SPICE CULL PRIMITIVE SUBCIRCUITS   NO
+   // LVS SPICE EXCLUDE CELL SOURCE
+   // LVS SPICE EXCLUDE CELL LAYOUT
+   LVS SPICE IMPLIED MOS AREA             NO
+   // LVS SPICE MULTIPLIER NAME
+   LVS SPICE OVERRIDE GLOBALS             YES
+   LVS SPICE REDEFINE PARAM               YES
+   LVS SPICE REPLICATE DEVICES            YES
+   LVS SPICE SCALE X PARAMETERS           NO
+   LVS SPICE STRICT WL                    YES
+   // LVS SPICE OPTION
+   LVS STRICT SUBTYPES                    YES
+   LVS EXACT SUBTYPES                     NO
+   LAYOUT CASE                            NO
+   SOURCE CASE                            NO
+   LVS COMPARE CASE                       NO
+   LVS DOWNCASE DEVICE                    NO
+   LVS REPORT MAXIMUM                     50
+   LVS PROPERTY RESOLUTION MAXIMUM        ALL
+   LVS SIGNATURE MAXIMUM                  ALL
+   // LVS FILTER UNUSED OPTION
+   // LVS REPORT OPTION
+   LVS REPORT UNITS                       YES
+   // LVS NON USER NAME PORT
+   LVS NON USER NAME NET                  "^n[0-9]*$" "^net[0-9]*$"
+   // LVS NON USER NAME INSTANCE
+   // LVS IGNORE DEVICE PIN
+   // LVS PREFER NETS FILTER SOURCE
+   // LVS PREFER NETS FILTER LAYOUT
+
+   // Device Type Map
+
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_2p85" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT
+
+   // Reduction
+
+   LVS REDUCE SERIES MOS                  NO
+   LVS REDUCE PARALLEL MOS                NO
+   LVS REDUCE SEMI SERIES MOS             NO
+   LVS REDUCE SPLIT GATES                 YES [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE PARALLEL BIPOLAR            NO
+   LVS REDUCE SERIES CAPACITORS           NO
+   LVS REDUCE PARALLEL CAPACITORS         NO
+   LVS REDUCE SERIES RESISTORS            NO
+   LVS REDUCE PARALLEL RESISTORS          NO
+   LVS REDUCE PARALLEL DIODES             NO
+
+   LVS REDUCE  condiode  PARALLEL
+   LVS REDUCE  condiodeHvPsub  PARALLEL
+   LVS REDUCE  p20vhv1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  n20vhviso1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  nvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  pvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MP  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  M  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MN  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  Q(npnpar1x1)  PARALLEL
+   LVS REDUCE  Q(npnpar1x2)  PARALLEL
+   LVS REDUCE  Q(npn_1x1_2p0_hv)  PARALLEL
+   LVS REDUCE  Q(pnppar)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  Q(pnppar5x)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  D  PARALLEL [ TOLERANCE a 1 p 1 ]
+   LVS REDUCE  D  SERIES POS NEG NO
+   LVS REDUCE  C(xcmimc1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  C(xcmimc2)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R(mrp1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  SERIES POS NEG NO
+   LVS REDUCE  R(short)  PARALLEL
+   LVS REDUCE  R(short)  SERIES POS NEG NO
+   LVS REDUCE  R(fuse)  PARALLEL NO
+   LVS REDUCE  R(fuse)  SERIES POS NEG NO
+   LVS REDUCE  R(metop)  PARALLEL [ TOLERANCE metopNumber 0 ]
+   LVS REDUCE  R(metop)  SERIES POS NEG NO
+   LVS REDUCTION PRIORITY                 PARALLEL
+   
+   LVS SHORT EQUIVALENT NODES             NO
+
+   // Filter
+
+   LVS FILTER  R(cds_thru)  SHORT SOURCE
+   LVS FILTER  R(cds_thru)  SHORT LAYOUT
+   LVS FILTER  Dpar  OPEN SOURCE
+   LVS FILTER  Dpar  OPEN LAYOUT
+   LVS FILTER  Probe  OPEN SOURCE
+   LVS FILTER  Probe  OPEN LAYOUT
+   LVS FILTER  icecap  OPEN SOURCE
+   LVS FILTER  s8fmlt_iref_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_neg_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_vdac_termx  OPEN SOURCE
+   LVS FILTER  D  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN LAYOUT
+   LVS FILTER  tap_dev  OPEN SOURCE
+   LVS FILTER  tap_dev  OPEN LAYOUT
+   LVS FILTER  cad_dummy_open_device  OPEN SOURCE
+   LVS FILTER  cad_dummy_open_device  OPEN LAYOUT
+
+   // Trace Property
+
+   TRACE PROPERTY  xcnwvc  m m 0
+   TRACE PROPERTY  xcnwvc  w w 0
+   TRACE PROPERTY  xcnwvc  l l 0
+   TRACE PROPERTY  xcnwvc2  m m 0
+   TRACE PROPERTY  xcnwvc2  w w 0
+   TRACE PROPERTY  xcnwvc2  l l 0
+   TRACE PROPERTY  xchvnwc  m m 0
+   TRACE PROPERTY  q(npnpar1x1)  m m 0
+   TRACE PROPERTY  q(npnpar1x2)  m m 0
+   TRACE PROPERTY  q(npn_1x1_2p0_hv)  m m 0
+   TRACE PROPERTY  q(pnppar)  barea barea 0
+   TRACE PROPERTY  q(pnppar)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar)  earea earea 0
+   TRACE PROPERTY  q(pnppar)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar)  m m 0
+   TRACE PROPERTY  q(pnppar5x)  barea barea 0
+   TRACE PROPERTY  q(pnppar5x)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar5x)  earea earea 0
+   TRACE PROPERTY  q(pnppar5x)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar5x)  m m 0
+   TRACE PROPERTY  d(ndiode)  a a 1
+   TRACE PROPERTY  d(ndiode)  p p 1
+   TRACE PROPERTY  d(ndiode)  m m 0
+   TRACE PROPERTY  d(ndiode_h)  a a 1
+   TRACE PROPERTY  d(ndiode_h)  p p 1
+   TRACE PROPERTY  d(ndiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  m m 0
+   TRACE PROPERTY  d(pdiode)  a a 1
+   TRACE PROPERTY  d(pdiode)  p p 1
+   TRACE PROPERTY  d(pdiode)  m m 0
+   TRACE PROPERTY  d(pdiode_h)  a a 1
+   TRACE PROPERTY  d(pdiode_h)  p p 1
+   TRACE PROPERTY  d(pdiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub)  a a 1
+   TRACE PROPERTY  d(dnwdiode_psub)  p p 1
+   TRACE PROPERTY  d(dnwdiode_psub)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  m m 0
+   TRACE PROPERTY  xcmvpp  m m 0
+   TRACE PROPERTY  xcmvpp_2  m m 0
+   TRACE PROPERTY  xcmvpp2_nhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp2_phv5x4  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap2_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l40  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l20  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l10  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x1  m m 0
+   TRACE PROPERTY  xcmvppx4_2xnhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym50p4shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m5shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_lim4shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m4shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4m5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp5  m m 0
+   TRACE PROPERTY  xcmvpp4  m m 0
+   TRACE PROPERTY  xcmvpp3  m m 0
+   TRACE PROPERTY  r(mrdn)  w w 1
+   TRACE PROPERTY  r(mrdn)  l l 1
+   TRACE PROPERTY  r(mrdn)  m m 0
+   TRACE PROPERTY  r(mrdn_hv)  w w 1
+   TRACE PROPERTY  r(mrdn_hv)  l l 1
+   TRACE PROPERTY  r(mrdn_hv)  m m 0
+   TRACE PROPERTY  r(mrdp)  w w 1
+   TRACE PROPERTY  r(mrdp)  l l 1
+   TRACE PROPERTY  r(mrdp)  m m 0
+   TRACE PROPERTY  r(mrdp_hv)  w w 1
+   TRACE PROPERTY  r(mrdp_hv)  l l 1
+   TRACE PROPERTY  r(mrdp_hv)  m m 0
+   TRACE PROPERTY  r(mrl1)  w w 1
+   TRACE PROPERTY  r(mrl1)  l l 1
+   TRACE PROPERTY  r(mrl1)  m m 0
+   TRACE PROPERTY  r(xpwres)  w w 1
+   TRACE PROPERTY  r(xpwres)  l l 1
+   TRACE PROPERTY  r(xpwres)  m m 0
+   TRACE PROPERTY  r(short)  m m 0
+   TRACE PROPERTY  r(fuse)  w w 1
+   TRACE PROPERTY  r(fuse)  l l 1
+   TRACE PROPERTY  r(fuse)  m m 0
+   TRACE PROPERTY  r(metop)  metopnumber metopnumber 0
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  m m 0
+   TRACE PROPERTY  d(nwdiode_victim)  a a 10
+   TRACE PROPERTY  d(nwdiode_victim)  p p 10
+   TRACE PROPERTY  d(nwdiode_victim)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  m m 0
+   TRACE PROPERTY  d(nwdiode_aggressor)  a a 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  p p 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  m m 0
+
+   // User Trace Property
+
+   TRACE PROPERTY  mn(nshort)  m mult w l
+   TRACE PROPERTY  mn(npass)  m mult w l
+   TRACE PROPERTY  mn(nlowvt)  m mult w l
+   TRACE PROPERTY  m(sonos_e)  m mult w l
+   TRACE PROPERTY  m  m mult w l
+   TRACE PROPERTY  m(fnpass)  m mult w l
+   TRACE PROPERTY  mn(nhv)  m mult w l
+   TRACE PROPERTY  mn(nhvnative)  m mult w l
+   TRACE PROPERTY  mn(ntvnative)  m mult w l
+   TRACE PROPERTY  mp(pshort)  m mult w l
+   TRACE PROPERTY  mp  m mult w l
+   TRACE PROPERTY  mp(phighvt)  m mult w l
+   TRACE PROPERTY  mp(plowvt)  m mult w l
+   TRACE PROPERTY  mp(phv)  m mult w l
+   TRACE PROPERTY  mn(nshortesd)  m mult w l
+   TRACE PROPERTY  mn(nhvesd)  m mult w l
+   TRACE PROPERTY  mn(nhvnativeesd)  m mult w l
+   TRACE PROPERTY  mp(phvesd)  m mult w l
+   TRACE PROPERTY  nvhv  m mult w l
+   TRACE PROPERTY  n20vhv1  m mult w l
+   TRACE PROPERTY  n20nativevhv1  m mult w l
+   TRACE PROPERTY  n20vhviso1  m mult w l
+   TRACE PROPERTY  n20nativevhviso1  m mult w l
+   TRACE PROPERTY  pvhv  m mult w l
+   TRACE PROPERTY  p20vhv1  m mult w l
+   TRACE PROPERTY  c(xcmimc1)  w l m
+   TRACE PROPERTY  c(xcmimc2)  w l m
+   TRACE PROPERTY  r(mrp1)  m w l
+   TRACE PROPERTY  xhrpoly_0p35  m w l
+   TRACE PROPERTY  xuhrpoly_0p35  m w l
+   TRACE PROPERTY  xhrpoly_0p69  m w l
+   TRACE PROPERTY  xuhrpoly_0p69  m w l
+   TRACE PROPERTY  xhrpoly_1p41  m w l
+   TRACE PROPERTY  xuhrpoly_1p41  m w l
+   TRACE PROPERTY  xhrpoly_2p85  m w l
+   TRACE PROPERTY  xuhrpoly_2p85  m w l
+
+
+
+                   CELL COMPARISON RESULTS ( TOP LEVEL )
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+LAYOUT CELL NAME:         sky130_fd_sc_hdll__a211o_2
+SOURCE CELL NAME:         sky130_fd_sc_hdll__a211o_2
+
+--------------------------------------------------------------------------------------------------------------
+
+INITIAL NUMBERS OF OBJECTS
+--------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:              9         9
+
+ Nets:              14        13    *
+
+ Instances:          6         6         MN (4 pins)
+                     6         6         MP (4 pins)
+                     1         0    *    Dpar (2 pins)
+                     1         0    *    Probe (2 pins)
+                ------    ------
+ Total Inst:        14        12
+
+
+NUMBERS OF OBJECTS AFTER TRANSFORMATION
+---------------------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:              9         9
+
+ Nets:              10        10
+
+ Instances:          3         3         MN (4 pins)
+                     1         1         MP (4 pins)
+                     1         1         SMN2 (4 pins)
+                     1         1         SPMP_2_1_1 (6 pins)
+                ------    ------
+ Total Inst:         6         6
+
+
+       * = Number of objects in layout different from number in source.
+
+
+
+**************************************************************************************************************
+                               INFORMATION AND WARNINGS
+**************************************************************************************************************
+
+
+                  Matched    Matched    Unmatched    Unmatched    Component
+                   Layout     Source       Layout       Source    Type
+                  -------    -------    ---------    ---------    ---------
+   Ports:               9          9            0            0
+
+   Nets:               10         10            0            0
+
+   Instances:           3          3            0            0    MN(NSHORT)
+                        1          1            0            0    MP(PHIGHVT)
+                        1          1            0            0    SMN2
+                        1          1            0            0    SPMP_2_1_1
+                  -------    -------    ---------    ---------
+   Total Inst:          6          6            0            0
+
+
+o Statistics:
+
+   2 layout instances were filtered and their pins removed from adjoining nets.
+
+   4 layout mos transistors were reduced to 2.
+     2 mos transistors were deleted by parallel reduction.
+   4 source mos transistors were reduced to 2.
+     2 mos transistors were deleted by parallel reduction.
+
+   1 layout net had all its pins removed and was deleted.
+
+
+o Initial Correspondence Points:
+
+   Ports:        VNB VPB A2 A1 B1 C1 VPWR X VGND
+
+
+**************************************************************************************************************
+                                         SUMMARY
+**************************************************************************************************************
+
+Total CPU Time:      0 sec
+Total Elapsed Time:  0 sec
diff --git a/cells/a211o/sky130_fd_sc_hdll__a211o_2.pex.spice b/cells/a211o/sky130_fd_sc_hdll__a211o_2.pex.spice
index 5650f7a..b2c417b 100644
--- a/cells/a211o/sky130_fd_sc_hdll__a211o_2.pex.spice
+++ b/cells/a211o/sky130_fd_sc_hdll__a211o_2.pex.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a211o_2.pex.spice
-* Created: Thu Aug 27 18:51:30 2020
+* Created: Wed Sep  2 08:15:48 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * Nominal Temperature: 27C
diff --git a/cells/a211o/sky130_fd_sc_hdll__a211o_2.pxi.spice b/cells/a211o/sky130_fd_sc_hdll__a211o_2.pxi.spice
index b617941..2f85274 100644
--- a/cells/a211o/sky130_fd_sc_hdll__a211o_2.pxi.spice
+++ b/cells/a211o/sky130_fd_sc_hdll__a211o_2.pxi.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a211o_2.pxi.spice
-* Created: Thu Aug 27 18:51:30 2020
+* Created: Wed Sep  2 08:15:48 2020
 * 
 x_PM_SKY130_FD_SC_HDLL__A211O_2%A_79_21# N_A_79_21#_M1010_d N_A_79_21#_M1005_d
 + N_A_79_21#_M1009_d N_A_79_21#_c_54_n N_A_79_21#_M1008_g N_A_79_21#_c_60_n
diff --git a/cells/a211o/sky130_fd_sc_hdll__a211o_2.spice b/cells/a211o/sky130_fd_sc_hdll__a211o_2.spice
index 77af58f..47c51aa 100644
--- a/cells/a211o/sky130_fd_sc_hdll__a211o_2.spice
+++ b/cells/a211o/sky130_fd_sc_hdll__a211o_2.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a211o_2.spice
-* Created: Thu Aug 27 18:51:30 2020
+* Created: Wed Sep  2 08:15:48 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * 
diff --git a/cells/a211o/sky130_fd_sc_hdll__a211o_4.lvs.report b/cells/a211o/sky130_fd_sc_hdll__a211o_4.lvs.report
new file mode 100644
index 0000000..9a875a8
--- /dev/null
+++ b/cells/a211o/sky130_fd_sc_hdll__a211o_4.lvs.report
@@ -0,0 +1,507 @@
+
+LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice"
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------
+
+Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice"
+
+
+
+
+                  ##################################################
+                  ##                                              ##
+                  ##         C A L I B R E    S Y S T E M         ##
+                  ##                                              ##
+                  ##             L V S   R E P O R T              ##
+                  ##                                              ##
+                  ##################################################
+
+
+
+REPORT FILE NAME:         sky130_fd_sc_hdll__a211o_4.lvs.report
+LAYOUT NAME:              svdb/sky130_fd_sc_hdll__a211o_4.sp ('sky130_fd_sc_hdll__a211o_4')
+SOURCE NAME:              /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice ('sky130_fd_sc_hdll__a211o_4')
+RULE FILE:                /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_
+CREATION TIME:            Wed Sep  2 08:15:52 2020
+CURRENT DIRECTORY:        /home/hlusk/repos/SkyWater/osugooglelib/calibre
+USER NAME:                hlusk
+CALIBRE VERSION:          v2018.4_34.26    Mon Dec 3 14:40:54 PST 2018
+
+
+
+                               OVERALL COMPARISON RESULTS
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+
+**************************************************************************************************************
+                                      CELL  SUMMARY
+**************************************************************************************************************
+
+  Result         Layout                        Source
+  -----------    -----------                   --------------
+  CORRECT        sky130_fd_sc_hdll__a211o_4    sky130_fd_sc_hdll__a211o_4
+
+
+
+**************************************************************************************************************
+                                      LVS PARAMETERS
+**************************************************************************************************************
+
+
+o LVS Setup:
+
+   // LVS COMPONENT TYPE PROPERTY
+   // LVS COMPONENT SUBTYPE PROPERTY
+   // LVS PIN NAME PROPERTY
+   // LVS POWER NAME
+   // LVS GROUND NAME
+   LVS CELL SUPPLY                        NO
+   LVS RECOGNIZE GATES                    ALL
+   LVS IGNORE PORTS                       NO
+   LVS CHECK PORT NAMES                   YES
+   LVS IGNORE TRIVIAL NAMED PORTS         NO
+   LVS BUILTIN DEVICE PIN SWAP            YES
+   LVS ALL CAPACITOR PINS SWAPPABLE       NO
+   LVS DISCARD PINS BY DEVICE             YES
+   LVS SOFT SUBSTRATE PINS                NO
+   LVS INJECT LOGIC                       NO
+   LVS EXPAND UNBALANCED CELLS            YES
+   LVS FLATTEN INSIDE CELL                NO
+   LVS EXPAND SEED PROMOTIONS             NO
+   LVS PRESERVE PARAMETERIZED CELLS       NO
+   LVS GLOBALS ARE PORTS                  YES
+   LVS REVERSE WL                         NO
+   LVS SPICE PREFER PINS                  YES
+   LVS SPICE SLASH IS SPACE               NO
+   LVS SPICE ALLOW FLOATING PINS          YES
+   LVS SPICE ALLOW INLINE PARAMETERS      NO
+   LVS SPICE ALLOW UNQUOTED STRINGS       YES
+   LVS SPICE CONDITIONAL LDD              NO
+   LVS SPICE CULL PRIMITIVE SUBCIRCUITS   NO
+   // LVS SPICE EXCLUDE CELL SOURCE
+   // LVS SPICE EXCLUDE CELL LAYOUT
+   LVS SPICE IMPLIED MOS AREA             NO
+   // LVS SPICE MULTIPLIER NAME
+   LVS SPICE OVERRIDE GLOBALS             YES
+   LVS SPICE REDEFINE PARAM               YES
+   LVS SPICE REPLICATE DEVICES            YES
+   LVS SPICE SCALE X PARAMETERS           NO
+   LVS SPICE STRICT WL                    YES
+   // LVS SPICE OPTION
+   LVS STRICT SUBTYPES                    YES
+   LVS EXACT SUBTYPES                     NO
+   LAYOUT CASE                            NO
+   SOURCE CASE                            NO
+   LVS COMPARE CASE                       NO
+   LVS DOWNCASE DEVICE                    NO
+   LVS REPORT MAXIMUM                     50
+   LVS PROPERTY RESOLUTION MAXIMUM        ALL
+   LVS SIGNATURE MAXIMUM                  ALL
+   // LVS FILTER UNUSED OPTION
+   // LVS REPORT OPTION
+   LVS REPORT UNITS                       YES
+   // LVS NON USER NAME PORT
+   LVS NON USER NAME NET                  "^n[0-9]*$" "^net[0-9]*$"
+   // LVS NON USER NAME INSTANCE
+   // LVS IGNORE DEVICE PIN
+   // LVS PREFER NETS FILTER SOURCE
+   // LVS PREFER NETS FILTER LAYOUT
+
+   // Device Type Map
+
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_2p85" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT
+
+   // Reduction
+
+   LVS REDUCE SERIES MOS                  NO
+   LVS REDUCE PARALLEL MOS                NO
+   LVS REDUCE SEMI SERIES MOS             NO
+   LVS REDUCE SPLIT GATES                 YES [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE PARALLEL BIPOLAR            NO
+   LVS REDUCE SERIES CAPACITORS           NO
+   LVS REDUCE PARALLEL CAPACITORS         NO
+   LVS REDUCE SERIES RESISTORS            NO
+   LVS REDUCE PARALLEL RESISTORS          NO
+   LVS REDUCE PARALLEL DIODES             NO
+
+   LVS REDUCE  condiode  PARALLEL
+   LVS REDUCE  condiodeHvPsub  PARALLEL
+   LVS REDUCE  p20vhv1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  n20vhviso1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  nvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  pvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MP  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  M  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MN  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  Q(npnpar1x1)  PARALLEL
+   LVS REDUCE  Q(npnpar1x2)  PARALLEL
+   LVS REDUCE  Q(npn_1x1_2p0_hv)  PARALLEL
+   LVS REDUCE  Q(pnppar)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  Q(pnppar5x)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  D  PARALLEL [ TOLERANCE a 1 p 1 ]
+   LVS REDUCE  D  SERIES POS NEG NO
+   LVS REDUCE  C(xcmimc1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  C(xcmimc2)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R(mrp1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  SERIES POS NEG NO
+   LVS REDUCE  R(short)  PARALLEL
+   LVS REDUCE  R(short)  SERIES POS NEG NO
+   LVS REDUCE  R(fuse)  PARALLEL NO
+   LVS REDUCE  R(fuse)  SERIES POS NEG NO
+   LVS REDUCE  R(metop)  PARALLEL [ TOLERANCE metopNumber 0 ]
+   LVS REDUCE  R(metop)  SERIES POS NEG NO
+   LVS REDUCTION PRIORITY                 PARALLEL
+   
+   LVS SHORT EQUIVALENT NODES             NO
+
+   // Filter
+
+   LVS FILTER  R(cds_thru)  SHORT SOURCE
+   LVS FILTER  R(cds_thru)  SHORT LAYOUT
+   LVS FILTER  Dpar  OPEN SOURCE
+   LVS FILTER  Dpar  OPEN LAYOUT
+   LVS FILTER  Probe  OPEN SOURCE
+   LVS FILTER  Probe  OPEN LAYOUT
+   LVS FILTER  icecap  OPEN SOURCE
+   LVS FILTER  s8fmlt_iref_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_neg_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_vdac_termx  OPEN SOURCE
+   LVS FILTER  D  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN LAYOUT
+   LVS FILTER  tap_dev  OPEN SOURCE
+   LVS FILTER  tap_dev  OPEN LAYOUT
+   LVS FILTER  cad_dummy_open_device  OPEN SOURCE
+   LVS FILTER  cad_dummy_open_device  OPEN LAYOUT
+
+   // Trace Property
+
+   TRACE PROPERTY  xcnwvc  m m 0
+   TRACE PROPERTY  xcnwvc  w w 0
+   TRACE PROPERTY  xcnwvc  l l 0
+   TRACE PROPERTY  xcnwvc2  m m 0
+   TRACE PROPERTY  xcnwvc2  w w 0
+   TRACE PROPERTY  xcnwvc2  l l 0
+   TRACE PROPERTY  xchvnwc  m m 0
+   TRACE PROPERTY  q(npnpar1x1)  m m 0
+   TRACE PROPERTY  q(npnpar1x2)  m m 0
+   TRACE PROPERTY  q(npn_1x1_2p0_hv)  m m 0
+   TRACE PROPERTY  q(pnppar)  barea barea 0
+   TRACE PROPERTY  q(pnppar)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar)  earea earea 0
+   TRACE PROPERTY  q(pnppar)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar)  m m 0
+   TRACE PROPERTY  q(pnppar5x)  barea barea 0
+   TRACE PROPERTY  q(pnppar5x)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar5x)  earea earea 0
+   TRACE PROPERTY  q(pnppar5x)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar5x)  m m 0
+   TRACE PROPERTY  d(ndiode)  a a 1
+   TRACE PROPERTY  d(ndiode)  p p 1
+   TRACE PROPERTY  d(ndiode)  m m 0
+   TRACE PROPERTY  d(ndiode_h)  a a 1
+   TRACE PROPERTY  d(ndiode_h)  p p 1
+   TRACE PROPERTY  d(ndiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  m m 0
+   TRACE PROPERTY  d(pdiode)  a a 1
+   TRACE PROPERTY  d(pdiode)  p p 1
+   TRACE PROPERTY  d(pdiode)  m m 0
+   TRACE PROPERTY  d(pdiode_h)  a a 1
+   TRACE PROPERTY  d(pdiode_h)  p p 1
+   TRACE PROPERTY  d(pdiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub)  a a 1
+   TRACE PROPERTY  d(dnwdiode_psub)  p p 1
+   TRACE PROPERTY  d(dnwdiode_psub)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  m m 0
+   TRACE PROPERTY  xcmvpp  m m 0
+   TRACE PROPERTY  xcmvpp_2  m m 0
+   TRACE PROPERTY  xcmvpp2_nhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp2_phv5x4  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap2_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l40  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l20  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l10  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x1  m m 0
+   TRACE PROPERTY  xcmvppx4_2xnhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym50p4shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m5shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_lim4shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m4shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4m5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp5  m m 0
+   TRACE PROPERTY  xcmvpp4  m m 0
+   TRACE PROPERTY  xcmvpp3  m m 0
+   TRACE PROPERTY  r(mrdn)  w w 1
+   TRACE PROPERTY  r(mrdn)  l l 1
+   TRACE PROPERTY  r(mrdn)  m m 0
+   TRACE PROPERTY  r(mrdn_hv)  w w 1
+   TRACE PROPERTY  r(mrdn_hv)  l l 1
+   TRACE PROPERTY  r(mrdn_hv)  m m 0
+   TRACE PROPERTY  r(mrdp)  w w 1
+   TRACE PROPERTY  r(mrdp)  l l 1
+   TRACE PROPERTY  r(mrdp)  m m 0
+   TRACE PROPERTY  r(mrdp_hv)  w w 1
+   TRACE PROPERTY  r(mrdp_hv)  l l 1
+   TRACE PROPERTY  r(mrdp_hv)  m m 0
+   TRACE PROPERTY  r(mrl1)  w w 1
+   TRACE PROPERTY  r(mrl1)  l l 1
+   TRACE PROPERTY  r(mrl1)  m m 0
+   TRACE PROPERTY  r(xpwres)  w w 1
+   TRACE PROPERTY  r(xpwres)  l l 1
+   TRACE PROPERTY  r(xpwres)  m m 0
+   TRACE PROPERTY  r(short)  m m 0
+   TRACE PROPERTY  r(fuse)  w w 1
+   TRACE PROPERTY  r(fuse)  l l 1
+   TRACE PROPERTY  r(fuse)  m m 0
+   TRACE PROPERTY  r(metop)  metopnumber metopnumber 0
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  m m 0
+   TRACE PROPERTY  d(nwdiode_victim)  a a 10
+   TRACE PROPERTY  d(nwdiode_victim)  p p 10
+   TRACE PROPERTY  d(nwdiode_victim)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  m m 0
+   TRACE PROPERTY  d(nwdiode_aggressor)  a a 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  p p 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  m m 0
+
+   // User Trace Property
+
+   TRACE PROPERTY  mn(nshort)  m mult w l
+   TRACE PROPERTY  mn(npass)  m mult w l
+   TRACE PROPERTY  mn(nlowvt)  m mult w l
+   TRACE PROPERTY  m(sonos_e)  m mult w l
+   TRACE PROPERTY  m  m mult w l
+   TRACE PROPERTY  m(fnpass)  m mult w l
+   TRACE PROPERTY  mn(nhv)  m mult w l
+   TRACE PROPERTY  mn(nhvnative)  m mult w l
+   TRACE PROPERTY  mn(ntvnative)  m mult w l
+   TRACE PROPERTY  mp(pshort)  m mult w l
+   TRACE PROPERTY  mp  m mult w l
+   TRACE PROPERTY  mp(phighvt)  m mult w l
+   TRACE PROPERTY  mp(plowvt)  m mult w l
+   TRACE PROPERTY  mp(phv)  m mult w l
+   TRACE PROPERTY  mn(nshortesd)  m mult w l
+   TRACE PROPERTY  mn(nhvesd)  m mult w l
+   TRACE PROPERTY  mn(nhvnativeesd)  m mult w l
+   TRACE PROPERTY  mp(phvesd)  m mult w l
+   TRACE PROPERTY  nvhv  m mult w l
+   TRACE PROPERTY  n20vhv1  m mult w l
+   TRACE PROPERTY  n20nativevhv1  m mult w l
+   TRACE PROPERTY  n20vhviso1  m mult w l
+   TRACE PROPERTY  n20nativevhviso1  m mult w l
+   TRACE PROPERTY  pvhv  m mult w l
+   TRACE PROPERTY  p20vhv1  m mult w l
+   TRACE PROPERTY  c(xcmimc1)  w l m
+   TRACE PROPERTY  c(xcmimc2)  w l m
+   TRACE PROPERTY  r(mrp1)  m w l
+   TRACE PROPERTY  xhrpoly_0p35  m w l
+   TRACE PROPERTY  xuhrpoly_0p35  m w l
+   TRACE PROPERTY  xhrpoly_0p69  m w l
+   TRACE PROPERTY  xuhrpoly_0p69  m w l
+   TRACE PROPERTY  xhrpoly_1p41  m w l
+   TRACE PROPERTY  xuhrpoly_1p41  m w l
+   TRACE PROPERTY  xhrpoly_2p85  m w l
+   TRACE PROPERTY  xuhrpoly_2p85  m w l
+
+
+
+                   CELL COMPARISON RESULTS ( TOP LEVEL )
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+LAYOUT CELL NAME:         sky130_fd_sc_hdll__a211o_4
+SOURCE CELL NAME:         sky130_fd_sc_hdll__a211o_4
+
+--------------------------------------------------------------------------------------------------------------
+
+INITIAL NUMBERS OF OBJECTS
+--------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:              9         9
+
+ Nets:              19        15    *
+
+ Instances:         12        12         MN (4 pins)
+                    12        12         MP (4 pins)
+                     1         0    *    Dpar (2 pins)
+                     4         0    *    Probe (2 pins)
+                ------    ------
+ Total Inst:        29        24
+
+
+NUMBERS OF OBJECTS AFTER TRANSFORMATION
+---------------------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:              9         9
+
+ Nets:              10        10
+
+ Instances:          3         3         MN (4 pins)
+                     1         1         MP (4 pins)
+                     1         1         SMN2 (4 pins)
+                     1         1         SPMP_2_1_1 (6 pins)
+                ------    ------
+ Total Inst:         6         6
+
+
+       * = Number of objects in layout different from number in source.
+
+
+
+**************************************************************************************************************
+                               INFORMATION AND WARNINGS
+**************************************************************************************************************
+
+
+                  Matched    Matched    Unmatched    Unmatched    Component
+                   Layout     Source       Layout       Source    Type
+                  -------    -------    ---------    ---------    ---------
+   Ports:               9          9            0            0
+
+   Nets:               10         10            0            0
+
+   Instances:           3          3            0            0    MN(NSHORT)
+                        1          1            0            0    MP(PHIGHVT)
+                        1          1            0            0    SMN2
+                        1          1            0            0    SPMP_2_1_1
+                  -------    -------    ---------    ---------
+   Total Inst:          6          6            0            0
+
+
+o Statistics:
+
+   5 layout instances were filtered and their pins removed from adjoining nets.
+
+   24 layout mos transistors were reduced to 10.  2 connecting nets were deleted.
+     10 mos transistors were deleted by parallel reduction.
+     4 mos transistors and 2 connecting nets were deleted by split-gate reduction.
+   24 source mos transistors were reduced to 10.  2 connecting nets were deleted.
+     10 mos transistors were deleted by parallel reduction.
+     4 mos transistors and 2 connecting nets were deleted by split-gate reduction.
+
+   4 layout nets had all their pins removed and were deleted.
+
+
+o Initial Correspondence Points:
+
+   Ports:        VNB VPB B1 C1 A2 A1 VPWR X VGND
+
+
+**************************************************************************************************************
+                                         SUMMARY
+**************************************************************************************************************
+
+Total CPU Time:      0 sec
+Total Elapsed Time:  0 sec
diff --git a/cells/a211o/sky130_fd_sc_hdll__a211o_4.pex.spice b/cells/a211o/sky130_fd_sc_hdll__a211o_4.pex.spice
index 9f89006..58ebea3 100644
--- a/cells/a211o/sky130_fd_sc_hdll__a211o_4.pex.spice
+++ b/cells/a211o/sky130_fd_sc_hdll__a211o_4.pex.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a211o_4.pex.spice
-* Created: Thu Aug 27 18:51:37 2020
+* Created: Wed Sep  2 08:15:55 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * Nominal Temperature: 27C
diff --git a/cells/a211o/sky130_fd_sc_hdll__a211o_4.pxi.spice b/cells/a211o/sky130_fd_sc_hdll__a211o_4.pxi.spice
index 423b2c8..e6639fb 100644
--- a/cells/a211o/sky130_fd_sc_hdll__a211o_4.pxi.spice
+++ b/cells/a211o/sky130_fd_sc_hdll__a211o_4.pxi.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a211o_4.pxi.spice
-* Created: Thu Aug 27 18:51:37 2020
+* Created: Wed Sep  2 08:15:55 2020
 * 
 x_PM_SKY130_FD_SC_HDLL__A211O_4%A_79_204# N_A_79_204#_M1007_d
 + N_A_79_204#_M1023_d N_A_79_204#_M1016_s N_A_79_204#_M1006_s
diff --git a/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice b/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice
index 9c1b8bb..095d2c2 100644
--- a/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice
+++ b/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a211o_4.spice
-* Created: Thu Aug 27 18:51:37 2020
+* Created: Wed Sep  2 08:15:55 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * 
diff --git a/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.lvs.report b/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.lvs.report
new file mode 100644
index 0000000..2bb87c0
--- /dev/null
+++ b/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.lvs.report
@@ -0,0 +1,482 @@
+
+LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.spice"
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------
+
+Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.spice"
+
+
+
+
+                  ##################################################
+                  ##                                              ##
+                  ##         C A L I B R E    S Y S T E M         ##
+                  ##                                              ##
+                  ##             L V S   R E P O R T              ##
+                  ##                                              ##
+                  ##################################################
+
+
+
+REPORT FILE NAME:         sky130_fd_sc_hdll__a211oi_1.lvs.report
+LAYOUT NAME:              svdb/sky130_fd_sc_hdll__a211oi_1.sp ('sky130_fd_sc_hdll__a211oi_1')
+SOURCE NAME:              /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.spice ('sky130_fd_sc_hdll__a211oi_1')
+RULE FILE:                /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_
+CREATION TIME:            Wed Sep  2 08:15:59 2020
+CURRENT DIRECTORY:        /home/hlusk/repos/SkyWater/osugooglelib/calibre
+USER NAME:                hlusk
+CALIBRE VERSION:          v2018.4_34.26    Mon Dec 3 14:40:54 PST 2018
+
+
+
+                               OVERALL COMPARISON RESULTS
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+
+**************************************************************************************************************
+                                      CELL  SUMMARY
+**************************************************************************************************************
+
+  Result         Layout                        Source
+  -----------    -----------                   --------------
+  CORRECT        sky130_fd_sc_hdll__a211oi_1   sky130_fd_sc_hdll__a211oi_1
+
+
+
+**************************************************************************************************************
+                                      LVS PARAMETERS
+**************************************************************************************************************
+
+
+o LVS Setup:
+
+   // LVS COMPONENT TYPE PROPERTY
+   // LVS COMPONENT SUBTYPE PROPERTY
+   // LVS PIN NAME PROPERTY
+   // LVS POWER NAME
+   // LVS GROUND NAME
+   LVS CELL SUPPLY                        NO
+   LVS RECOGNIZE GATES                    ALL
+   LVS IGNORE PORTS                       NO
+   LVS CHECK PORT NAMES                   YES
+   LVS IGNORE TRIVIAL NAMED PORTS         NO
+   LVS BUILTIN DEVICE PIN SWAP            YES
+   LVS ALL CAPACITOR PINS SWAPPABLE       NO
+   LVS DISCARD PINS BY DEVICE             YES
+   LVS SOFT SUBSTRATE PINS                NO
+   LVS INJECT LOGIC                       NO
+   LVS EXPAND UNBALANCED CELLS            YES
+   LVS FLATTEN INSIDE CELL                NO
+   LVS EXPAND SEED PROMOTIONS             NO
+   LVS PRESERVE PARAMETERIZED CELLS       NO
+   LVS GLOBALS ARE PORTS                  YES
+   LVS REVERSE WL                         NO
+   LVS SPICE PREFER PINS                  YES
+   LVS SPICE SLASH IS SPACE               NO
+   LVS SPICE ALLOW FLOATING PINS          YES
+   LVS SPICE ALLOW INLINE PARAMETERS      NO
+   LVS SPICE ALLOW UNQUOTED STRINGS       YES
+   LVS SPICE CONDITIONAL LDD              NO
+   LVS SPICE CULL PRIMITIVE SUBCIRCUITS   NO
+   // LVS SPICE EXCLUDE CELL SOURCE
+   // LVS SPICE EXCLUDE CELL LAYOUT
+   LVS SPICE IMPLIED MOS AREA             NO
+   // LVS SPICE MULTIPLIER NAME
+   LVS SPICE OVERRIDE GLOBALS             YES
+   LVS SPICE REDEFINE PARAM               YES
+   LVS SPICE REPLICATE DEVICES            YES
+   LVS SPICE SCALE X PARAMETERS           NO
+   LVS SPICE STRICT WL                    YES
+   // LVS SPICE OPTION
+   LVS STRICT SUBTYPES                    YES
+   LVS EXACT SUBTYPES                     NO
+   LAYOUT CASE                            NO
+   SOURCE CASE                            NO
+   LVS COMPARE CASE                       NO
+   LVS DOWNCASE DEVICE                    NO
+   LVS REPORT MAXIMUM                     50
+   LVS PROPERTY RESOLUTION MAXIMUM        ALL
+   LVS SIGNATURE MAXIMUM                  ALL
+   // LVS FILTER UNUSED OPTION
+   // LVS REPORT OPTION
+   LVS REPORT UNITS                       YES
+   // LVS NON USER NAME PORT
+   LVS NON USER NAME NET                  "^n[0-9]*$" "^net[0-9]*$"
+   // LVS NON USER NAME INSTANCE
+   // LVS IGNORE DEVICE PIN
+   // LVS PREFER NETS FILTER SOURCE
+   // LVS PREFER NETS FILTER LAYOUT
+
+   // Device Type Map
+
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_2p85" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT
+
+   // Reduction
+
+   LVS REDUCE SERIES MOS                  NO
+   LVS REDUCE PARALLEL MOS                NO
+   LVS REDUCE SEMI SERIES MOS             NO
+   LVS REDUCE SPLIT GATES                 YES [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE PARALLEL BIPOLAR            NO
+   LVS REDUCE SERIES CAPACITORS           NO
+   LVS REDUCE PARALLEL CAPACITORS         NO
+   LVS REDUCE SERIES RESISTORS            NO
+   LVS REDUCE PARALLEL RESISTORS          NO
+   LVS REDUCE PARALLEL DIODES             NO
+
+   LVS REDUCE  condiode  PARALLEL
+   LVS REDUCE  condiodeHvPsub  PARALLEL
+   LVS REDUCE  p20vhv1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  n20vhviso1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  nvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  pvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MP  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  M  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MN  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  Q(npnpar1x1)  PARALLEL
+   LVS REDUCE  Q(npnpar1x2)  PARALLEL
+   LVS REDUCE  Q(npn_1x1_2p0_hv)  PARALLEL
+   LVS REDUCE  Q(pnppar)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  Q(pnppar5x)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  D  PARALLEL [ TOLERANCE a 1 p 1 ]
+   LVS REDUCE  D  SERIES POS NEG NO
+   LVS REDUCE  C(xcmimc1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  C(xcmimc2)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R(mrp1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  SERIES POS NEG NO
+   LVS REDUCE  R(short)  PARALLEL
+   LVS REDUCE  R(short)  SERIES POS NEG NO
+   LVS REDUCE  R(fuse)  PARALLEL NO
+   LVS REDUCE  R(fuse)  SERIES POS NEG NO
+   LVS REDUCE  R(metop)  PARALLEL [ TOLERANCE metopNumber 0 ]
+   LVS REDUCE  R(metop)  SERIES POS NEG NO
+   LVS REDUCTION PRIORITY                 PARALLEL
+   
+   LVS SHORT EQUIVALENT NODES             NO
+
+   // Filter
+
+   LVS FILTER  R(cds_thru)  SHORT SOURCE
+   LVS FILTER  R(cds_thru)  SHORT LAYOUT
+   LVS FILTER  Dpar  OPEN SOURCE
+   LVS FILTER  Dpar  OPEN LAYOUT
+   LVS FILTER  Probe  OPEN SOURCE
+   LVS FILTER  Probe  OPEN LAYOUT
+   LVS FILTER  icecap  OPEN SOURCE
+   LVS FILTER  s8fmlt_iref_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_neg_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_vdac_termx  OPEN SOURCE
+   LVS FILTER  D  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN LAYOUT
+   LVS FILTER  tap_dev  OPEN SOURCE
+   LVS FILTER  tap_dev  OPEN LAYOUT
+   LVS FILTER  cad_dummy_open_device  OPEN SOURCE
+   LVS FILTER  cad_dummy_open_device  OPEN LAYOUT
+
+   // Trace Property
+
+   TRACE PROPERTY  xcnwvc  m m 0
+   TRACE PROPERTY  xcnwvc  w w 0
+   TRACE PROPERTY  xcnwvc  l l 0
+   TRACE PROPERTY  xcnwvc2  m m 0
+   TRACE PROPERTY  xcnwvc2  w w 0
+   TRACE PROPERTY  xcnwvc2  l l 0
+   TRACE PROPERTY  xchvnwc  m m 0
+   TRACE PROPERTY  q(npnpar1x1)  m m 0
+   TRACE PROPERTY  q(npnpar1x2)  m m 0
+   TRACE PROPERTY  q(npn_1x1_2p0_hv)  m m 0
+   TRACE PROPERTY  q(pnppar)  barea barea 0
+   TRACE PROPERTY  q(pnppar)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar)  earea earea 0
+   TRACE PROPERTY  q(pnppar)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar)  m m 0
+   TRACE PROPERTY  q(pnppar5x)  barea barea 0
+   TRACE PROPERTY  q(pnppar5x)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar5x)  earea earea 0
+   TRACE PROPERTY  q(pnppar5x)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar5x)  m m 0
+   TRACE PROPERTY  d(ndiode)  a a 1
+   TRACE PROPERTY  d(ndiode)  p p 1
+   TRACE PROPERTY  d(ndiode)  m m 0
+   TRACE PROPERTY  d(ndiode_h)  a a 1
+   TRACE PROPERTY  d(ndiode_h)  p p 1
+   TRACE PROPERTY  d(ndiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  m m 0
+   TRACE PROPERTY  d(pdiode)  a a 1
+   TRACE PROPERTY  d(pdiode)  p p 1
+   TRACE PROPERTY  d(pdiode)  m m 0
+   TRACE PROPERTY  d(pdiode_h)  a a 1
+   TRACE PROPERTY  d(pdiode_h)  p p 1
+   TRACE PROPERTY  d(pdiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub)  a a 1
+   TRACE PROPERTY  d(dnwdiode_psub)  p p 1
+   TRACE PROPERTY  d(dnwdiode_psub)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  m m 0
+   TRACE PROPERTY  xcmvpp  m m 0
+   TRACE PROPERTY  xcmvpp_2  m m 0
+   TRACE PROPERTY  xcmvpp2_nhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp2_phv5x4  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap2_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l40  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l20  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l10  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x1  m m 0
+   TRACE PROPERTY  xcmvppx4_2xnhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym50p4shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m5shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_lim4shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m4shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4m5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp5  m m 0
+   TRACE PROPERTY  xcmvpp4  m m 0
+   TRACE PROPERTY  xcmvpp3  m m 0
+   TRACE PROPERTY  r(mrdn)  w w 1
+   TRACE PROPERTY  r(mrdn)  l l 1
+   TRACE PROPERTY  r(mrdn)  m m 0
+   TRACE PROPERTY  r(mrdn_hv)  w w 1
+   TRACE PROPERTY  r(mrdn_hv)  l l 1
+   TRACE PROPERTY  r(mrdn_hv)  m m 0
+   TRACE PROPERTY  r(mrdp)  w w 1
+   TRACE PROPERTY  r(mrdp)  l l 1
+   TRACE PROPERTY  r(mrdp)  m m 0
+   TRACE PROPERTY  r(mrdp_hv)  w w 1
+   TRACE PROPERTY  r(mrdp_hv)  l l 1
+   TRACE PROPERTY  r(mrdp_hv)  m m 0
+   TRACE PROPERTY  r(mrl1)  w w 1
+   TRACE PROPERTY  r(mrl1)  l l 1
+   TRACE PROPERTY  r(mrl1)  m m 0
+   TRACE PROPERTY  r(xpwres)  w w 1
+   TRACE PROPERTY  r(xpwres)  l l 1
+   TRACE PROPERTY  r(xpwres)  m m 0
+   TRACE PROPERTY  r(short)  m m 0
+   TRACE PROPERTY  r(fuse)  w w 1
+   TRACE PROPERTY  r(fuse)  l l 1
+   TRACE PROPERTY  r(fuse)  m m 0
+   TRACE PROPERTY  r(metop)  metopnumber metopnumber 0
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  m m 0
+   TRACE PROPERTY  d(nwdiode_victim)  a a 10
+   TRACE PROPERTY  d(nwdiode_victim)  p p 10
+   TRACE PROPERTY  d(nwdiode_victim)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  m m 0
+   TRACE PROPERTY  d(nwdiode_aggressor)  a a 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  p p 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  m m 0
+
+   // User Trace Property
+
+   TRACE PROPERTY  mn(nshort)  m mult w l
+   TRACE PROPERTY  mn(npass)  m mult w l
+   TRACE PROPERTY  mn(nlowvt)  m mult w l
+   TRACE PROPERTY  m(sonos_e)  m mult w l
+   TRACE PROPERTY  m  m mult w l
+   TRACE PROPERTY  m(fnpass)  m mult w l
+   TRACE PROPERTY  mn(nhv)  m mult w l
+   TRACE PROPERTY  mn(nhvnative)  m mult w l
+   TRACE PROPERTY  mn(ntvnative)  m mult w l
+   TRACE PROPERTY  mp(pshort)  m mult w l
+   TRACE PROPERTY  mp  m mult w l
+   TRACE PROPERTY  mp(phighvt)  m mult w l
+   TRACE PROPERTY  mp(plowvt)  m mult w l
+   TRACE PROPERTY  mp(phv)  m mult w l
+   TRACE PROPERTY  mn(nshortesd)  m mult w l
+   TRACE PROPERTY  mn(nhvesd)  m mult w l
+   TRACE PROPERTY  mn(nhvnativeesd)  m mult w l
+   TRACE PROPERTY  mp(phvesd)  m mult w l
+   TRACE PROPERTY  nvhv  m mult w l
+   TRACE PROPERTY  n20vhv1  m mult w l
+   TRACE PROPERTY  n20nativevhv1  m mult w l
+   TRACE PROPERTY  n20vhviso1  m mult w l
+   TRACE PROPERTY  n20nativevhviso1  m mult w l
+   TRACE PROPERTY  pvhv  m mult w l
+   TRACE PROPERTY  p20vhv1  m mult w l
+   TRACE PROPERTY  c(xcmimc1)  w l m
+   TRACE PROPERTY  c(xcmimc2)  w l m
+   TRACE PROPERTY  r(mrp1)  m w l
+   TRACE PROPERTY  xhrpoly_0p35  m w l
+   TRACE PROPERTY  xuhrpoly_0p35  m w l
+   TRACE PROPERTY  xhrpoly_0p69  m w l
+   TRACE PROPERTY  xuhrpoly_0p69  m w l
+   TRACE PROPERTY  xhrpoly_1p41  m w l
+   TRACE PROPERTY  xuhrpoly_1p41  m w l
+   TRACE PROPERTY  xhrpoly_2p85  m w l
+   TRACE PROPERTY  xuhrpoly_2p85  m w l
+
+
+
+                   CELL COMPARISON RESULTS ( TOP LEVEL )
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+LAYOUT CELL NAME:         sky130_fd_sc_hdll__a211oi_1
+SOURCE CELL NAME:         sky130_fd_sc_hdll__a211oi_1
+
+--------------------------------------------------------------------------------------------------------------
+
+INITIAL NUMBERS OF OBJECTS
+--------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:              9         9
+
+ Nets:              16        12    *
+
+ Instances:          4         4         MN (4 pins)
+                     4         4         MP (4 pins)
+                     1         0    *    Dpar (2 pins)
+                     4         0    *    Probe (2 pins)
+                ------    ------
+ Total Inst:        13         8
+
+
+NUMBERS OF OBJECTS AFTER TRANSFORMATION
+---------------------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:              9         9
+
+ Nets:               9         9
+
+ Instances:          2         2         MN (4 pins)
+                     1         1         SMN2 (4 pins)
+                     1         1         SPMP_2_1_1 (6 pins)
+                ------    ------
+ Total Inst:         4         4
+
+
+       * = Number of objects in layout different from number in source.
+
+
+
+**************************************************************************************************************
+                               INFORMATION AND WARNINGS
+**************************************************************************************************************
+
+
+                  Matched    Matched    Unmatched    Unmatched    Component
+                   Layout     Source       Layout       Source    Type
+                  -------    -------    ---------    ---------    ---------
+   Ports:               9          9            0            0
+
+   Nets:                9          9            0            0
+
+   Instances:           2          2            0            0    MN(NSHORT)
+                        1          1            0            0    SMN2
+                        1          1            0            0    SPMP_2_1_1
+                  -------    -------    ---------    ---------
+   Total Inst:          4          4            0            0
+
+
+o Statistics:
+
+   5 layout instances were filtered and their pins removed from adjoining nets.
+
+   4 layout nets had all their pins removed and were deleted.
+
+
+o Initial Correspondence Points:
+
+   Ports:        VNB VPB A2 A1 B1 C1 VPWR Y VGND
+
+
+**************************************************************************************************************
+                                         SUMMARY
+**************************************************************************************************************
+
+Total CPU Time:      0 sec
+Total Elapsed Time:  0 sec
diff --git a/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.pex.spice b/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.pex.spice
index 60480c7..7a51bb7 100644
--- a/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.pex.spice
+++ b/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.pex.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a211oi_1.pex.spice
-* Created: Thu Aug 27 18:51:44 2020
+* Created: Wed Sep  2 08:16:02 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * Nominal Temperature: 27C
diff --git a/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.pxi.spice b/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.pxi.spice
index 5c35a37..82edb28 100644
--- a/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.pxi.spice
+++ b/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.pxi.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a211oi_1.pxi.spice
-* Created: Thu Aug 27 18:51:44 2020
+* Created: Wed Sep  2 08:16:02 2020
 * 
 x_PM_SKY130_FD_SC_HDLL__A211OI_1%A2 N_A2_c_40_n N_A2_M1000_g N_A2_c_41_n
 + N_A2_M1002_g A2 A2 PM_SKY130_FD_SC_HDLL__A211OI_1%A2
diff --git a/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.spice b/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.spice
index 6cb3674..9ea0a8f 100644
--- a/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.spice
+++ b/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a211oi_1.spice
-* Created: Thu Aug 27 18:51:44 2020
+* Created: Wed Sep  2 08:16:02 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * 
diff --git a/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.lvs.report b/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.lvs.report
new file mode 100644
index 0000000..df538c7
--- /dev/null
+++ b/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.lvs.report
@@ -0,0 +1,495 @@
+
+LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice"
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------
+
+Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice"
+
+
+
+
+                  ##################################################
+                  ##                                              ##
+                  ##         C A L I B R E    S Y S T E M         ##
+                  ##                                              ##
+                  ##             L V S   R E P O R T              ##
+                  ##                                              ##
+                  ##################################################
+
+
+
+REPORT FILE NAME:         sky130_fd_sc_hdll__a211oi_2.lvs.report
+LAYOUT NAME:              svdb/sky130_fd_sc_hdll__a211oi_2.sp ('sky130_fd_sc_hdll__a211oi_2')
+SOURCE NAME:              /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice ('sky130_fd_sc_hdll__a211oi_2')
+RULE FILE:                /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_
+CREATION TIME:            Wed Sep  2 08:16:06 2020
+CURRENT DIRECTORY:        /home/hlusk/repos/SkyWater/osugooglelib/calibre
+USER NAME:                hlusk
+CALIBRE VERSION:          v2018.4_34.26    Mon Dec 3 14:40:54 PST 2018
+
+
+
+                               OVERALL COMPARISON RESULTS
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+
+**************************************************************************************************************
+                                      CELL  SUMMARY
+**************************************************************************************************************
+
+  Result         Layout                        Source
+  -----------    -----------                   --------------
+  CORRECT        sky130_fd_sc_hdll__a211oi_2   sky130_fd_sc_hdll__a211oi_2
+
+
+
+**************************************************************************************************************
+                                      LVS PARAMETERS
+**************************************************************************************************************
+
+
+o LVS Setup:
+
+   // LVS COMPONENT TYPE PROPERTY
+   // LVS COMPONENT SUBTYPE PROPERTY
+   // LVS PIN NAME PROPERTY
+   // LVS POWER NAME
+   // LVS GROUND NAME
+   LVS CELL SUPPLY                        NO
+   LVS RECOGNIZE GATES                    ALL
+   LVS IGNORE PORTS                       NO
+   LVS CHECK PORT NAMES                   YES
+   LVS IGNORE TRIVIAL NAMED PORTS         NO
+   LVS BUILTIN DEVICE PIN SWAP            YES
+   LVS ALL CAPACITOR PINS SWAPPABLE       NO
+   LVS DISCARD PINS BY DEVICE             YES
+   LVS SOFT SUBSTRATE PINS                NO
+   LVS INJECT LOGIC                       NO
+   LVS EXPAND UNBALANCED CELLS            YES
+   LVS FLATTEN INSIDE CELL                NO
+   LVS EXPAND SEED PROMOTIONS             NO
+   LVS PRESERVE PARAMETERIZED CELLS       NO
+   LVS GLOBALS ARE PORTS                  YES
+   LVS REVERSE WL                         NO
+   LVS SPICE PREFER PINS                  YES
+   LVS SPICE SLASH IS SPACE               NO
+   LVS SPICE ALLOW FLOATING PINS          YES
+   LVS SPICE ALLOW INLINE PARAMETERS      NO
+   LVS SPICE ALLOW UNQUOTED STRINGS       YES
+   LVS SPICE CONDITIONAL LDD              NO
+   LVS SPICE CULL PRIMITIVE SUBCIRCUITS   NO
+   // LVS SPICE EXCLUDE CELL SOURCE
+   // LVS SPICE EXCLUDE CELL LAYOUT
+   LVS SPICE IMPLIED MOS AREA             NO
+   // LVS SPICE MULTIPLIER NAME
+   LVS SPICE OVERRIDE GLOBALS             YES
+   LVS SPICE REDEFINE PARAM               YES
+   LVS SPICE REPLICATE DEVICES            YES
+   LVS SPICE SCALE X PARAMETERS           NO
+   LVS SPICE STRICT WL                    YES
+   // LVS SPICE OPTION
+   LVS STRICT SUBTYPES                    YES
+   LVS EXACT SUBTYPES                     NO
+   LAYOUT CASE                            NO
+   SOURCE CASE                            NO
+   LVS COMPARE CASE                       NO
+   LVS DOWNCASE DEVICE                    NO
+   LVS REPORT MAXIMUM                     50
+   LVS PROPERTY RESOLUTION MAXIMUM        ALL
+   LVS SIGNATURE MAXIMUM                  ALL
+   // LVS FILTER UNUSED OPTION
+   // LVS REPORT OPTION
+   LVS REPORT UNITS                       YES
+   // LVS NON USER NAME PORT
+   LVS NON USER NAME NET                  "^n[0-9]*$" "^net[0-9]*$"
+   // LVS NON USER NAME INSTANCE
+   // LVS IGNORE DEVICE PIN
+   // LVS PREFER NETS FILTER SOURCE
+   // LVS PREFER NETS FILTER LAYOUT
+
+   // Device Type Map
+
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_2p85" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT
+
+   // Reduction
+
+   LVS REDUCE SERIES MOS                  NO
+   LVS REDUCE PARALLEL MOS                NO
+   LVS REDUCE SEMI SERIES MOS             NO
+   LVS REDUCE SPLIT GATES                 YES [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE PARALLEL BIPOLAR            NO
+   LVS REDUCE SERIES CAPACITORS           NO
+   LVS REDUCE PARALLEL CAPACITORS         NO
+   LVS REDUCE SERIES RESISTORS            NO
+   LVS REDUCE PARALLEL RESISTORS          NO
+   LVS REDUCE PARALLEL DIODES             NO
+
+   LVS REDUCE  condiode  PARALLEL
+   LVS REDUCE  condiodeHvPsub  PARALLEL
+   LVS REDUCE  p20vhv1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  n20vhviso1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  nvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  pvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MP  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  M  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MN  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  Q(npnpar1x1)  PARALLEL
+   LVS REDUCE  Q(npnpar1x2)  PARALLEL
+   LVS REDUCE  Q(npn_1x1_2p0_hv)  PARALLEL
+   LVS REDUCE  Q(pnppar)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  Q(pnppar5x)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  D  PARALLEL [ TOLERANCE a 1 p 1 ]
+   LVS REDUCE  D  SERIES POS NEG NO
+   LVS REDUCE  C(xcmimc1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  C(xcmimc2)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R(mrp1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  SERIES POS NEG NO
+   LVS REDUCE  R(short)  PARALLEL
+   LVS REDUCE  R(short)  SERIES POS NEG NO
+   LVS REDUCE  R(fuse)  PARALLEL NO
+   LVS REDUCE  R(fuse)  SERIES POS NEG NO
+   LVS REDUCE  R(metop)  PARALLEL [ TOLERANCE metopNumber 0 ]
+   LVS REDUCE  R(metop)  SERIES POS NEG NO
+   LVS REDUCTION PRIORITY                 PARALLEL
+   
+   LVS SHORT EQUIVALENT NODES             NO
+
+   // Filter
+
+   LVS FILTER  R(cds_thru)  SHORT SOURCE
+   LVS FILTER  R(cds_thru)  SHORT LAYOUT
+   LVS FILTER  Dpar  OPEN SOURCE
+   LVS FILTER  Dpar  OPEN LAYOUT
+   LVS FILTER  Probe  OPEN SOURCE
+   LVS FILTER  Probe  OPEN LAYOUT
+   LVS FILTER  icecap  OPEN SOURCE
+   LVS FILTER  s8fmlt_iref_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_neg_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_vdac_termx  OPEN SOURCE
+   LVS FILTER  D  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN LAYOUT
+   LVS FILTER  tap_dev  OPEN SOURCE
+   LVS FILTER  tap_dev  OPEN LAYOUT
+   LVS FILTER  cad_dummy_open_device  OPEN SOURCE
+   LVS FILTER  cad_dummy_open_device  OPEN LAYOUT
+
+   // Trace Property
+
+   TRACE PROPERTY  xcnwvc  m m 0
+   TRACE PROPERTY  xcnwvc  w w 0
+   TRACE PROPERTY  xcnwvc  l l 0
+   TRACE PROPERTY  xcnwvc2  m m 0
+   TRACE PROPERTY  xcnwvc2  w w 0
+   TRACE PROPERTY  xcnwvc2  l l 0
+   TRACE PROPERTY  xchvnwc  m m 0
+   TRACE PROPERTY  q(npnpar1x1)  m m 0
+   TRACE PROPERTY  q(npnpar1x2)  m m 0
+   TRACE PROPERTY  q(npn_1x1_2p0_hv)  m m 0
+   TRACE PROPERTY  q(pnppar)  barea barea 0
+   TRACE PROPERTY  q(pnppar)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar)  earea earea 0
+   TRACE PROPERTY  q(pnppar)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar)  m m 0
+   TRACE PROPERTY  q(pnppar5x)  barea barea 0
+   TRACE PROPERTY  q(pnppar5x)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar5x)  earea earea 0
+   TRACE PROPERTY  q(pnppar5x)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar5x)  m m 0
+   TRACE PROPERTY  d(ndiode)  a a 1
+   TRACE PROPERTY  d(ndiode)  p p 1
+   TRACE PROPERTY  d(ndiode)  m m 0
+   TRACE PROPERTY  d(ndiode_h)  a a 1
+   TRACE PROPERTY  d(ndiode_h)  p p 1
+   TRACE PROPERTY  d(ndiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  m m 0
+   TRACE PROPERTY  d(pdiode)  a a 1
+   TRACE PROPERTY  d(pdiode)  p p 1
+   TRACE PROPERTY  d(pdiode)  m m 0
+   TRACE PROPERTY  d(pdiode_h)  a a 1
+   TRACE PROPERTY  d(pdiode_h)  p p 1
+   TRACE PROPERTY  d(pdiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub)  a a 1
+   TRACE PROPERTY  d(dnwdiode_psub)  p p 1
+   TRACE PROPERTY  d(dnwdiode_psub)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  m m 0
+   TRACE PROPERTY  xcmvpp  m m 0
+   TRACE PROPERTY  xcmvpp_2  m m 0
+   TRACE PROPERTY  xcmvpp2_nhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp2_phv5x4  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap2_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l40  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l20  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l10  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x1  m m 0
+   TRACE PROPERTY  xcmvppx4_2xnhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym50p4shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m5shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_lim4shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m4shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4m5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp5  m m 0
+   TRACE PROPERTY  xcmvpp4  m m 0
+   TRACE PROPERTY  xcmvpp3  m m 0
+   TRACE PROPERTY  r(mrdn)  w w 1
+   TRACE PROPERTY  r(mrdn)  l l 1
+   TRACE PROPERTY  r(mrdn)  m m 0
+   TRACE PROPERTY  r(mrdn_hv)  w w 1
+   TRACE PROPERTY  r(mrdn_hv)  l l 1
+   TRACE PROPERTY  r(mrdn_hv)  m m 0
+   TRACE PROPERTY  r(mrdp)  w w 1
+   TRACE PROPERTY  r(mrdp)  l l 1
+   TRACE PROPERTY  r(mrdp)  m m 0
+   TRACE PROPERTY  r(mrdp_hv)  w w 1
+   TRACE PROPERTY  r(mrdp_hv)  l l 1
+   TRACE PROPERTY  r(mrdp_hv)  m m 0
+   TRACE PROPERTY  r(mrl1)  w w 1
+   TRACE PROPERTY  r(mrl1)  l l 1
+   TRACE PROPERTY  r(mrl1)  m m 0
+   TRACE PROPERTY  r(xpwres)  w w 1
+   TRACE PROPERTY  r(xpwres)  l l 1
+   TRACE PROPERTY  r(xpwres)  m m 0
+   TRACE PROPERTY  r(short)  m m 0
+   TRACE PROPERTY  r(fuse)  w w 1
+   TRACE PROPERTY  r(fuse)  l l 1
+   TRACE PROPERTY  r(fuse)  m m 0
+   TRACE PROPERTY  r(metop)  metopnumber metopnumber 0
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  m m 0
+   TRACE PROPERTY  d(nwdiode_victim)  a a 10
+   TRACE PROPERTY  d(nwdiode_victim)  p p 10
+   TRACE PROPERTY  d(nwdiode_victim)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  m m 0
+   TRACE PROPERTY  d(nwdiode_aggressor)  a a 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  p p 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  m m 0
+
+   // User Trace Property
+
+   TRACE PROPERTY  mn(nshort)  m mult w l
+   TRACE PROPERTY  mn(npass)  m mult w l
+   TRACE PROPERTY  mn(nlowvt)  m mult w l
+   TRACE PROPERTY  m(sonos_e)  m mult w l
+   TRACE PROPERTY  m  m mult w l
+   TRACE PROPERTY  m(fnpass)  m mult w l
+   TRACE PROPERTY  mn(nhv)  m mult w l
+   TRACE PROPERTY  mn(nhvnative)  m mult w l
+   TRACE PROPERTY  mn(ntvnative)  m mult w l
+   TRACE PROPERTY  mp(pshort)  m mult w l
+   TRACE PROPERTY  mp  m mult w l
+   TRACE PROPERTY  mp(phighvt)  m mult w l
+   TRACE PROPERTY  mp(plowvt)  m mult w l
+   TRACE PROPERTY  mp(phv)  m mult w l
+   TRACE PROPERTY  mn(nshortesd)  m mult w l
+   TRACE PROPERTY  mn(nhvesd)  m mult w l
+   TRACE PROPERTY  mn(nhvnativeesd)  m mult w l
+   TRACE PROPERTY  mp(phvesd)  m mult w l
+   TRACE PROPERTY  nvhv  m mult w l
+   TRACE PROPERTY  n20vhv1  m mult w l
+   TRACE PROPERTY  n20nativevhv1  m mult w l
+   TRACE PROPERTY  n20vhviso1  m mult w l
+   TRACE PROPERTY  n20nativevhviso1  m mult w l
+   TRACE PROPERTY  pvhv  m mult w l
+   TRACE PROPERTY  p20vhv1  m mult w l
+   TRACE PROPERTY  c(xcmimc1)  w l m
+   TRACE PROPERTY  c(xcmimc2)  w l m
+   TRACE PROPERTY  r(mrp1)  m w l
+   TRACE PROPERTY  xhrpoly_0p35  m w l
+   TRACE PROPERTY  xuhrpoly_0p35  m w l
+   TRACE PROPERTY  xhrpoly_0p69  m w l
+   TRACE PROPERTY  xuhrpoly_0p69  m w l
+   TRACE PROPERTY  xhrpoly_1p41  m w l
+   TRACE PROPERTY  xuhrpoly_1p41  m w l
+   TRACE PROPERTY  xhrpoly_2p85  m w l
+   TRACE PROPERTY  xuhrpoly_2p85  m w l
+
+
+
+                   CELL COMPARISON RESULTS ( TOP LEVEL )
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+LAYOUT CELL NAME:         sky130_fd_sc_hdll__a211oi_2
+SOURCE CELL NAME:         sky130_fd_sc_hdll__a211oi_2
+
+--------------------------------------------------------------------------------------------------------------
+
+INITIAL NUMBERS OF OBJECTS
+--------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:              9         9
+
+ Nets:              15        12    *
+
+ Instances:          8         8         MN (4 pins)
+                     8         8         MP (4 pins)
+                     1         0    *    Dpar (2 pins)
+                     3         0    *    Probe (2 pins)
+                ------    ------
+ Total Inst:        20        16
+
+
+NUMBERS OF OBJECTS AFTER TRANSFORMATION
+---------------------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:              9         9
+
+ Nets:               9         9
+
+ Instances:          2         2         MN (4 pins)
+                     1         1         SMN2 (4 pins)
+                     1         1         SPMP_2_1_1 (6 pins)
+                ------    ------
+ Total Inst:         4         4
+
+
+       * = Number of objects in layout different from number in source.
+
+
+
+**************************************************************************************************************
+                               INFORMATION AND WARNINGS
+**************************************************************************************************************
+
+
+                  Matched    Matched    Unmatched    Unmatched    Component
+                   Layout     Source       Layout       Source    Type
+                  -------    -------    ---------    ---------    ---------
+   Ports:               9          9            0            0
+
+   Nets:                9          9            0            0
+
+   Instances:           2          2            0            0    MN(NSHORT)
+                        1          1            0            0    SMN2
+                        1          1            0            0    SPMP_2_1_1
+                  -------    -------    ---------    ---------
+   Total Inst:          4          4            0            0
+
+
+o Statistics:
+
+   4 layout instances were filtered and their pins removed from adjoining nets.
+
+   16 layout mos transistors were reduced to 8.
+     8 mos transistors were deleted by parallel reduction.
+   16 source mos transistors were reduced to 8.
+     8 mos transistors were deleted by parallel reduction.
+
+   3 layout nets had all their pins removed and were deleted.
+
+
+o Initial Correspondence Points:
+
+   Ports:        VNB VPB C1 B1 A1 A2 Y VPWR VGND
+
+
+**************************************************************************************************************
+                                         SUMMARY
+**************************************************************************************************************
+
+Total CPU Time:      0 sec
+Total Elapsed Time:  0 sec
diff --git a/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.pex.spice b/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.pex.spice
index 558c989..f13bfd4 100644
--- a/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.pex.spice
+++ b/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.pex.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a211oi_2.pex.spice
-* Created: Thu Aug 27 18:51:50 2020
+* Created: Wed Sep  2 08:16:09 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * Nominal Temperature: 27C
diff --git a/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.pxi.spice b/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.pxi.spice
index 7c35d77..d74e96f 100644
--- a/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.pxi.spice
+++ b/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.pxi.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a211oi_2.pxi.spice
-* Created: Thu Aug 27 18:51:50 2020
+* Created: Wed Sep  2 08:16:09 2020
 * 
 x_PM_SKY130_FD_SC_HDLL__A211OI_2%C1 N_C1_c_79_n N_C1_M1004_g N_C1_c_75_n
 + N_C1_M1012_g N_C1_c_80_n N_C1_M1011_g N_C1_c_76_n N_C1_M1014_g C1 C1
diff --git a/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice b/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice
index 0a6c6b2..1b42d5d 100644
--- a/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice
+++ b/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a211oi_2.spice
-* Created: Thu Aug 27 18:51:50 2020
+* Created: Wed Sep  2 08:16:09 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * 
diff --git a/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.lvs.report b/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.lvs.report
new file mode 100644
index 0000000..36d8b8b
--- /dev/null
+++ b/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.lvs.report
@@ -0,0 +1,513 @@
+
+LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice"
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------
+
+Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice"
+
+
+
+
+                  ##################################################
+                  ##                                              ##
+                  ##         C A L I B R E    S Y S T E M         ##
+                  ##                                              ##
+                  ##             L V S   R E P O R T              ##
+                  ##                                              ##
+                  ##################################################
+
+
+
+REPORT FILE NAME:         sky130_fd_sc_hdll__a211oi_4.lvs.report
+LAYOUT NAME:              svdb/sky130_fd_sc_hdll__a211oi_4.sp ('sky130_fd_sc_hdll__a211oi_4')
+SOURCE NAME:              /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice ('sky130_fd_sc_hdll__a211oi_4')
+RULE FILE:                /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_
+CREATION TIME:            Wed Sep  2 08:16:13 2020
+CURRENT DIRECTORY:        /home/hlusk/repos/SkyWater/osugooglelib/calibre
+USER NAME:                hlusk
+CALIBRE VERSION:          v2018.4_34.26    Mon Dec 3 14:40:54 PST 2018
+
+
+
+                               OVERALL COMPARISON RESULTS
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+
+**************************************************************************************************************
+                                      CELL  SUMMARY
+**************************************************************************************************************
+
+  Result         Layout                        Source
+  -----------    -----------                   --------------
+  CORRECT        sky130_fd_sc_hdll__a211oi_4   sky130_fd_sc_hdll__a211oi_4
+
+
+
+**************************************************************************************************************
+                                      LVS PARAMETERS
+**************************************************************************************************************
+
+
+o LVS Setup:
+
+   // LVS COMPONENT TYPE PROPERTY
+   // LVS COMPONENT SUBTYPE PROPERTY
+   // LVS PIN NAME PROPERTY
+   // LVS POWER NAME
+   // LVS GROUND NAME
+   LVS CELL SUPPLY                        NO
+   LVS RECOGNIZE GATES                    ALL
+   LVS IGNORE PORTS                       NO
+   LVS CHECK PORT NAMES                   YES
+   LVS IGNORE TRIVIAL NAMED PORTS         NO
+   LVS BUILTIN DEVICE PIN SWAP            YES
+   LVS ALL CAPACITOR PINS SWAPPABLE       NO
+   LVS DISCARD PINS BY DEVICE             YES
+   LVS SOFT SUBSTRATE PINS                NO
+   LVS INJECT LOGIC                       NO
+   LVS EXPAND UNBALANCED CELLS            YES
+   LVS FLATTEN INSIDE CELL                NO
+   LVS EXPAND SEED PROMOTIONS             NO
+   LVS PRESERVE PARAMETERIZED CELLS       NO
+   LVS GLOBALS ARE PORTS                  YES
+   LVS REVERSE WL                         NO
+   LVS SPICE PREFER PINS                  YES
+   LVS SPICE SLASH IS SPACE               NO
+   LVS SPICE ALLOW FLOATING PINS          YES
+   LVS SPICE ALLOW INLINE PARAMETERS      NO
+   LVS SPICE ALLOW UNQUOTED STRINGS       YES
+   LVS SPICE CONDITIONAL LDD              NO
+   LVS SPICE CULL PRIMITIVE SUBCIRCUITS   NO
+   // LVS SPICE EXCLUDE CELL SOURCE
+   // LVS SPICE EXCLUDE CELL LAYOUT
+   LVS SPICE IMPLIED MOS AREA             NO
+   // LVS SPICE MULTIPLIER NAME
+   LVS SPICE OVERRIDE GLOBALS             YES
+   LVS SPICE REDEFINE PARAM               YES
+   LVS SPICE REPLICATE DEVICES            YES
+   LVS SPICE SCALE X PARAMETERS           NO
+   LVS SPICE STRICT WL                    YES
+   // LVS SPICE OPTION
+   LVS STRICT SUBTYPES                    YES
+   LVS EXACT SUBTYPES                     NO
+   LAYOUT CASE                            NO
+   SOURCE CASE                            NO
+   LVS COMPARE CASE                       NO
+   LVS DOWNCASE DEVICE                    NO
+   LVS REPORT MAXIMUM                     50
+   LVS PROPERTY RESOLUTION MAXIMUM        ALL
+   LVS SIGNATURE MAXIMUM                  ALL
+   // LVS FILTER UNUSED OPTION
+   // LVS REPORT OPTION
+   LVS REPORT UNITS                       YES
+   // LVS NON USER NAME PORT
+   LVS NON USER NAME NET                  "^n[0-9]*$" "^net[0-9]*$"
+   // LVS NON USER NAME INSTANCE
+   // LVS IGNORE DEVICE PIN
+   // LVS PREFER NETS FILTER SOURCE
+   // LVS PREFER NETS FILTER LAYOUT
+
+   // Device Type Map
+
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_2p85" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT
+
+   // Reduction
+
+   LVS REDUCE SERIES MOS                  NO
+   LVS REDUCE PARALLEL MOS                NO
+   LVS REDUCE SEMI SERIES MOS             NO
+   LVS REDUCE SPLIT GATES                 YES [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE PARALLEL BIPOLAR            NO
+   LVS REDUCE SERIES CAPACITORS           NO
+   LVS REDUCE PARALLEL CAPACITORS         NO
+   LVS REDUCE SERIES RESISTORS            NO
+   LVS REDUCE PARALLEL RESISTORS          NO
+   LVS REDUCE PARALLEL DIODES             NO
+
+   LVS REDUCE  condiode  PARALLEL
+   LVS REDUCE  condiodeHvPsub  PARALLEL
+   LVS REDUCE  p20vhv1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  n20vhviso1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  nvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  pvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MP  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  M  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MN  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  Q(npnpar1x1)  PARALLEL
+   LVS REDUCE  Q(npnpar1x2)  PARALLEL
+   LVS REDUCE  Q(npn_1x1_2p0_hv)  PARALLEL
+   LVS REDUCE  Q(pnppar)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  Q(pnppar5x)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  D  PARALLEL [ TOLERANCE a 1 p 1 ]
+   LVS REDUCE  D  SERIES POS NEG NO
+   LVS REDUCE  C(xcmimc1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  C(xcmimc2)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R(mrp1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  SERIES POS NEG NO
+   LVS REDUCE  R(short)  PARALLEL
+   LVS REDUCE  R(short)  SERIES POS NEG NO
+   LVS REDUCE  R(fuse)  PARALLEL NO
+   LVS REDUCE  R(fuse)  SERIES POS NEG NO
+   LVS REDUCE  R(metop)  PARALLEL [ TOLERANCE metopNumber 0 ]
+   LVS REDUCE  R(metop)  SERIES POS NEG NO
+   LVS REDUCTION PRIORITY                 PARALLEL
+   
+   LVS SHORT EQUIVALENT NODES             NO
+
+   // Filter
+
+   LVS FILTER  R(cds_thru)  SHORT SOURCE
+   LVS FILTER  R(cds_thru)  SHORT LAYOUT
+   LVS FILTER  Dpar  OPEN SOURCE
+   LVS FILTER  Dpar  OPEN LAYOUT
+   LVS FILTER  Probe  OPEN SOURCE
+   LVS FILTER  Probe  OPEN LAYOUT
+   LVS FILTER  icecap  OPEN SOURCE
+   LVS FILTER  s8fmlt_iref_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_neg_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_vdac_termx  OPEN SOURCE
+   LVS FILTER  D  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN LAYOUT
+   LVS FILTER  tap_dev  OPEN SOURCE
+   LVS FILTER  tap_dev  OPEN LAYOUT
+   LVS FILTER  cad_dummy_open_device  OPEN SOURCE
+   LVS FILTER  cad_dummy_open_device  OPEN LAYOUT
+
+   // Trace Property
+
+   TRACE PROPERTY  xcnwvc  m m 0
+   TRACE PROPERTY  xcnwvc  w w 0
+   TRACE PROPERTY  xcnwvc  l l 0
+   TRACE PROPERTY  xcnwvc2  m m 0
+   TRACE PROPERTY  xcnwvc2  w w 0
+   TRACE PROPERTY  xcnwvc2  l l 0
+   TRACE PROPERTY  xchvnwc  m m 0
+   TRACE PROPERTY  q(npnpar1x1)  m m 0
+   TRACE PROPERTY  q(npnpar1x2)  m m 0
+   TRACE PROPERTY  q(npn_1x1_2p0_hv)  m m 0
+   TRACE PROPERTY  q(pnppar)  barea barea 0
+   TRACE PROPERTY  q(pnppar)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar)  earea earea 0
+   TRACE PROPERTY  q(pnppar)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar)  m m 0
+   TRACE PROPERTY  q(pnppar5x)  barea barea 0
+   TRACE PROPERTY  q(pnppar5x)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar5x)  earea earea 0
+   TRACE PROPERTY  q(pnppar5x)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar5x)  m m 0
+   TRACE PROPERTY  d(ndiode)  a a 1
+   TRACE PROPERTY  d(ndiode)  p p 1
+   TRACE PROPERTY  d(ndiode)  m m 0
+   TRACE PROPERTY  d(ndiode_h)  a a 1
+   TRACE PROPERTY  d(ndiode_h)  p p 1
+   TRACE PROPERTY  d(ndiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  m m 0
+   TRACE PROPERTY  d(pdiode)  a a 1
+   TRACE PROPERTY  d(pdiode)  p p 1
+   TRACE PROPERTY  d(pdiode)  m m 0
+   TRACE PROPERTY  d(pdiode_h)  a a 1
+   TRACE PROPERTY  d(pdiode_h)  p p 1
+   TRACE PROPERTY  d(pdiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub)  a a 1
+   TRACE PROPERTY  d(dnwdiode_psub)  p p 1
+   TRACE PROPERTY  d(dnwdiode_psub)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  m m 0
+   TRACE PROPERTY  xcmvpp  m m 0
+   TRACE PROPERTY  xcmvpp_2  m m 0
+   TRACE PROPERTY  xcmvpp2_nhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp2_phv5x4  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap2_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l40  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l20  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l10  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x1  m m 0
+   TRACE PROPERTY  xcmvppx4_2xnhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym50p4shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m5shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_lim4shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m4shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4m5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp5  m m 0
+   TRACE PROPERTY  xcmvpp4  m m 0
+   TRACE PROPERTY  xcmvpp3  m m 0
+   TRACE PROPERTY  r(mrdn)  w w 1
+   TRACE PROPERTY  r(mrdn)  l l 1
+   TRACE PROPERTY  r(mrdn)  m m 0
+   TRACE PROPERTY  r(mrdn_hv)  w w 1
+   TRACE PROPERTY  r(mrdn_hv)  l l 1
+   TRACE PROPERTY  r(mrdn_hv)  m m 0
+   TRACE PROPERTY  r(mrdp)  w w 1
+   TRACE PROPERTY  r(mrdp)  l l 1
+   TRACE PROPERTY  r(mrdp)  m m 0
+   TRACE PROPERTY  r(mrdp_hv)  w w 1
+   TRACE PROPERTY  r(mrdp_hv)  l l 1
+   TRACE PROPERTY  r(mrdp_hv)  m m 0
+   TRACE PROPERTY  r(mrl1)  w w 1
+   TRACE PROPERTY  r(mrl1)  l l 1
+   TRACE PROPERTY  r(mrl1)  m m 0
+   TRACE PROPERTY  r(xpwres)  w w 1
+   TRACE PROPERTY  r(xpwres)  l l 1
+   TRACE PROPERTY  r(xpwres)  m m 0
+   TRACE PROPERTY  r(short)  m m 0
+   TRACE PROPERTY  r(fuse)  w w 1
+   TRACE PROPERTY  r(fuse)  l l 1
+   TRACE PROPERTY  r(fuse)  m m 0
+   TRACE PROPERTY  r(metop)  metopnumber metopnumber 0
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  m m 0
+   TRACE PROPERTY  d(nwdiode_victim)  a a 10
+   TRACE PROPERTY  d(nwdiode_victim)  p p 10
+   TRACE PROPERTY  d(nwdiode_victim)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  m m 0
+   TRACE PROPERTY  d(nwdiode_aggressor)  a a 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  p p 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  m m 0
+
+   // User Trace Property
+
+   TRACE PROPERTY  mn(nshort)  m mult w l
+   TRACE PROPERTY  mn(npass)  m mult w l
+   TRACE PROPERTY  mn(nlowvt)  m mult w l
+   TRACE PROPERTY  m(sonos_e)  m mult w l
+   TRACE PROPERTY  m  m mult w l
+   TRACE PROPERTY  m(fnpass)  m mult w l
+   TRACE PROPERTY  mn(nhv)  m mult w l
+   TRACE PROPERTY  mn(nhvnative)  m mult w l
+   TRACE PROPERTY  mn(ntvnative)  m mult w l
+   TRACE PROPERTY  mp(pshort)  m mult w l
+   TRACE PROPERTY  mp  m mult w l
+   TRACE PROPERTY  mp(phighvt)  m mult w l
+   TRACE PROPERTY  mp(plowvt)  m mult w l
+   TRACE PROPERTY  mp(phv)  m mult w l
+   TRACE PROPERTY  mn(nshortesd)  m mult w l
+   TRACE PROPERTY  mn(nhvesd)  m mult w l
+   TRACE PROPERTY  mn(nhvnativeesd)  m mult w l
+   TRACE PROPERTY  mp(phvesd)  m mult w l
+   TRACE PROPERTY  nvhv  m mult w l
+   TRACE PROPERTY  n20vhv1  m mult w l
+   TRACE PROPERTY  n20nativevhv1  m mult w l
+   TRACE PROPERTY  n20vhviso1  m mult w l
+   TRACE PROPERTY  n20nativevhviso1  m mult w l
+   TRACE PROPERTY  pvhv  m mult w l
+   TRACE PROPERTY  p20vhv1  m mult w l
+   TRACE PROPERTY  c(xcmimc1)  w l m
+   TRACE PROPERTY  c(xcmimc2)  w l m
+   TRACE PROPERTY  r(mrp1)  m w l
+   TRACE PROPERTY  xhrpoly_0p35  m w l
+   TRACE PROPERTY  xuhrpoly_0p35  m w l
+   TRACE PROPERTY  xhrpoly_0p69  m w l
+   TRACE PROPERTY  xuhrpoly_0p69  m w l
+   TRACE PROPERTY  xhrpoly_1p41  m w l
+   TRACE PROPERTY  xuhrpoly_1p41  m w l
+   TRACE PROPERTY  xhrpoly_2p85  m w l
+   TRACE PROPERTY  xuhrpoly_2p85  m w l
+
+
+
+                   CELL COMPARISON RESULTS ( TOP LEVEL )
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+LAYOUT CELL NAME:         sky130_fd_sc_hdll__a211oi_4
+SOURCE CELL NAME:         sky130_fd_sc_hdll__a211oi_4
+
+--------------------------------------------------------------------------------------------------------------
+
+INITIAL NUMBERS OF OBJECTS
+--------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:              9         9
+
+ Nets:              15        14    *
+
+ Instances:         16        16         MN (4 pins)
+                    16        16         MP (4 pins)
+                     1         0    *    Dpar (2 pins)
+                     1         0    *    Probe (2 pins)
+                ------    ------
+ Total Inst:        34        32
+
+
+NUMBERS OF OBJECTS AFTER TRANSFORMATION
+---------------------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:              9         9
+
+ Nets:               9         9
+
+ Instances:          2         2         MN (4 pins)
+                     1         1         SMN2 (4 pins)
+                     1         1         SPMP_2_1_1 (6 pins)
+                ------    ------
+ Total Inst:         4         4
+
+
+       * = Number of objects in layout different from number in source.
+
+
+
+**************************************************************************************************************
+                               INFORMATION AND WARNINGS
+**************************************************************************************************************
+
+
+                  Matched    Matched    Unmatched    Unmatched    Component
+                   Layout     Source       Layout       Source    Type
+                  -------    -------    ---------    ---------    ---------
+   Ports:               9          9            0            0
+
+   Nets:                9          9            0            0
+
+   Instances:           2          2            0            0    MN(NSHORT)
+                        1          1            0            0    SMN2
+                        1          1            0            0    SPMP_2_1_1
+                  -------    -------    ---------    ---------
+   Total Inst:          4          4            0            0
+
+
+o Statistics:
+
+   2 layout instances were filtered and their pins removed from adjoining nets.
+
+   32 layout mos transistors were reduced to 8.  2 connecting nets were deleted.
+     20 mos transistors were deleted by parallel reduction.
+     4 mos transistors and 2 connecting nets were deleted by split-gate reduction.
+   32 source mos transistors were reduced to 8.  2 connecting nets were deleted.
+     20 mos transistors were deleted by parallel reduction.
+     4 mos transistors and 2 connecting nets were deleted by split-gate reduction.
+
+   1 layout net had all its pins removed and was deleted.
+
+
+o Initial Correspondence Points:
+
+   Ports:        VNB VPB A2 A1 B1 C1 VPWR Y VGND
+
+
+**************************************************************************************************************
+                                         SUMMARY
+**************************************************************************************************************
+
+Total CPU Time:      0 sec
+Total Elapsed Time:  0 sec
diff --git a/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.pex.spice b/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.pex.spice
index fa17e94..20e3e4c 100644
--- a/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.pex.spice
+++ b/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.pex.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a211oi_4.pex.spice
-* Created: Thu Aug 27 18:51:57 2020
+* Created: Wed Sep  2 08:16:16 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * Nominal Temperature: 27C
@@ -288,7 +288,7 @@
 + $X2=5.695 $Y2=1.985
 .ends
 
-.subckt PM_SKY130_FD_SC_HDLL__A211OI_4%noxref_7 1 2 3 4 5 6 7 22 24 26 30 32 36
+.subckt PM_SKY130_FD_SC_HDLL__A211OI_4%A_27_297# 1 2 3 4 5 6 7 22 24 26 30 32 36
 + 38 42 44 46 47 52 57 59 61
 c101 46 0 4.11428e-20 $X=4.02 $Y=2.105
 c102 7 0 1.43842e-19 $X=7.755 $Y=1.485
@@ -462,7 +462,7 @@
 + $Y=1.485 $X2=0.73 $Y2=2.34
 .ends
 
-.subckt PM_SKY130_FD_SC_HDLL__A211OI_4%noxref_9 1 2 7 13 15
+.subckt PM_SKY130_FD_SC_HDLL__A211OI_4%A_869_297# 1 2 7 13 15
 r46 15 17 12.7467 $w=3.28e-07 $l=3.65e-07 $layer=LI1_cond $X=5.295 $Y=1.57
 + $X2=5.295 $Y2=1.935
 r47 11 15 2.36532 $w=2.5e-07 $l=1.65e-07 $layer=LI1_cond $X=5.46 $Y=1.57
diff --git a/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.pxi.spice b/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.pxi.spice
index d44bd4a..adaf91e 100644
--- a/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.pxi.spice
+++ b/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.pxi.spice
@@ -1,47 +1,46 @@
 * File: sky130_fd_sc_hdll__a211oi_4.pxi.spice
-* Created: Thu Aug 27 18:51:57 2020
+* Created: Wed Sep  2 08:16:16 2020
 * 
-x_PM_SKY130_FD_SC_HDLL__A211OI_4%A2 N_A2_c_109_n N_A2_M16_noxref_g N_A2_M1003_g
-+ N_A2_c_110_n N_A2_M17_noxref_g N_A2_M1011_g N_A2_c_111_n N_A2_M18_noxref_g
-+ N_A2_M1020_g N_A2_c_103_n N_A2_M23_noxref_g N_A2_c_104_n N_A2_M1031_g
-+ N_A2_c_113_n N_A2_c_105_n A2 N_A2_c_107_n N_A2_c_108_n
-+ PM_SKY130_FD_SC_HDLL__A211OI_4%A2
-x_PM_SKY130_FD_SC_HDLL__A211OI_4%A1 N_A1_M1012_g N_A1_c_225_n N_A1_M19_noxref_g
-+ N_A1_M1025_g N_A1_c_226_n N_A1_M20_noxref_g N_A1_M1028_g N_A1_c_227_n
-+ N_A1_M21_noxref_g N_A1_c_228_n N_A1_M22_noxref_g N_A1_M1030_g A1 N_A1_c_223_n
-+ N_A1_c_224_n A1 PM_SKY130_FD_SC_HDLL__A211OI_4%A1
+x_PM_SKY130_FD_SC_HDLL__A211OI_4%A2 N_A2_c_109_n N_A2_M1000_g N_A2_M1003_g
++ N_A2_c_110_n N_A2_M1002_g N_A2_M1011_g N_A2_c_111_n N_A2_M1014_g N_A2_M1020_g
++ N_A2_c_103_n N_A2_M1029_g N_A2_c_104_n N_A2_M1031_g N_A2_c_113_n N_A2_c_105_n
++ A2 N_A2_c_107_n N_A2_c_108_n PM_SKY130_FD_SC_HDLL__A211OI_4%A2
+x_PM_SKY130_FD_SC_HDLL__A211OI_4%A1 N_A1_M1012_g N_A1_c_225_n N_A1_M1007_g
++ N_A1_M1025_g N_A1_c_226_n N_A1_M1010_g N_A1_M1028_g N_A1_c_227_n N_A1_M1016_g
++ N_A1_c_228_n N_A1_M1018_g N_A1_M1030_g A1 N_A1_c_223_n N_A1_c_224_n A1
++ PM_SKY130_FD_SC_HDLL__A211OI_4%A1
 x_PM_SKY130_FD_SC_HDLL__A211OI_4%B1 N_B1_c_290_n N_B1_M1005_g N_B1_c_298_n
-+ N_B1_M24_noxref_g N_B1_c_299_n N_B1_M25_noxref_g N_B1_c_291_n N_B1_M1008_g
-+ N_B1_c_300_n N_B1_M26_noxref_g N_B1_c_292_n N_B1_M1021_g N_B1_c_293_n
-+ N_B1_M31_noxref_g N_B1_c_294_n N_B1_M1024_g N_B1_c_325_p N_B1_c_295_n
-+ N_B1_c_303_n N_B1_c_311_n N_B1_c_304_n N_B1_c_305_n B1 N_B1_c_296_n
-+ N_B1_c_297_n PM_SKY130_FD_SC_HDLL__A211OI_4%B1
-x_PM_SKY130_FD_SC_HDLL__A211OI_4%C1 N_C1_c_432_n N_C1_M27_noxref_g N_C1_c_426_n
-+ N_C1_M1001_g N_C1_c_433_n N_C1_M28_noxref_g N_C1_c_427_n N_C1_M1004_g
-+ N_C1_c_434_n N_C1_M29_noxref_g N_C1_c_428_n N_C1_M1013_g N_C1_c_435_n
-+ N_C1_M30_noxref_g N_C1_c_429_n N_C1_M1022_g N_C1_c_430_n N_C1_c_436_n C1
-+ N_C1_c_431_n PM_SKY130_FD_SC_HDLL__A211OI_4%C1
-x_PM_SKY130_FD_SC_HDLL__A211OI_4%noxref_7 N_noxref_7_M16_noxref_s
-+ N_noxref_7_M17_noxref_d N_noxref_7_M19_noxref_d N_noxref_7_M21_noxref_d
-+ N_noxref_7_M23_noxref_d N_noxref_7_M25_noxref_d N_noxref_7_M31_noxref_d
-+ N_noxref_7_c_514_n N_noxref_7_c_515_n N_noxref_7_c_524_n N_noxref_7_c_561_p
-+ N_noxref_7_c_528_n N_noxref_7_c_564_p N_noxref_7_c_530_n N_noxref_7_c_567_p
-+ N_noxref_7_c_531_n N_noxref_7_c_533_n N_noxref_7_c_570_p N_noxref_7_c_516_n
-+ N_noxref_7_c_534_n N_noxref_7_c_536_n N_noxref_7_c_537_n
-+ PM_SKY130_FD_SC_HDLL__A211OI_4%noxref_7
-x_PM_SKY130_FD_SC_HDLL__A211OI_4%VPWR N_VPWR_M16_noxref_d N_VPWR_M18_noxref_d
-+ N_VPWR_M20_noxref_d N_VPWR_M22_noxref_d VPWR N_VPWR_c_616_n N_VPWR_c_617_n
++ N_B1_M1017_g N_B1_c_299_n N_B1_M1023_g N_B1_c_291_n N_B1_M1008_g N_B1_c_300_n
++ N_B1_M1009_g N_B1_c_292_n N_B1_M1021_g N_B1_c_293_n N_B1_M1027_g N_B1_c_294_n
++ N_B1_M1024_g N_B1_c_325_p N_B1_c_295_n N_B1_c_303_n N_B1_c_311_n N_B1_c_304_n
++ N_B1_c_305_n B1 N_B1_c_296_n N_B1_c_297_n PM_SKY130_FD_SC_HDLL__A211OI_4%B1
+x_PM_SKY130_FD_SC_HDLL__A211OI_4%C1 N_C1_c_432_n N_C1_M1015_g N_C1_c_426_n
++ N_C1_M1001_g N_C1_c_433_n N_C1_M1006_g N_C1_c_427_n N_C1_M1004_g N_C1_c_434_n
++ N_C1_M1019_g N_C1_c_428_n N_C1_M1013_g N_C1_c_435_n N_C1_M1026_g N_C1_c_429_n
++ N_C1_M1022_g N_C1_c_430_n N_C1_c_436_n C1 N_C1_c_431_n
++ PM_SKY130_FD_SC_HDLL__A211OI_4%C1
+x_PM_SKY130_FD_SC_HDLL__A211OI_4%A_27_297# N_A_27_297#_M1000_d
++ N_A_27_297#_M1002_d N_A_27_297#_M1007_s N_A_27_297#_M1016_s
++ N_A_27_297#_M1029_d N_A_27_297#_M1023_d N_A_27_297#_M1027_d
++ N_A_27_297#_c_514_n N_A_27_297#_c_515_n N_A_27_297#_c_524_n
++ N_A_27_297#_c_561_p N_A_27_297#_c_528_n N_A_27_297#_c_564_p
++ N_A_27_297#_c_530_n N_A_27_297#_c_567_p N_A_27_297#_c_531_n
++ N_A_27_297#_c_533_n N_A_27_297#_c_570_p N_A_27_297#_c_516_n
++ N_A_27_297#_c_534_n N_A_27_297#_c_536_n N_A_27_297#_c_537_n
++ PM_SKY130_FD_SC_HDLL__A211OI_4%A_27_297#
+x_PM_SKY130_FD_SC_HDLL__A211OI_4%VPWR N_VPWR_M1000_s N_VPWR_M1014_s
++ N_VPWR_M1010_d N_VPWR_M1018_d VPWR N_VPWR_c_616_n N_VPWR_c_617_n
 + N_VPWR_c_618_n N_VPWR_c_619_n N_VPWR_c_620_n N_VPWR_c_615_n N_VPWR_c_622_n
 + N_VPWR_c_623_n N_VPWR_c_624_n N_VPWR_c_625_n
 + PM_SKY130_FD_SC_HDLL__A211OI_4%VPWR
-x_PM_SKY130_FD_SC_HDLL__A211OI_4%noxref_9 N_noxref_9_M24_noxref_d
-+ N_noxref_9_M28_noxref_d N_noxref_9_c_736_n N_noxref_9_c_732_n
-+ N_noxref_9_c_733_n PM_SKY130_FD_SC_HDLL__A211OI_4%noxref_9
+x_PM_SKY130_FD_SC_HDLL__A211OI_4%A_869_297# N_A_869_297#_M1017_s
++ N_A_869_297#_M1006_d N_A_869_297#_c_736_n N_A_869_297#_c_732_n
++ N_A_869_297#_c_733_n PM_SKY130_FD_SC_HDLL__A211OI_4%A_869_297#
 x_PM_SKY130_FD_SC_HDLL__A211OI_4%Y N_Y_M1012_s N_Y_M1028_s N_Y_M1005_s
-+ N_Y_M1021_s N_Y_M1004_s N_Y_M1022_s N_Y_M27_noxref_d N_Y_M29_noxref_d
-+ N_Y_c_786_n N_Y_c_787_n N_Y_c_801_n N_Y_c_882_p N_Y_c_834_n N_Y_c_807_n
-+ N_Y_c_884_p N_Y_c_812_n N_Y_c_782_n N_Y_c_789_n N_Y_c_791_n N_Y_c_823_n
-+ N_Y_c_852_n N_Y_c_876_p Y N_Y_c_783_n PM_SKY130_FD_SC_HDLL__A211OI_4%Y
++ N_Y_M1021_s N_Y_M1004_s N_Y_M1022_s N_Y_M1015_s N_Y_M1019_s N_Y_c_786_n
++ N_Y_c_787_n N_Y_c_801_n N_Y_c_882_p N_Y_c_834_n N_Y_c_807_n N_Y_c_884_p
++ N_Y_c_812_n N_Y_c_782_n N_Y_c_789_n N_Y_c_791_n N_Y_c_823_n N_Y_c_852_n
++ N_Y_c_876_p Y N_Y_c_783_n PM_SKY130_FD_SC_HDLL__A211OI_4%Y
 x_PM_SKY130_FD_SC_HDLL__A211OI_4%VGND N_VGND_M1003_d N_VGND_M1011_d
 + N_VGND_M1031_d N_VGND_M1008_d N_VGND_M1001_d N_VGND_M1013_d N_VGND_M1024_d
 + N_VGND_c_924_n N_VGND_c_925_n N_VGND_c_926_n N_VGND_c_927_n N_VGND_c_928_n
@@ -136,9 +135,9 @@
 cc_80 VPB N_C1_c_435_n 0.01663f $X=-0.19 $Y=1.305 $X2=1.46 $Y2=0.56
 cc_81 VPB N_C1_c_436_n 0.00228439f $X=-0.19 $Y=1.305 $X2=1.535 $Y2=1.535
 cc_82 VPB N_C1_c_431_n 0.0491383f $X=-0.19 $Y=1.305 $X2=0.965 $Y2=1.217
-cc_83 VPB N_noxref_7_c_514_n 0.0125686f $X=-0.19 $Y=1.305 $X2=3.785 $Y2=1.41
-cc_84 VPB N_noxref_7_c_515_n 0.0144536f $X=-0.19 $Y=1.305 $X2=3.785 $Y2=1.985
-cc_85 VPB N_noxref_7_c_516_n 0.00955326f $X=-0.19 $Y=1.305 $X2=0.93 $Y2=1.33
+cc_83 VPB N_A_27_297#_c_514_n 0.0125686f $X=-0.19 $Y=1.305 $X2=3.785 $Y2=1.41
+cc_84 VPB N_A_27_297#_c_515_n 0.0144536f $X=-0.19 $Y=1.305 $X2=3.785 $Y2=1.985
+cc_85 VPB N_A_27_297#_c_516_n 0.00955326f $X=-0.19 $Y=1.305 $X2=0.93 $Y2=1.33
 cc_86 VPB N_VPWR_c_616_n 0.0143912f $X=-0.19 $Y=1.305 $X2=1.435 $Y2=1.41
 cc_87 VPB N_VPWR_c_617_n 0.0123455f $X=-0.19 $Y=1.305 $X2=1.46 $Y2=0.56
 cc_88 VPB N_VPWR_c_618_n 0.0123059f $X=-0.19 $Y=1.305 $X2=3.81 $Y2=0.995
@@ -149,8 +148,8 @@
 cc_93 VPB N_VPWR_c_623_n 0.00537738f $X=-0.19 $Y=1.305 $X2=0 $Y2=0
 cc_94 VPB N_VPWR_c_624_n 0.00537738f $X=-0.19 $Y=1.305 $X2=1.535 $Y2=1.33
 cc_95 VPB N_VPWR_c_625_n 0.00547137f $X=-0.19 $Y=1.305 $X2=0 $Y2=0
-cc_96 VPB N_noxref_9_c_732_n 0.00541979f $X=-0.19 $Y=1.305 $X2=0.99 $Y2=0.56
-cc_97 VPB N_noxref_9_c_733_n 0.00218946f $X=-0.19 $Y=1.305 $X2=1.435 $Y2=1.41
+cc_96 VPB N_A_869_297#_c_732_n 0.00541979f $X=-0.19 $Y=1.305 $X2=0.99 $Y2=0.56
+cc_97 VPB N_A_869_297#_c_733_n 0.00218946f $X=-0.19 $Y=1.305 $X2=1.435 $Y2=1.41
 cc_98 VPB Y 0.0275049f $X=-0.19 $Y=1.305 $X2=0 $Y2=0
 cc_99 VPB N_Y_c_783_n 0.00967841f $X=-0.19 $Y=1.305 $X2=0 $Y2=0
 cc_100 N_A2_M1020_g N_A1_M1012_g 0.0232139f $X=1.46 $Y=0.56 $X2=0 $Y2=0
@@ -183,38 +182,37 @@
 cc_127 N_A2_c_103_n N_B1_c_297_n 0.00162342f $X=3.785 $Y=1.41 $X2=0 $Y2=0
 cc_128 N_A2_c_113_n N_B1_c_297_n 0.0083273f $X=3.595 $Y=1.535 $X2=0 $Y2=0
 cc_129 N_A2_c_105_n N_B1_c_297_n 0.0363011f $X=3.76 $Y=1.16 $X2=0 $Y2=0
-cc_130 A2 N_noxref_7_M16_noxref_s 0.00295363f $X=1.07 $Y=1.445 $X2=-0.19
-+ $Y2=-0.24
-cc_131 A2 N_noxref_7_M17_noxref_d 0.0013695f $X=1.07 $Y=1.445 $X2=0 $Y2=0
-cc_132 N_A2_c_108_n N_noxref_7_M17_noxref_d 4.96997e-19 $X=1.535 $Y=1.33 $X2=0
+cc_130 A2 N_A_27_297#_M1000_d 0.00295363f $X=1.07 $Y=1.445 $X2=-0.19 $Y2=-0.24
+cc_131 A2 N_A_27_297#_M1002_d 0.0013695f $X=1.07 $Y=1.445 $X2=0 $Y2=0
+cc_132 N_A2_c_108_n N_A_27_297#_M1002_d 4.96997e-19 $X=1.535 $Y=1.33 $X2=0 $Y2=0
+cc_133 N_A2_c_113_n N_A_27_297#_M1007_s 0.00181032f $X=3.595 $Y=1.535 $X2=0
 + $Y2=0
-cc_133 N_A2_c_113_n N_noxref_7_M19_noxref_d 0.00181032f $X=3.595 $Y=1.535 $X2=0
+cc_134 N_A2_c_113_n N_A_27_297#_M1016_s 0.00181032f $X=3.595 $Y=1.535 $X2=0
 + $Y2=0
-cc_134 N_A2_c_113_n N_noxref_7_M21_noxref_d 0.00181032f $X=3.595 $Y=1.535 $X2=0
+cc_135 N_A2_c_113_n N_A_27_297#_M1029_d 0.00153522f $X=3.595 $Y=1.535 $X2=0
 + $Y2=0
-cc_135 N_A2_c_113_n N_noxref_7_M23_noxref_d 0.00153522f $X=3.595 $Y=1.535 $X2=0
+cc_136 A2 N_A_27_297#_c_514_n 0.0218555f $X=1.07 $Y=1.445 $X2=0 $Y2=0
+cc_137 N_A2_c_109_n N_A_27_297#_c_524_n 0.0143534f $X=0.495 $Y=1.41 $X2=0 $Y2=0
+cc_138 N_A2_c_110_n N_A_27_297#_c_524_n 0.0148071f $X=0.965 $Y=1.41 $X2=0 $Y2=0
+cc_139 A2 N_A_27_297#_c_524_n 0.0428155f $X=1.07 $Y=1.445 $X2=0 $Y2=0
+cc_140 N_A2_c_107_n N_A_27_297#_c_524_n 8.48578e-19 $X=1.435 $Y=1.217 $X2=0
 + $Y2=0
-cc_136 A2 N_noxref_7_c_514_n 0.0218555f $X=1.07 $Y=1.445 $X2=0 $Y2=0
-cc_137 N_A2_c_109_n N_noxref_7_c_524_n 0.0143534f $X=0.495 $Y=1.41 $X2=0 $Y2=0
-cc_138 N_A2_c_110_n N_noxref_7_c_524_n 0.0148071f $X=0.965 $Y=1.41 $X2=0 $Y2=0
-cc_139 A2 N_noxref_7_c_524_n 0.0428155f $X=1.07 $Y=1.445 $X2=0 $Y2=0
-cc_140 N_A2_c_107_n N_noxref_7_c_524_n 8.48578e-19 $X=1.435 $Y=1.217 $X2=0 $Y2=0
-cc_141 N_A2_c_111_n N_noxref_7_c_528_n 0.0148013f $X=1.435 $Y=1.41 $X2=0 $Y2=0
-cc_142 N_A2_c_108_n N_noxref_7_c_528_n 0.0405214f $X=1.535 $Y=1.33 $X2=0 $Y2=0
-cc_143 N_A2_c_113_n N_noxref_7_c_530_n 0.0392728f $X=3.595 $Y=1.535 $X2=0 $Y2=0
-cc_144 N_A2_c_103_n N_noxref_7_c_531_n 0.0153796f $X=3.785 $Y=1.41 $X2=0 $Y2=0
-cc_145 N_A2_c_113_n N_noxref_7_c_531_n 0.040879f $X=3.595 $Y=1.535 $X2=0 $Y2=0
-cc_146 N_A2_c_113_n N_noxref_7_c_533_n 0.00356588f $X=3.595 $Y=1.535 $X2=0 $Y2=0
-cc_147 A2 N_noxref_7_c_534_n 0.0150366f $X=1.07 $Y=1.445 $X2=0 $Y2=0
-cc_148 N_A2_c_107_n N_noxref_7_c_534_n 6.76214e-19 $X=1.435 $Y=1.217 $X2=0 $Y2=0
-cc_149 N_A2_c_113_n N_noxref_7_c_536_n 0.0138678f $X=3.595 $Y=1.535 $X2=0 $Y2=0
-cc_150 N_A2_c_113_n N_noxref_7_c_537_n 0.0138678f $X=3.595 $Y=1.535 $X2=0 $Y2=0
-cc_151 A2 N_VPWR_M16_noxref_d 0.00194857f $X=1.07 $Y=1.445 $X2=-0.19 $Y2=-0.24
-cc_152 N_A2_c_113_n N_VPWR_M18_noxref_d 0.00187879f $X=3.595 $Y=1.535 $X2=0
+cc_141 N_A2_c_111_n N_A_27_297#_c_528_n 0.0148013f $X=1.435 $Y=1.41 $X2=0 $Y2=0
+cc_142 N_A2_c_108_n N_A_27_297#_c_528_n 0.0405214f $X=1.535 $Y=1.33 $X2=0 $Y2=0
+cc_143 N_A2_c_113_n N_A_27_297#_c_530_n 0.0392728f $X=3.595 $Y=1.535 $X2=0 $Y2=0
+cc_144 N_A2_c_103_n N_A_27_297#_c_531_n 0.0153796f $X=3.785 $Y=1.41 $X2=0 $Y2=0
+cc_145 N_A2_c_113_n N_A_27_297#_c_531_n 0.040879f $X=3.595 $Y=1.535 $X2=0 $Y2=0
+cc_146 N_A2_c_113_n N_A_27_297#_c_533_n 0.00356588f $X=3.595 $Y=1.535 $X2=0
 + $Y2=0
-cc_153 N_A2_c_113_n N_VPWR_M20_noxref_d 0.00187879f $X=3.595 $Y=1.535 $X2=0
+cc_147 A2 N_A_27_297#_c_534_n 0.0150366f $X=1.07 $Y=1.445 $X2=0 $Y2=0
+cc_148 N_A2_c_107_n N_A_27_297#_c_534_n 6.76214e-19 $X=1.435 $Y=1.217 $X2=0
 + $Y2=0
-cc_154 N_A2_c_113_n N_VPWR_M22_noxref_d 0.001873f $X=3.595 $Y=1.535 $X2=0 $Y2=0
+cc_149 N_A2_c_113_n N_A_27_297#_c_536_n 0.0138678f $X=3.595 $Y=1.535 $X2=0 $Y2=0
+cc_150 N_A2_c_113_n N_A_27_297#_c_537_n 0.0138678f $X=3.595 $Y=1.535 $X2=0 $Y2=0
+cc_151 A2 N_VPWR_M1000_s 0.00194857f $X=1.07 $Y=1.445 $X2=-0.19 $Y2=-0.24
+cc_152 N_A2_c_113_n N_VPWR_M1014_s 0.00187879f $X=3.595 $Y=1.535 $X2=0 $Y2=0
+cc_153 N_A2_c_113_n N_VPWR_M1010_d 0.00187879f $X=3.595 $Y=1.535 $X2=0 $Y2=0
+cc_154 N_A2_c_113_n N_VPWR_M1018_d 0.001873f $X=3.595 $Y=1.535 $X2=0 $Y2=0
 cc_155 N_A2_c_109_n N_VPWR_c_616_n 0.00311736f $X=0.495 $Y=1.41 $X2=0 $Y2=0
 cc_156 N_A2_c_110_n N_VPWR_c_617_n 0.00453434f $X=0.965 $Y=1.41 $X2=0 $Y2=0
 cc_157 N_A2_c_111_n N_VPWR_c_617_n 0.00309549f $X=1.435 $Y=1.41 $X2=0 $Y2=0
@@ -265,10 +263,10 @@
 cc_199 A2 N_A_119_47#_c_1061_n 0.0155201f $X=1.07 $Y=1.445 $X2=0 $Y2=0
 cc_200 N_A2_c_107_n N_A_119_47#_c_1061_n 0.00308075f $X=1.435 $Y=1.217 $X2=0
 + $Y2=0
-cc_201 N_A1_c_225_n N_noxref_7_c_528_n 0.0152244f $X=1.905 $Y=1.41 $X2=0 $Y2=0
-cc_202 N_A1_c_226_n N_noxref_7_c_530_n 0.0148803f $X=2.375 $Y=1.41 $X2=0 $Y2=0
-cc_203 N_A1_c_227_n N_noxref_7_c_530_n 0.0153033f $X=2.845 $Y=1.41 $X2=0 $Y2=0
-cc_204 N_A1_c_228_n N_noxref_7_c_531_n 0.0148013f $X=3.315 $Y=1.41 $X2=0 $Y2=0
+cc_201 N_A1_c_225_n N_A_27_297#_c_528_n 0.0152244f $X=1.905 $Y=1.41 $X2=0 $Y2=0
+cc_202 N_A1_c_226_n N_A_27_297#_c_530_n 0.0148803f $X=2.375 $Y=1.41 $X2=0 $Y2=0
+cc_203 N_A1_c_227_n N_A_27_297#_c_530_n 0.0153033f $X=2.845 $Y=1.41 $X2=0 $Y2=0
+cc_204 N_A1_c_228_n N_A_27_297#_c_531_n 0.0148013f $X=3.315 $Y=1.41 $X2=0 $Y2=0
 cc_205 N_A1_c_225_n N_VPWR_c_618_n 0.00450253f $X=1.905 $Y=1.41 $X2=0 $Y2=0
 cc_206 N_A1_c_226_n N_VPWR_c_618_n 0.00309549f $X=2.375 $Y=1.41 $X2=0 $Y2=0
 cc_207 N_A1_c_227_n N_VPWR_c_619_n 0.00450253f $X=2.845 $Y=1.41 $X2=0 $Y2=0
@@ -325,16 +323,14 @@
 cc_258 N_B1_c_303_n N_C1_c_431_n 0.00322928f $X=7.28 $Y=1.53 $X2=0 $Y2=0
 cc_259 N_B1_c_305_n N_C1_c_431_n 7.84743e-19 $X=7.425 $Y=1.53 $X2=0 $Y2=0
 cc_260 N_B1_c_296_n N_C1_c_431_n 0.0273394f $X=5.195 $Y=1.202 $X2=0 $Y2=0
-cc_261 N_B1_c_303_n N_noxref_7_M25_noxref_d 0.00116348f $X=7.28 $Y=1.53 $X2=0
-+ $Y2=0
-cc_262 N_B1_c_297_n N_noxref_7_M25_noxref_d 0.00163863f $X=4.96 $Y=1.325 $X2=0
-+ $Y2=0
-cc_263 N_B1_c_298_n N_noxref_7_c_516_n 0.01165f $X=4.255 $Y=1.41 $X2=0 $Y2=0
-cc_264 N_B1_c_299_n N_noxref_7_c_516_n 0.0100267f $X=4.725 $Y=1.41 $X2=0 $Y2=0
-cc_265 N_B1_c_300_n N_noxref_7_c_516_n 0.0102134f $X=5.195 $Y=1.41 $X2=0 $Y2=0
-cc_266 N_B1_c_293_n N_noxref_7_c_516_n 0.0102822f $X=7.665 $Y=1.41 $X2=0 $Y2=0
-cc_267 N_B1_c_311_n N_noxref_7_c_516_n 0.00114739f $X=4.515 $Y=1.53 $X2=0 $Y2=0
-cc_268 N_B1_c_297_n N_noxref_7_c_516_n 0.0020586f $X=4.96 $Y=1.325 $X2=0 $Y2=0
+cc_261 N_B1_c_303_n N_A_27_297#_M1023_d 0.00116348f $X=7.28 $Y=1.53 $X2=0 $Y2=0
+cc_262 N_B1_c_297_n N_A_27_297#_M1023_d 0.00163863f $X=4.96 $Y=1.325 $X2=0 $Y2=0
+cc_263 N_B1_c_298_n N_A_27_297#_c_516_n 0.01165f $X=4.255 $Y=1.41 $X2=0 $Y2=0
+cc_264 N_B1_c_299_n N_A_27_297#_c_516_n 0.0100267f $X=4.725 $Y=1.41 $X2=0 $Y2=0
+cc_265 N_B1_c_300_n N_A_27_297#_c_516_n 0.0102134f $X=5.195 $Y=1.41 $X2=0 $Y2=0
+cc_266 N_B1_c_293_n N_A_27_297#_c_516_n 0.0102822f $X=7.665 $Y=1.41 $X2=0 $Y2=0
+cc_267 N_B1_c_311_n N_A_27_297#_c_516_n 0.00114739f $X=4.515 $Y=1.53 $X2=0 $Y2=0
+cc_268 N_B1_c_297_n N_A_27_297#_c_516_n 0.0020586f $X=4.96 $Y=1.325 $X2=0 $Y2=0
 cc_269 N_B1_c_298_n N_VPWR_c_620_n 0.00429453f $X=4.255 $Y=1.41 $X2=0 $Y2=0
 cc_270 N_B1_c_299_n N_VPWR_c_620_n 0.00429453f $X=4.725 $Y=1.41 $X2=0 $Y2=0
 cc_271 N_B1_c_300_n N_VPWR_c_620_n 0.00429453f $X=5.195 $Y=1.41 $X2=0 $Y2=0
@@ -344,28 +340,35 @@
 cc_275 N_B1_c_300_n N_VPWR_c_615_n 0.00615459f $X=5.195 $Y=1.41 $X2=0 $Y2=0
 cc_276 N_B1_c_293_n N_VPWR_c_615_n 0.00718326f $X=7.665 $Y=1.41 $X2=0 $Y2=0
 cc_277 N_B1_c_298_n N_VPWR_c_625_n 0.00100567f $X=4.255 $Y=1.41 $X2=0 $Y2=0
-cc_278 N_B1_c_311_n N_noxref_9_M24_noxref_d 0.0018074f $X=4.515 $Y=1.53
-+ $X2=-0.19 $Y2=-0.24
-cc_279 N_B1_c_297_n N_noxref_9_M24_noxref_d 0.00123452f $X=4.96 $Y=1.325
-+ $X2=-0.19 $Y2=-0.24
-cc_280 N_B1_c_298_n N_noxref_9_c_736_n 0.00638325f $X=4.255 $Y=1.41 $X2=0 $Y2=0
-cc_281 N_B1_c_299_n N_noxref_9_c_736_n 0.0138426f $X=4.725 $Y=1.41 $X2=0 $Y2=0
-cc_282 N_B1_c_300_n N_noxref_9_c_736_n 0.00620876f $X=5.195 $Y=1.41 $X2=0 $Y2=0
-cc_283 N_B1_c_325_p N_noxref_9_c_736_n 0.0019017f $X=5.09 $Y=1.16 $X2=0 $Y2=0
-cc_284 N_B1_c_303_n N_noxref_9_c_736_n 0.00842081f $X=7.28 $Y=1.53 $X2=0 $Y2=0
-cc_285 N_B1_c_311_n N_noxref_9_c_736_n 0.00660439f $X=4.515 $Y=1.53 $X2=0 $Y2=0
-cc_286 N_B1_c_296_n N_noxref_9_c_736_n 0.00378307f $X=5.195 $Y=1.202 $X2=0 $Y2=0
-cc_287 N_B1_c_297_n N_noxref_9_c_736_n 0.0372219f $X=4.96 $Y=1.325 $X2=0 $Y2=0
-cc_288 N_B1_c_300_n N_noxref_9_c_732_n 2.71904e-19 $X=5.195 $Y=1.41 $X2=0 $Y2=0
-cc_289 N_B1_c_303_n N_noxref_9_c_732_n 0.0549799f $X=7.28 $Y=1.53 $X2=0 $Y2=0
-cc_290 N_B1_c_299_n N_noxref_9_c_733_n 0.00144139f $X=4.725 $Y=1.41 $X2=0 $Y2=0
-cc_291 N_B1_c_300_n N_noxref_9_c_733_n 0.0228638f $X=5.195 $Y=1.41 $X2=0 $Y2=0
-cc_292 N_B1_c_325_p N_noxref_9_c_733_n 0.0124633f $X=5.09 $Y=1.16 $X2=0 $Y2=0
-cc_293 N_B1_c_303_n N_noxref_9_c_733_n 0.0270528f $X=7.28 $Y=1.53 $X2=0 $Y2=0
-cc_294 N_B1_c_311_n N_noxref_9_c_733_n 0.0010382f $X=4.515 $Y=1.53 $X2=0 $Y2=0
-cc_295 N_B1_c_296_n N_noxref_9_c_733_n 0.00288506f $X=5.195 $Y=1.202 $X2=0 $Y2=0
-cc_296 N_B1_c_297_n N_noxref_9_c_733_n 0.0119831f $X=4.96 $Y=1.325 $X2=0 $Y2=0
-cc_297 N_B1_c_303_n N_Y_M29_noxref_d 8.82306e-19 $X=7.28 $Y=1.53 $X2=0 $Y2=0
+cc_278 N_B1_c_311_n N_A_869_297#_M1017_s 0.0018074f $X=4.515 $Y=1.53 $X2=-0.19
++ $Y2=-0.24
+cc_279 N_B1_c_297_n N_A_869_297#_M1017_s 0.00123452f $X=4.96 $Y=1.325 $X2=-0.19
++ $Y2=-0.24
+cc_280 N_B1_c_298_n N_A_869_297#_c_736_n 0.00638325f $X=4.255 $Y=1.41 $X2=0
++ $Y2=0
+cc_281 N_B1_c_299_n N_A_869_297#_c_736_n 0.0138426f $X=4.725 $Y=1.41 $X2=0 $Y2=0
+cc_282 N_B1_c_300_n N_A_869_297#_c_736_n 0.00620876f $X=5.195 $Y=1.41 $X2=0
++ $Y2=0
+cc_283 N_B1_c_325_p N_A_869_297#_c_736_n 0.0019017f $X=5.09 $Y=1.16 $X2=0 $Y2=0
+cc_284 N_B1_c_303_n N_A_869_297#_c_736_n 0.00842081f $X=7.28 $Y=1.53 $X2=0 $Y2=0
+cc_285 N_B1_c_311_n N_A_869_297#_c_736_n 0.00660439f $X=4.515 $Y=1.53 $X2=0
++ $Y2=0
+cc_286 N_B1_c_296_n N_A_869_297#_c_736_n 0.00378307f $X=5.195 $Y=1.202 $X2=0
++ $Y2=0
+cc_287 N_B1_c_297_n N_A_869_297#_c_736_n 0.0372219f $X=4.96 $Y=1.325 $X2=0 $Y2=0
+cc_288 N_B1_c_300_n N_A_869_297#_c_732_n 2.71904e-19 $X=5.195 $Y=1.41 $X2=0
++ $Y2=0
+cc_289 N_B1_c_303_n N_A_869_297#_c_732_n 0.0549799f $X=7.28 $Y=1.53 $X2=0 $Y2=0
+cc_290 N_B1_c_299_n N_A_869_297#_c_733_n 0.00144139f $X=4.725 $Y=1.41 $X2=0
++ $Y2=0
+cc_291 N_B1_c_300_n N_A_869_297#_c_733_n 0.0228638f $X=5.195 $Y=1.41 $X2=0 $Y2=0
+cc_292 N_B1_c_325_p N_A_869_297#_c_733_n 0.0124633f $X=5.09 $Y=1.16 $X2=0 $Y2=0
+cc_293 N_B1_c_303_n N_A_869_297#_c_733_n 0.0270528f $X=7.28 $Y=1.53 $X2=0 $Y2=0
+cc_294 N_B1_c_311_n N_A_869_297#_c_733_n 0.0010382f $X=4.515 $Y=1.53 $X2=0 $Y2=0
+cc_295 N_B1_c_296_n N_A_869_297#_c_733_n 0.00288506f $X=5.195 $Y=1.202 $X2=0
++ $Y2=0
+cc_296 N_B1_c_297_n N_A_869_297#_c_733_n 0.0119831f $X=4.96 $Y=1.325 $X2=0 $Y2=0
+cc_297 N_B1_c_303_n N_Y_M1019_s 8.82306e-19 $X=7.28 $Y=1.53 $X2=0 $Y2=0
 cc_298 N_B1_c_290_n N_Y_c_787_n 0.00889752f $X=4.23 $Y=0.995 $X2=0 $Y2=0
 cc_299 N_B1_c_297_n N_Y_c_787_n 0.00932849f $X=4.96 $Y=1.325 $X2=0 $Y2=0
 cc_300 N_B1_c_290_n N_Y_c_801_n 2.03469e-19 $X=4.23 $Y=0.995 $X2=0 $Y2=0
@@ -400,9 +403,9 @@
 cc_329 N_B1_c_295_n N_Y_c_783_n 0.0260895f $X=7.6 $Y=1.16 $X2=0 $Y2=0
 cc_330 N_B1_c_304_n N_Y_c_783_n 0.00228238f $X=7.425 $Y=1.53 $X2=0 $Y2=0
 cc_331 N_B1_c_305_n N_Y_c_783_n 0.00618043f $X=7.425 $Y=1.53 $X2=0 $Y2=0
-cc_332 N_B1_c_303_n noxref_12 2.99984e-19 $X=7.28 $Y=1.53 $X2=-0.19 $Y2=-0.24
-cc_333 N_B1_c_304_n noxref_12 0.00247248f $X=7.425 $Y=1.53 $X2=-0.19 $Y2=-0.24
-cc_334 N_B1_c_305_n noxref_12 0.00501617f $X=7.425 $Y=1.53 $X2=-0.19 $Y2=-0.24
+cc_332 N_B1_c_303_n A_1449_297# 2.99984e-19 $X=7.28 $Y=1.53 $X2=-0.19 $Y2=-0.24
+cc_333 N_B1_c_304_n A_1449_297# 0.00247248f $X=7.425 $Y=1.53 $X2=-0.19 $Y2=-0.24
+cc_334 N_B1_c_305_n A_1449_297# 0.00501617f $X=7.425 $Y=1.53 $X2=-0.19 $Y2=-0.24
 cc_335 N_B1_c_290_n N_VGND_c_927_n 0.00268723f $X=4.23 $Y=0.995 $X2=0 $Y2=0
 cc_336 N_B1_c_290_n N_VGND_c_928_n 0.00104422f $X=4.23 $Y=0.995 $X2=0 $Y2=0
 cc_337 N_B1_c_291_n N_VGND_c_928_n 0.00767007f $X=4.815 $Y=0.995 $X2=0 $Y2=0
@@ -417,10 +420,10 @@
 cc_346 N_B1_c_291_n N_VGND_c_943_n 0.00448048f $X=4.815 $Y=0.995 $X2=0 $Y2=0
 cc_347 N_B1_c_292_n N_VGND_c_943_n 0.00586577f $X=5.295 $Y=0.995 $X2=0 $Y2=0
 cc_348 N_B1_c_294_n N_VGND_c_943_n 0.00302906f $X=7.66 $Y=0.995 $X2=0 $Y2=0
-cc_349 N_C1_c_432_n N_noxref_7_c_516_n 0.0143764f $X=5.695 $Y=1.41 $X2=0 $Y2=0
-cc_350 N_C1_c_433_n N_noxref_7_c_516_n 0.0128283f $X=6.175 $Y=1.41 $X2=0 $Y2=0
-cc_351 N_C1_c_434_n N_noxref_7_c_516_n 0.0129691f $X=6.655 $Y=1.41 $X2=0 $Y2=0
-cc_352 N_C1_c_435_n N_noxref_7_c_516_n 0.0131148f $X=7.155 $Y=1.41 $X2=0 $Y2=0
+cc_349 N_C1_c_432_n N_A_27_297#_c_516_n 0.0143764f $X=5.695 $Y=1.41 $X2=0 $Y2=0
+cc_350 N_C1_c_433_n N_A_27_297#_c_516_n 0.0128283f $X=6.175 $Y=1.41 $X2=0 $Y2=0
+cc_351 N_C1_c_434_n N_A_27_297#_c_516_n 0.0129691f $X=6.655 $Y=1.41 $X2=0 $Y2=0
+cc_352 N_C1_c_435_n N_A_27_297#_c_516_n 0.0131148f $X=7.155 $Y=1.41 $X2=0 $Y2=0
 cc_353 N_C1_c_432_n N_VPWR_c_620_n 0.00429453f $X=5.695 $Y=1.41 $X2=0 $Y2=0
 cc_354 N_C1_c_433_n N_VPWR_c_620_n 0.00429453f $X=6.175 $Y=1.41 $X2=0 $Y2=0
 cc_355 N_C1_c_434_n N_VPWR_c_620_n 0.00429453f $X=6.655 $Y=1.41 $X2=0 $Y2=0
@@ -429,14 +432,17 @@
 cc_358 N_C1_c_433_n N_VPWR_c_615_n 0.00615861f $X=6.175 $Y=1.41 $X2=0 $Y2=0
 cc_359 N_C1_c_434_n N_VPWR_c_615_n 0.00620984f $X=6.655 $Y=1.41 $X2=0 $Y2=0
 cc_360 N_C1_c_435_n N_VPWR_c_615_n 0.00630544f $X=7.155 $Y=1.41 $X2=0 $Y2=0
-cc_361 N_C1_c_432_n N_noxref_9_c_732_n 0.0158668f $X=5.695 $Y=1.41 $X2=0 $Y2=0
-cc_362 N_C1_c_433_n N_noxref_9_c_732_n 0.0127349f $X=6.175 $Y=1.41 $X2=0 $Y2=0
-cc_363 N_C1_c_434_n N_noxref_9_c_732_n 0.00457561f $X=6.655 $Y=1.41 $X2=0 $Y2=0
-cc_364 N_C1_c_430_n N_noxref_9_c_732_n 0.0717187f $X=6.83 $Y=1.155 $X2=0 $Y2=0
-cc_365 N_C1_c_436_n N_noxref_9_c_732_n 0.0143237f $X=6.885 $Y=1.16 $X2=0 $Y2=0
-cc_366 N_C1_c_431_n N_noxref_9_c_732_n 0.0164942f $X=7.155 $Y=1.202 $X2=0 $Y2=0
-cc_367 N_C1_c_432_n N_noxref_9_c_733_n 0.00636651f $X=5.695 $Y=1.41 $X2=0 $Y2=0
-cc_368 N_C1_c_436_n N_Y_M29_noxref_d 0.00528592f $X=6.885 $Y=1.16 $X2=0 $Y2=0
+cc_361 N_C1_c_432_n N_A_869_297#_c_732_n 0.0158668f $X=5.695 $Y=1.41 $X2=0 $Y2=0
+cc_362 N_C1_c_433_n N_A_869_297#_c_732_n 0.0127349f $X=6.175 $Y=1.41 $X2=0 $Y2=0
+cc_363 N_C1_c_434_n N_A_869_297#_c_732_n 0.00457561f $X=6.655 $Y=1.41 $X2=0
++ $Y2=0
+cc_364 N_C1_c_430_n N_A_869_297#_c_732_n 0.0717187f $X=6.83 $Y=1.155 $X2=0 $Y2=0
+cc_365 N_C1_c_436_n N_A_869_297#_c_732_n 0.0143237f $X=6.885 $Y=1.16 $X2=0 $Y2=0
+cc_366 N_C1_c_431_n N_A_869_297#_c_732_n 0.0164942f $X=7.155 $Y=1.202 $X2=0
++ $Y2=0
+cc_367 N_C1_c_432_n N_A_869_297#_c_733_n 0.00636651f $X=5.695 $Y=1.41 $X2=0
++ $Y2=0
+cc_368 N_C1_c_436_n N_Y_M1019_s 0.00528592f $X=6.885 $Y=1.16 $X2=0 $Y2=0
 cc_369 N_C1_c_426_n N_Y_c_834_n 0.0116741f $X=5.77 $Y=0.995 $X2=0 $Y2=0
 cc_370 N_C1_c_427_n N_Y_c_834_n 0.0119432f $X=6.24 $Y=0.995 $X2=0 $Y2=0
 cc_371 N_C1_c_430_n N_Y_c_834_n 0.0466473f $X=6.83 $Y=1.155 $X2=0 $Y2=0
@@ -472,120 +478,131 @@
 cc_401 N_C1_c_427_n N_VGND_c_943_n 0.00582317f $X=6.24 $Y=0.995 $X2=0 $Y2=0
 cc_402 N_C1_c_428_n N_VGND_c_943_n 0.00403265f $X=6.71 $Y=0.995 $X2=0 $Y2=0
 cc_403 N_C1_c_429_n N_VGND_c_943_n 0.00588951f $X=7.18 $Y=0.995 $X2=0 $Y2=0
-cc_404 N_noxref_7_c_524_n N_VPWR_M16_noxref_d 0.00352421f $X=1.115 $Y=1.94
-+ $X2=-0.19 $Y2=1.305
-cc_405 N_noxref_7_c_528_n N_VPWR_M18_noxref_d 0.00373688f $X=2.055 $Y=1.95 $X2=0
-+ $Y2=0
-cc_406 N_noxref_7_c_530_n N_VPWR_M20_noxref_d 0.00352431f $X=2.995 $Y=1.95 $X2=0
-+ $Y2=0
-cc_407 N_noxref_7_c_531_n N_VPWR_M22_noxref_d 0.00371889f $X=3.935 $Y=1.95 $X2=0
-+ $Y2=0
-cc_408 N_noxref_7_c_515_n N_VPWR_c_616_n 0.017474f $X=0.26 $Y=2.3 $X2=0 $Y2=0
-cc_409 N_noxref_7_c_524_n N_VPWR_c_616_n 0.0024418f $X=1.115 $Y=1.94 $X2=0 $Y2=0
-cc_410 N_noxref_7_c_524_n N_VPWR_c_617_n 0.0032881f $X=1.115 $Y=1.94 $X2=0 $Y2=0
-cc_411 N_noxref_7_c_561_p N_VPWR_c_617_n 0.011801f $X=1.2 $Y=2.3 $X2=0 $Y2=0
-cc_412 N_noxref_7_c_528_n N_VPWR_c_617_n 0.00257067f $X=2.055 $Y=1.95 $X2=0
-+ $Y2=0
-cc_413 N_noxref_7_c_528_n N_VPWR_c_618_n 0.00346124f $X=2.055 $Y=1.95 $X2=0
-+ $Y2=0
-cc_414 N_noxref_7_c_564_p N_VPWR_c_618_n 0.011801f $X=2.14 $Y=2.3 $X2=0 $Y2=0
-cc_415 N_noxref_7_c_530_n N_VPWR_c_618_n 0.00257067f $X=2.995 $Y=1.95 $X2=0
-+ $Y2=0
-cc_416 N_noxref_7_c_530_n N_VPWR_c_619_n 0.00346124f $X=2.995 $Y=1.95 $X2=0
-+ $Y2=0
-cc_417 N_noxref_7_c_567_p N_VPWR_c_619_n 0.011801f $X=3.08 $Y=2.3 $X2=0 $Y2=0
-cc_418 N_noxref_7_c_531_n N_VPWR_c_619_n 0.00257067f $X=3.935 $Y=1.95 $X2=0
-+ $Y2=0
-cc_419 N_noxref_7_c_531_n N_VPWR_c_620_n 0.00346124f $X=3.935 $Y=1.95 $X2=0
-+ $Y2=0
-cc_420 N_noxref_7_c_570_p N_VPWR_c_620_n 0.0119415f $X=4.02 $Y=2.255 $X2=0 $Y2=0
-cc_421 N_noxref_7_c_516_n N_VPWR_c_620_n 0.225533f $X=7.9 $Y=2.34 $X2=0 $Y2=0
-cc_422 N_noxref_7_M16_noxref_s N_VPWR_c_615_n 0.00238238f $X=0.135 $Y=1.485
-+ $X2=0 $Y2=0
-cc_423 N_noxref_7_M17_noxref_d N_VPWR_c_615_n 0.00271014f $X=1.055 $Y=1.485
-+ $X2=0 $Y2=0
-cc_424 N_noxref_7_M19_noxref_d N_VPWR_c_615_n 0.00269325f $X=1.995 $Y=1.485
-+ $X2=0 $Y2=0
-cc_425 N_noxref_7_M21_noxref_d N_VPWR_c_615_n 0.00269325f $X=2.935 $Y=1.485
-+ $X2=0 $Y2=0
-cc_426 N_noxref_7_M23_noxref_d N_VPWR_c_615_n 0.00251101f $X=3.875 $Y=1.485
-+ $X2=0 $Y2=0
-cc_427 N_noxref_7_M25_noxref_d N_VPWR_c_615_n 0.00231289f $X=4.815 $Y=1.485
-+ $X2=0 $Y2=0
-cc_428 N_noxref_7_M31_noxref_d N_VPWR_c_615_n 0.00217543f $X=7.755 $Y=1.485
-+ $X2=0 $Y2=0
-cc_429 N_noxref_7_c_515_n N_VPWR_c_615_n 0.00954719f $X=0.26 $Y=2.3 $X2=0 $Y2=0
-cc_430 N_noxref_7_c_524_n N_VPWR_c_615_n 0.0115793f $X=1.115 $Y=1.94 $X2=0 $Y2=0
-cc_431 N_noxref_7_c_561_p N_VPWR_c_615_n 0.00646745f $X=1.2 $Y=2.3 $X2=0 $Y2=0
-cc_432 N_noxref_7_c_528_n N_VPWR_c_615_n 0.0118582f $X=2.055 $Y=1.95 $X2=0 $Y2=0
-cc_433 N_noxref_7_c_564_p N_VPWR_c_615_n 0.00646745f $X=2.14 $Y=2.3 $X2=0 $Y2=0
-cc_434 N_noxref_7_c_530_n N_VPWR_c_615_n 0.0118582f $X=2.995 $Y=1.95 $X2=0 $Y2=0
-cc_435 N_noxref_7_c_567_p N_VPWR_c_615_n 0.00646745f $X=3.08 $Y=2.3 $X2=0 $Y2=0
-cc_436 N_noxref_7_c_531_n N_VPWR_c_615_n 0.0118582f $X=3.935 $Y=1.95 $X2=0 $Y2=0
-cc_437 N_noxref_7_c_570_p N_VPWR_c_615_n 0.00654444f $X=4.02 $Y=2.255 $X2=0
-+ $Y2=0
-cc_438 N_noxref_7_c_516_n N_VPWR_c_615_n 0.141495f $X=7.9 $Y=2.34 $X2=0 $Y2=0
-cc_439 N_noxref_7_c_515_n N_VPWR_c_622_n 0.016131f $X=0.26 $Y=2.3 $X2=0 $Y2=0
-cc_440 N_noxref_7_c_524_n N_VPWR_c_622_n 0.0203416f $X=1.115 $Y=1.94 $X2=0 $Y2=0
-cc_441 N_noxref_7_c_561_p N_VPWR_c_622_n 0.0128538f $X=1.2 $Y=2.3 $X2=0 $Y2=0
-cc_442 N_noxref_7_c_561_p N_VPWR_c_623_n 0.0141845f $X=1.2 $Y=2.3 $X2=0 $Y2=0
-cc_443 N_noxref_7_c_528_n N_VPWR_c_623_n 0.0203018f $X=2.055 $Y=1.95 $X2=0 $Y2=0
-cc_444 N_noxref_7_c_564_p N_VPWR_c_623_n 0.0116296f $X=2.14 $Y=2.3 $X2=0 $Y2=0
-cc_445 N_noxref_7_c_564_p N_VPWR_c_624_n 0.0141845f $X=2.14 $Y=2.3 $X2=0 $Y2=0
-cc_446 N_noxref_7_c_530_n N_VPWR_c_624_n 0.0203018f $X=2.995 $Y=1.95 $X2=0 $Y2=0
-cc_447 N_noxref_7_c_567_p N_VPWR_c_624_n 0.0116296f $X=3.08 $Y=2.3 $X2=0 $Y2=0
-cc_448 N_noxref_7_c_567_p N_VPWR_c_625_n 0.0141845f $X=3.08 $Y=2.3 $X2=0 $Y2=0
-cc_449 N_noxref_7_c_531_n N_VPWR_c_625_n 0.0203018f $X=3.935 $Y=1.95 $X2=0 $Y2=0
-cc_450 N_noxref_7_c_570_p N_VPWR_c_625_n 0.0129886f $X=4.02 $Y=2.255 $X2=0 $Y2=0
-cc_451 N_noxref_7_c_516_n N_noxref_9_M24_noxref_d 0.00353637f $X=7.9 $Y=2.34
-+ $X2=-0.19 $Y2=1.305
-cc_452 N_noxref_7_c_516_n N_noxref_9_M28_noxref_d 0.00375335f $X=7.9 $Y=2.34
-+ $X2=0 $Y2=0
-cc_453 N_noxref_7_M25_noxref_d N_noxref_9_c_736_n 0.00375343f $X=4.815 $Y=1.485
-+ $X2=0 $Y2=0
-cc_454 N_noxref_7_c_533_n N_noxref_9_c_736_n 0.0252594f $X=4.02 $Y=2.105 $X2=0
-+ $Y2=0
-cc_455 N_noxref_7_c_516_n N_noxref_9_c_736_n 0.044002f $X=7.9 $Y=2.34 $X2=0
-+ $Y2=0
-cc_456 N_noxref_7_c_516_n N_noxref_9_c_732_n 0.00581426f $X=7.9 $Y=2.34 $X2=0
-+ $Y2=0
-cc_457 N_noxref_7_c_516_n N_noxref_9_c_733_n 0.0202793f $X=7.9 $Y=2.34 $X2=0
-+ $Y2=0
-cc_458 N_noxref_7_c_516_n noxref_10 0.00489103f $X=7.9 $Y=2.34 $X2=-0.19
+cc_404 N_A_27_297#_c_524_n N_VPWR_M1000_s 0.00352421f $X=1.115 $Y=1.94 $X2=-0.19
 + $Y2=1.305
-cc_459 N_noxref_7_c_516_n N_Y_M27_noxref_d 0.00375335f $X=7.9 $Y=2.34 $X2=0
+cc_405 N_A_27_297#_c_528_n N_VPWR_M1014_s 0.00373688f $X=2.055 $Y=1.95 $X2=0
 + $Y2=0
-cc_460 N_noxref_7_c_516_n N_Y_M29_noxref_d 0.00415694f $X=7.9 $Y=2.34 $X2=0
+cc_406 N_A_27_297#_c_530_n N_VPWR_M1010_d 0.00352431f $X=2.995 $Y=1.95 $X2=0
 + $Y2=0
-cc_461 N_noxref_7_c_516_n N_Y_c_807_n 0.103509f $X=7.9 $Y=2.34 $X2=0 $Y2=0
-cc_462 N_noxref_7_M31_noxref_d Y 0.00705879f $X=7.755 $Y=1.485 $X2=0 $Y2=0
-cc_463 N_noxref_7_c_516_n Y 0.0254904f $X=7.9 $Y=2.34 $X2=0 $Y2=0
-cc_464 N_noxref_7_c_516_n noxref_12 0.0043297f $X=7.9 $Y=2.34 $X2=-0.19
+cc_407 N_A_27_297#_c_531_n N_VPWR_M1018_d 0.00371889f $X=3.935 $Y=1.95 $X2=0
++ $Y2=0
+cc_408 N_A_27_297#_c_515_n N_VPWR_c_616_n 0.017474f $X=0.26 $Y=2.3 $X2=0 $Y2=0
+cc_409 N_A_27_297#_c_524_n N_VPWR_c_616_n 0.0024418f $X=1.115 $Y=1.94 $X2=0
++ $Y2=0
+cc_410 N_A_27_297#_c_524_n N_VPWR_c_617_n 0.0032881f $X=1.115 $Y=1.94 $X2=0
++ $Y2=0
+cc_411 N_A_27_297#_c_561_p N_VPWR_c_617_n 0.011801f $X=1.2 $Y=2.3 $X2=0 $Y2=0
+cc_412 N_A_27_297#_c_528_n N_VPWR_c_617_n 0.00257067f $X=2.055 $Y=1.95 $X2=0
++ $Y2=0
+cc_413 N_A_27_297#_c_528_n N_VPWR_c_618_n 0.00346124f $X=2.055 $Y=1.95 $X2=0
++ $Y2=0
+cc_414 N_A_27_297#_c_564_p N_VPWR_c_618_n 0.011801f $X=2.14 $Y=2.3 $X2=0 $Y2=0
+cc_415 N_A_27_297#_c_530_n N_VPWR_c_618_n 0.00257067f $X=2.995 $Y=1.95 $X2=0
++ $Y2=0
+cc_416 N_A_27_297#_c_530_n N_VPWR_c_619_n 0.00346124f $X=2.995 $Y=1.95 $X2=0
++ $Y2=0
+cc_417 N_A_27_297#_c_567_p N_VPWR_c_619_n 0.011801f $X=3.08 $Y=2.3 $X2=0 $Y2=0
+cc_418 N_A_27_297#_c_531_n N_VPWR_c_619_n 0.00257067f $X=3.935 $Y=1.95 $X2=0
++ $Y2=0
+cc_419 N_A_27_297#_c_531_n N_VPWR_c_620_n 0.00346124f $X=3.935 $Y=1.95 $X2=0
++ $Y2=0
+cc_420 N_A_27_297#_c_570_p N_VPWR_c_620_n 0.0119415f $X=4.02 $Y=2.255 $X2=0
++ $Y2=0
+cc_421 N_A_27_297#_c_516_n N_VPWR_c_620_n 0.225533f $X=7.9 $Y=2.34 $X2=0 $Y2=0
+cc_422 N_A_27_297#_M1000_d N_VPWR_c_615_n 0.00238238f $X=0.135 $Y=1.485 $X2=0
++ $Y2=0
+cc_423 N_A_27_297#_M1002_d N_VPWR_c_615_n 0.00271014f $X=1.055 $Y=1.485 $X2=0
++ $Y2=0
+cc_424 N_A_27_297#_M1007_s N_VPWR_c_615_n 0.00269325f $X=1.995 $Y=1.485 $X2=0
++ $Y2=0
+cc_425 N_A_27_297#_M1016_s N_VPWR_c_615_n 0.00269325f $X=2.935 $Y=1.485 $X2=0
++ $Y2=0
+cc_426 N_A_27_297#_M1029_d N_VPWR_c_615_n 0.00251101f $X=3.875 $Y=1.485 $X2=0
++ $Y2=0
+cc_427 N_A_27_297#_M1023_d N_VPWR_c_615_n 0.00231289f $X=4.815 $Y=1.485 $X2=0
++ $Y2=0
+cc_428 N_A_27_297#_M1027_d N_VPWR_c_615_n 0.00217543f $X=7.755 $Y=1.485 $X2=0
++ $Y2=0
+cc_429 N_A_27_297#_c_515_n N_VPWR_c_615_n 0.00954719f $X=0.26 $Y=2.3 $X2=0 $Y2=0
+cc_430 N_A_27_297#_c_524_n N_VPWR_c_615_n 0.0115793f $X=1.115 $Y=1.94 $X2=0
++ $Y2=0
+cc_431 N_A_27_297#_c_561_p N_VPWR_c_615_n 0.00646745f $X=1.2 $Y=2.3 $X2=0 $Y2=0
+cc_432 N_A_27_297#_c_528_n N_VPWR_c_615_n 0.0118582f $X=2.055 $Y=1.95 $X2=0
++ $Y2=0
+cc_433 N_A_27_297#_c_564_p N_VPWR_c_615_n 0.00646745f $X=2.14 $Y=2.3 $X2=0 $Y2=0
+cc_434 N_A_27_297#_c_530_n N_VPWR_c_615_n 0.0118582f $X=2.995 $Y=1.95 $X2=0
++ $Y2=0
+cc_435 N_A_27_297#_c_567_p N_VPWR_c_615_n 0.00646745f $X=3.08 $Y=2.3 $X2=0 $Y2=0
+cc_436 N_A_27_297#_c_531_n N_VPWR_c_615_n 0.0118582f $X=3.935 $Y=1.95 $X2=0
++ $Y2=0
+cc_437 N_A_27_297#_c_570_p N_VPWR_c_615_n 0.00654444f $X=4.02 $Y=2.255 $X2=0
++ $Y2=0
+cc_438 N_A_27_297#_c_516_n N_VPWR_c_615_n 0.141495f $X=7.9 $Y=2.34 $X2=0 $Y2=0
+cc_439 N_A_27_297#_c_515_n N_VPWR_c_622_n 0.016131f $X=0.26 $Y=2.3 $X2=0 $Y2=0
+cc_440 N_A_27_297#_c_524_n N_VPWR_c_622_n 0.0203416f $X=1.115 $Y=1.94 $X2=0
++ $Y2=0
+cc_441 N_A_27_297#_c_561_p N_VPWR_c_622_n 0.0128538f $X=1.2 $Y=2.3 $X2=0 $Y2=0
+cc_442 N_A_27_297#_c_561_p N_VPWR_c_623_n 0.0141845f $X=1.2 $Y=2.3 $X2=0 $Y2=0
+cc_443 N_A_27_297#_c_528_n N_VPWR_c_623_n 0.0203018f $X=2.055 $Y=1.95 $X2=0
++ $Y2=0
+cc_444 N_A_27_297#_c_564_p N_VPWR_c_623_n 0.0116296f $X=2.14 $Y=2.3 $X2=0 $Y2=0
+cc_445 N_A_27_297#_c_564_p N_VPWR_c_624_n 0.0141845f $X=2.14 $Y=2.3 $X2=0 $Y2=0
+cc_446 N_A_27_297#_c_530_n N_VPWR_c_624_n 0.0203018f $X=2.995 $Y=1.95 $X2=0
++ $Y2=0
+cc_447 N_A_27_297#_c_567_p N_VPWR_c_624_n 0.0116296f $X=3.08 $Y=2.3 $X2=0 $Y2=0
+cc_448 N_A_27_297#_c_567_p N_VPWR_c_625_n 0.0141845f $X=3.08 $Y=2.3 $X2=0 $Y2=0
+cc_449 N_A_27_297#_c_531_n N_VPWR_c_625_n 0.0203018f $X=3.935 $Y=1.95 $X2=0
++ $Y2=0
+cc_450 N_A_27_297#_c_570_p N_VPWR_c_625_n 0.0129886f $X=4.02 $Y=2.255 $X2=0
++ $Y2=0
+cc_451 N_A_27_297#_c_516_n N_A_869_297#_M1017_s 0.00353637f $X=7.9 $Y=2.34
++ $X2=-0.19 $Y2=1.305
+cc_452 N_A_27_297#_c_516_n N_A_869_297#_M1006_d 0.00375335f $X=7.9 $Y=2.34 $X2=0
++ $Y2=0
+cc_453 N_A_27_297#_M1023_d N_A_869_297#_c_736_n 0.00375343f $X=4.815 $Y=1.485
++ $X2=0 $Y2=0
+cc_454 N_A_27_297#_c_533_n N_A_869_297#_c_736_n 0.0252594f $X=4.02 $Y=2.105
++ $X2=0 $Y2=0
+cc_455 N_A_27_297#_c_516_n N_A_869_297#_c_736_n 0.044002f $X=7.9 $Y=2.34 $X2=0
++ $Y2=0
+cc_456 N_A_27_297#_c_516_n N_A_869_297#_c_732_n 0.00581426f $X=7.9 $Y=2.34 $X2=0
++ $Y2=0
+cc_457 N_A_27_297#_c_516_n N_A_869_297#_c_733_n 0.0202793f $X=7.9 $Y=2.34 $X2=0
++ $Y2=0
+cc_458 N_A_27_297#_c_516_n A_1057_297# 0.00489103f $X=7.9 $Y=2.34 $X2=-0.19
 + $Y2=1.305
-cc_465 N_VPWR_c_615_n N_noxref_9_M24_noxref_d 0.00232895f $X=8.05 $Y=2.72
-+ $X2=-0.19 $Y2=-0.24
-cc_466 N_VPWR_c_615_n N_noxref_9_M28_noxref_d 0.00240926f $X=8.05 $Y=2.72 $X2=0
+cc_459 N_A_27_297#_c_516_n N_Y_M1015_s 0.00375335f $X=7.9 $Y=2.34 $X2=0 $Y2=0
+cc_460 N_A_27_297#_c_516_n N_Y_M1019_s 0.00415694f $X=7.9 $Y=2.34 $X2=0 $Y2=0
+cc_461 N_A_27_297#_c_516_n N_Y_c_807_n 0.103509f $X=7.9 $Y=2.34 $X2=0 $Y2=0
+cc_462 N_A_27_297#_M1027_d Y 0.00705879f $X=7.755 $Y=1.485 $X2=0 $Y2=0
+cc_463 N_A_27_297#_c_516_n Y 0.0254904f $X=7.9 $Y=2.34 $X2=0 $Y2=0
+cc_464 N_A_27_297#_c_516_n A_1449_297# 0.0043297f $X=7.9 $Y=2.34 $X2=-0.19
++ $Y2=1.305
+cc_465 N_VPWR_c_615_n N_A_869_297#_M1017_s 0.00232895f $X=8.05 $Y=2.72 $X2=-0.19
++ $Y2=-0.24
+cc_466 N_VPWR_c_615_n N_A_869_297#_M1006_d 0.00240926f $X=8.05 $Y=2.72 $X2=0
 + $Y2=0
-cc_467 N_VPWR_c_615_n noxref_10 0.00256987f $X=8.05 $Y=2.72 $X2=-0.19 $Y2=-0.24
-cc_468 N_VPWR_c_615_n N_Y_M27_noxref_d 0.00240926f $X=8.05 $Y=2.72 $X2=0 $Y2=0
-cc_469 N_VPWR_c_615_n N_Y_M29_noxref_d 0.00256987f $X=8.05 $Y=2.72 $X2=0 $Y2=0
+cc_467 N_VPWR_c_615_n A_1057_297# 0.00256987f $X=8.05 $Y=2.72 $X2=-0.19
++ $Y2=-0.24
+cc_468 N_VPWR_c_615_n N_Y_M1015_s 0.00240926f $X=8.05 $Y=2.72 $X2=0 $Y2=0
+cc_469 N_VPWR_c_615_n N_Y_M1019_s 0.00256987f $X=8.05 $Y=2.72 $X2=0 $Y2=0
 cc_470 N_VPWR_c_620_n Y 0.00180709f $X=8.05 $Y=2.72 $X2=0 $Y2=0
 cc_471 N_VPWR_c_615_n Y 0.00362255f $X=8.05 $Y=2.72 $X2=0 $Y2=0
-cc_472 N_VPWR_c_615_n noxref_12 0.00265018f $X=8.05 $Y=2.72 $X2=-0.19 $Y2=-0.24
-cc_473 N_noxref_9_c_732_n noxref_10 0.00193908f $X=6.415 $Y=1.61 $X2=-0.19
+cc_472 N_VPWR_c_615_n A_1449_297# 0.00265018f $X=8.05 $Y=2.72 $X2=-0.19
++ $Y2=-0.24
+cc_473 N_A_869_297#_c_732_n A_1057_297# 0.00193908f $X=6.415 $Y=1.61 $X2=-0.19
 + $Y2=1.305
-cc_474 N_noxref_9_c_733_n noxref_10 0.00578553f $X=5.295 $Y=1.57 $X2=-0.19
+cc_474 N_A_869_297#_c_733_n A_1057_297# 0.00578553f $X=5.295 $Y=1.57 $X2=-0.19
 + $Y2=1.305
-cc_475 N_noxref_9_c_732_n N_Y_M27_noxref_d 0.00200574f $X=6.415 $Y=1.61 $X2=0
+cc_475 N_A_869_297#_c_732_n N_Y_M1015_s 0.00200574f $X=6.415 $Y=1.61 $X2=0 $Y2=0
+cc_476 N_A_869_297#_c_733_n N_Y_c_801_n 0.00283531f $X=5.295 $Y=1.57 $X2=0 $Y2=0
+cc_477 N_A_869_297#_M1006_d N_Y_c_807_n 0.00359876f $X=6.265 $Y=1.485 $X2=0
 + $Y2=0
-cc_476 N_noxref_9_c_733_n N_Y_c_801_n 0.00283531f $X=5.295 $Y=1.57 $X2=0 $Y2=0
-cc_477 N_noxref_9_M28_noxref_d N_Y_c_807_n 0.00359876f $X=6.265 $Y=1.485 $X2=0
-+ $Y2=0
-cc_478 N_noxref_9_c_732_n N_Y_c_807_n 0.0452041f $X=6.415 $Y=1.61 $X2=0 $Y2=0
-cc_479 N_noxref_9_c_733_n N_Y_c_807_n 0.012939f $X=5.295 $Y=1.57 $X2=0 $Y2=0
-cc_480 N_noxref_9_c_732_n N_Y_c_823_n 0.00246739f $X=6.415 $Y=1.61 $X2=0 $Y2=0
-cc_481 N_noxref_9_c_733_n N_Y_c_823_n 0.00100183f $X=5.295 $Y=1.57 $X2=0 $Y2=0
-cc_482 N_Y_c_807_n noxref_12 0.00453035f $X=7.68 $Y=1.975 $X2=-0.19 $Y2=-0.24
+cc_478 N_A_869_297#_c_732_n N_Y_c_807_n 0.0452041f $X=6.415 $Y=1.61 $X2=0 $Y2=0
+cc_479 N_A_869_297#_c_733_n N_Y_c_807_n 0.012939f $X=5.295 $Y=1.57 $X2=0 $Y2=0
+cc_480 N_A_869_297#_c_732_n N_Y_c_823_n 0.00246739f $X=6.415 $Y=1.61 $X2=0 $Y2=0
+cc_481 N_A_869_297#_c_733_n N_Y_c_823_n 0.00100183f $X=5.295 $Y=1.57 $X2=0 $Y2=0
+cc_482 N_Y_c_807_n A_1449_297# 0.00453035f $X=7.68 $Y=1.975 $X2=-0.19 $Y2=-0.24
 cc_483 N_Y_c_787_n N_VGND_M1031_d 0.00665097f $X=4.275 $Y=0.78 $X2=0 $Y2=0
 cc_484 N_Y_c_801_n N_VGND_M1008_d 0.00415578f $X=5.425 $Y=0.74 $X2=0 $Y2=0
 cc_485 N_Y_c_834_n N_VGND_M1001_d 0.00402934f $X=6.365 $Y=0.745 $X2=0 $Y2=0
diff --git a/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice b/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice
index b517f08..4b02815 100644
--- a/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice
+++ b/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a211oi_4.spice
-* Created: Thu Aug 27 18:51:57 2020
+* Created: Wed Sep  2 08:16:16 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * 
@@ -63,54 +63,54 @@
 MM1024 N_VGND_M1024_d N_B1_M1024_g N_Y_M1022_s VNB NSHORT L=0.15 W=0.65
 + AD=0.1885 AS=0.10725 PD=1.88 PS=0.98 NRD=0.912 NRS=8.304 M=1 R=4.33333
 + SA=75007.4 SB=75000.2 A=0.0975 P=1.6 MULT=1
-MM16_noxref N_VPWR_M16_noxref_d N_A2_M16_noxref_g N_noxref_7_M16_noxref_s VPB
-+ PHIGHVT L=0.18 W=1 AD=0.145 AS=0.27 PD=1.29 PS=2.54 NRD=0.9653 NRS=0.9653 M=1
-+ R=5.55556 SA=90000.2 SB=90007.3 A=0.18 P=2.36 MULT=1
-MM17_noxref N_noxref_7_M17_noxref_d N_A2_M17_noxref_g N_VPWR_M16_noxref_d VPB
-+ PHIGHVT L=0.18 W=1 AD=0.145 AS=0.145 PD=1.29 PS=1.29 NRD=0.9653 NRS=0.9653 M=1
-+ R=5.55556 SA=90000.6 SB=90006.9 A=0.18 P=2.36 MULT=1
-MM18_noxref N_VPWR_M18_noxref_d N_A2_M18_noxref_g N_noxref_7_M17_noxref_d VPB
-+ PHIGHVT L=0.18 W=1 AD=0.145 AS=0.145 PD=1.29 PS=1.29 NRD=0.9653 NRS=0.9653 M=1
-+ R=5.55556 SA=90001.1 SB=90006.4 A=0.18 P=2.36 MULT=1
-MM19_noxref N_noxref_7_M19_noxref_d N_A1_M19_noxref_g N_VPWR_M18_noxref_d VPB
-+ PHIGHVT L=0.18 W=1 AD=0.145 AS=0.145 PD=1.29 PS=1.29 NRD=0.9653 NRS=0.9653 M=1
-+ R=5.55556 SA=90001.6 SB=90005.9 A=0.18 P=2.36 MULT=1
-MM20_noxref N_VPWR_M20_noxref_d N_A1_M20_noxref_g N_noxref_7_M19_noxref_d VPB
-+ PHIGHVT L=0.18 W=1 AD=0.145 AS=0.145 PD=1.29 PS=1.29 NRD=0.9653 NRS=0.9653 M=1
-+ R=5.55556 SA=90002.1 SB=90005.5 A=0.18 P=2.36 MULT=1
-MM21_noxref N_noxref_7_M21_noxref_d N_A1_M21_noxref_g N_VPWR_M20_noxref_d VPB
-+ PHIGHVT L=0.18 W=1 AD=0.145 AS=0.145 PD=1.29 PS=1.29 NRD=0.9653 NRS=0.9653 M=1
-+ R=5.55556 SA=90002.5 SB=90005 A=0.18 P=2.36 MULT=1
-MM22_noxref N_VPWR_M22_noxref_d N_A1_M22_noxref_g N_noxref_7_M21_noxref_d VPB
-+ PHIGHVT L=0.18 W=1 AD=0.145 AS=0.145 PD=1.29 PS=1.29 NRD=0.9653 NRS=0.9653 M=1
-+ R=5.55556 SA=90003 SB=90004.5 A=0.18 P=2.36 MULT=1
-MM23_noxref N_noxref_7_M23_noxref_d N_A2_M23_noxref_g N_VPWR_M22_noxref_d VPB
-+ PHIGHVT L=0.18 W=1 AD=0.145 AS=0.145 PD=1.29 PS=1.29 NRD=0.9653 NRS=0.9653 M=1
-+ R=5.55556 SA=90003.5 SB=90004.1 A=0.18 P=2.36 MULT=1
-MM24_noxref N_noxref_9_M24_noxref_d N_B1_M24_noxref_g N_noxref_7_M23_noxref_d
-+ VPB PHIGHVT L=0.18 W=1 AD=0.145 AS=0.145 PD=1.29 PS=1.29 NRD=0.9653 NRS=0.9653
-+ M=1 R=5.55556 SA=90003.9 SB=90003.6 A=0.18 P=2.36 MULT=1
-MM25_noxref N_noxref_7_M25_noxref_d N_B1_M25_noxref_g N_noxref_9_M24_noxref_d
-+ VPB PHIGHVT L=0.18 W=1 AD=0.145 AS=0.145 PD=1.29 PS=1.29 NRD=0.9653 NRS=0.9653
-+ M=1 R=5.55556 SA=90004.4 SB=90003.1 A=0.18 P=2.36 MULT=1
-MM26_noxref noxref_10 N_B1_M26_noxref_g N_noxref_7_M25_noxref_d VPB PHIGHVT
-+ L=0.18 W=1 AD=0.16 AS=0.145 PD=1.32 PS=1.29 NRD=20.6653 NRS=0.9653 M=1
-+ R=5.55556 SA=90004.9 SB=90002.6 A=0.18 P=2.36 MULT=1
-MM27_noxref N_Y_M27_noxref_d N_C1_M27_noxref_g noxref_10 VPB PHIGHVT L=0.18 W=1
-+ AD=0.15 AS=0.16 PD=1.3 PS=1.32 NRD=1.9503 NRS=20.6653 M=1 R=5.55556 SA=90005.4
+MM1000 N_A_27_297#_M1000_d N_A2_M1000_g N_VPWR_M1000_s VPB PHIGHVT L=0.18 W=1
++ AD=0.27 AS=0.145 PD=2.54 PS=1.29 NRD=0.9653 NRS=0.9653 M=1 R=5.55556
++ SA=90000.2 SB=90007.3 A=0.18 P=2.36 MULT=1
+MM1002 N_A_27_297#_M1002_d N_A2_M1002_g N_VPWR_M1000_s VPB PHIGHVT L=0.18 W=1
++ AD=0.145 AS=0.145 PD=1.29 PS=1.29 NRD=0.9653 NRS=0.9653 M=1 R=5.55556
++ SA=90000.6 SB=90006.9 A=0.18 P=2.36 MULT=1
+MM1014 N_A_27_297#_M1002_d N_A2_M1014_g N_VPWR_M1014_s VPB PHIGHVT L=0.18 W=1
++ AD=0.145 AS=0.145 PD=1.29 PS=1.29 NRD=0.9653 NRS=0.9653 M=1 R=5.55556
++ SA=90001.1 SB=90006.4 A=0.18 P=2.36 MULT=1
+MM1007 N_VPWR_M1014_s N_A1_M1007_g N_A_27_297#_M1007_s VPB PHIGHVT L=0.18 W=1
++ AD=0.145 AS=0.145 PD=1.29 PS=1.29 NRD=0.9653 NRS=0.9653 M=1 R=5.55556
++ SA=90001.6 SB=90005.9 A=0.18 P=2.36 MULT=1
+MM1010 N_VPWR_M1010_d N_A1_M1010_g N_A_27_297#_M1007_s VPB PHIGHVT L=0.18 W=1
++ AD=0.145 AS=0.145 PD=1.29 PS=1.29 NRD=0.9653 NRS=0.9653 M=1 R=5.55556
++ SA=90002.1 SB=90005.5 A=0.18 P=2.36 MULT=1
+MM1016 N_VPWR_M1010_d N_A1_M1016_g N_A_27_297#_M1016_s VPB PHIGHVT L=0.18 W=1
++ AD=0.145 AS=0.145 PD=1.29 PS=1.29 NRD=0.9653 NRS=0.9653 M=1 R=5.55556
++ SA=90002.5 SB=90005 A=0.18 P=2.36 MULT=1
+MM1018 N_VPWR_M1018_d N_A1_M1018_g N_A_27_297#_M1016_s VPB PHIGHVT L=0.18 W=1
++ AD=0.145 AS=0.145 PD=1.29 PS=1.29 NRD=0.9653 NRS=0.9653 M=1 R=5.55556 SA=90003
++ SB=90004.5 A=0.18 P=2.36 MULT=1
+MM1029 N_A_27_297#_M1029_d N_A2_M1029_g N_VPWR_M1018_d VPB PHIGHVT L=0.18 W=1
++ AD=0.145 AS=0.145 PD=1.29 PS=1.29 NRD=0.9653 NRS=0.9653 M=1 R=5.55556
++ SA=90003.5 SB=90004.1 A=0.18 P=2.36 MULT=1
+MM1017 N_A_27_297#_M1029_d N_B1_M1017_g N_A_869_297#_M1017_s VPB PHIGHVT L=0.18
++ W=1 AD=0.145 AS=0.145 PD=1.29 PS=1.29 NRD=0.9653 NRS=0.9653 M=1 R=5.55556
++ SA=90003.9 SB=90003.6 A=0.18 P=2.36 MULT=1
+MM1023 N_A_27_297#_M1023_d N_B1_M1023_g N_A_869_297#_M1017_s VPB PHIGHVT L=0.18
++ W=1 AD=0.145 AS=0.145 PD=1.29 PS=1.29 NRD=0.9653 NRS=0.9653 M=1 R=5.55556
++ SA=90004.4 SB=90003.1 A=0.18 P=2.36 MULT=1
+MM1009 N_A_27_297#_M1023_d N_B1_M1009_g A_1057_297# VPB PHIGHVT L=0.18 W=1
++ AD=0.145 AS=0.16 PD=1.29 PS=1.32 NRD=0.9653 NRS=20.6653 M=1 R=5.55556
++ SA=90004.9 SB=90002.6 A=0.18 P=2.36 MULT=1
+MM1015 A_1057_297# N_C1_M1015_g N_Y_M1015_s VPB PHIGHVT L=0.18 W=1 AD=0.16
++ AS=0.15 PD=1.32 PS=1.3 NRD=20.6653 NRS=1.9503 M=1 R=5.55556 SA=90005.4
 + SB=90002.1 A=0.18 P=2.36 MULT=1
-MM28_noxref N_noxref_9_M28_noxref_d N_C1_M28_noxref_g N_Y_M27_noxref_d VPB
-+ PHIGHVT L=0.18 W=1 AD=0.15 AS=0.15 PD=1.3 PS=1.3 NRD=1.9503 NRS=1.9503 M=1
-+ R=5.55556 SA=90005.9 SB=90001.7 A=0.18 P=2.36 MULT=1
-MM29_noxref N_Y_M29_noxref_d N_C1_M29_noxref_g N_noxref_9_M28_noxref_d VPB
-+ PHIGHVT L=0.18 W=1 AD=0.16 AS=0.15 PD=1.32 PS=1.3 NRD=5.8903 NRS=1.9503 M=1
-+ R=5.55556 SA=90006.3 SB=90001.2 A=0.18 P=2.36 MULT=1
-MM30_noxref noxref_12 N_C1_M30_noxref_g N_Y_M29_noxref_d VPB PHIGHVT L=0.18 W=1
-+ AD=0.165 AS=0.16 PD=1.33 PS=1.32 NRD=21.6503 NRS=1.9503 M=1 R=5.55556
-+ SA=90006.8 SB=90000.7 A=0.18 P=2.36 MULT=1
-MM31_noxref N_noxref_7_M31_noxref_d N_B1_M31_noxref_g noxref_12 VPB PHIGHVT
-+ L=0.18 W=1 AD=0.27 AS=0.165 PD=2.54 PS=1.33 NRD=0.9653 NRS=21.6503 M=1
-+ R=5.55556 SA=90007.3 SB=90000.2 A=0.18 P=2.36 MULT=1
+MM1006 N_A_869_297#_M1006_d N_C1_M1006_g N_Y_M1015_s VPB PHIGHVT L=0.18 W=1
++ AD=0.15 AS=0.15 PD=1.3 PS=1.3 NRD=1.9503 NRS=1.9503 M=1 R=5.55556 SA=90005.9
++ SB=90001.7 A=0.18 P=2.36 MULT=1
+MM1019 N_A_869_297#_M1006_d N_C1_M1019_g N_Y_M1019_s VPB PHIGHVT L=0.18 W=1
++ AD=0.15 AS=0.16 PD=1.3 PS=1.32 NRD=1.9503 NRS=5.8903 M=1 R=5.55556 SA=90006.3
++ SB=90001.2 A=0.18 P=2.36 MULT=1
+MM1026 A_1449_297# N_C1_M1026_g N_Y_M1019_s VPB PHIGHVT L=0.18 W=1 AD=0.165
++ AS=0.16 PD=1.33 PS=1.32 NRD=21.6503 NRS=1.9503 M=1 R=5.55556 SA=90006.8
++ SB=90000.7 A=0.18 P=2.36 MULT=1
+MM1027 N_A_27_297#_M1027_d N_B1_M1027_g A_1449_297# VPB PHIGHVT L=0.18 W=1
++ AD=0.27 AS=0.165 PD=2.54 PS=1.33 NRD=0.9653 NRS=21.6503 M=1 R=5.55556
++ SA=90007.3 SB=90000.2 A=0.18 P=2.36 MULT=1
 DX32_noxref VNB VPB NWDIODE A=13.8993 P=20.53
 pX33_noxref noxref_15 Y Y PROBETYPE=1
 *
diff --git a/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.lvs.report b/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.lvs.report
new file mode 100644
index 0000000..31d40e0
--- /dev/null
+++ b/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.lvs.report
@@ -0,0 +1,483 @@
+
+LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.spice"
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------
+
+Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.spice"
+
+
+
+
+                  ##################################################
+                  ##                                              ##
+                  ##         C A L I B R E    S Y S T E M         ##
+                  ##                                              ##
+                  ##             L V S   R E P O R T              ##
+                  ##                                              ##
+                  ##################################################
+
+
+
+REPORT FILE NAME:         sky130_fd_sc_hdll__a21bo_1.lvs.report
+LAYOUT NAME:              svdb/sky130_fd_sc_hdll__a21bo_1.sp ('sky130_fd_sc_hdll__a21bo_1')
+SOURCE NAME:              /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.spice ('sky130_fd_sc_hdll__a21bo_1')
+RULE FILE:                /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_
+CREATION TIME:            Wed Sep  2 08:16:20 2020
+CURRENT DIRECTORY:        /home/hlusk/repos/SkyWater/osugooglelib/calibre
+USER NAME:                hlusk
+CALIBRE VERSION:          v2018.4_34.26    Mon Dec 3 14:40:54 PST 2018
+
+
+
+                               OVERALL COMPARISON RESULTS
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+
+**************************************************************************************************************
+                                      CELL  SUMMARY
+**************************************************************************************************************
+
+  Result         Layout                        Source
+  -----------    -----------                   --------------
+  CORRECT        sky130_fd_sc_hdll__a21bo_1    sky130_fd_sc_hdll__a21bo_1
+
+
+
+**************************************************************************************************************
+                                      LVS PARAMETERS
+**************************************************************************************************************
+
+
+o LVS Setup:
+
+   // LVS COMPONENT TYPE PROPERTY
+   // LVS COMPONENT SUBTYPE PROPERTY
+   // LVS PIN NAME PROPERTY
+   // LVS POWER NAME
+   // LVS GROUND NAME
+   LVS CELL SUPPLY                        NO
+   LVS RECOGNIZE GATES                    ALL
+   LVS IGNORE PORTS                       NO
+   LVS CHECK PORT NAMES                   YES
+   LVS IGNORE TRIVIAL NAMED PORTS         NO
+   LVS BUILTIN DEVICE PIN SWAP            YES
+   LVS ALL CAPACITOR PINS SWAPPABLE       NO
+   LVS DISCARD PINS BY DEVICE             YES
+   LVS SOFT SUBSTRATE PINS                NO
+   LVS INJECT LOGIC                       NO
+   LVS EXPAND UNBALANCED CELLS            YES
+   LVS FLATTEN INSIDE CELL                NO
+   LVS EXPAND SEED PROMOTIONS             NO
+   LVS PRESERVE PARAMETERIZED CELLS       NO
+   LVS GLOBALS ARE PORTS                  YES
+   LVS REVERSE WL                         NO
+   LVS SPICE PREFER PINS                  YES
+   LVS SPICE SLASH IS SPACE               NO
+   LVS SPICE ALLOW FLOATING PINS          YES
+   LVS SPICE ALLOW INLINE PARAMETERS      NO
+   LVS SPICE ALLOW UNQUOTED STRINGS       YES
+   LVS SPICE CONDITIONAL LDD              NO
+   LVS SPICE CULL PRIMITIVE SUBCIRCUITS   NO
+   // LVS SPICE EXCLUDE CELL SOURCE
+   // LVS SPICE EXCLUDE CELL LAYOUT
+   LVS SPICE IMPLIED MOS AREA             NO
+   // LVS SPICE MULTIPLIER NAME
+   LVS SPICE OVERRIDE GLOBALS             YES
+   LVS SPICE REDEFINE PARAM               YES
+   LVS SPICE REPLICATE DEVICES            YES
+   LVS SPICE SCALE X PARAMETERS           NO
+   LVS SPICE STRICT WL                    YES
+   // LVS SPICE OPTION
+   LVS STRICT SUBTYPES                    YES
+   LVS EXACT SUBTYPES                     NO
+   LAYOUT CASE                            NO
+   SOURCE CASE                            NO
+   LVS COMPARE CASE                       NO
+   LVS DOWNCASE DEVICE                    NO
+   LVS REPORT MAXIMUM                     50
+   LVS PROPERTY RESOLUTION MAXIMUM        ALL
+   LVS SIGNATURE MAXIMUM                  ALL
+   // LVS FILTER UNUSED OPTION
+   // LVS REPORT OPTION
+   LVS REPORT UNITS                       YES
+   // LVS NON USER NAME PORT
+   LVS NON USER NAME NET                  "^n[0-9]*$" "^net[0-9]*$"
+   // LVS NON USER NAME INSTANCE
+   // LVS IGNORE DEVICE PIN
+   // LVS PREFER NETS FILTER SOURCE
+   // LVS PREFER NETS FILTER LAYOUT
+
+   // Device Type Map
+
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_2p85" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT
+
+   // Reduction
+
+   LVS REDUCE SERIES MOS                  NO
+   LVS REDUCE PARALLEL MOS                NO
+   LVS REDUCE SEMI SERIES MOS             NO
+   LVS REDUCE SPLIT GATES                 YES [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE PARALLEL BIPOLAR            NO
+   LVS REDUCE SERIES CAPACITORS           NO
+   LVS REDUCE PARALLEL CAPACITORS         NO
+   LVS REDUCE SERIES RESISTORS            NO
+   LVS REDUCE PARALLEL RESISTORS          NO
+   LVS REDUCE PARALLEL DIODES             NO
+
+   LVS REDUCE  condiode  PARALLEL
+   LVS REDUCE  condiodeHvPsub  PARALLEL
+   LVS REDUCE  p20vhv1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  n20vhviso1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  nvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  pvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MP  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  M  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MN  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  Q(npnpar1x1)  PARALLEL
+   LVS REDUCE  Q(npnpar1x2)  PARALLEL
+   LVS REDUCE  Q(npn_1x1_2p0_hv)  PARALLEL
+   LVS REDUCE  Q(pnppar)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  Q(pnppar5x)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  D  PARALLEL [ TOLERANCE a 1 p 1 ]
+   LVS REDUCE  D  SERIES POS NEG NO
+   LVS REDUCE  C(xcmimc1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  C(xcmimc2)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R(mrp1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  SERIES POS NEG NO
+   LVS REDUCE  R(short)  PARALLEL
+   LVS REDUCE  R(short)  SERIES POS NEG NO
+   LVS REDUCE  R(fuse)  PARALLEL NO
+   LVS REDUCE  R(fuse)  SERIES POS NEG NO
+   LVS REDUCE  R(metop)  PARALLEL [ TOLERANCE metopNumber 0 ]
+   LVS REDUCE  R(metop)  SERIES POS NEG NO
+   LVS REDUCTION PRIORITY                 PARALLEL
+   
+   LVS SHORT EQUIVALENT NODES             NO
+
+   // Filter
+
+   LVS FILTER  R(cds_thru)  SHORT SOURCE
+   LVS FILTER  R(cds_thru)  SHORT LAYOUT
+   LVS FILTER  Dpar  OPEN SOURCE
+   LVS FILTER  Dpar  OPEN LAYOUT
+   LVS FILTER  Probe  OPEN SOURCE
+   LVS FILTER  Probe  OPEN LAYOUT
+   LVS FILTER  icecap  OPEN SOURCE
+   LVS FILTER  s8fmlt_iref_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_neg_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_vdac_termx  OPEN SOURCE
+   LVS FILTER  D  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN LAYOUT
+   LVS FILTER  tap_dev  OPEN SOURCE
+   LVS FILTER  tap_dev  OPEN LAYOUT
+   LVS FILTER  cad_dummy_open_device  OPEN SOURCE
+   LVS FILTER  cad_dummy_open_device  OPEN LAYOUT
+
+   // Trace Property
+
+   TRACE PROPERTY  xcnwvc  m m 0
+   TRACE PROPERTY  xcnwvc  w w 0
+   TRACE PROPERTY  xcnwvc  l l 0
+   TRACE PROPERTY  xcnwvc2  m m 0
+   TRACE PROPERTY  xcnwvc2  w w 0
+   TRACE PROPERTY  xcnwvc2  l l 0
+   TRACE PROPERTY  xchvnwc  m m 0
+   TRACE PROPERTY  q(npnpar1x1)  m m 0
+   TRACE PROPERTY  q(npnpar1x2)  m m 0
+   TRACE PROPERTY  q(npn_1x1_2p0_hv)  m m 0
+   TRACE PROPERTY  q(pnppar)  barea barea 0
+   TRACE PROPERTY  q(pnppar)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar)  earea earea 0
+   TRACE PROPERTY  q(pnppar)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar)  m m 0
+   TRACE PROPERTY  q(pnppar5x)  barea barea 0
+   TRACE PROPERTY  q(pnppar5x)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar5x)  earea earea 0
+   TRACE PROPERTY  q(pnppar5x)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar5x)  m m 0
+   TRACE PROPERTY  d(ndiode)  a a 1
+   TRACE PROPERTY  d(ndiode)  p p 1
+   TRACE PROPERTY  d(ndiode)  m m 0
+   TRACE PROPERTY  d(ndiode_h)  a a 1
+   TRACE PROPERTY  d(ndiode_h)  p p 1
+   TRACE PROPERTY  d(ndiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  m m 0
+   TRACE PROPERTY  d(pdiode)  a a 1
+   TRACE PROPERTY  d(pdiode)  p p 1
+   TRACE PROPERTY  d(pdiode)  m m 0
+   TRACE PROPERTY  d(pdiode_h)  a a 1
+   TRACE PROPERTY  d(pdiode_h)  p p 1
+   TRACE PROPERTY  d(pdiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub)  a a 1
+   TRACE PROPERTY  d(dnwdiode_psub)  p p 1
+   TRACE PROPERTY  d(dnwdiode_psub)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  m m 0
+   TRACE PROPERTY  xcmvpp  m m 0
+   TRACE PROPERTY  xcmvpp_2  m m 0
+   TRACE PROPERTY  xcmvpp2_nhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp2_phv5x4  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap2_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l40  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l20  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l10  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x1  m m 0
+   TRACE PROPERTY  xcmvppx4_2xnhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym50p4shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m5shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_lim4shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m4shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4m5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp5  m m 0
+   TRACE PROPERTY  xcmvpp4  m m 0
+   TRACE PROPERTY  xcmvpp3  m m 0
+   TRACE PROPERTY  r(mrdn)  w w 1
+   TRACE PROPERTY  r(mrdn)  l l 1
+   TRACE PROPERTY  r(mrdn)  m m 0
+   TRACE PROPERTY  r(mrdn_hv)  w w 1
+   TRACE PROPERTY  r(mrdn_hv)  l l 1
+   TRACE PROPERTY  r(mrdn_hv)  m m 0
+   TRACE PROPERTY  r(mrdp)  w w 1
+   TRACE PROPERTY  r(mrdp)  l l 1
+   TRACE PROPERTY  r(mrdp)  m m 0
+   TRACE PROPERTY  r(mrdp_hv)  w w 1
+   TRACE PROPERTY  r(mrdp_hv)  l l 1
+   TRACE PROPERTY  r(mrdp_hv)  m m 0
+   TRACE PROPERTY  r(mrl1)  w w 1
+   TRACE PROPERTY  r(mrl1)  l l 1
+   TRACE PROPERTY  r(mrl1)  m m 0
+   TRACE PROPERTY  r(xpwres)  w w 1
+   TRACE PROPERTY  r(xpwres)  l l 1
+   TRACE PROPERTY  r(xpwres)  m m 0
+   TRACE PROPERTY  r(short)  m m 0
+   TRACE PROPERTY  r(fuse)  w w 1
+   TRACE PROPERTY  r(fuse)  l l 1
+   TRACE PROPERTY  r(fuse)  m m 0
+   TRACE PROPERTY  r(metop)  metopnumber metopnumber 0
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  m m 0
+   TRACE PROPERTY  d(nwdiode_victim)  a a 10
+   TRACE PROPERTY  d(nwdiode_victim)  p p 10
+   TRACE PROPERTY  d(nwdiode_victim)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  m m 0
+   TRACE PROPERTY  d(nwdiode_aggressor)  a a 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  p p 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  m m 0
+
+   // User Trace Property
+
+   TRACE PROPERTY  mn(nshort)  m mult w l
+   TRACE PROPERTY  mn(npass)  m mult w l
+   TRACE PROPERTY  mn(nlowvt)  m mult w l
+   TRACE PROPERTY  m(sonos_e)  m mult w l
+   TRACE PROPERTY  m  m mult w l
+   TRACE PROPERTY  m(fnpass)  m mult w l
+   TRACE PROPERTY  mn(nhv)  m mult w l
+   TRACE PROPERTY  mn(nhvnative)  m mult w l
+   TRACE PROPERTY  mn(ntvnative)  m mult w l
+   TRACE PROPERTY  mp(pshort)  m mult w l
+   TRACE PROPERTY  mp  m mult w l
+   TRACE PROPERTY  mp(phighvt)  m mult w l
+   TRACE PROPERTY  mp(plowvt)  m mult w l
+   TRACE PROPERTY  mp(phv)  m mult w l
+   TRACE PROPERTY  mn(nshortesd)  m mult w l
+   TRACE PROPERTY  mn(nhvesd)  m mult w l
+   TRACE PROPERTY  mn(nhvnativeesd)  m mult w l
+   TRACE PROPERTY  mp(phvesd)  m mult w l
+   TRACE PROPERTY  nvhv  m mult w l
+   TRACE PROPERTY  n20vhv1  m mult w l
+   TRACE PROPERTY  n20nativevhv1  m mult w l
+   TRACE PROPERTY  n20vhviso1  m mult w l
+   TRACE PROPERTY  n20nativevhviso1  m mult w l
+   TRACE PROPERTY  pvhv  m mult w l
+   TRACE PROPERTY  p20vhv1  m mult w l
+   TRACE PROPERTY  c(xcmimc1)  w l m
+   TRACE PROPERTY  c(xcmimc2)  w l m
+   TRACE PROPERTY  r(mrp1)  m w l
+   TRACE PROPERTY  xhrpoly_0p35  m w l
+   TRACE PROPERTY  xuhrpoly_0p35  m w l
+   TRACE PROPERTY  xhrpoly_0p69  m w l
+   TRACE PROPERTY  xuhrpoly_0p69  m w l
+   TRACE PROPERTY  xhrpoly_1p41  m w l
+   TRACE PROPERTY  xuhrpoly_1p41  m w l
+   TRACE PROPERTY  xhrpoly_2p85  m w l
+   TRACE PROPERTY  xuhrpoly_2p85  m w l
+
+
+
+                   CELL COMPARISON RESULTS ( TOP LEVEL )
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+LAYOUT CELL NAME:         sky130_fd_sc_hdll__a21bo_1
+SOURCE CELL NAME:         sky130_fd_sc_hdll__a21bo_1
+
+--------------------------------------------------------------------------------------------------------------
+
+INITIAL NUMBERS OF OBJECTS
+--------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:              8         8
+
+ Nets:              12        12
+
+ Instances:          5         5         MN (4 pins)
+                     5         5         MP (4 pins)
+                     1         0    *    Dpar (2 pins)
+                ------    ------
+ Total Inst:        11        10
+
+
+NUMBERS OF OBJECTS AFTER TRANSFORMATION
+---------------------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:              8         8
+
+ Nets:              10        10
+
+ Instances:          3         3         MN (4 pins)
+                     2         2         MP (4 pins)
+                     1         1         SMN2 (4 pins)
+                     1         1         SPMP_2_1 (5 pins)
+                ------    ------
+ Total Inst:         7         7
+
+
+       * = Number of objects in layout different from number in source.
+
+
+
+**************************************************************************************************************
+                               INFORMATION AND WARNINGS
+**************************************************************************************************************
+
+
+                  Matched    Matched    Unmatched    Unmatched    Component
+                   Layout     Source       Layout       Source    Type
+                  -------    -------    ---------    ---------    ---------
+   Ports:               8          8            0            0
+
+   Nets:               10         10            0            0
+
+   Instances:           3          3            0            0    MN(NSHORT)
+                        2          2            0            0    MP(PHIGHVT)
+                        1          1            0            0    SMN2
+                        1          1            0            0    SPMP_2_1
+                  -------    -------    ---------    ---------
+   Total Inst:          7          7            0            0
+
+
+o Statistics:
+
+   1 layout instance was filtered and its pins removed from adjoining nets.
+
+
+o Initial Correspondence Points:
+
+   Ports:        VNB VPB B1_N A1 A2 VPWR X VGND
+
+
+**************************************************************************************************************
+                                         SUMMARY
+**************************************************************************************************************
+
+Total CPU Time:      0 sec
+Total Elapsed Time:  0 sec
diff --git a/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.pex.spice b/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.pex.spice
index 063c932..7bdece9 100644
--- a/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.pex.spice
+++ b/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.pex.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21bo_1.pex.spice
-* Created: Thu Aug 27 18:52:03 2020
+* Created: Wed Sep  2 08:16:23 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * Nominal Temperature: 27C
diff --git a/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.pxi.spice b/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.pxi.spice
index 60006d2..9c8e0ed 100644
--- a/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.pxi.spice
+++ b/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.pxi.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21bo_1.pxi.spice
-* Created: Thu Aug 27 18:52:03 2020
+* Created: Wed Sep  2 08:16:23 2020
 * 
 x_PM_SKY130_FD_SC_HDLL__A21BO_1%B1_N N_B1_N_c_62_n N_B1_N_c_63_n N_B1_N_c_67_n
 + N_B1_N_M1002_g N_B1_N_c_64_n N_B1_N_M1004_g N_B1_N_c_68_n B1_N B1_N B1_N B1_N
diff --git a/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.spice b/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.spice
index ebc66df..8779d33 100644
--- a/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.spice
+++ b/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21bo_1.spice
-* Created: Thu Aug 27 18:52:03 2020
+* Created: Wed Sep  2 08:16:23 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * 
diff --git a/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.lvs.report b/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.lvs.report
new file mode 100644
index 0000000..b694b30
--- /dev/null
+++ b/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.lvs.report
@@ -0,0 +1,493 @@
+
+LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.spice"
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------
+
+Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.spice"
+
+
+
+
+                  ##################################################
+                  ##                                              ##
+                  ##         C A L I B R E    S Y S T E M         ##
+                  ##                                              ##
+                  ##             L V S   R E P O R T              ##
+                  ##                                              ##
+                  ##################################################
+
+
+
+REPORT FILE NAME:         sky130_fd_sc_hdll__a21bo_2.lvs.report
+LAYOUT NAME:              svdb/sky130_fd_sc_hdll__a21bo_2.sp ('sky130_fd_sc_hdll__a21bo_2')
+SOURCE NAME:              /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.spice ('sky130_fd_sc_hdll__a21bo_2')
+RULE FILE:                /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_
+CREATION TIME:            Wed Sep  2 08:16:27 2020
+CURRENT DIRECTORY:        /home/hlusk/repos/SkyWater/osugooglelib/calibre
+USER NAME:                hlusk
+CALIBRE VERSION:          v2018.4_34.26    Mon Dec 3 14:40:54 PST 2018
+
+
+
+                               OVERALL COMPARISON RESULTS
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+
+**************************************************************************************************************
+                                      CELL  SUMMARY
+**************************************************************************************************************
+
+  Result         Layout                        Source
+  -----------    -----------                   --------------
+  CORRECT        sky130_fd_sc_hdll__a21bo_2    sky130_fd_sc_hdll__a21bo_2
+
+
+
+**************************************************************************************************************
+                                      LVS PARAMETERS
+**************************************************************************************************************
+
+
+o LVS Setup:
+
+   // LVS COMPONENT TYPE PROPERTY
+   // LVS COMPONENT SUBTYPE PROPERTY
+   // LVS PIN NAME PROPERTY
+   // LVS POWER NAME
+   // LVS GROUND NAME
+   LVS CELL SUPPLY                        NO
+   LVS RECOGNIZE GATES                    ALL
+   LVS IGNORE PORTS                       NO
+   LVS CHECK PORT NAMES                   YES
+   LVS IGNORE TRIVIAL NAMED PORTS         NO
+   LVS BUILTIN DEVICE PIN SWAP            YES
+   LVS ALL CAPACITOR PINS SWAPPABLE       NO
+   LVS DISCARD PINS BY DEVICE             YES
+   LVS SOFT SUBSTRATE PINS                NO
+   LVS INJECT LOGIC                       NO
+   LVS EXPAND UNBALANCED CELLS            YES
+   LVS FLATTEN INSIDE CELL                NO
+   LVS EXPAND SEED PROMOTIONS             NO
+   LVS PRESERVE PARAMETERIZED CELLS       NO
+   LVS GLOBALS ARE PORTS                  YES
+   LVS REVERSE WL                         NO
+   LVS SPICE PREFER PINS                  YES
+   LVS SPICE SLASH IS SPACE               NO
+   LVS SPICE ALLOW FLOATING PINS          YES
+   LVS SPICE ALLOW INLINE PARAMETERS      NO
+   LVS SPICE ALLOW UNQUOTED STRINGS       YES
+   LVS SPICE CONDITIONAL LDD              NO
+   LVS SPICE CULL PRIMITIVE SUBCIRCUITS   NO
+   // LVS SPICE EXCLUDE CELL SOURCE
+   // LVS SPICE EXCLUDE CELL LAYOUT
+   LVS SPICE IMPLIED MOS AREA             NO
+   // LVS SPICE MULTIPLIER NAME
+   LVS SPICE OVERRIDE GLOBALS             YES
+   LVS SPICE REDEFINE PARAM               YES
+   LVS SPICE REPLICATE DEVICES            YES
+   LVS SPICE SCALE X PARAMETERS           NO
+   LVS SPICE STRICT WL                    YES
+   // LVS SPICE OPTION
+   LVS STRICT SUBTYPES                    YES
+   LVS EXACT SUBTYPES                     NO
+   LAYOUT CASE                            NO
+   SOURCE CASE                            NO
+   LVS COMPARE CASE                       NO
+   LVS DOWNCASE DEVICE                    NO
+   LVS REPORT MAXIMUM                     50
+   LVS PROPERTY RESOLUTION MAXIMUM        ALL
+   LVS SIGNATURE MAXIMUM                  ALL
+   // LVS FILTER UNUSED OPTION
+   // LVS REPORT OPTION
+   LVS REPORT UNITS                       YES
+   // LVS NON USER NAME PORT
+   LVS NON USER NAME NET                  "^n[0-9]*$" "^net[0-9]*$"
+   // LVS NON USER NAME INSTANCE
+   // LVS IGNORE DEVICE PIN
+   // LVS PREFER NETS FILTER SOURCE
+   // LVS PREFER NETS FILTER LAYOUT
+
+   // Device Type Map
+
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_2p85" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT
+
+   // Reduction
+
+   LVS REDUCE SERIES MOS                  NO
+   LVS REDUCE PARALLEL MOS                NO
+   LVS REDUCE SEMI SERIES MOS             NO
+   LVS REDUCE SPLIT GATES                 YES [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE PARALLEL BIPOLAR            NO
+   LVS REDUCE SERIES CAPACITORS           NO
+   LVS REDUCE PARALLEL CAPACITORS         NO
+   LVS REDUCE SERIES RESISTORS            NO
+   LVS REDUCE PARALLEL RESISTORS          NO
+   LVS REDUCE PARALLEL DIODES             NO
+
+   LVS REDUCE  condiode  PARALLEL
+   LVS REDUCE  condiodeHvPsub  PARALLEL
+   LVS REDUCE  p20vhv1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  n20vhviso1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  nvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  pvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MP  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  M  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MN  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  Q(npnpar1x1)  PARALLEL
+   LVS REDUCE  Q(npnpar1x2)  PARALLEL
+   LVS REDUCE  Q(npn_1x1_2p0_hv)  PARALLEL
+   LVS REDUCE  Q(pnppar)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  Q(pnppar5x)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  D  PARALLEL [ TOLERANCE a 1 p 1 ]
+   LVS REDUCE  D  SERIES POS NEG NO
+   LVS REDUCE  C(xcmimc1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  C(xcmimc2)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R(mrp1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  SERIES POS NEG NO
+   LVS REDUCE  R(short)  PARALLEL
+   LVS REDUCE  R(short)  SERIES POS NEG NO
+   LVS REDUCE  R(fuse)  PARALLEL NO
+   LVS REDUCE  R(fuse)  SERIES POS NEG NO
+   LVS REDUCE  R(metop)  PARALLEL [ TOLERANCE metopNumber 0 ]
+   LVS REDUCE  R(metop)  SERIES POS NEG NO
+   LVS REDUCTION PRIORITY                 PARALLEL
+   
+   LVS SHORT EQUIVALENT NODES             NO
+
+   // Filter
+
+   LVS FILTER  R(cds_thru)  SHORT SOURCE
+   LVS FILTER  R(cds_thru)  SHORT LAYOUT
+   LVS FILTER  Dpar  OPEN SOURCE
+   LVS FILTER  Dpar  OPEN LAYOUT
+   LVS FILTER  Probe  OPEN SOURCE
+   LVS FILTER  Probe  OPEN LAYOUT
+   LVS FILTER  icecap  OPEN SOURCE
+   LVS FILTER  s8fmlt_iref_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_neg_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_vdac_termx  OPEN SOURCE
+   LVS FILTER  D  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN LAYOUT
+   LVS FILTER  tap_dev  OPEN SOURCE
+   LVS FILTER  tap_dev  OPEN LAYOUT
+   LVS FILTER  cad_dummy_open_device  OPEN SOURCE
+   LVS FILTER  cad_dummy_open_device  OPEN LAYOUT
+
+   // Trace Property
+
+   TRACE PROPERTY  xcnwvc  m m 0
+   TRACE PROPERTY  xcnwvc  w w 0
+   TRACE PROPERTY  xcnwvc  l l 0
+   TRACE PROPERTY  xcnwvc2  m m 0
+   TRACE PROPERTY  xcnwvc2  w w 0
+   TRACE PROPERTY  xcnwvc2  l l 0
+   TRACE PROPERTY  xchvnwc  m m 0
+   TRACE PROPERTY  q(npnpar1x1)  m m 0
+   TRACE PROPERTY  q(npnpar1x2)  m m 0
+   TRACE PROPERTY  q(npn_1x1_2p0_hv)  m m 0
+   TRACE PROPERTY  q(pnppar)  barea barea 0
+   TRACE PROPERTY  q(pnppar)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar)  earea earea 0
+   TRACE PROPERTY  q(pnppar)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar)  m m 0
+   TRACE PROPERTY  q(pnppar5x)  barea barea 0
+   TRACE PROPERTY  q(pnppar5x)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar5x)  earea earea 0
+   TRACE PROPERTY  q(pnppar5x)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar5x)  m m 0
+   TRACE PROPERTY  d(ndiode)  a a 1
+   TRACE PROPERTY  d(ndiode)  p p 1
+   TRACE PROPERTY  d(ndiode)  m m 0
+   TRACE PROPERTY  d(ndiode_h)  a a 1
+   TRACE PROPERTY  d(ndiode_h)  p p 1
+   TRACE PROPERTY  d(ndiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  m m 0
+   TRACE PROPERTY  d(pdiode)  a a 1
+   TRACE PROPERTY  d(pdiode)  p p 1
+   TRACE PROPERTY  d(pdiode)  m m 0
+   TRACE PROPERTY  d(pdiode_h)  a a 1
+   TRACE PROPERTY  d(pdiode_h)  p p 1
+   TRACE PROPERTY  d(pdiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub)  a a 1
+   TRACE PROPERTY  d(dnwdiode_psub)  p p 1
+   TRACE PROPERTY  d(dnwdiode_psub)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  m m 0
+   TRACE PROPERTY  xcmvpp  m m 0
+   TRACE PROPERTY  xcmvpp_2  m m 0
+   TRACE PROPERTY  xcmvpp2_nhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp2_phv5x4  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap2_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l40  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l20  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l10  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x1  m m 0
+   TRACE PROPERTY  xcmvppx4_2xnhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym50p4shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m5shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_lim4shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m4shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4m5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp5  m m 0
+   TRACE PROPERTY  xcmvpp4  m m 0
+   TRACE PROPERTY  xcmvpp3  m m 0
+   TRACE PROPERTY  r(mrdn)  w w 1
+   TRACE PROPERTY  r(mrdn)  l l 1
+   TRACE PROPERTY  r(mrdn)  m m 0
+   TRACE PROPERTY  r(mrdn_hv)  w w 1
+   TRACE PROPERTY  r(mrdn_hv)  l l 1
+   TRACE PROPERTY  r(mrdn_hv)  m m 0
+   TRACE PROPERTY  r(mrdp)  w w 1
+   TRACE PROPERTY  r(mrdp)  l l 1
+   TRACE PROPERTY  r(mrdp)  m m 0
+   TRACE PROPERTY  r(mrdp_hv)  w w 1
+   TRACE PROPERTY  r(mrdp_hv)  l l 1
+   TRACE PROPERTY  r(mrdp_hv)  m m 0
+   TRACE PROPERTY  r(mrl1)  w w 1
+   TRACE PROPERTY  r(mrl1)  l l 1
+   TRACE PROPERTY  r(mrl1)  m m 0
+   TRACE PROPERTY  r(xpwres)  w w 1
+   TRACE PROPERTY  r(xpwres)  l l 1
+   TRACE PROPERTY  r(xpwres)  m m 0
+   TRACE PROPERTY  r(short)  m m 0
+   TRACE PROPERTY  r(fuse)  w w 1
+   TRACE PROPERTY  r(fuse)  l l 1
+   TRACE PROPERTY  r(fuse)  m m 0
+   TRACE PROPERTY  r(metop)  metopnumber metopnumber 0
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  m m 0
+   TRACE PROPERTY  d(nwdiode_victim)  a a 10
+   TRACE PROPERTY  d(nwdiode_victim)  p p 10
+   TRACE PROPERTY  d(nwdiode_victim)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  m m 0
+   TRACE PROPERTY  d(nwdiode_aggressor)  a a 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  p p 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  m m 0
+
+   // User Trace Property
+
+   TRACE PROPERTY  mn(nshort)  m mult w l
+   TRACE PROPERTY  mn(npass)  m mult w l
+   TRACE PROPERTY  mn(nlowvt)  m mult w l
+   TRACE PROPERTY  m(sonos_e)  m mult w l
+   TRACE PROPERTY  m  m mult w l
+   TRACE PROPERTY  m(fnpass)  m mult w l
+   TRACE PROPERTY  mn(nhv)  m mult w l
+   TRACE PROPERTY  mn(nhvnative)  m mult w l
+   TRACE PROPERTY  mn(ntvnative)  m mult w l
+   TRACE PROPERTY  mp(pshort)  m mult w l
+   TRACE PROPERTY  mp  m mult w l
+   TRACE PROPERTY  mp(phighvt)  m mult w l
+   TRACE PROPERTY  mp(plowvt)  m mult w l
+   TRACE PROPERTY  mp(phv)  m mult w l
+   TRACE PROPERTY  mn(nshortesd)  m mult w l
+   TRACE PROPERTY  mn(nhvesd)  m mult w l
+   TRACE PROPERTY  mn(nhvnativeesd)  m mult w l
+   TRACE PROPERTY  mp(phvesd)  m mult w l
+   TRACE PROPERTY  nvhv  m mult w l
+   TRACE PROPERTY  n20vhv1  m mult w l
+   TRACE PROPERTY  n20nativevhv1  m mult w l
+   TRACE PROPERTY  n20vhviso1  m mult w l
+   TRACE PROPERTY  n20nativevhviso1  m mult w l
+   TRACE PROPERTY  pvhv  m mult w l
+   TRACE PROPERTY  p20vhv1  m mult w l
+   TRACE PROPERTY  c(xcmimc1)  w l m
+   TRACE PROPERTY  c(xcmimc2)  w l m
+   TRACE PROPERTY  r(mrp1)  m w l
+   TRACE PROPERTY  xhrpoly_0p35  m w l
+   TRACE PROPERTY  xuhrpoly_0p35  m w l
+   TRACE PROPERTY  xhrpoly_0p69  m w l
+   TRACE PROPERTY  xuhrpoly_0p69  m w l
+   TRACE PROPERTY  xhrpoly_1p41  m w l
+   TRACE PROPERTY  xuhrpoly_1p41  m w l
+   TRACE PROPERTY  xhrpoly_2p85  m w l
+   TRACE PROPERTY  xuhrpoly_2p85  m w l
+
+
+
+                   CELL COMPARISON RESULTS ( TOP LEVEL )
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+LAYOUT CELL NAME:         sky130_fd_sc_hdll__a21bo_2
+SOURCE CELL NAME:         sky130_fd_sc_hdll__a21bo_2
+
+--------------------------------------------------------------------------------------------------------------
+
+INITIAL NUMBERS OF OBJECTS
+--------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:              8         8
+
+ Nets:              13        12    *
+
+ Instances:          6         6         MN (4 pins)
+                     6         6         MP (4 pins)
+                     1         0    *    Dpar (2 pins)
+                     1         0    *    Probe (2 pins)
+                ------    ------
+ Total Inst:        14        12
+
+
+NUMBERS OF OBJECTS AFTER TRANSFORMATION
+---------------------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:              8         8
+
+ Nets:              10        10
+
+ Instances:          3         3         MN (4 pins)
+                     2         2         MP (4 pins)
+                     1         1         SMN2 (4 pins)
+                     1         1         SPMP_2_1 (5 pins)
+                ------    ------
+ Total Inst:         7         7
+
+
+       * = Number of objects in layout different from number in source.
+
+
+
+**************************************************************************************************************
+                               INFORMATION AND WARNINGS
+**************************************************************************************************************
+
+
+                  Matched    Matched    Unmatched    Unmatched    Component
+                   Layout     Source       Layout       Source    Type
+                  -------    -------    ---------    ---------    ---------
+   Ports:               8          8            0            0
+
+   Nets:               10         10            0            0
+
+   Instances:           3          3            0            0    MN(NSHORT)
+                        2          2            0            0    MP(PHIGHVT)
+                        1          1            0            0    SMN2
+                        1          1            0            0    SPMP_2_1
+                  -------    -------    ---------    ---------
+   Total Inst:          7          7            0            0
+
+
+o Statistics:
+
+   2 layout instances were filtered and their pins removed from adjoining nets.
+
+   4 layout mos transistors were reduced to 2.
+     2 mos transistors were deleted by parallel reduction.
+   4 source mos transistors were reduced to 2.
+     2 mos transistors were deleted by parallel reduction.
+
+   1 layout net had all its pins removed and was deleted.
+
+
+o Initial Correspondence Points:
+
+   Ports:        VNB VPB B1_N A1 A2 VPWR X VGND
+
+
+**************************************************************************************************************
+                                         SUMMARY
+**************************************************************************************************************
+
+Total CPU Time:      0 sec
+Total Elapsed Time:  0 sec
diff --git a/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.pex.spice b/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.pex.spice
index b9f4191..60bfb23 100644
--- a/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.pex.spice
+++ b/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.pex.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21bo_2.pex.spice
-* Created: Thu Aug 27 18:52:10 2020
+* Created: Wed Sep  2 08:16:30 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * Nominal Temperature: 27C
diff --git a/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.pxi.spice b/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.pxi.spice
index 446a160..2ebcfdb 100644
--- a/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.pxi.spice
+++ b/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.pxi.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21bo_2.pxi.spice
-* Created: Thu Aug 27 18:52:10 2020
+* Created: Wed Sep  2 08:16:30 2020
 * 
 x_PM_SKY130_FD_SC_HDLL__A21BO_2%A_79_21# N_A_79_21#_M1011_d N_A_79_21#_M1005_s
 + N_A_79_21#_M1004_g N_A_79_21#_c_77_n N_A_79_21#_M1003_g N_A_79_21#_c_78_n
diff --git a/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.spice b/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.spice
index d114e8e..dbf9ab7 100644
--- a/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.spice
+++ b/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21bo_2.spice
-* Created: Thu Aug 27 18:52:10 2020
+* Created: Wed Sep  2 08:16:30 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * 
diff --git a/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.lvs.report b/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.lvs.report
new file mode 100644
index 0000000..3ce90bc
--- /dev/null
+++ b/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.lvs.report
@@ -0,0 +1,505 @@
+
+LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice"
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------
+
+Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice"
+
+
+
+
+                  ##################################################
+                  ##                                              ##
+                  ##         C A L I B R E    S Y S T E M         ##
+                  ##                                              ##
+                  ##             L V S   R E P O R T              ##
+                  ##                                              ##
+                  ##################################################
+
+
+
+REPORT FILE NAME:         sky130_fd_sc_hdll__a21bo_4.lvs.report
+LAYOUT NAME:              svdb/sky130_fd_sc_hdll__a21bo_4.sp ('sky130_fd_sc_hdll__a21bo_4')
+SOURCE NAME:              /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice ('sky130_fd_sc_hdll__a21bo_4')
+RULE FILE:                /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_
+CREATION TIME:            Wed Sep  2 08:16:34 2020
+CURRENT DIRECTORY:        /home/hlusk/repos/SkyWater/osugooglelib/calibre
+USER NAME:                hlusk
+CALIBRE VERSION:          v2018.4_34.26    Mon Dec 3 14:40:54 PST 2018
+
+
+
+                               OVERALL COMPARISON RESULTS
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+
+**************************************************************************************************************
+                                      CELL  SUMMARY
+**************************************************************************************************************
+
+  Result         Layout                        Source
+  -----------    -----------                   --------------
+  CORRECT        sky130_fd_sc_hdll__a21bo_4    sky130_fd_sc_hdll__a21bo_4
+
+
+
+**************************************************************************************************************
+                                      LVS PARAMETERS
+**************************************************************************************************************
+
+
+o LVS Setup:
+
+   // LVS COMPONENT TYPE PROPERTY
+   // LVS COMPONENT SUBTYPE PROPERTY
+   // LVS PIN NAME PROPERTY
+   // LVS POWER NAME
+   // LVS GROUND NAME
+   LVS CELL SUPPLY                        NO
+   LVS RECOGNIZE GATES                    ALL
+   LVS IGNORE PORTS                       NO
+   LVS CHECK PORT NAMES                   YES
+   LVS IGNORE TRIVIAL NAMED PORTS         NO
+   LVS BUILTIN DEVICE PIN SWAP            YES
+   LVS ALL CAPACITOR PINS SWAPPABLE       NO
+   LVS DISCARD PINS BY DEVICE             YES
+   LVS SOFT SUBSTRATE PINS                NO
+   LVS INJECT LOGIC                       NO
+   LVS EXPAND UNBALANCED CELLS            YES
+   LVS FLATTEN INSIDE CELL                NO
+   LVS EXPAND SEED PROMOTIONS             NO
+   LVS PRESERVE PARAMETERIZED CELLS       NO
+   LVS GLOBALS ARE PORTS                  YES
+   LVS REVERSE WL                         NO
+   LVS SPICE PREFER PINS                  YES
+   LVS SPICE SLASH IS SPACE               NO
+   LVS SPICE ALLOW FLOATING PINS          YES
+   LVS SPICE ALLOW INLINE PARAMETERS      NO
+   LVS SPICE ALLOW UNQUOTED STRINGS       YES
+   LVS SPICE CONDITIONAL LDD              NO
+   LVS SPICE CULL PRIMITIVE SUBCIRCUITS   NO
+   // LVS SPICE EXCLUDE CELL SOURCE
+   // LVS SPICE EXCLUDE CELL LAYOUT
+   LVS SPICE IMPLIED MOS AREA             NO
+   // LVS SPICE MULTIPLIER NAME
+   LVS SPICE OVERRIDE GLOBALS             YES
+   LVS SPICE REDEFINE PARAM               YES
+   LVS SPICE REPLICATE DEVICES            YES
+   LVS SPICE SCALE X PARAMETERS           NO
+   LVS SPICE STRICT WL                    YES
+   // LVS SPICE OPTION
+   LVS STRICT SUBTYPES                    YES
+   LVS EXACT SUBTYPES                     NO
+   LAYOUT CASE                            NO
+   SOURCE CASE                            NO
+   LVS COMPARE CASE                       NO
+   LVS DOWNCASE DEVICE                    NO
+   LVS REPORT MAXIMUM                     50
+   LVS PROPERTY RESOLUTION MAXIMUM        ALL
+   LVS SIGNATURE MAXIMUM                  ALL
+   // LVS FILTER UNUSED OPTION
+   // LVS REPORT OPTION
+   LVS REPORT UNITS                       YES
+   // LVS NON USER NAME PORT
+   LVS NON USER NAME NET                  "^n[0-9]*$" "^net[0-9]*$"
+   // LVS NON USER NAME INSTANCE
+   // LVS IGNORE DEVICE PIN
+   // LVS PREFER NETS FILTER SOURCE
+   // LVS PREFER NETS FILTER LAYOUT
+
+   // Device Type Map
+
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_2p85" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT
+
+   // Reduction
+
+   LVS REDUCE SERIES MOS                  NO
+   LVS REDUCE PARALLEL MOS                NO
+   LVS REDUCE SEMI SERIES MOS             NO
+   LVS REDUCE SPLIT GATES                 YES [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE PARALLEL BIPOLAR            NO
+   LVS REDUCE SERIES CAPACITORS           NO
+   LVS REDUCE PARALLEL CAPACITORS         NO
+   LVS REDUCE SERIES RESISTORS            NO
+   LVS REDUCE PARALLEL RESISTORS          NO
+   LVS REDUCE PARALLEL DIODES             NO
+
+   LVS REDUCE  condiode  PARALLEL
+   LVS REDUCE  condiodeHvPsub  PARALLEL
+   LVS REDUCE  p20vhv1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  n20vhviso1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  nvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  pvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MP  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  M  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MN  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  Q(npnpar1x1)  PARALLEL
+   LVS REDUCE  Q(npnpar1x2)  PARALLEL
+   LVS REDUCE  Q(npn_1x1_2p0_hv)  PARALLEL
+   LVS REDUCE  Q(pnppar)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  Q(pnppar5x)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  D  PARALLEL [ TOLERANCE a 1 p 1 ]
+   LVS REDUCE  D  SERIES POS NEG NO
+   LVS REDUCE  C(xcmimc1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  C(xcmimc2)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R(mrp1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  SERIES POS NEG NO
+   LVS REDUCE  R(short)  PARALLEL
+   LVS REDUCE  R(short)  SERIES POS NEG NO
+   LVS REDUCE  R(fuse)  PARALLEL NO
+   LVS REDUCE  R(fuse)  SERIES POS NEG NO
+   LVS REDUCE  R(metop)  PARALLEL [ TOLERANCE metopNumber 0 ]
+   LVS REDUCE  R(metop)  SERIES POS NEG NO
+   LVS REDUCTION PRIORITY                 PARALLEL
+   
+   LVS SHORT EQUIVALENT NODES             NO
+
+   // Filter
+
+   LVS FILTER  R(cds_thru)  SHORT SOURCE
+   LVS FILTER  R(cds_thru)  SHORT LAYOUT
+   LVS FILTER  Dpar  OPEN SOURCE
+   LVS FILTER  Dpar  OPEN LAYOUT
+   LVS FILTER  Probe  OPEN SOURCE
+   LVS FILTER  Probe  OPEN LAYOUT
+   LVS FILTER  icecap  OPEN SOURCE
+   LVS FILTER  s8fmlt_iref_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_neg_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_vdac_termx  OPEN SOURCE
+   LVS FILTER  D  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN LAYOUT
+   LVS FILTER  tap_dev  OPEN SOURCE
+   LVS FILTER  tap_dev  OPEN LAYOUT
+   LVS FILTER  cad_dummy_open_device  OPEN SOURCE
+   LVS FILTER  cad_dummy_open_device  OPEN LAYOUT
+
+   // Trace Property
+
+   TRACE PROPERTY  xcnwvc  m m 0
+   TRACE PROPERTY  xcnwvc  w w 0
+   TRACE PROPERTY  xcnwvc  l l 0
+   TRACE PROPERTY  xcnwvc2  m m 0
+   TRACE PROPERTY  xcnwvc2  w w 0
+   TRACE PROPERTY  xcnwvc2  l l 0
+   TRACE PROPERTY  xchvnwc  m m 0
+   TRACE PROPERTY  q(npnpar1x1)  m m 0
+   TRACE PROPERTY  q(npnpar1x2)  m m 0
+   TRACE PROPERTY  q(npn_1x1_2p0_hv)  m m 0
+   TRACE PROPERTY  q(pnppar)  barea barea 0
+   TRACE PROPERTY  q(pnppar)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar)  earea earea 0
+   TRACE PROPERTY  q(pnppar)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar)  m m 0
+   TRACE PROPERTY  q(pnppar5x)  barea barea 0
+   TRACE PROPERTY  q(pnppar5x)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar5x)  earea earea 0
+   TRACE PROPERTY  q(pnppar5x)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar5x)  m m 0
+   TRACE PROPERTY  d(ndiode)  a a 1
+   TRACE PROPERTY  d(ndiode)  p p 1
+   TRACE PROPERTY  d(ndiode)  m m 0
+   TRACE PROPERTY  d(ndiode_h)  a a 1
+   TRACE PROPERTY  d(ndiode_h)  p p 1
+   TRACE PROPERTY  d(ndiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  m m 0
+   TRACE PROPERTY  d(pdiode)  a a 1
+   TRACE PROPERTY  d(pdiode)  p p 1
+   TRACE PROPERTY  d(pdiode)  m m 0
+   TRACE PROPERTY  d(pdiode_h)  a a 1
+   TRACE PROPERTY  d(pdiode_h)  p p 1
+   TRACE PROPERTY  d(pdiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub)  a a 1
+   TRACE PROPERTY  d(dnwdiode_psub)  p p 1
+   TRACE PROPERTY  d(dnwdiode_psub)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  m m 0
+   TRACE PROPERTY  xcmvpp  m m 0
+   TRACE PROPERTY  xcmvpp_2  m m 0
+   TRACE PROPERTY  xcmvpp2_nhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp2_phv5x4  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap2_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l40  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l20  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l10  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x1  m m 0
+   TRACE PROPERTY  xcmvppx4_2xnhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym50p4shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m5shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_lim4shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m4shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4m5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp5  m m 0
+   TRACE PROPERTY  xcmvpp4  m m 0
+   TRACE PROPERTY  xcmvpp3  m m 0
+   TRACE PROPERTY  r(mrdn)  w w 1
+   TRACE PROPERTY  r(mrdn)  l l 1
+   TRACE PROPERTY  r(mrdn)  m m 0
+   TRACE PROPERTY  r(mrdn_hv)  w w 1
+   TRACE PROPERTY  r(mrdn_hv)  l l 1
+   TRACE PROPERTY  r(mrdn_hv)  m m 0
+   TRACE PROPERTY  r(mrdp)  w w 1
+   TRACE PROPERTY  r(mrdp)  l l 1
+   TRACE PROPERTY  r(mrdp)  m m 0
+   TRACE PROPERTY  r(mrdp_hv)  w w 1
+   TRACE PROPERTY  r(mrdp_hv)  l l 1
+   TRACE PROPERTY  r(mrdp_hv)  m m 0
+   TRACE PROPERTY  r(mrl1)  w w 1
+   TRACE PROPERTY  r(mrl1)  l l 1
+   TRACE PROPERTY  r(mrl1)  m m 0
+   TRACE PROPERTY  r(xpwres)  w w 1
+   TRACE PROPERTY  r(xpwres)  l l 1
+   TRACE PROPERTY  r(xpwres)  m m 0
+   TRACE PROPERTY  r(short)  m m 0
+   TRACE PROPERTY  r(fuse)  w w 1
+   TRACE PROPERTY  r(fuse)  l l 1
+   TRACE PROPERTY  r(fuse)  m m 0
+   TRACE PROPERTY  r(metop)  metopnumber metopnumber 0
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  m m 0
+   TRACE PROPERTY  d(nwdiode_victim)  a a 10
+   TRACE PROPERTY  d(nwdiode_victim)  p p 10
+   TRACE PROPERTY  d(nwdiode_victim)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  m m 0
+   TRACE PROPERTY  d(nwdiode_aggressor)  a a 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  p p 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  m m 0
+
+   // User Trace Property
+
+   TRACE PROPERTY  mn(nshort)  m mult w l
+   TRACE PROPERTY  mn(npass)  m mult w l
+   TRACE PROPERTY  mn(nlowvt)  m mult w l
+   TRACE PROPERTY  m(sonos_e)  m mult w l
+   TRACE PROPERTY  m  m mult w l
+   TRACE PROPERTY  m(fnpass)  m mult w l
+   TRACE PROPERTY  mn(nhv)  m mult w l
+   TRACE PROPERTY  mn(nhvnative)  m mult w l
+   TRACE PROPERTY  mn(ntvnative)  m mult w l
+   TRACE PROPERTY  mp(pshort)  m mult w l
+   TRACE PROPERTY  mp  m mult w l
+   TRACE PROPERTY  mp(phighvt)  m mult w l
+   TRACE PROPERTY  mp(plowvt)  m mult w l
+   TRACE PROPERTY  mp(phv)  m mult w l
+   TRACE PROPERTY  mn(nshortesd)  m mult w l
+   TRACE PROPERTY  mn(nhvesd)  m mult w l
+   TRACE PROPERTY  mn(nhvnativeesd)  m mult w l
+   TRACE PROPERTY  mp(phvesd)  m mult w l
+   TRACE PROPERTY  nvhv  m mult w l
+   TRACE PROPERTY  n20vhv1  m mult w l
+   TRACE PROPERTY  n20nativevhv1  m mult w l
+   TRACE PROPERTY  n20vhviso1  m mult w l
+   TRACE PROPERTY  n20nativevhviso1  m mult w l
+   TRACE PROPERTY  pvhv  m mult w l
+   TRACE PROPERTY  p20vhv1  m mult w l
+   TRACE PROPERTY  c(xcmimc1)  w l m
+   TRACE PROPERTY  c(xcmimc2)  w l m
+   TRACE PROPERTY  r(mrp1)  m w l
+   TRACE PROPERTY  xhrpoly_0p35  m w l
+   TRACE PROPERTY  xuhrpoly_0p35  m w l
+   TRACE PROPERTY  xhrpoly_0p69  m w l
+   TRACE PROPERTY  xuhrpoly_0p69  m w l
+   TRACE PROPERTY  xhrpoly_1p41  m w l
+   TRACE PROPERTY  xuhrpoly_1p41  m w l
+   TRACE PROPERTY  xhrpoly_2p85  m w l
+   TRACE PROPERTY  xuhrpoly_2p85  m w l
+
+
+
+                   CELL COMPARISON RESULTS ( TOP LEVEL )
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+LAYOUT CELL NAME:         sky130_fd_sc_hdll__a21bo_4
+SOURCE CELL NAME:         sky130_fd_sc_hdll__a21bo_4
+
+--------------------------------------------------------------------------------------------------------------
+
+INITIAL NUMBERS OF OBJECTS
+--------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:              8         8
+
+ Nets:              14        13    *
+
+ Instances:         11        11         MN (4 pins)
+                    11        11         MP (4 pins)
+                     1         0    *    Dpar (2 pins)
+                     1         0    *    Probe (2 pins)
+                ------    ------
+ Total Inst:        24        22
+
+
+NUMBERS OF OBJECTS AFTER TRANSFORMATION
+---------------------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:              8         8
+
+ Nets:              10        10
+
+ Instances:          3         3         MN (4 pins)
+                     2         2         MP (4 pins)
+                     1         1         SMN2 (4 pins)
+                     1         1         SPMP_2_1 (5 pins)
+                ------    ------
+ Total Inst:         7         7
+
+
+       * = Number of objects in layout different from number in source.
+
+
+
+**************************************************************************************************************
+                               INFORMATION AND WARNINGS
+**************************************************************************************************************
+
+
+                  Matched    Matched    Unmatched    Unmatched    Component
+                   Layout     Source       Layout       Source    Type
+                  -------    -------    ---------    ---------    ---------
+   Ports:               8          8            0            0
+
+   Nets:               10         10            0            0
+
+   Instances:           3          3            0            0    MN(NSHORT)
+                        2          2            0            0    MP(PHIGHVT)
+                        1          1            0            0    SMN2
+                        1          1            0            0    SPMP_2_1
+                  -------    -------    ---------    ---------
+   Total Inst:          7          7            0            0
+
+
+o Statistics:
+
+   2 layout instances were filtered and their pins removed from adjoining nets.
+
+   20 layout mos transistors were reduced to 8.  1 connecting net was deleted.
+     10 mos transistors were deleted by parallel reduction.
+     2 mos transistors and 1 connecting net were deleted by split-gate reduction.
+   20 source mos transistors were reduced to 8.  1 connecting net was deleted.
+     10 mos transistors were deleted by parallel reduction.
+     2 mos transistors and 1 connecting net were deleted by split-gate reduction.
+
+   1 layout net had all its pins removed and was deleted.
+
+
+o Initial Correspondence Points:
+
+   Ports:        VNB VPB B1_N A2 A1 VPWR X VGND
+
+
+**************************************************************************************************************
+                                         SUMMARY
+**************************************************************************************************************
+
+Total CPU Time:      0 sec
+Total Elapsed Time:  0 sec
diff --git a/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.pex.spice b/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.pex.spice
index 84da4dd..ef2ad4d 100644
--- a/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.pex.spice
+++ b/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.pex.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21bo_4.pex.spice
-* Created: Thu Aug 27 18:52:16 2020
+* Created: Wed Sep  2 08:16:37 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * Nominal Temperature: 27C
diff --git a/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.pxi.spice b/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.pxi.spice
index 3a381c3..94c46a0 100644
--- a/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.pxi.spice
+++ b/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.pxi.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21bo_4.pxi.spice
-* Created: Thu Aug 27 18:52:16 2020
+* Created: Wed Sep  2 08:16:37 2020
 * 
 x_PM_SKY130_FD_SC_HDLL__A21BO_4%B1_N N_B1_N_c_85_n N_B1_N_M1003_g N_B1_N_c_86_n
 + N_B1_N_M1013_g B1_N B1_N PM_SKY130_FD_SC_HDLL__A21BO_4%B1_N
diff --git a/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice b/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice
index 23339fc..ac3614a 100644
--- a/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice
+++ b/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21bo_4.spice
-* Created: Thu Aug 27 18:52:16 2020
+* Created: Wed Sep  2 08:16:37 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * 
diff --git a/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.lvs.report b/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.lvs.report
new file mode 100644
index 0000000..a0a015a
--- /dev/null
+++ b/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.lvs.report
@@ -0,0 +1,481 @@
+
+LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.spice"
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------
+
+Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.spice"
+
+
+
+
+                  ##################################################
+                  ##                                              ##
+                  ##         C A L I B R E    S Y S T E M         ##
+                  ##                                              ##
+                  ##             L V S   R E P O R T              ##
+                  ##                                              ##
+                  ##################################################
+
+
+
+REPORT FILE NAME:         sky130_fd_sc_hdll__a21boi_1.lvs.report
+LAYOUT NAME:              svdb/sky130_fd_sc_hdll__a21boi_1.sp ('sky130_fd_sc_hdll__a21boi_1')
+SOURCE NAME:              /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.spice ('sky130_fd_sc_hdll__a21boi_1')
+RULE FILE:                /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_
+CREATION TIME:            Wed Sep  2 08:16:41 2020
+CURRENT DIRECTORY:        /home/hlusk/repos/SkyWater/osugooglelib/calibre
+USER NAME:                hlusk
+CALIBRE VERSION:          v2018.4_34.26    Mon Dec 3 14:40:54 PST 2018
+
+
+
+                               OVERALL COMPARISON RESULTS
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+
+**************************************************************************************************************
+                                      CELL  SUMMARY
+**************************************************************************************************************
+
+  Result         Layout                        Source
+  -----------    -----------                   --------------
+  CORRECT        sky130_fd_sc_hdll__a21boi_1   sky130_fd_sc_hdll__a21boi_1
+
+
+
+**************************************************************************************************************
+                                      LVS PARAMETERS
+**************************************************************************************************************
+
+
+o LVS Setup:
+
+   // LVS COMPONENT TYPE PROPERTY
+   // LVS COMPONENT SUBTYPE PROPERTY
+   // LVS PIN NAME PROPERTY
+   // LVS POWER NAME
+   // LVS GROUND NAME
+   LVS CELL SUPPLY                        NO
+   LVS RECOGNIZE GATES                    ALL
+   LVS IGNORE PORTS                       NO
+   LVS CHECK PORT NAMES                   YES
+   LVS IGNORE TRIVIAL NAMED PORTS         NO
+   LVS BUILTIN DEVICE PIN SWAP            YES
+   LVS ALL CAPACITOR PINS SWAPPABLE       NO
+   LVS DISCARD PINS BY DEVICE             YES
+   LVS SOFT SUBSTRATE PINS                NO
+   LVS INJECT LOGIC                       NO
+   LVS EXPAND UNBALANCED CELLS            YES
+   LVS FLATTEN INSIDE CELL                NO
+   LVS EXPAND SEED PROMOTIONS             NO
+   LVS PRESERVE PARAMETERIZED CELLS       NO
+   LVS GLOBALS ARE PORTS                  YES
+   LVS REVERSE WL                         NO
+   LVS SPICE PREFER PINS                  YES
+   LVS SPICE SLASH IS SPACE               NO
+   LVS SPICE ALLOW FLOATING PINS          YES
+   LVS SPICE ALLOW INLINE PARAMETERS      NO
+   LVS SPICE ALLOW UNQUOTED STRINGS       YES
+   LVS SPICE CONDITIONAL LDD              NO
+   LVS SPICE CULL PRIMITIVE SUBCIRCUITS   NO
+   // LVS SPICE EXCLUDE CELL SOURCE
+   // LVS SPICE EXCLUDE CELL LAYOUT
+   LVS SPICE IMPLIED MOS AREA             NO
+   // LVS SPICE MULTIPLIER NAME
+   LVS SPICE OVERRIDE GLOBALS             YES
+   LVS SPICE REDEFINE PARAM               YES
+   LVS SPICE REPLICATE DEVICES            YES
+   LVS SPICE SCALE X PARAMETERS           NO
+   LVS SPICE STRICT WL                    YES
+   // LVS SPICE OPTION
+   LVS STRICT SUBTYPES                    YES
+   LVS EXACT SUBTYPES                     NO
+   LAYOUT CASE                            NO
+   SOURCE CASE                            NO
+   LVS COMPARE CASE                       NO
+   LVS DOWNCASE DEVICE                    NO
+   LVS REPORT MAXIMUM                     50
+   LVS PROPERTY RESOLUTION MAXIMUM        ALL
+   LVS SIGNATURE MAXIMUM                  ALL
+   // LVS FILTER UNUSED OPTION
+   // LVS REPORT OPTION
+   LVS REPORT UNITS                       YES
+   // LVS NON USER NAME PORT
+   LVS NON USER NAME NET                  "^n[0-9]*$" "^net[0-9]*$"
+   // LVS NON USER NAME INSTANCE
+   // LVS IGNORE DEVICE PIN
+   // LVS PREFER NETS FILTER SOURCE
+   // LVS PREFER NETS FILTER LAYOUT
+
+   // Device Type Map
+
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_2p85" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT
+
+   // Reduction
+
+   LVS REDUCE SERIES MOS                  NO
+   LVS REDUCE PARALLEL MOS                NO
+   LVS REDUCE SEMI SERIES MOS             NO
+   LVS REDUCE SPLIT GATES                 YES [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE PARALLEL BIPOLAR            NO
+   LVS REDUCE SERIES CAPACITORS           NO
+   LVS REDUCE PARALLEL CAPACITORS         NO
+   LVS REDUCE SERIES RESISTORS            NO
+   LVS REDUCE PARALLEL RESISTORS          NO
+   LVS REDUCE PARALLEL DIODES             NO
+
+   LVS REDUCE  condiode  PARALLEL
+   LVS REDUCE  condiodeHvPsub  PARALLEL
+   LVS REDUCE  p20vhv1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  n20vhviso1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  nvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  pvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MP  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  M  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MN  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  Q(npnpar1x1)  PARALLEL
+   LVS REDUCE  Q(npnpar1x2)  PARALLEL
+   LVS REDUCE  Q(npn_1x1_2p0_hv)  PARALLEL
+   LVS REDUCE  Q(pnppar)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  Q(pnppar5x)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  D  PARALLEL [ TOLERANCE a 1 p 1 ]
+   LVS REDUCE  D  SERIES POS NEG NO
+   LVS REDUCE  C(xcmimc1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  C(xcmimc2)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R(mrp1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  SERIES POS NEG NO
+   LVS REDUCE  R(short)  PARALLEL
+   LVS REDUCE  R(short)  SERIES POS NEG NO
+   LVS REDUCE  R(fuse)  PARALLEL NO
+   LVS REDUCE  R(fuse)  SERIES POS NEG NO
+   LVS REDUCE  R(metop)  PARALLEL [ TOLERANCE metopNumber 0 ]
+   LVS REDUCE  R(metop)  SERIES POS NEG NO
+   LVS REDUCTION PRIORITY                 PARALLEL
+   
+   LVS SHORT EQUIVALENT NODES             NO
+
+   // Filter
+
+   LVS FILTER  R(cds_thru)  SHORT SOURCE
+   LVS FILTER  R(cds_thru)  SHORT LAYOUT
+   LVS FILTER  Dpar  OPEN SOURCE
+   LVS FILTER  Dpar  OPEN LAYOUT
+   LVS FILTER  Probe  OPEN SOURCE
+   LVS FILTER  Probe  OPEN LAYOUT
+   LVS FILTER  icecap  OPEN SOURCE
+   LVS FILTER  s8fmlt_iref_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_neg_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_vdac_termx  OPEN SOURCE
+   LVS FILTER  D  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN LAYOUT
+   LVS FILTER  tap_dev  OPEN SOURCE
+   LVS FILTER  tap_dev  OPEN LAYOUT
+   LVS FILTER  cad_dummy_open_device  OPEN SOURCE
+   LVS FILTER  cad_dummy_open_device  OPEN LAYOUT
+
+   // Trace Property
+
+   TRACE PROPERTY  xcnwvc  m m 0
+   TRACE PROPERTY  xcnwvc  w w 0
+   TRACE PROPERTY  xcnwvc  l l 0
+   TRACE PROPERTY  xcnwvc2  m m 0
+   TRACE PROPERTY  xcnwvc2  w w 0
+   TRACE PROPERTY  xcnwvc2  l l 0
+   TRACE PROPERTY  xchvnwc  m m 0
+   TRACE PROPERTY  q(npnpar1x1)  m m 0
+   TRACE PROPERTY  q(npnpar1x2)  m m 0
+   TRACE PROPERTY  q(npn_1x1_2p0_hv)  m m 0
+   TRACE PROPERTY  q(pnppar)  barea barea 0
+   TRACE PROPERTY  q(pnppar)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar)  earea earea 0
+   TRACE PROPERTY  q(pnppar)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar)  m m 0
+   TRACE PROPERTY  q(pnppar5x)  barea barea 0
+   TRACE PROPERTY  q(pnppar5x)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar5x)  earea earea 0
+   TRACE PROPERTY  q(pnppar5x)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar5x)  m m 0
+   TRACE PROPERTY  d(ndiode)  a a 1
+   TRACE PROPERTY  d(ndiode)  p p 1
+   TRACE PROPERTY  d(ndiode)  m m 0
+   TRACE PROPERTY  d(ndiode_h)  a a 1
+   TRACE PROPERTY  d(ndiode_h)  p p 1
+   TRACE PROPERTY  d(ndiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  m m 0
+   TRACE PROPERTY  d(pdiode)  a a 1
+   TRACE PROPERTY  d(pdiode)  p p 1
+   TRACE PROPERTY  d(pdiode)  m m 0
+   TRACE PROPERTY  d(pdiode_h)  a a 1
+   TRACE PROPERTY  d(pdiode_h)  p p 1
+   TRACE PROPERTY  d(pdiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub)  a a 1
+   TRACE PROPERTY  d(dnwdiode_psub)  p p 1
+   TRACE PROPERTY  d(dnwdiode_psub)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  m m 0
+   TRACE PROPERTY  xcmvpp  m m 0
+   TRACE PROPERTY  xcmvpp_2  m m 0
+   TRACE PROPERTY  xcmvpp2_nhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp2_phv5x4  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap2_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l40  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l20  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l10  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x1  m m 0
+   TRACE PROPERTY  xcmvppx4_2xnhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym50p4shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m5shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_lim4shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m4shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4m5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp5  m m 0
+   TRACE PROPERTY  xcmvpp4  m m 0
+   TRACE PROPERTY  xcmvpp3  m m 0
+   TRACE PROPERTY  r(mrdn)  w w 1
+   TRACE PROPERTY  r(mrdn)  l l 1
+   TRACE PROPERTY  r(mrdn)  m m 0
+   TRACE PROPERTY  r(mrdn_hv)  w w 1
+   TRACE PROPERTY  r(mrdn_hv)  l l 1
+   TRACE PROPERTY  r(mrdn_hv)  m m 0
+   TRACE PROPERTY  r(mrdp)  w w 1
+   TRACE PROPERTY  r(mrdp)  l l 1
+   TRACE PROPERTY  r(mrdp)  m m 0
+   TRACE PROPERTY  r(mrdp_hv)  w w 1
+   TRACE PROPERTY  r(mrdp_hv)  l l 1
+   TRACE PROPERTY  r(mrdp_hv)  m m 0
+   TRACE PROPERTY  r(mrl1)  w w 1
+   TRACE PROPERTY  r(mrl1)  l l 1
+   TRACE PROPERTY  r(mrl1)  m m 0
+   TRACE PROPERTY  r(xpwres)  w w 1
+   TRACE PROPERTY  r(xpwres)  l l 1
+   TRACE PROPERTY  r(xpwres)  m m 0
+   TRACE PROPERTY  r(short)  m m 0
+   TRACE PROPERTY  r(fuse)  w w 1
+   TRACE PROPERTY  r(fuse)  l l 1
+   TRACE PROPERTY  r(fuse)  m m 0
+   TRACE PROPERTY  r(metop)  metopnumber metopnumber 0
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  m m 0
+   TRACE PROPERTY  d(nwdiode_victim)  a a 10
+   TRACE PROPERTY  d(nwdiode_victim)  p p 10
+   TRACE PROPERTY  d(nwdiode_victim)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  m m 0
+   TRACE PROPERTY  d(nwdiode_aggressor)  a a 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  p p 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  m m 0
+
+   // User Trace Property
+
+   TRACE PROPERTY  mn(nshort)  m mult w l
+   TRACE PROPERTY  mn(npass)  m mult w l
+   TRACE PROPERTY  mn(nlowvt)  m mult w l
+   TRACE PROPERTY  m(sonos_e)  m mult w l
+   TRACE PROPERTY  m  m mult w l
+   TRACE PROPERTY  m(fnpass)  m mult w l
+   TRACE PROPERTY  mn(nhv)  m mult w l
+   TRACE PROPERTY  mn(nhvnative)  m mult w l
+   TRACE PROPERTY  mn(ntvnative)  m mult w l
+   TRACE PROPERTY  mp(pshort)  m mult w l
+   TRACE PROPERTY  mp  m mult w l
+   TRACE PROPERTY  mp(phighvt)  m mult w l
+   TRACE PROPERTY  mp(plowvt)  m mult w l
+   TRACE PROPERTY  mp(phv)  m mult w l
+   TRACE PROPERTY  mn(nshortesd)  m mult w l
+   TRACE PROPERTY  mn(nhvesd)  m mult w l
+   TRACE PROPERTY  mn(nhvnativeesd)  m mult w l
+   TRACE PROPERTY  mp(phvesd)  m mult w l
+   TRACE PROPERTY  nvhv  m mult w l
+   TRACE PROPERTY  n20vhv1  m mult w l
+   TRACE PROPERTY  n20nativevhv1  m mult w l
+   TRACE PROPERTY  n20vhviso1  m mult w l
+   TRACE PROPERTY  n20nativevhviso1  m mult w l
+   TRACE PROPERTY  pvhv  m mult w l
+   TRACE PROPERTY  p20vhv1  m mult w l
+   TRACE PROPERTY  c(xcmimc1)  w l m
+   TRACE PROPERTY  c(xcmimc2)  w l m
+   TRACE PROPERTY  r(mrp1)  m w l
+   TRACE PROPERTY  xhrpoly_0p35  m w l
+   TRACE PROPERTY  xuhrpoly_0p35  m w l
+   TRACE PROPERTY  xhrpoly_0p69  m w l
+   TRACE PROPERTY  xuhrpoly_0p69  m w l
+   TRACE PROPERTY  xhrpoly_1p41  m w l
+   TRACE PROPERTY  xuhrpoly_1p41  m w l
+   TRACE PROPERTY  xhrpoly_2p85  m w l
+   TRACE PROPERTY  xuhrpoly_2p85  m w l
+
+
+
+                   CELL COMPARISON RESULTS ( TOP LEVEL )
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+LAYOUT CELL NAME:         sky130_fd_sc_hdll__a21boi_1
+SOURCE CELL NAME:         sky130_fd_sc_hdll__a21boi_1
+
+--------------------------------------------------------------------------------------------------------------
+
+INITIAL NUMBERS OF OBJECTS
+--------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:              8         8
+
+ Nets:              11        11
+
+ Instances:          4         4         MN (4 pins)
+                     4         4         MP (4 pins)
+                     1         0    *    Dpar (2 pins)
+                ------    ------
+ Total Inst:         9         8
+
+
+NUMBERS OF OBJECTS AFTER TRANSFORMATION
+---------------------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:              8         8
+
+ Nets:               9         9
+
+ Instances:          2         2         MN (4 pins)
+                     1         1         MP (4 pins)
+                     1         1         SMN2 (4 pins)
+                     1         1         SPMP_2_1 (5 pins)
+                ------    ------
+ Total Inst:         5         5
+
+
+       * = Number of objects in layout different from number in source.
+
+
+
+**************************************************************************************************************
+                               INFORMATION AND WARNINGS
+**************************************************************************************************************
+
+
+                  Matched    Matched    Unmatched    Unmatched    Component
+                   Layout     Source       Layout       Source    Type
+                  -------    -------    ---------    ---------    ---------
+   Ports:               8          8            0            0
+
+   Nets:                9          9            0            0
+
+   Instances:           2          2            0            0    MN(NSHORT)
+                        1          1            0            0    MP(PHIGHVT)
+                        1          1            0            0    SMN2
+                        1          1            0            0    SPMP_2_1
+                  -------    -------    ---------    ---------
+   Total Inst:          5          5            0            0
+
+
+o Statistics:
+
+   1 layout instance was filtered and its pins removed from adjoining nets.
+
+
+o Initial Correspondence Points:
+
+   Ports:        VNB VPB B1_N A1 A2 VPWR Y VGND
+
+
+**************************************************************************************************************
+                                         SUMMARY
+**************************************************************************************************************
+
+Total CPU Time:      0 sec
+Total Elapsed Time:  0 sec
diff --git a/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.pex.spice b/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.pex.spice
index 32264ce..8a712c4 100644
--- a/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.pex.spice
+++ b/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.pex.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21boi_1.pex.spice
-* Created: Thu Aug 27 18:52:23 2020
+* Created: Wed Sep  2 08:16:45 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * Nominal Temperature: 27C
diff --git a/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.pxi.spice b/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.pxi.spice
index 18a9ea8..9c638b8 100644
--- a/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.pxi.spice
+++ b/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.pxi.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21boi_1.pxi.spice
-* Created: Thu Aug 27 18:52:23 2020
+* Created: Wed Sep  2 08:16:45 2020
 * 
 x_PM_SKY130_FD_SC_HDLL__A21BOI_1%B1_N N_B1_N_c_51_n N_B1_N_c_52_n N_B1_N_c_55_n
 + N_B1_N_M1000_g N_B1_N_c_53_n N_B1_N_M1002_g N_B1_N_c_56_n B1_N B1_N
diff --git a/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.spice b/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.spice
index fc134ef..7939c60 100644
--- a/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.spice
+++ b/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21boi_1.spice
-* Created: Thu Aug 27 18:52:23 2020
+* Created: Wed Sep  2 08:16:45 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * 
diff --git a/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.lvs.report b/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.lvs.report
new file mode 100644
index 0000000..3225680
--- /dev/null
+++ b/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.lvs.report
@@ -0,0 +1,497 @@
+
+LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.spice"
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------
+
+Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.spice"
+
+
+
+
+                  ##################################################
+                  ##                                              ##
+                  ##         C A L I B R E    S Y S T E M         ##
+                  ##                                              ##
+                  ##             L V S   R E P O R T              ##
+                  ##                                              ##
+                  ##################################################
+
+
+
+REPORT FILE NAME:         sky130_fd_sc_hdll__a21boi_2.lvs.report
+LAYOUT NAME:              svdb/sky130_fd_sc_hdll__a21boi_2.sp ('sky130_fd_sc_hdll__a21boi_2')
+SOURCE NAME:              /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.spice ('sky130_fd_sc_hdll__a21boi_2')
+RULE FILE:                /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_
+CREATION TIME:            Wed Sep  2 08:16:48 2020
+CURRENT DIRECTORY:        /home/hlusk/repos/SkyWater/osugooglelib/calibre
+USER NAME:                hlusk
+CALIBRE VERSION:          v2018.4_34.26    Mon Dec 3 14:40:54 PST 2018
+
+
+
+                               OVERALL COMPARISON RESULTS
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+
+**************************************************************************************************************
+                                      CELL  SUMMARY
+**************************************************************************************************************
+
+  Result         Layout                        Source
+  -----------    -----------                   --------------
+  CORRECT        sky130_fd_sc_hdll__a21boi_2   sky130_fd_sc_hdll__a21boi_2
+
+
+
+**************************************************************************************************************
+                                      LVS PARAMETERS
+**************************************************************************************************************
+
+
+o LVS Setup:
+
+   // LVS COMPONENT TYPE PROPERTY
+   // LVS COMPONENT SUBTYPE PROPERTY
+   // LVS PIN NAME PROPERTY
+   // LVS POWER NAME
+   // LVS GROUND NAME
+   LVS CELL SUPPLY                        NO
+   LVS RECOGNIZE GATES                    ALL
+   LVS IGNORE PORTS                       NO
+   LVS CHECK PORT NAMES                   YES
+   LVS IGNORE TRIVIAL NAMED PORTS         NO
+   LVS BUILTIN DEVICE PIN SWAP            YES
+   LVS ALL CAPACITOR PINS SWAPPABLE       NO
+   LVS DISCARD PINS BY DEVICE             YES
+   LVS SOFT SUBSTRATE PINS                NO
+   LVS INJECT LOGIC                       NO
+   LVS EXPAND UNBALANCED CELLS            YES
+   LVS FLATTEN INSIDE CELL                NO
+   LVS EXPAND SEED PROMOTIONS             NO
+   LVS PRESERVE PARAMETERIZED CELLS       NO
+   LVS GLOBALS ARE PORTS                  YES
+   LVS REVERSE WL                         NO
+   LVS SPICE PREFER PINS                  YES
+   LVS SPICE SLASH IS SPACE               NO
+   LVS SPICE ALLOW FLOATING PINS          YES
+   LVS SPICE ALLOW INLINE PARAMETERS      NO
+   LVS SPICE ALLOW UNQUOTED STRINGS       YES
+   LVS SPICE CONDITIONAL LDD              NO
+   LVS SPICE CULL PRIMITIVE SUBCIRCUITS   NO
+   // LVS SPICE EXCLUDE CELL SOURCE
+   // LVS SPICE EXCLUDE CELL LAYOUT
+   LVS SPICE IMPLIED MOS AREA             NO
+   // LVS SPICE MULTIPLIER NAME
+   LVS SPICE OVERRIDE GLOBALS             YES
+   LVS SPICE REDEFINE PARAM               YES
+   LVS SPICE REPLICATE DEVICES            YES
+   LVS SPICE SCALE X PARAMETERS           NO
+   LVS SPICE STRICT WL                    YES
+   // LVS SPICE OPTION
+   LVS STRICT SUBTYPES                    YES
+   LVS EXACT SUBTYPES                     NO
+   LAYOUT CASE                            NO
+   SOURCE CASE                            NO
+   LVS COMPARE CASE                       NO
+   LVS DOWNCASE DEVICE                    NO
+   LVS REPORT MAXIMUM                     50
+   LVS PROPERTY RESOLUTION MAXIMUM        ALL
+   LVS SIGNATURE MAXIMUM                  ALL
+   // LVS FILTER UNUSED OPTION
+   // LVS REPORT OPTION
+   LVS REPORT UNITS                       YES
+   // LVS NON USER NAME PORT
+   LVS NON USER NAME NET                  "^n[0-9]*$" "^net[0-9]*$"
+   // LVS NON USER NAME INSTANCE
+   // LVS IGNORE DEVICE PIN
+   // LVS PREFER NETS FILTER SOURCE
+   // LVS PREFER NETS FILTER LAYOUT
+
+   // Device Type Map
+
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_2p85" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT
+
+   // Reduction
+
+   LVS REDUCE SERIES MOS                  NO
+   LVS REDUCE PARALLEL MOS                NO
+   LVS REDUCE SEMI SERIES MOS             NO
+   LVS REDUCE SPLIT GATES                 YES [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE PARALLEL BIPOLAR            NO
+   LVS REDUCE SERIES CAPACITORS           NO
+   LVS REDUCE PARALLEL CAPACITORS         NO
+   LVS REDUCE SERIES RESISTORS            NO
+   LVS REDUCE PARALLEL RESISTORS          NO
+   LVS REDUCE PARALLEL DIODES             NO
+
+   LVS REDUCE  condiode  PARALLEL
+   LVS REDUCE  condiodeHvPsub  PARALLEL
+   LVS REDUCE  p20vhv1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  n20vhviso1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  nvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  pvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MP  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  M  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MN  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  Q(npnpar1x1)  PARALLEL
+   LVS REDUCE  Q(npnpar1x2)  PARALLEL
+   LVS REDUCE  Q(npn_1x1_2p0_hv)  PARALLEL
+   LVS REDUCE  Q(pnppar)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  Q(pnppar5x)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  D  PARALLEL [ TOLERANCE a 1 p 1 ]
+   LVS REDUCE  D  SERIES POS NEG NO
+   LVS REDUCE  C(xcmimc1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  C(xcmimc2)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R(mrp1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  SERIES POS NEG NO
+   LVS REDUCE  R(short)  PARALLEL
+   LVS REDUCE  R(short)  SERIES POS NEG NO
+   LVS REDUCE  R(fuse)  PARALLEL NO
+   LVS REDUCE  R(fuse)  SERIES POS NEG NO
+   LVS REDUCE  R(metop)  PARALLEL [ TOLERANCE metopNumber 0 ]
+   LVS REDUCE  R(metop)  SERIES POS NEG NO
+   LVS REDUCTION PRIORITY                 PARALLEL
+   
+   LVS SHORT EQUIVALENT NODES             NO
+
+   // Filter
+
+   LVS FILTER  R(cds_thru)  SHORT SOURCE
+   LVS FILTER  R(cds_thru)  SHORT LAYOUT
+   LVS FILTER  Dpar  OPEN SOURCE
+   LVS FILTER  Dpar  OPEN LAYOUT
+   LVS FILTER  Probe  OPEN SOURCE
+   LVS FILTER  Probe  OPEN LAYOUT
+   LVS FILTER  icecap  OPEN SOURCE
+   LVS FILTER  s8fmlt_iref_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_neg_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_vdac_termx  OPEN SOURCE
+   LVS FILTER  D  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN LAYOUT
+   LVS FILTER  tap_dev  OPEN SOURCE
+   LVS FILTER  tap_dev  OPEN LAYOUT
+   LVS FILTER  cad_dummy_open_device  OPEN SOURCE
+   LVS FILTER  cad_dummy_open_device  OPEN LAYOUT
+
+   // Trace Property
+
+   TRACE PROPERTY  xcnwvc  m m 0
+   TRACE PROPERTY  xcnwvc  w w 0
+   TRACE PROPERTY  xcnwvc  l l 0
+   TRACE PROPERTY  xcnwvc2  m m 0
+   TRACE PROPERTY  xcnwvc2  w w 0
+   TRACE PROPERTY  xcnwvc2  l l 0
+   TRACE PROPERTY  xchvnwc  m m 0
+   TRACE PROPERTY  q(npnpar1x1)  m m 0
+   TRACE PROPERTY  q(npnpar1x2)  m m 0
+   TRACE PROPERTY  q(npn_1x1_2p0_hv)  m m 0
+   TRACE PROPERTY  q(pnppar)  barea barea 0
+   TRACE PROPERTY  q(pnppar)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar)  earea earea 0
+   TRACE PROPERTY  q(pnppar)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar)  m m 0
+   TRACE PROPERTY  q(pnppar5x)  barea barea 0
+   TRACE PROPERTY  q(pnppar5x)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar5x)  earea earea 0
+   TRACE PROPERTY  q(pnppar5x)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar5x)  m m 0
+   TRACE PROPERTY  d(ndiode)  a a 1
+   TRACE PROPERTY  d(ndiode)  p p 1
+   TRACE PROPERTY  d(ndiode)  m m 0
+   TRACE PROPERTY  d(ndiode_h)  a a 1
+   TRACE PROPERTY  d(ndiode_h)  p p 1
+   TRACE PROPERTY  d(ndiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  m m 0
+   TRACE PROPERTY  d(pdiode)  a a 1
+   TRACE PROPERTY  d(pdiode)  p p 1
+   TRACE PROPERTY  d(pdiode)  m m 0
+   TRACE PROPERTY  d(pdiode_h)  a a 1
+   TRACE PROPERTY  d(pdiode_h)  p p 1
+   TRACE PROPERTY  d(pdiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub)  a a 1
+   TRACE PROPERTY  d(dnwdiode_psub)  p p 1
+   TRACE PROPERTY  d(dnwdiode_psub)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  m m 0
+   TRACE PROPERTY  xcmvpp  m m 0
+   TRACE PROPERTY  xcmvpp_2  m m 0
+   TRACE PROPERTY  xcmvpp2_nhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp2_phv5x4  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap2_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l40  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l20  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l10  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x1  m m 0
+   TRACE PROPERTY  xcmvppx4_2xnhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym50p4shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m5shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_lim4shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m4shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4m5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp5  m m 0
+   TRACE PROPERTY  xcmvpp4  m m 0
+   TRACE PROPERTY  xcmvpp3  m m 0
+   TRACE PROPERTY  r(mrdn)  w w 1
+   TRACE PROPERTY  r(mrdn)  l l 1
+   TRACE PROPERTY  r(mrdn)  m m 0
+   TRACE PROPERTY  r(mrdn_hv)  w w 1
+   TRACE PROPERTY  r(mrdn_hv)  l l 1
+   TRACE PROPERTY  r(mrdn_hv)  m m 0
+   TRACE PROPERTY  r(mrdp)  w w 1
+   TRACE PROPERTY  r(mrdp)  l l 1
+   TRACE PROPERTY  r(mrdp)  m m 0
+   TRACE PROPERTY  r(mrdp_hv)  w w 1
+   TRACE PROPERTY  r(mrdp_hv)  l l 1
+   TRACE PROPERTY  r(mrdp_hv)  m m 0
+   TRACE PROPERTY  r(mrl1)  w w 1
+   TRACE PROPERTY  r(mrl1)  l l 1
+   TRACE PROPERTY  r(mrl1)  m m 0
+   TRACE PROPERTY  r(xpwres)  w w 1
+   TRACE PROPERTY  r(xpwres)  l l 1
+   TRACE PROPERTY  r(xpwres)  m m 0
+   TRACE PROPERTY  r(short)  m m 0
+   TRACE PROPERTY  r(fuse)  w w 1
+   TRACE PROPERTY  r(fuse)  l l 1
+   TRACE PROPERTY  r(fuse)  m m 0
+   TRACE PROPERTY  r(metop)  metopnumber metopnumber 0
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  m m 0
+   TRACE PROPERTY  d(nwdiode_victim)  a a 10
+   TRACE PROPERTY  d(nwdiode_victim)  p p 10
+   TRACE PROPERTY  d(nwdiode_victim)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  m m 0
+   TRACE PROPERTY  d(nwdiode_aggressor)  a a 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  p p 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  m m 0
+
+   // User Trace Property
+
+   TRACE PROPERTY  mn(nshort)  m mult w l
+   TRACE PROPERTY  mn(npass)  m mult w l
+   TRACE PROPERTY  mn(nlowvt)  m mult w l
+   TRACE PROPERTY  m(sonos_e)  m mult w l
+   TRACE PROPERTY  m  m mult w l
+   TRACE PROPERTY  m(fnpass)  m mult w l
+   TRACE PROPERTY  mn(nhv)  m mult w l
+   TRACE PROPERTY  mn(nhvnative)  m mult w l
+   TRACE PROPERTY  mn(ntvnative)  m mult w l
+   TRACE PROPERTY  mp(pshort)  m mult w l
+   TRACE PROPERTY  mp  m mult w l
+   TRACE PROPERTY  mp(phighvt)  m mult w l
+   TRACE PROPERTY  mp(plowvt)  m mult w l
+   TRACE PROPERTY  mp(phv)  m mult w l
+   TRACE PROPERTY  mn(nshortesd)  m mult w l
+   TRACE PROPERTY  mn(nhvesd)  m mult w l
+   TRACE PROPERTY  mn(nhvnativeesd)  m mult w l
+   TRACE PROPERTY  mp(phvesd)  m mult w l
+   TRACE PROPERTY  nvhv  m mult w l
+   TRACE PROPERTY  n20vhv1  m mult w l
+   TRACE PROPERTY  n20nativevhv1  m mult w l
+   TRACE PROPERTY  n20vhviso1  m mult w l
+   TRACE PROPERTY  n20nativevhviso1  m mult w l
+   TRACE PROPERTY  pvhv  m mult w l
+   TRACE PROPERTY  p20vhv1  m mult w l
+   TRACE PROPERTY  c(xcmimc1)  w l m
+   TRACE PROPERTY  c(xcmimc2)  w l m
+   TRACE PROPERTY  r(mrp1)  m w l
+   TRACE PROPERTY  xhrpoly_0p35  m w l
+   TRACE PROPERTY  xuhrpoly_0p35  m w l
+   TRACE PROPERTY  xhrpoly_0p69  m w l
+   TRACE PROPERTY  xuhrpoly_0p69  m w l
+   TRACE PROPERTY  xhrpoly_1p41  m w l
+   TRACE PROPERTY  xuhrpoly_1p41  m w l
+   TRACE PROPERTY  xhrpoly_2p85  m w l
+   TRACE PROPERTY  xuhrpoly_2p85  m w l
+
+
+
+                   CELL COMPARISON RESULTS ( TOP LEVEL )
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+LAYOUT CELL NAME:         sky130_fd_sc_hdll__a21boi_2
+SOURCE CELL NAME:         sky130_fd_sc_hdll__a21boi_2
+
+--------------------------------------------------------------------------------------------------------------
+
+INITIAL NUMBERS OF OBJECTS
+--------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:              8         8
+
+ Nets:              15        12    *
+
+ Instances:          7         7         MN (4 pins)
+                     7         7         MP (4 pins)
+                     1         0    *    Dpar (2 pins)
+                     3         0    *    Probe (2 pins)
+                ------    ------
+ Total Inst:        18        14
+
+
+NUMBERS OF OBJECTS AFTER TRANSFORMATION
+---------------------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:              8         8
+
+ Nets:               9         9
+
+ Instances:          2         2         MN (4 pins)
+                     1         1         MP (4 pins)
+                     1         1         SMN2 (4 pins)
+                     1         1         SPMP_2_1 (5 pins)
+                ------    ------
+ Total Inst:         5         5
+
+
+       * = Number of objects in layout different from number in source.
+
+
+
+**************************************************************************************************************
+                               INFORMATION AND WARNINGS
+**************************************************************************************************************
+
+
+                  Matched    Matched    Unmatched    Unmatched    Component
+                   Layout     Source       Layout       Source    Type
+                  -------    -------    ---------    ---------    ---------
+   Ports:               8          8            0            0
+
+   Nets:                9          9            0            0
+
+   Instances:           2          2            0            0    MN(NSHORT)
+                        1          1            0            0    MP(PHIGHVT)
+                        1          1            0            0    SMN2
+                        1          1            0            0    SPMP_2_1
+                  -------    -------    ---------    ---------
+   Total Inst:          5          5            0            0
+
+
+o Statistics:
+
+   4 layout instances were filtered and their pins removed from adjoining nets.
+
+   12 layout mos transistors were reduced to 6.  1 connecting net was deleted.
+     4 mos transistors were deleted by parallel reduction.
+     2 mos transistors and 1 connecting net were deleted by split-gate reduction.
+   12 source mos transistors were reduced to 6.  1 connecting net was deleted.
+     4 mos transistors were deleted by parallel reduction.
+     2 mos transistors and 1 connecting net were deleted by split-gate reduction.
+
+   3 layout nets had all their pins removed and were deleted.
+
+
+o Initial Correspondence Points:
+
+   Ports:        VNB VPB B1_N A2 A1 VPWR Y VGND
+
+
+**************************************************************************************************************
+                                         SUMMARY
+**************************************************************************************************************
+
+Total CPU Time:      0 sec
+Total Elapsed Time:  0 sec
diff --git a/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.pex.spice b/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.pex.spice
index 4e262ee..a95dbdd 100644
--- a/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.pex.spice
+++ b/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.pex.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21boi_2.pex.spice
-* Created: Thu Aug 27 18:52:30 2020
+* Created: Wed Sep  2 08:16:52 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * Nominal Temperature: 27C
diff --git a/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.pxi.spice b/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.pxi.spice
index 07bf688..2064d6e 100644
--- a/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.pxi.spice
+++ b/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.pxi.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21boi_2.pxi.spice
-* Created: Thu Aug 27 18:52:30 2020
+* Created: Wed Sep  2 08:16:52 2020
 * 
 x_PM_SKY130_FD_SC_HDLL__A21BOI_2%B1_N N_B1_N_c_74_n N_B1_N_c_75_n N_B1_N_M1007_g
 + N_B1_N_M1010_g N_B1_N_c_69_n N_B1_N_c_70_n N_B1_N_c_71_n B1_N N_B1_N_c_73_n
diff --git a/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.spice b/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.spice
index f25040d..1b38718 100644
--- a/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.spice
+++ b/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21boi_2.spice
-* Created: Thu Aug 27 18:52:30 2020
+* Created: Wed Sep  2 08:16:52 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * 
diff --git a/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.lvs.report b/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.lvs.report
new file mode 100644
index 0000000..1b5d4ee
--- /dev/null
+++ b/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.lvs.report
@@ -0,0 +1,507 @@
+
+LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice"
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------
+
+Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice"
+
+
+
+
+                  ##################################################
+                  ##                                              ##
+                  ##         C A L I B R E    S Y S T E M         ##
+                  ##                                              ##
+                  ##             L V S   R E P O R T              ##
+                  ##                                              ##
+                  ##################################################
+
+
+
+REPORT FILE NAME:         sky130_fd_sc_hdll__a21boi_4.lvs.report
+LAYOUT NAME:              svdb/sky130_fd_sc_hdll__a21boi_4.sp ('sky130_fd_sc_hdll__a21boi_4')
+SOURCE NAME:              /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice ('sky130_fd_sc_hdll__a21boi_4')
+RULE FILE:                /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_
+CREATION TIME:            Wed Sep  2 08:16:55 2020
+CURRENT DIRECTORY:        /home/hlusk/repos/SkyWater/osugooglelib/calibre
+USER NAME:                hlusk
+CALIBRE VERSION:          v2018.4_34.26    Mon Dec 3 14:40:54 PST 2018
+
+
+
+                               OVERALL COMPARISON RESULTS
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+
+**************************************************************************************************************
+                                      CELL  SUMMARY
+**************************************************************************************************************
+
+  Result         Layout                        Source
+  -----------    -----------                   --------------
+  CORRECT        sky130_fd_sc_hdll__a21boi_4   sky130_fd_sc_hdll__a21boi_4
+
+
+
+**************************************************************************************************************
+                                      LVS PARAMETERS
+**************************************************************************************************************
+
+
+o LVS Setup:
+
+   // LVS COMPONENT TYPE PROPERTY
+   // LVS COMPONENT SUBTYPE PROPERTY
+   // LVS PIN NAME PROPERTY
+   // LVS POWER NAME
+   // LVS GROUND NAME
+   LVS CELL SUPPLY                        NO
+   LVS RECOGNIZE GATES                    ALL
+   LVS IGNORE PORTS                       NO
+   LVS CHECK PORT NAMES                   YES
+   LVS IGNORE TRIVIAL NAMED PORTS         NO
+   LVS BUILTIN DEVICE PIN SWAP            YES
+   LVS ALL CAPACITOR PINS SWAPPABLE       NO
+   LVS DISCARD PINS BY DEVICE             YES
+   LVS SOFT SUBSTRATE PINS                NO
+   LVS INJECT LOGIC                       NO
+   LVS EXPAND UNBALANCED CELLS            YES
+   LVS FLATTEN INSIDE CELL                NO
+   LVS EXPAND SEED PROMOTIONS             NO
+   LVS PRESERVE PARAMETERIZED CELLS       NO
+   LVS GLOBALS ARE PORTS                  YES
+   LVS REVERSE WL                         NO
+   LVS SPICE PREFER PINS                  YES
+   LVS SPICE SLASH IS SPACE               NO
+   LVS SPICE ALLOW FLOATING PINS          YES
+   LVS SPICE ALLOW INLINE PARAMETERS      NO
+   LVS SPICE ALLOW UNQUOTED STRINGS       YES
+   LVS SPICE CONDITIONAL LDD              NO
+   LVS SPICE CULL PRIMITIVE SUBCIRCUITS   NO
+   // LVS SPICE EXCLUDE CELL SOURCE
+   // LVS SPICE EXCLUDE CELL LAYOUT
+   LVS SPICE IMPLIED MOS AREA             NO
+   // LVS SPICE MULTIPLIER NAME
+   LVS SPICE OVERRIDE GLOBALS             YES
+   LVS SPICE REDEFINE PARAM               YES
+   LVS SPICE REPLICATE DEVICES            YES
+   LVS SPICE SCALE X PARAMETERS           NO
+   LVS SPICE STRICT WL                    YES
+   // LVS SPICE OPTION
+   LVS STRICT SUBTYPES                    YES
+   LVS EXACT SUBTYPES                     NO
+   LAYOUT CASE                            NO
+   SOURCE CASE                            NO
+   LVS COMPARE CASE                       NO
+   LVS DOWNCASE DEVICE                    NO
+   LVS REPORT MAXIMUM                     50
+   LVS PROPERTY RESOLUTION MAXIMUM        ALL
+   LVS SIGNATURE MAXIMUM                  ALL
+   // LVS FILTER UNUSED OPTION
+   // LVS REPORT OPTION
+   LVS REPORT UNITS                       YES
+   // LVS NON USER NAME PORT
+   LVS NON USER NAME NET                  "^n[0-9]*$" "^net[0-9]*$"
+   // LVS NON USER NAME INSTANCE
+   // LVS IGNORE DEVICE PIN
+   // LVS PREFER NETS FILTER SOURCE
+   // LVS PREFER NETS FILTER LAYOUT
+
+   // Device Type Map
+
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_2p85" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT
+
+   // Reduction
+
+   LVS REDUCE SERIES MOS                  NO
+   LVS REDUCE PARALLEL MOS                NO
+   LVS REDUCE SEMI SERIES MOS             NO
+   LVS REDUCE SPLIT GATES                 YES [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE PARALLEL BIPOLAR            NO
+   LVS REDUCE SERIES CAPACITORS           NO
+   LVS REDUCE PARALLEL CAPACITORS         NO
+   LVS REDUCE SERIES RESISTORS            NO
+   LVS REDUCE PARALLEL RESISTORS          NO
+   LVS REDUCE PARALLEL DIODES             NO
+
+   LVS REDUCE  condiode  PARALLEL
+   LVS REDUCE  condiodeHvPsub  PARALLEL
+   LVS REDUCE  p20vhv1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  n20vhviso1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  nvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  pvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MP  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  M  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MN  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  Q(npnpar1x1)  PARALLEL
+   LVS REDUCE  Q(npnpar1x2)  PARALLEL
+   LVS REDUCE  Q(npn_1x1_2p0_hv)  PARALLEL
+   LVS REDUCE  Q(pnppar)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  Q(pnppar5x)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  D  PARALLEL [ TOLERANCE a 1 p 1 ]
+   LVS REDUCE  D  SERIES POS NEG NO
+   LVS REDUCE  C(xcmimc1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  C(xcmimc2)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R(mrp1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  SERIES POS NEG NO
+   LVS REDUCE  R(short)  PARALLEL
+   LVS REDUCE  R(short)  SERIES POS NEG NO
+   LVS REDUCE  R(fuse)  PARALLEL NO
+   LVS REDUCE  R(fuse)  SERIES POS NEG NO
+   LVS REDUCE  R(metop)  PARALLEL [ TOLERANCE metopNumber 0 ]
+   LVS REDUCE  R(metop)  SERIES POS NEG NO
+   LVS REDUCTION PRIORITY                 PARALLEL
+   
+   LVS SHORT EQUIVALENT NODES             NO
+
+   // Filter
+
+   LVS FILTER  R(cds_thru)  SHORT SOURCE
+   LVS FILTER  R(cds_thru)  SHORT LAYOUT
+   LVS FILTER  Dpar  OPEN SOURCE
+   LVS FILTER  Dpar  OPEN LAYOUT
+   LVS FILTER  Probe  OPEN SOURCE
+   LVS FILTER  Probe  OPEN LAYOUT
+   LVS FILTER  icecap  OPEN SOURCE
+   LVS FILTER  s8fmlt_iref_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_neg_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_vdac_termx  OPEN SOURCE
+   LVS FILTER  D  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN LAYOUT
+   LVS FILTER  tap_dev  OPEN SOURCE
+   LVS FILTER  tap_dev  OPEN LAYOUT
+   LVS FILTER  cad_dummy_open_device  OPEN SOURCE
+   LVS FILTER  cad_dummy_open_device  OPEN LAYOUT
+
+   // Trace Property
+
+   TRACE PROPERTY  xcnwvc  m m 0
+   TRACE PROPERTY  xcnwvc  w w 0
+   TRACE PROPERTY  xcnwvc  l l 0
+   TRACE PROPERTY  xcnwvc2  m m 0
+   TRACE PROPERTY  xcnwvc2  w w 0
+   TRACE PROPERTY  xcnwvc2  l l 0
+   TRACE PROPERTY  xchvnwc  m m 0
+   TRACE PROPERTY  q(npnpar1x1)  m m 0
+   TRACE PROPERTY  q(npnpar1x2)  m m 0
+   TRACE PROPERTY  q(npn_1x1_2p0_hv)  m m 0
+   TRACE PROPERTY  q(pnppar)  barea barea 0
+   TRACE PROPERTY  q(pnppar)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar)  earea earea 0
+   TRACE PROPERTY  q(pnppar)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar)  m m 0
+   TRACE PROPERTY  q(pnppar5x)  barea barea 0
+   TRACE PROPERTY  q(pnppar5x)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar5x)  earea earea 0
+   TRACE PROPERTY  q(pnppar5x)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar5x)  m m 0
+   TRACE PROPERTY  d(ndiode)  a a 1
+   TRACE PROPERTY  d(ndiode)  p p 1
+   TRACE PROPERTY  d(ndiode)  m m 0
+   TRACE PROPERTY  d(ndiode_h)  a a 1
+   TRACE PROPERTY  d(ndiode_h)  p p 1
+   TRACE PROPERTY  d(ndiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  m m 0
+   TRACE PROPERTY  d(pdiode)  a a 1
+   TRACE PROPERTY  d(pdiode)  p p 1
+   TRACE PROPERTY  d(pdiode)  m m 0
+   TRACE PROPERTY  d(pdiode_h)  a a 1
+   TRACE PROPERTY  d(pdiode_h)  p p 1
+   TRACE PROPERTY  d(pdiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub)  a a 1
+   TRACE PROPERTY  d(dnwdiode_psub)  p p 1
+   TRACE PROPERTY  d(dnwdiode_psub)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  m m 0
+   TRACE PROPERTY  xcmvpp  m m 0
+   TRACE PROPERTY  xcmvpp_2  m m 0
+   TRACE PROPERTY  xcmvpp2_nhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp2_phv5x4  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap2_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l40  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l20  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l10  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x1  m m 0
+   TRACE PROPERTY  xcmvppx4_2xnhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym50p4shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m5shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_lim4shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m4shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4m5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp5  m m 0
+   TRACE PROPERTY  xcmvpp4  m m 0
+   TRACE PROPERTY  xcmvpp3  m m 0
+   TRACE PROPERTY  r(mrdn)  w w 1
+   TRACE PROPERTY  r(mrdn)  l l 1
+   TRACE PROPERTY  r(mrdn)  m m 0
+   TRACE PROPERTY  r(mrdn_hv)  w w 1
+   TRACE PROPERTY  r(mrdn_hv)  l l 1
+   TRACE PROPERTY  r(mrdn_hv)  m m 0
+   TRACE PROPERTY  r(mrdp)  w w 1
+   TRACE PROPERTY  r(mrdp)  l l 1
+   TRACE PROPERTY  r(mrdp)  m m 0
+   TRACE PROPERTY  r(mrdp_hv)  w w 1
+   TRACE PROPERTY  r(mrdp_hv)  l l 1
+   TRACE PROPERTY  r(mrdp_hv)  m m 0
+   TRACE PROPERTY  r(mrl1)  w w 1
+   TRACE PROPERTY  r(mrl1)  l l 1
+   TRACE PROPERTY  r(mrl1)  m m 0
+   TRACE PROPERTY  r(xpwres)  w w 1
+   TRACE PROPERTY  r(xpwres)  l l 1
+   TRACE PROPERTY  r(xpwres)  m m 0
+   TRACE PROPERTY  r(short)  m m 0
+   TRACE PROPERTY  r(fuse)  w w 1
+   TRACE PROPERTY  r(fuse)  l l 1
+   TRACE PROPERTY  r(fuse)  m m 0
+   TRACE PROPERTY  r(metop)  metopnumber metopnumber 0
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  m m 0
+   TRACE PROPERTY  d(nwdiode_victim)  a a 10
+   TRACE PROPERTY  d(nwdiode_victim)  p p 10
+   TRACE PROPERTY  d(nwdiode_victim)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  m m 0
+   TRACE PROPERTY  d(nwdiode_aggressor)  a a 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  p p 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  m m 0
+
+   // User Trace Property
+
+   TRACE PROPERTY  mn(nshort)  m mult w l
+   TRACE PROPERTY  mn(npass)  m mult w l
+   TRACE PROPERTY  mn(nlowvt)  m mult w l
+   TRACE PROPERTY  m(sonos_e)  m mult w l
+   TRACE PROPERTY  m  m mult w l
+   TRACE PROPERTY  m(fnpass)  m mult w l
+   TRACE PROPERTY  mn(nhv)  m mult w l
+   TRACE PROPERTY  mn(nhvnative)  m mult w l
+   TRACE PROPERTY  mn(ntvnative)  m mult w l
+   TRACE PROPERTY  mp(pshort)  m mult w l
+   TRACE PROPERTY  mp  m mult w l
+   TRACE PROPERTY  mp(phighvt)  m mult w l
+   TRACE PROPERTY  mp(plowvt)  m mult w l
+   TRACE PROPERTY  mp(phv)  m mult w l
+   TRACE PROPERTY  mn(nshortesd)  m mult w l
+   TRACE PROPERTY  mn(nhvesd)  m mult w l
+   TRACE PROPERTY  mn(nhvnativeesd)  m mult w l
+   TRACE PROPERTY  mp(phvesd)  m mult w l
+   TRACE PROPERTY  nvhv  m mult w l
+   TRACE PROPERTY  n20vhv1  m mult w l
+   TRACE PROPERTY  n20nativevhv1  m mult w l
+   TRACE PROPERTY  n20vhviso1  m mult w l
+   TRACE PROPERTY  n20nativevhviso1  m mult w l
+   TRACE PROPERTY  pvhv  m mult w l
+   TRACE PROPERTY  p20vhv1  m mult w l
+   TRACE PROPERTY  c(xcmimc1)  w l m
+   TRACE PROPERTY  c(xcmimc2)  w l m
+   TRACE PROPERTY  r(mrp1)  m w l
+   TRACE PROPERTY  xhrpoly_0p35  m w l
+   TRACE PROPERTY  xuhrpoly_0p35  m w l
+   TRACE PROPERTY  xhrpoly_0p69  m w l
+   TRACE PROPERTY  xuhrpoly_0p69  m w l
+   TRACE PROPERTY  xhrpoly_1p41  m w l
+   TRACE PROPERTY  xuhrpoly_1p41  m w l
+   TRACE PROPERTY  xhrpoly_2p85  m w l
+   TRACE PROPERTY  xuhrpoly_2p85  m w l
+
+
+
+                   CELL COMPARISON RESULTS ( TOP LEVEL )
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+LAYOUT CELL NAME:         sky130_fd_sc_hdll__a21boi_4
+SOURCE CELL NAME:         sky130_fd_sc_hdll__a21boi_4
+
+--------------------------------------------------------------------------------------------------------------
+
+INITIAL NUMBERS OF OBJECTS
+--------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:              8         8
+
+ Nets:              12        11    *
+
+ Instances:         13        13         MN (4 pins)
+                    13        13         MP (4 pins)
+                     1         0    *    Dpar (2 pins)
+                     1         0    *    Probe (2 pins)
+                ------    ------
+ Total Inst:        28        26
+
+
+NUMBERS OF OBJECTS AFTER TRANSFORMATION
+---------------------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:              8         8
+
+ Nets:               9         9
+
+ Instances:          2         2         MN (4 pins)
+                     1         1         MP (4 pins)
+                     1         1         SMN2 (4 pins)
+                     1         1         SPMP_2_1 (5 pins)
+                ------    ------
+ Total Inst:         5         5
+
+
+       * = Number of objects in layout different from number in source.
+
+
+
+**************************************************************************************************************
+                               INFORMATION AND WARNINGS
+**************************************************************************************************************
+
+
+                  Matched    Matched    Unmatched    Unmatched    Component
+                   Layout     Source       Layout       Source    Type
+                  -------    -------    ---------    ---------    ---------
+   Ports:               8          8            0            0
+
+   Nets:                9          9            0            0
+
+   Instances:           2          2            0            0    MN(NSHORT)
+                        1          1            0            0    MP(PHIGHVT)
+                        1          1            0            0    SMN2
+                        1          1            0            0    SPMP_2_1
+                  -------    -------    ---------    ---------
+   Total Inst:          5          5            0            0
+
+
+o Statistics:
+
+   2 layout instances were filtered and their pins removed from adjoining nets.
+
+   24 layout mos transistors were reduced to 6.
+     18 mos transistors were deleted by parallel reduction.
+   24 source mos transistors were reduced to 6.
+     18 mos transistors were deleted by parallel reduction.
+
+   1 layout net had all its pins removed and was deleted.
+
+
+o Initial Correspondence Points:
+
+   Ports:        VNB VPB B1_N A2 A1 VPWR Y VGND
+
+
+**************************************************************************************************************
+                                         SUMMARY
+**************************************************************************************************************
+
+Total CPU Time:      0 sec
+Total Elapsed Time:  0 sec
diff --git a/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.pex.spice b/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.pex.spice
index 5e43600..f8f7892 100644
--- a/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.pex.spice
+++ b/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.pex.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21boi_4.pex.spice
-* Created: Thu Aug 27 18:52:36 2020
+* Created: Wed Sep  2 08:16:58 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * Nominal Temperature: 27C
diff --git a/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.pxi.spice b/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.pxi.spice
index 35bd2d8..b5a2877 100644
--- a/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.pxi.spice
+++ b/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.pxi.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21boi_4.pxi.spice
-* Created: Thu Aug 27 18:52:36 2020
+* Created: Wed Sep  2 08:16:58 2020
 * 
 x_PM_SKY130_FD_SC_HDLL__A21BOI_4%B1_N N_B1_N_c_91_n N_B1_N_M1010_g N_B1_N_c_92_n
 + N_B1_N_M1015_g B1_N PM_SKY130_FD_SC_HDLL__A21BOI_4%B1_N
diff --git a/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice b/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice
index 5553c2b..36ab141 100644
--- a/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice
+++ b/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21boi_4.spice
-* Created: Thu Aug 27 18:52:36 2020
+* Created: Wed Sep  2 08:16:58 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * 
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_1.lvs.report b/cells/a21o/sky130_fd_sc_hdll__a21o_1.lvs.report
new file mode 100644
index 0000000..6a2d381
--- /dev/null
+++ b/cells/a21o/sky130_fd_sc_hdll__a21o_1.lvs.report
@@ -0,0 +1,481 @@
+
+LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_1.spice"
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------
+
+Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_1.spice"
+
+
+
+
+                  ##################################################
+                  ##                                              ##
+                  ##         C A L I B R E    S Y S T E M         ##
+                  ##                                              ##
+                  ##             L V S   R E P O R T              ##
+                  ##                                              ##
+                  ##################################################
+
+
+
+REPORT FILE NAME:         sky130_fd_sc_hdll__a21o_1.lvs.report
+LAYOUT NAME:              svdb/sky130_fd_sc_hdll__a21o_1.sp ('sky130_fd_sc_hdll__a21o_1')
+SOURCE NAME:              /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_1.spice ('sky130_fd_sc_hdll__a21o_1')
+RULE FILE:                /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_
+CREATION TIME:            Wed Sep  2 08:17:03 2020
+CURRENT DIRECTORY:        /home/hlusk/repos/SkyWater/osugooglelib/calibre
+USER NAME:                hlusk
+CALIBRE VERSION:          v2018.4_34.26    Mon Dec 3 14:40:54 PST 2018
+
+
+
+                               OVERALL COMPARISON RESULTS
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+
+**************************************************************************************************************
+                                      CELL  SUMMARY
+**************************************************************************************************************
+
+  Result         Layout                        Source
+  -----------    -----------                   --------------
+  CORRECT        sky130_fd_sc_hdll__a21o_1     sky130_fd_sc_hdll__a21o_1
+
+
+
+**************************************************************************************************************
+                                      LVS PARAMETERS
+**************************************************************************************************************
+
+
+o LVS Setup:
+
+   // LVS COMPONENT TYPE PROPERTY
+   // LVS COMPONENT SUBTYPE PROPERTY
+   // LVS PIN NAME PROPERTY
+   // LVS POWER NAME
+   // LVS GROUND NAME
+   LVS CELL SUPPLY                        NO
+   LVS RECOGNIZE GATES                    ALL
+   LVS IGNORE PORTS                       NO
+   LVS CHECK PORT NAMES                   YES
+   LVS IGNORE TRIVIAL NAMED PORTS         NO
+   LVS BUILTIN DEVICE PIN SWAP            YES
+   LVS ALL CAPACITOR PINS SWAPPABLE       NO
+   LVS DISCARD PINS BY DEVICE             YES
+   LVS SOFT SUBSTRATE PINS                NO
+   LVS INJECT LOGIC                       NO
+   LVS EXPAND UNBALANCED CELLS            YES
+   LVS FLATTEN INSIDE CELL                NO
+   LVS EXPAND SEED PROMOTIONS             NO
+   LVS PRESERVE PARAMETERIZED CELLS       NO
+   LVS GLOBALS ARE PORTS                  YES
+   LVS REVERSE WL                         NO
+   LVS SPICE PREFER PINS                  YES
+   LVS SPICE SLASH IS SPACE               NO
+   LVS SPICE ALLOW FLOATING PINS          YES
+   LVS SPICE ALLOW INLINE PARAMETERS      NO
+   LVS SPICE ALLOW UNQUOTED STRINGS       YES
+   LVS SPICE CONDITIONAL LDD              NO
+   LVS SPICE CULL PRIMITIVE SUBCIRCUITS   NO
+   // LVS SPICE EXCLUDE CELL SOURCE
+   // LVS SPICE EXCLUDE CELL LAYOUT
+   LVS SPICE IMPLIED MOS AREA             NO
+   // LVS SPICE MULTIPLIER NAME
+   LVS SPICE OVERRIDE GLOBALS             YES
+   LVS SPICE REDEFINE PARAM               YES
+   LVS SPICE REPLICATE DEVICES            YES
+   LVS SPICE SCALE X PARAMETERS           NO
+   LVS SPICE STRICT WL                    YES
+   // LVS SPICE OPTION
+   LVS STRICT SUBTYPES                    YES
+   LVS EXACT SUBTYPES                     NO
+   LAYOUT CASE                            NO
+   SOURCE CASE                            NO
+   LVS COMPARE CASE                       NO
+   LVS DOWNCASE DEVICE                    NO
+   LVS REPORT MAXIMUM                     50
+   LVS PROPERTY RESOLUTION MAXIMUM        ALL
+   LVS SIGNATURE MAXIMUM                  ALL
+   // LVS FILTER UNUSED OPTION
+   // LVS REPORT OPTION
+   LVS REPORT UNITS                       YES
+   // LVS NON USER NAME PORT
+   LVS NON USER NAME NET                  "^n[0-9]*$" "^net[0-9]*$"
+   // LVS NON USER NAME INSTANCE
+   // LVS IGNORE DEVICE PIN
+   // LVS PREFER NETS FILTER SOURCE
+   // LVS PREFER NETS FILTER LAYOUT
+
+   // Device Type Map
+
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_2p85" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT
+
+   // Reduction
+
+   LVS REDUCE SERIES MOS                  NO
+   LVS REDUCE PARALLEL MOS                NO
+   LVS REDUCE SEMI SERIES MOS             NO
+   LVS REDUCE SPLIT GATES                 YES [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE PARALLEL BIPOLAR            NO
+   LVS REDUCE SERIES CAPACITORS           NO
+   LVS REDUCE PARALLEL CAPACITORS         NO
+   LVS REDUCE SERIES RESISTORS            NO
+   LVS REDUCE PARALLEL RESISTORS          NO
+   LVS REDUCE PARALLEL DIODES             NO
+
+   LVS REDUCE  condiode  PARALLEL
+   LVS REDUCE  condiodeHvPsub  PARALLEL
+   LVS REDUCE  p20vhv1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  n20vhviso1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  nvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  pvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MP  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  M  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MN  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  Q(npnpar1x1)  PARALLEL
+   LVS REDUCE  Q(npnpar1x2)  PARALLEL
+   LVS REDUCE  Q(npn_1x1_2p0_hv)  PARALLEL
+   LVS REDUCE  Q(pnppar)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  Q(pnppar5x)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  D  PARALLEL [ TOLERANCE a 1 p 1 ]
+   LVS REDUCE  D  SERIES POS NEG NO
+   LVS REDUCE  C(xcmimc1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  C(xcmimc2)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R(mrp1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  SERIES POS NEG NO
+   LVS REDUCE  R(short)  PARALLEL
+   LVS REDUCE  R(short)  SERIES POS NEG NO
+   LVS REDUCE  R(fuse)  PARALLEL NO
+   LVS REDUCE  R(fuse)  SERIES POS NEG NO
+   LVS REDUCE  R(metop)  PARALLEL [ TOLERANCE metopNumber 0 ]
+   LVS REDUCE  R(metop)  SERIES POS NEG NO
+   LVS REDUCTION PRIORITY                 PARALLEL
+   
+   LVS SHORT EQUIVALENT NODES             NO
+
+   // Filter
+
+   LVS FILTER  R(cds_thru)  SHORT SOURCE
+   LVS FILTER  R(cds_thru)  SHORT LAYOUT
+   LVS FILTER  Dpar  OPEN SOURCE
+   LVS FILTER  Dpar  OPEN LAYOUT
+   LVS FILTER  Probe  OPEN SOURCE
+   LVS FILTER  Probe  OPEN LAYOUT
+   LVS FILTER  icecap  OPEN SOURCE
+   LVS FILTER  s8fmlt_iref_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_neg_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_vdac_termx  OPEN SOURCE
+   LVS FILTER  D  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN LAYOUT
+   LVS FILTER  tap_dev  OPEN SOURCE
+   LVS FILTER  tap_dev  OPEN LAYOUT
+   LVS FILTER  cad_dummy_open_device  OPEN SOURCE
+   LVS FILTER  cad_dummy_open_device  OPEN LAYOUT
+
+   // Trace Property
+
+   TRACE PROPERTY  xcnwvc  m m 0
+   TRACE PROPERTY  xcnwvc  w w 0
+   TRACE PROPERTY  xcnwvc  l l 0
+   TRACE PROPERTY  xcnwvc2  m m 0
+   TRACE PROPERTY  xcnwvc2  w w 0
+   TRACE PROPERTY  xcnwvc2  l l 0
+   TRACE PROPERTY  xchvnwc  m m 0
+   TRACE PROPERTY  q(npnpar1x1)  m m 0
+   TRACE PROPERTY  q(npnpar1x2)  m m 0
+   TRACE PROPERTY  q(npn_1x1_2p0_hv)  m m 0
+   TRACE PROPERTY  q(pnppar)  barea barea 0
+   TRACE PROPERTY  q(pnppar)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar)  earea earea 0
+   TRACE PROPERTY  q(pnppar)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar)  m m 0
+   TRACE PROPERTY  q(pnppar5x)  barea barea 0
+   TRACE PROPERTY  q(pnppar5x)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar5x)  earea earea 0
+   TRACE PROPERTY  q(pnppar5x)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar5x)  m m 0
+   TRACE PROPERTY  d(ndiode)  a a 1
+   TRACE PROPERTY  d(ndiode)  p p 1
+   TRACE PROPERTY  d(ndiode)  m m 0
+   TRACE PROPERTY  d(ndiode_h)  a a 1
+   TRACE PROPERTY  d(ndiode_h)  p p 1
+   TRACE PROPERTY  d(ndiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  m m 0
+   TRACE PROPERTY  d(pdiode)  a a 1
+   TRACE PROPERTY  d(pdiode)  p p 1
+   TRACE PROPERTY  d(pdiode)  m m 0
+   TRACE PROPERTY  d(pdiode_h)  a a 1
+   TRACE PROPERTY  d(pdiode_h)  p p 1
+   TRACE PROPERTY  d(pdiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub)  a a 1
+   TRACE PROPERTY  d(dnwdiode_psub)  p p 1
+   TRACE PROPERTY  d(dnwdiode_psub)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  m m 0
+   TRACE PROPERTY  xcmvpp  m m 0
+   TRACE PROPERTY  xcmvpp_2  m m 0
+   TRACE PROPERTY  xcmvpp2_nhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp2_phv5x4  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap2_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l40  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l20  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l10  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x1  m m 0
+   TRACE PROPERTY  xcmvppx4_2xnhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym50p4shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m5shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_lim4shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m4shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4m5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp5  m m 0
+   TRACE PROPERTY  xcmvpp4  m m 0
+   TRACE PROPERTY  xcmvpp3  m m 0
+   TRACE PROPERTY  r(mrdn)  w w 1
+   TRACE PROPERTY  r(mrdn)  l l 1
+   TRACE PROPERTY  r(mrdn)  m m 0
+   TRACE PROPERTY  r(mrdn_hv)  w w 1
+   TRACE PROPERTY  r(mrdn_hv)  l l 1
+   TRACE PROPERTY  r(mrdn_hv)  m m 0
+   TRACE PROPERTY  r(mrdp)  w w 1
+   TRACE PROPERTY  r(mrdp)  l l 1
+   TRACE PROPERTY  r(mrdp)  m m 0
+   TRACE PROPERTY  r(mrdp_hv)  w w 1
+   TRACE PROPERTY  r(mrdp_hv)  l l 1
+   TRACE PROPERTY  r(mrdp_hv)  m m 0
+   TRACE PROPERTY  r(mrl1)  w w 1
+   TRACE PROPERTY  r(mrl1)  l l 1
+   TRACE PROPERTY  r(mrl1)  m m 0
+   TRACE PROPERTY  r(xpwres)  w w 1
+   TRACE PROPERTY  r(xpwres)  l l 1
+   TRACE PROPERTY  r(xpwres)  m m 0
+   TRACE PROPERTY  r(short)  m m 0
+   TRACE PROPERTY  r(fuse)  w w 1
+   TRACE PROPERTY  r(fuse)  l l 1
+   TRACE PROPERTY  r(fuse)  m m 0
+   TRACE PROPERTY  r(metop)  metopnumber metopnumber 0
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  m m 0
+   TRACE PROPERTY  d(nwdiode_victim)  a a 10
+   TRACE PROPERTY  d(nwdiode_victim)  p p 10
+   TRACE PROPERTY  d(nwdiode_victim)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  m m 0
+   TRACE PROPERTY  d(nwdiode_aggressor)  a a 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  p p 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  m m 0
+
+   // User Trace Property
+
+   TRACE PROPERTY  mn(nshort)  m mult w l
+   TRACE PROPERTY  mn(npass)  m mult w l
+   TRACE PROPERTY  mn(nlowvt)  m mult w l
+   TRACE PROPERTY  m(sonos_e)  m mult w l
+   TRACE PROPERTY  m  m mult w l
+   TRACE PROPERTY  m(fnpass)  m mult w l
+   TRACE PROPERTY  mn(nhv)  m mult w l
+   TRACE PROPERTY  mn(nhvnative)  m mult w l
+   TRACE PROPERTY  mn(ntvnative)  m mult w l
+   TRACE PROPERTY  mp(pshort)  m mult w l
+   TRACE PROPERTY  mp  m mult w l
+   TRACE PROPERTY  mp(phighvt)  m mult w l
+   TRACE PROPERTY  mp(plowvt)  m mult w l
+   TRACE PROPERTY  mp(phv)  m mult w l
+   TRACE PROPERTY  mn(nshortesd)  m mult w l
+   TRACE PROPERTY  mn(nhvesd)  m mult w l
+   TRACE PROPERTY  mn(nhvnativeesd)  m mult w l
+   TRACE PROPERTY  mp(phvesd)  m mult w l
+   TRACE PROPERTY  nvhv  m mult w l
+   TRACE PROPERTY  n20vhv1  m mult w l
+   TRACE PROPERTY  n20nativevhv1  m mult w l
+   TRACE PROPERTY  n20vhviso1  m mult w l
+   TRACE PROPERTY  n20nativevhviso1  m mult w l
+   TRACE PROPERTY  pvhv  m mult w l
+   TRACE PROPERTY  p20vhv1  m mult w l
+   TRACE PROPERTY  c(xcmimc1)  w l m
+   TRACE PROPERTY  c(xcmimc2)  w l m
+   TRACE PROPERTY  r(mrp1)  m w l
+   TRACE PROPERTY  xhrpoly_0p35  m w l
+   TRACE PROPERTY  xuhrpoly_0p35  m w l
+   TRACE PROPERTY  xhrpoly_0p69  m w l
+   TRACE PROPERTY  xuhrpoly_0p69  m w l
+   TRACE PROPERTY  xhrpoly_1p41  m w l
+   TRACE PROPERTY  xuhrpoly_1p41  m w l
+   TRACE PROPERTY  xhrpoly_2p85  m w l
+   TRACE PROPERTY  xuhrpoly_2p85  m w l
+
+
+
+                   CELL COMPARISON RESULTS ( TOP LEVEL )
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+LAYOUT CELL NAME:         sky130_fd_sc_hdll__a21o_1
+SOURCE CELL NAME:         sky130_fd_sc_hdll__a21o_1
+
+--------------------------------------------------------------------------------------------------------------
+
+INITIAL NUMBERS OF OBJECTS
+--------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:              8         8
+
+ Nets:              11        11
+
+ Instances:          4         4         MN (4 pins)
+                     4         4         MP (4 pins)
+                     1         0    *    Dpar (2 pins)
+                ------    ------
+ Total Inst:         9         8
+
+
+NUMBERS OF OBJECTS AFTER TRANSFORMATION
+---------------------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:              8         8
+
+ Nets:               9         9
+
+ Instances:          2         2         MN (4 pins)
+                     1         1         MP (4 pins)
+                     1         1         SMN2 (4 pins)
+                     1         1         SPMP_2_1 (5 pins)
+                ------    ------
+ Total Inst:         5         5
+
+
+       * = Number of objects in layout different from number in source.
+
+
+
+**************************************************************************************************************
+                               INFORMATION AND WARNINGS
+**************************************************************************************************************
+
+
+                  Matched    Matched    Unmatched    Unmatched    Component
+                   Layout     Source       Layout       Source    Type
+                  -------    -------    ---------    ---------    ---------
+   Ports:               8          8            0            0
+
+   Nets:                9          9            0            0
+
+   Instances:           2          2            0            0    MN(NSHORT)
+                        1          1            0            0    MP(PHIGHVT)
+                        1          1            0            0    SMN2
+                        1          1            0            0    SPMP_2_1
+                  -------    -------    ---------    ---------
+   Total Inst:          5          5            0            0
+
+
+o Statistics:
+
+   1 layout instance was filtered and its pins removed from adjoining nets.
+
+
+o Initial Correspondence Points:
+
+   Ports:        VNB VPB B1 A1 A2 X VPWR VGND
+
+
+**************************************************************************************************************
+                                         SUMMARY
+**************************************************************************************************************
+
+Total CPU Time:      0 sec
+Total Elapsed Time:  0 sec
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_1.pex.spice b/cells/a21o/sky130_fd_sc_hdll__a21o_1.pex.spice
index 1652b29..aedad17 100644
--- a/cells/a21o/sky130_fd_sc_hdll__a21o_1.pex.spice
+++ b/cells/a21o/sky130_fd_sc_hdll__a21o_1.pex.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21o_1.pex.spice
-* Created: Thu Aug 27 18:52:43 2020
+* Created: Wed Sep  2 08:17:06 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * Nominal Temperature: 27C
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_1.pxi.spice b/cells/a21o/sky130_fd_sc_hdll__a21o_1.pxi.spice
index af9d1ab..797eb87 100644
--- a/cells/a21o/sky130_fd_sc_hdll__a21o_1.pxi.spice
+++ b/cells/a21o/sky130_fd_sc_hdll__a21o_1.pxi.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21o_1.pxi.spice
-* Created: Thu Aug 27 18:52:43 2020
+* Created: Wed Sep  2 08:17:06 2020
 * 
 x_PM_SKY130_FD_SC_HDLL__A21O_1%A_81_21# N_A_81_21#_M1001_d N_A_81_21#_M1005_s
 + N_A_81_21#_c_43_n N_A_81_21#_M1000_g N_A_81_21#_c_46_n N_A_81_21#_M1003_g
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_1.spice b/cells/a21o/sky130_fd_sc_hdll__a21o_1.spice
index 478e8ae..3d93e49 100644
--- a/cells/a21o/sky130_fd_sc_hdll__a21o_1.spice
+++ b/cells/a21o/sky130_fd_sc_hdll__a21o_1.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21o_1.spice
-* Created: Thu Aug 27 18:52:43 2020
+* Created: Wed Sep  2 08:17:06 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * 
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_2.lvs.report b/cells/a21o/sky130_fd_sc_hdll__a21o_2.lvs.report
new file mode 100644
index 0000000..8ef50bd
--- /dev/null
+++ b/cells/a21o/sky130_fd_sc_hdll__a21o_2.lvs.report
@@ -0,0 +1,488 @@
+
+LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_2.spice"
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------
+
+Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_2.spice"
+
+
+
+
+                  ##################################################
+                  ##                                              ##
+                  ##         C A L I B R E    S Y S T E M         ##
+                  ##                                              ##
+                  ##             L V S   R E P O R T              ##
+                  ##                                              ##
+                  ##################################################
+
+
+
+REPORT FILE NAME:         sky130_fd_sc_hdll__a21o_2.lvs.report
+LAYOUT NAME:              svdb/sky130_fd_sc_hdll__a21o_2.sp ('sky130_fd_sc_hdll__a21o_2')
+SOURCE NAME:              /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_2.spice ('sky130_fd_sc_hdll__a21o_2')
+RULE FILE:                /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_
+CREATION TIME:            Wed Sep  2 08:17:09 2020
+CURRENT DIRECTORY:        /home/hlusk/repos/SkyWater/osugooglelib/calibre
+USER NAME:                hlusk
+CALIBRE VERSION:          v2018.4_34.26    Mon Dec 3 14:40:54 PST 2018
+
+
+
+                               OVERALL COMPARISON RESULTS
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+
+**************************************************************************************************************
+                                      CELL  SUMMARY
+**************************************************************************************************************
+
+  Result         Layout                        Source
+  -----------    -----------                   --------------
+  CORRECT        sky130_fd_sc_hdll__a21o_2     sky130_fd_sc_hdll__a21o_2
+
+
+
+**************************************************************************************************************
+                                      LVS PARAMETERS
+**************************************************************************************************************
+
+
+o LVS Setup:
+
+   // LVS COMPONENT TYPE PROPERTY
+   // LVS COMPONENT SUBTYPE PROPERTY
+   // LVS PIN NAME PROPERTY
+   // LVS POWER NAME
+   // LVS GROUND NAME
+   LVS CELL SUPPLY                        NO
+   LVS RECOGNIZE GATES                    ALL
+   LVS IGNORE PORTS                       NO
+   LVS CHECK PORT NAMES                   YES
+   LVS IGNORE TRIVIAL NAMED PORTS         NO
+   LVS BUILTIN DEVICE PIN SWAP            YES
+   LVS ALL CAPACITOR PINS SWAPPABLE       NO
+   LVS DISCARD PINS BY DEVICE             YES
+   LVS SOFT SUBSTRATE PINS                NO
+   LVS INJECT LOGIC                       NO
+   LVS EXPAND UNBALANCED CELLS            YES
+   LVS FLATTEN INSIDE CELL                NO
+   LVS EXPAND SEED PROMOTIONS             NO
+   LVS PRESERVE PARAMETERIZED CELLS       NO
+   LVS GLOBALS ARE PORTS                  YES
+   LVS REVERSE WL                         NO
+   LVS SPICE PREFER PINS                  YES
+   LVS SPICE SLASH IS SPACE               NO
+   LVS SPICE ALLOW FLOATING PINS          YES
+   LVS SPICE ALLOW INLINE PARAMETERS      NO
+   LVS SPICE ALLOW UNQUOTED STRINGS       YES
+   LVS SPICE CONDITIONAL LDD              NO
+   LVS SPICE CULL PRIMITIVE SUBCIRCUITS   NO
+   // LVS SPICE EXCLUDE CELL SOURCE
+   // LVS SPICE EXCLUDE CELL LAYOUT
+   LVS SPICE IMPLIED MOS AREA             NO
+   // LVS SPICE MULTIPLIER NAME
+   LVS SPICE OVERRIDE GLOBALS             YES
+   LVS SPICE REDEFINE PARAM               YES
+   LVS SPICE REPLICATE DEVICES            YES
+   LVS SPICE SCALE X PARAMETERS           NO
+   LVS SPICE STRICT WL                    YES
+   // LVS SPICE OPTION
+   LVS STRICT SUBTYPES                    YES
+   LVS EXACT SUBTYPES                     NO
+   LAYOUT CASE                            NO
+   SOURCE CASE                            NO
+   LVS COMPARE CASE                       NO
+   LVS DOWNCASE DEVICE                    NO
+   LVS REPORT MAXIMUM                     50
+   LVS PROPERTY RESOLUTION MAXIMUM        ALL
+   LVS SIGNATURE MAXIMUM                  ALL
+   // LVS FILTER UNUSED OPTION
+   // LVS REPORT OPTION
+   LVS REPORT UNITS                       YES
+   // LVS NON USER NAME PORT
+   LVS NON USER NAME NET                  "^n[0-9]*$" "^net[0-9]*$"
+   // LVS NON USER NAME INSTANCE
+   // LVS IGNORE DEVICE PIN
+   // LVS PREFER NETS FILTER SOURCE
+   // LVS PREFER NETS FILTER LAYOUT
+
+   // Device Type Map
+
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_2p85" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT
+
+   // Reduction
+
+   LVS REDUCE SERIES MOS                  NO
+   LVS REDUCE PARALLEL MOS                NO
+   LVS REDUCE SEMI SERIES MOS             NO
+   LVS REDUCE SPLIT GATES                 YES [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE PARALLEL BIPOLAR            NO
+   LVS REDUCE SERIES CAPACITORS           NO
+   LVS REDUCE PARALLEL CAPACITORS         NO
+   LVS REDUCE SERIES RESISTORS            NO
+   LVS REDUCE PARALLEL RESISTORS          NO
+   LVS REDUCE PARALLEL DIODES             NO
+
+   LVS REDUCE  condiode  PARALLEL
+   LVS REDUCE  condiodeHvPsub  PARALLEL
+   LVS REDUCE  p20vhv1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  n20vhviso1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  nvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  pvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MP  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  M  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MN  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  Q(npnpar1x1)  PARALLEL
+   LVS REDUCE  Q(npnpar1x2)  PARALLEL
+   LVS REDUCE  Q(npn_1x1_2p0_hv)  PARALLEL
+   LVS REDUCE  Q(pnppar)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  Q(pnppar5x)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  D  PARALLEL [ TOLERANCE a 1 p 1 ]
+   LVS REDUCE  D  SERIES POS NEG NO
+   LVS REDUCE  C(xcmimc1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  C(xcmimc2)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R(mrp1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  SERIES POS NEG NO
+   LVS REDUCE  R(short)  PARALLEL
+   LVS REDUCE  R(short)  SERIES POS NEG NO
+   LVS REDUCE  R(fuse)  PARALLEL NO
+   LVS REDUCE  R(fuse)  SERIES POS NEG NO
+   LVS REDUCE  R(metop)  PARALLEL [ TOLERANCE metopNumber 0 ]
+   LVS REDUCE  R(metop)  SERIES POS NEG NO
+   LVS REDUCTION PRIORITY                 PARALLEL
+   
+   LVS SHORT EQUIVALENT NODES             NO
+
+   // Filter
+
+   LVS FILTER  R(cds_thru)  SHORT SOURCE
+   LVS FILTER  R(cds_thru)  SHORT LAYOUT
+   LVS FILTER  Dpar  OPEN SOURCE
+   LVS FILTER  Dpar  OPEN LAYOUT
+   LVS FILTER  Probe  OPEN SOURCE
+   LVS FILTER  Probe  OPEN LAYOUT
+   LVS FILTER  icecap  OPEN SOURCE
+   LVS FILTER  s8fmlt_iref_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_neg_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_vdac_termx  OPEN SOURCE
+   LVS FILTER  D  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN LAYOUT
+   LVS FILTER  tap_dev  OPEN SOURCE
+   LVS FILTER  tap_dev  OPEN LAYOUT
+   LVS FILTER  cad_dummy_open_device  OPEN SOURCE
+   LVS FILTER  cad_dummy_open_device  OPEN LAYOUT
+
+   // Trace Property
+
+   TRACE PROPERTY  xcnwvc  m m 0
+   TRACE PROPERTY  xcnwvc  w w 0
+   TRACE PROPERTY  xcnwvc  l l 0
+   TRACE PROPERTY  xcnwvc2  m m 0
+   TRACE PROPERTY  xcnwvc2  w w 0
+   TRACE PROPERTY  xcnwvc2  l l 0
+   TRACE PROPERTY  xchvnwc  m m 0
+   TRACE PROPERTY  q(npnpar1x1)  m m 0
+   TRACE PROPERTY  q(npnpar1x2)  m m 0
+   TRACE PROPERTY  q(npn_1x1_2p0_hv)  m m 0
+   TRACE PROPERTY  q(pnppar)  barea barea 0
+   TRACE PROPERTY  q(pnppar)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar)  earea earea 0
+   TRACE PROPERTY  q(pnppar)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar)  m m 0
+   TRACE PROPERTY  q(pnppar5x)  barea barea 0
+   TRACE PROPERTY  q(pnppar5x)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar5x)  earea earea 0
+   TRACE PROPERTY  q(pnppar5x)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar5x)  m m 0
+   TRACE PROPERTY  d(ndiode)  a a 1
+   TRACE PROPERTY  d(ndiode)  p p 1
+   TRACE PROPERTY  d(ndiode)  m m 0
+   TRACE PROPERTY  d(ndiode_h)  a a 1
+   TRACE PROPERTY  d(ndiode_h)  p p 1
+   TRACE PROPERTY  d(ndiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  m m 0
+   TRACE PROPERTY  d(pdiode)  a a 1
+   TRACE PROPERTY  d(pdiode)  p p 1
+   TRACE PROPERTY  d(pdiode)  m m 0
+   TRACE PROPERTY  d(pdiode_h)  a a 1
+   TRACE PROPERTY  d(pdiode_h)  p p 1
+   TRACE PROPERTY  d(pdiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub)  a a 1
+   TRACE PROPERTY  d(dnwdiode_psub)  p p 1
+   TRACE PROPERTY  d(dnwdiode_psub)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  m m 0
+   TRACE PROPERTY  xcmvpp  m m 0
+   TRACE PROPERTY  xcmvpp_2  m m 0
+   TRACE PROPERTY  xcmvpp2_nhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp2_phv5x4  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap2_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l40  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l20  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l10  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x1  m m 0
+   TRACE PROPERTY  xcmvppx4_2xnhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym50p4shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m5shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_lim4shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m4shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4m5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp5  m m 0
+   TRACE PROPERTY  xcmvpp4  m m 0
+   TRACE PROPERTY  xcmvpp3  m m 0
+   TRACE PROPERTY  r(mrdn)  w w 1
+   TRACE PROPERTY  r(mrdn)  l l 1
+   TRACE PROPERTY  r(mrdn)  m m 0
+   TRACE PROPERTY  r(mrdn_hv)  w w 1
+   TRACE PROPERTY  r(mrdn_hv)  l l 1
+   TRACE PROPERTY  r(mrdn_hv)  m m 0
+   TRACE PROPERTY  r(mrdp)  w w 1
+   TRACE PROPERTY  r(mrdp)  l l 1
+   TRACE PROPERTY  r(mrdp)  m m 0
+   TRACE PROPERTY  r(mrdp_hv)  w w 1
+   TRACE PROPERTY  r(mrdp_hv)  l l 1
+   TRACE PROPERTY  r(mrdp_hv)  m m 0
+   TRACE PROPERTY  r(mrl1)  w w 1
+   TRACE PROPERTY  r(mrl1)  l l 1
+   TRACE PROPERTY  r(mrl1)  m m 0
+   TRACE PROPERTY  r(xpwres)  w w 1
+   TRACE PROPERTY  r(xpwres)  l l 1
+   TRACE PROPERTY  r(xpwres)  m m 0
+   TRACE PROPERTY  r(short)  m m 0
+   TRACE PROPERTY  r(fuse)  w w 1
+   TRACE PROPERTY  r(fuse)  l l 1
+   TRACE PROPERTY  r(fuse)  m m 0
+   TRACE PROPERTY  r(metop)  metopnumber metopnumber 0
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  m m 0
+   TRACE PROPERTY  d(nwdiode_victim)  a a 10
+   TRACE PROPERTY  d(nwdiode_victim)  p p 10
+   TRACE PROPERTY  d(nwdiode_victim)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  m m 0
+   TRACE PROPERTY  d(nwdiode_aggressor)  a a 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  p p 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  m m 0
+
+   // User Trace Property
+
+   TRACE PROPERTY  mn(nshort)  m mult w l
+   TRACE PROPERTY  mn(npass)  m mult w l
+   TRACE PROPERTY  mn(nlowvt)  m mult w l
+   TRACE PROPERTY  m(sonos_e)  m mult w l
+   TRACE PROPERTY  m  m mult w l
+   TRACE PROPERTY  m(fnpass)  m mult w l
+   TRACE PROPERTY  mn(nhv)  m mult w l
+   TRACE PROPERTY  mn(nhvnative)  m mult w l
+   TRACE PROPERTY  mn(ntvnative)  m mult w l
+   TRACE PROPERTY  mp(pshort)  m mult w l
+   TRACE PROPERTY  mp  m mult w l
+   TRACE PROPERTY  mp(phighvt)  m mult w l
+   TRACE PROPERTY  mp(plowvt)  m mult w l
+   TRACE PROPERTY  mp(phv)  m mult w l
+   TRACE PROPERTY  mn(nshortesd)  m mult w l
+   TRACE PROPERTY  mn(nhvesd)  m mult w l
+   TRACE PROPERTY  mn(nhvnativeesd)  m mult w l
+   TRACE PROPERTY  mp(phvesd)  m mult w l
+   TRACE PROPERTY  nvhv  m mult w l
+   TRACE PROPERTY  n20vhv1  m mult w l
+   TRACE PROPERTY  n20nativevhv1  m mult w l
+   TRACE PROPERTY  n20vhviso1  m mult w l
+   TRACE PROPERTY  n20nativevhviso1  m mult w l
+   TRACE PROPERTY  pvhv  m mult w l
+   TRACE PROPERTY  p20vhv1  m mult w l
+   TRACE PROPERTY  c(xcmimc1)  w l m
+   TRACE PROPERTY  c(xcmimc2)  w l m
+   TRACE PROPERTY  r(mrp1)  m w l
+   TRACE PROPERTY  xhrpoly_0p35  m w l
+   TRACE PROPERTY  xuhrpoly_0p35  m w l
+   TRACE PROPERTY  xhrpoly_0p69  m w l
+   TRACE PROPERTY  xuhrpoly_0p69  m w l
+   TRACE PROPERTY  xhrpoly_1p41  m w l
+   TRACE PROPERTY  xuhrpoly_1p41  m w l
+   TRACE PROPERTY  xhrpoly_2p85  m w l
+   TRACE PROPERTY  xuhrpoly_2p85  m w l
+
+
+
+                   CELL COMPARISON RESULTS ( TOP LEVEL )
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+LAYOUT CELL NAME:         sky130_fd_sc_hdll__a21o_2
+SOURCE CELL NAME:         sky130_fd_sc_hdll__a21o_2
+
+--------------------------------------------------------------------------------------------------------------
+
+INITIAL NUMBERS OF OBJECTS
+--------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:              8         8
+
+ Nets:              11        11
+
+ Instances:          5         5         MN (4 pins)
+                     5         5         MP (4 pins)
+                     1         0    *    Dpar (2 pins)
+                ------    ------
+ Total Inst:        11        10
+
+
+NUMBERS OF OBJECTS AFTER TRANSFORMATION
+---------------------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:              8         8
+
+ Nets:               9         9
+
+ Instances:          2         2         MN (4 pins)
+                     1         1         MP (4 pins)
+                     1         1         SMN2 (4 pins)
+                     1         1         SPMP_2_1 (5 pins)
+                ------    ------
+ Total Inst:         5         5
+
+
+       * = Number of objects in layout different from number in source.
+
+
+
+**************************************************************************************************************
+                               INFORMATION AND WARNINGS
+**************************************************************************************************************
+
+
+                  Matched    Matched    Unmatched    Unmatched    Component
+                   Layout     Source       Layout       Source    Type
+                  -------    -------    ---------    ---------    ---------
+   Ports:               8          8            0            0
+
+   Nets:                9          9            0            0
+
+   Instances:           2          2            0            0    MN(NSHORT)
+                        1          1            0            0    MP(PHIGHVT)
+                        1          1            0            0    SMN2
+                        1          1            0            0    SPMP_2_1
+                  -------    -------    ---------    ---------
+   Total Inst:          5          5            0            0
+
+
+o Statistics:
+
+   1 layout instance was filtered and its pins removed from adjoining nets.
+
+   4 layout mos transistors were reduced to 2.
+     2 mos transistors were deleted by parallel reduction.
+   4 source mos transistors were reduced to 2.
+     2 mos transistors were deleted by parallel reduction.
+
+
+o Initial Correspondence Points:
+
+   Ports:        VNB VPB B1 A1 A2 VPWR X VGND
+
+
+**************************************************************************************************************
+                                         SUMMARY
+**************************************************************************************************************
+
+Total CPU Time:      0 sec
+Total Elapsed Time:  0 sec
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_2.pex.spice b/cells/a21o/sky130_fd_sc_hdll__a21o_2.pex.spice
index 4ddd1c6..fccd411 100644
--- a/cells/a21o/sky130_fd_sc_hdll__a21o_2.pex.spice
+++ b/cells/a21o/sky130_fd_sc_hdll__a21o_2.pex.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21o_2.pex.spice
-* Created: Thu Aug 27 18:52:50 2020
+* Created: Wed Sep  2 08:17:12 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * Nominal Temperature: 27C
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_2.pxi.spice b/cells/a21o/sky130_fd_sc_hdll__a21o_2.pxi.spice
index bf0eb6e..8910e97 100644
--- a/cells/a21o/sky130_fd_sc_hdll__a21o_2.pxi.spice
+++ b/cells/a21o/sky130_fd_sc_hdll__a21o_2.pxi.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21o_2.pxi.spice
-* Created: Thu Aug 27 18:52:50 2020
+* Created: Wed Sep  2 08:17:12 2020
 * 
 x_PM_SKY130_FD_SC_HDLL__A21O_2%A_80_21# N_A_80_21#_M1006_d N_A_80_21#_M1004_s
 + N_A_80_21#_c_49_n N_A_80_21#_M1003_g N_A_80_21#_c_50_n N_A_80_21#_c_56_n
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_2.spice b/cells/a21o/sky130_fd_sc_hdll__a21o_2.spice
index 989666d..89698e1 100644
--- a/cells/a21o/sky130_fd_sc_hdll__a21o_2.spice
+++ b/cells/a21o/sky130_fd_sc_hdll__a21o_2.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21o_2.spice
-* Created: Thu Aug 27 18:52:50 2020
+* Created: Wed Sep  2 08:17:12 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * 
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_4.lvs.report b/cells/a21o/sky130_fd_sc_hdll__a21o_4.lvs.report
new file mode 100644
index 0000000..eb17409
--- /dev/null
+++ b/cells/a21o/sky130_fd_sc_hdll__a21o_4.lvs.report
@@ -0,0 +1,503 @@
+
+LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice"
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------
+
+Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice"
+
+
+
+
+                  ##################################################
+                  ##                                              ##
+                  ##         C A L I B R E    S Y S T E M         ##
+                  ##                                              ##
+                  ##             L V S   R E P O R T              ##
+                  ##                                              ##
+                  ##################################################
+
+
+
+REPORT FILE NAME:         sky130_fd_sc_hdll__a21o_4.lvs.report
+LAYOUT NAME:              svdb/sky130_fd_sc_hdll__a21o_4.sp ('sky130_fd_sc_hdll__a21o_4')
+SOURCE NAME:              /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice ('sky130_fd_sc_hdll__a21o_4')
+RULE FILE:                /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_
+CREATION TIME:            Wed Sep  2 08:17:16 2020
+CURRENT DIRECTORY:        /home/hlusk/repos/SkyWater/osugooglelib/calibre
+USER NAME:                hlusk
+CALIBRE VERSION:          v2018.4_34.26    Mon Dec 3 14:40:54 PST 2018
+
+
+
+                               OVERALL COMPARISON RESULTS
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+
+**************************************************************************************************************
+                                      CELL  SUMMARY
+**************************************************************************************************************
+
+  Result         Layout                        Source
+  -----------    -----------                   --------------
+  CORRECT        sky130_fd_sc_hdll__a21o_4     sky130_fd_sc_hdll__a21o_4
+
+
+
+**************************************************************************************************************
+                                      LVS PARAMETERS
+**************************************************************************************************************
+
+
+o LVS Setup:
+
+   // LVS COMPONENT TYPE PROPERTY
+   // LVS COMPONENT SUBTYPE PROPERTY
+   // LVS PIN NAME PROPERTY
+   // LVS POWER NAME
+   // LVS GROUND NAME
+   LVS CELL SUPPLY                        NO
+   LVS RECOGNIZE GATES                    ALL
+   LVS IGNORE PORTS                       NO
+   LVS CHECK PORT NAMES                   YES
+   LVS IGNORE TRIVIAL NAMED PORTS         NO
+   LVS BUILTIN DEVICE PIN SWAP            YES
+   LVS ALL CAPACITOR PINS SWAPPABLE       NO
+   LVS DISCARD PINS BY DEVICE             YES
+   LVS SOFT SUBSTRATE PINS                NO
+   LVS INJECT LOGIC                       NO
+   LVS EXPAND UNBALANCED CELLS            YES
+   LVS FLATTEN INSIDE CELL                NO
+   LVS EXPAND SEED PROMOTIONS             NO
+   LVS PRESERVE PARAMETERIZED CELLS       NO
+   LVS GLOBALS ARE PORTS                  YES
+   LVS REVERSE WL                         NO
+   LVS SPICE PREFER PINS                  YES
+   LVS SPICE SLASH IS SPACE               NO
+   LVS SPICE ALLOW FLOATING PINS          YES
+   LVS SPICE ALLOW INLINE PARAMETERS      NO
+   LVS SPICE ALLOW UNQUOTED STRINGS       YES
+   LVS SPICE CONDITIONAL LDD              NO
+   LVS SPICE CULL PRIMITIVE SUBCIRCUITS   NO
+   // LVS SPICE EXCLUDE CELL SOURCE
+   // LVS SPICE EXCLUDE CELL LAYOUT
+   LVS SPICE IMPLIED MOS AREA             NO
+   // LVS SPICE MULTIPLIER NAME
+   LVS SPICE OVERRIDE GLOBALS             YES
+   LVS SPICE REDEFINE PARAM               YES
+   LVS SPICE REPLICATE DEVICES            YES
+   LVS SPICE SCALE X PARAMETERS           NO
+   LVS SPICE STRICT WL                    YES
+   // LVS SPICE OPTION
+   LVS STRICT SUBTYPES                    YES
+   LVS EXACT SUBTYPES                     NO
+   LAYOUT CASE                            NO
+   SOURCE CASE                            NO
+   LVS COMPARE CASE                       NO
+   LVS DOWNCASE DEVICE                    NO
+   LVS REPORT MAXIMUM                     50
+   LVS PROPERTY RESOLUTION MAXIMUM        ALL
+   LVS SIGNATURE MAXIMUM                  ALL
+   // LVS FILTER UNUSED OPTION
+   // LVS REPORT OPTION
+   LVS REPORT UNITS                       YES
+   // LVS NON USER NAME PORT
+   LVS NON USER NAME NET                  "^n[0-9]*$" "^net[0-9]*$"
+   // LVS NON USER NAME INSTANCE
+   // LVS IGNORE DEVICE PIN
+   // LVS PREFER NETS FILTER SOURCE
+   // LVS PREFER NETS FILTER LAYOUT
+
+   // Device Type Map
+
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_2p85" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT
+
+   // Reduction
+
+   LVS REDUCE SERIES MOS                  NO
+   LVS REDUCE PARALLEL MOS                NO
+   LVS REDUCE SEMI SERIES MOS             NO
+   LVS REDUCE SPLIT GATES                 YES [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE PARALLEL BIPOLAR            NO
+   LVS REDUCE SERIES CAPACITORS           NO
+   LVS REDUCE PARALLEL CAPACITORS         NO
+   LVS REDUCE SERIES RESISTORS            NO
+   LVS REDUCE PARALLEL RESISTORS          NO
+   LVS REDUCE PARALLEL DIODES             NO
+
+   LVS REDUCE  condiode  PARALLEL
+   LVS REDUCE  condiodeHvPsub  PARALLEL
+   LVS REDUCE  p20vhv1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  n20vhviso1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  nvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  pvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MP  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  M  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MN  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  Q(npnpar1x1)  PARALLEL
+   LVS REDUCE  Q(npnpar1x2)  PARALLEL
+   LVS REDUCE  Q(npn_1x1_2p0_hv)  PARALLEL
+   LVS REDUCE  Q(pnppar)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  Q(pnppar5x)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  D  PARALLEL [ TOLERANCE a 1 p 1 ]
+   LVS REDUCE  D  SERIES POS NEG NO
+   LVS REDUCE  C(xcmimc1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  C(xcmimc2)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R(mrp1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  SERIES POS NEG NO
+   LVS REDUCE  R(short)  PARALLEL
+   LVS REDUCE  R(short)  SERIES POS NEG NO
+   LVS REDUCE  R(fuse)  PARALLEL NO
+   LVS REDUCE  R(fuse)  SERIES POS NEG NO
+   LVS REDUCE  R(metop)  PARALLEL [ TOLERANCE metopNumber 0 ]
+   LVS REDUCE  R(metop)  SERIES POS NEG NO
+   LVS REDUCTION PRIORITY                 PARALLEL
+   
+   LVS SHORT EQUIVALENT NODES             NO
+
+   // Filter
+
+   LVS FILTER  R(cds_thru)  SHORT SOURCE
+   LVS FILTER  R(cds_thru)  SHORT LAYOUT
+   LVS FILTER  Dpar  OPEN SOURCE
+   LVS FILTER  Dpar  OPEN LAYOUT
+   LVS FILTER  Probe  OPEN SOURCE
+   LVS FILTER  Probe  OPEN LAYOUT
+   LVS FILTER  icecap  OPEN SOURCE
+   LVS FILTER  s8fmlt_iref_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_neg_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_vdac_termx  OPEN SOURCE
+   LVS FILTER  D  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN LAYOUT
+   LVS FILTER  tap_dev  OPEN SOURCE
+   LVS FILTER  tap_dev  OPEN LAYOUT
+   LVS FILTER  cad_dummy_open_device  OPEN SOURCE
+   LVS FILTER  cad_dummy_open_device  OPEN LAYOUT
+
+   // Trace Property
+
+   TRACE PROPERTY  xcnwvc  m m 0
+   TRACE PROPERTY  xcnwvc  w w 0
+   TRACE PROPERTY  xcnwvc  l l 0
+   TRACE PROPERTY  xcnwvc2  m m 0
+   TRACE PROPERTY  xcnwvc2  w w 0
+   TRACE PROPERTY  xcnwvc2  l l 0
+   TRACE PROPERTY  xchvnwc  m m 0
+   TRACE PROPERTY  q(npnpar1x1)  m m 0
+   TRACE PROPERTY  q(npnpar1x2)  m m 0
+   TRACE PROPERTY  q(npn_1x1_2p0_hv)  m m 0
+   TRACE PROPERTY  q(pnppar)  barea barea 0
+   TRACE PROPERTY  q(pnppar)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar)  earea earea 0
+   TRACE PROPERTY  q(pnppar)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar)  m m 0
+   TRACE PROPERTY  q(pnppar5x)  barea barea 0
+   TRACE PROPERTY  q(pnppar5x)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar5x)  earea earea 0
+   TRACE PROPERTY  q(pnppar5x)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar5x)  m m 0
+   TRACE PROPERTY  d(ndiode)  a a 1
+   TRACE PROPERTY  d(ndiode)  p p 1
+   TRACE PROPERTY  d(ndiode)  m m 0
+   TRACE PROPERTY  d(ndiode_h)  a a 1
+   TRACE PROPERTY  d(ndiode_h)  p p 1
+   TRACE PROPERTY  d(ndiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  m m 0
+   TRACE PROPERTY  d(pdiode)  a a 1
+   TRACE PROPERTY  d(pdiode)  p p 1
+   TRACE PROPERTY  d(pdiode)  m m 0
+   TRACE PROPERTY  d(pdiode_h)  a a 1
+   TRACE PROPERTY  d(pdiode_h)  p p 1
+   TRACE PROPERTY  d(pdiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub)  a a 1
+   TRACE PROPERTY  d(dnwdiode_psub)  p p 1
+   TRACE PROPERTY  d(dnwdiode_psub)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  m m 0
+   TRACE PROPERTY  xcmvpp  m m 0
+   TRACE PROPERTY  xcmvpp_2  m m 0
+   TRACE PROPERTY  xcmvpp2_nhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp2_phv5x4  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap2_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l40  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l20  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l10  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x1  m m 0
+   TRACE PROPERTY  xcmvppx4_2xnhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym50p4shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m5shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_lim4shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m4shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4m5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp5  m m 0
+   TRACE PROPERTY  xcmvpp4  m m 0
+   TRACE PROPERTY  xcmvpp3  m m 0
+   TRACE PROPERTY  r(mrdn)  w w 1
+   TRACE PROPERTY  r(mrdn)  l l 1
+   TRACE PROPERTY  r(mrdn)  m m 0
+   TRACE PROPERTY  r(mrdn_hv)  w w 1
+   TRACE PROPERTY  r(mrdn_hv)  l l 1
+   TRACE PROPERTY  r(mrdn_hv)  m m 0
+   TRACE PROPERTY  r(mrdp)  w w 1
+   TRACE PROPERTY  r(mrdp)  l l 1
+   TRACE PROPERTY  r(mrdp)  m m 0
+   TRACE PROPERTY  r(mrdp_hv)  w w 1
+   TRACE PROPERTY  r(mrdp_hv)  l l 1
+   TRACE PROPERTY  r(mrdp_hv)  m m 0
+   TRACE PROPERTY  r(mrl1)  w w 1
+   TRACE PROPERTY  r(mrl1)  l l 1
+   TRACE PROPERTY  r(mrl1)  m m 0
+   TRACE PROPERTY  r(xpwres)  w w 1
+   TRACE PROPERTY  r(xpwres)  l l 1
+   TRACE PROPERTY  r(xpwres)  m m 0
+   TRACE PROPERTY  r(short)  m m 0
+   TRACE PROPERTY  r(fuse)  w w 1
+   TRACE PROPERTY  r(fuse)  l l 1
+   TRACE PROPERTY  r(fuse)  m m 0
+   TRACE PROPERTY  r(metop)  metopnumber metopnumber 0
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  m m 0
+   TRACE PROPERTY  d(nwdiode_victim)  a a 10
+   TRACE PROPERTY  d(nwdiode_victim)  p p 10
+   TRACE PROPERTY  d(nwdiode_victim)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  m m 0
+   TRACE PROPERTY  d(nwdiode_aggressor)  a a 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  p p 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  m m 0
+
+   // User Trace Property
+
+   TRACE PROPERTY  mn(nshort)  m mult w l
+   TRACE PROPERTY  mn(npass)  m mult w l
+   TRACE PROPERTY  mn(nlowvt)  m mult w l
+   TRACE PROPERTY  m(sonos_e)  m mult w l
+   TRACE PROPERTY  m  m mult w l
+   TRACE PROPERTY  m(fnpass)  m mult w l
+   TRACE PROPERTY  mn(nhv)  m mult w l
+   TRACE PROPERTY  mn(nhvnative)  m mult w l
+   TRACE PROPERTY  mn(ntvnative)  m mult w l
+   TRACE PROPERTY  mp(pshort)  m mult w l
+   TRACE PROPERTY  mp  m mult w l
+   TRACE PROPERTY  mp(phighvt)  m mult w l
+   TRACE PROPERTY  mp(plowvt)  m mult w l
+   TRACE PROPERTY  mp(phv)  m mult w l
+   TRACE PROPERTY  mn(nshortesd)  m mult w l
+   TRACE PROPERTY  mn(nhvesd)  m mult w l
+   TRACE PROPERTY  mn(nhvnativeesd)  m mult w l
+   TRACE PROPERTY  mp(phvesd)  m mult w l
+   TRACE PROPERTY  nvhv  m mult w l
+   TRACE PROPERTY  n20vhv1  m mult w l
+   TRACE PROPERTY  n20nativevhv1  m mult w l
+   TRACE PROPERTY  n20vhviso1  m mult w l
+   TRACE PROPERTY  n20nativevhviso1  m mult w l
+   TRACE PROPERTY  pvhv  m mult w l
+   TRACE PROPERTY  p20vhv1  m mult w l
+   TRACE PROPERTY  c(xcmimc1)  w l m
+   TRACE PROPERTY  c(xcmimc2)  w l m
+   TRACE PROPERTY  r(mrp1)  m w l
+   TRACE PROPERTY  xhrpoly_0p35  m w l
+   TRACE PROPERTY  xuhrpoly_0p35  m w l
+   TRACE PROPERTY  xhrpoly_0p69  m w l
+   TRACE PROPERTY  xuhrpoly_0p69  m w l
+   TRACE PROPERTY  xhrpoly_1p41  m w l
+   TRACE PROPERTY  xuhrpoly_1p41  m w l
+   TRACE PROPERTY  xhrpoly_2p85  m w l
+   TRACE PROPERTY  xuhrpoly_2p85  m w l
+
+
+
+                   CELL COMPARISON RESULTS ( TOP LEVEL )
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+LAYOUT CELL NAME:         sky130_fd_sc_hdll__a21o_4
+SOURCE CELL NAME:         sky130_fd_sc_hdll__a21o_4
+
+--------------------------------------------------------------------------------------------------------------
+
+INITIAL NUMBERS OF OBJECTS
+--------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:              8         8
+
+ Nets:              15        12    *
+
+ Instances:         10        10         MN (4 pins)
+                    10        10         MP (4 pins)
+                     1         0    *    Dpar (2 pins)
+                     3         0    *    Probe (2 pins)
+                ------    ------
+ Total Inst:        24        20
+
+
+NUMBERS OF OBJECTS AFTER TRANSFORMATION
+---------------------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:              8         8
+
+ Nets:               9         9
+
+ Instances:          2         2         MN (4 pins)
+                     1         1         MP (4 pins)
+                     1         1         SMN2 (4 pins)
+                     1         1         SPMP_2_1 (5 pins)
+                ------    ------
+ Total Inst:         5         5
+
+
+       * = Number of objects in layout different from number in source.
+
+
+
+**************************************************************************************************************
+                               INFORMATION AND WARNINGS
+**************************************************************************************************************
+
+
+                  Matched    Matched    Unmatched    Unmatched    Component
+                   Layout     Source       Layout       Source    Type
+                  -------    -------    ---------    ---------    ---------
+   Ports:               8          8            0            0
+
+   Nets:                9          9            0            0
+
+   Instances:           2          2            0            0    MN(NSHORT)
+                        1          1            0            0    MP(PHIGHVT)
+                        1          1            0            0    SMN2
+                        1          1            0            0    SPMP_2_1
+                  -------    -------    ---------    ---------
+   Total Inst:          5          5            0            0
+
+
+o Statistics:
+
+   4 layout instances were filtered and their pins removed from adjoining nets.
+
+   20 layout mos transistors were reduced to 8.  1 connecting net was deleted.
+     10 mos transistors were deleted by parallel reduction.
+     2 mos transistors and 1 connecting net were deleted by split-gate reduction.
+   20 source mos transistors were reduced to 8.  1 connecting net was deleted.
+     10 mos transistors were deleted by parallel reduction.
+     2 mos transistors and 1 connecting net were deleted by split-gate reduction.
+
+   3 layout nets had all their pins removed and were deleted.
+
+
+o Initial Correspondence Points:
+
+   Ports:        VNB VPB B1 A2 A1 VPWR X VGND
+
+
+**************************************************************************************************************
+                                         SUMMARY
+**************************************************************************************************************
+
+Total CPU Time:      0 sec
+Total Elapsed Time:  0 sec
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_4.pex.spice b/cells/a21o/sky130_fd_sc_hdll__a21o_4.pex.spice
index 621a0bb..5db2971 100644
--- a/cells/a21o/sky130_fd_sc_hdll__a21o_4.pex.spice
+++ b/cells/a21o/sky130_fd_sc_hdll__a21o_4.pex.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21o_4.pex.spice
-* Created: Thu Aug 27 18:52:56 2020
+* Created: Wed Sep  2 08:17:19 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * Nominal Temperature: 27C
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_4.pxi.spice b/cells/a21o/sky130_fd_sc_hdll__a21o_4.pxi.spice
index 0451954..253a573 100644
--- a/cells/a21o/sky130_fd_sc_hdll__a21o_4.pxi.spice
+++ b/cells/a21o/sky130_fd_sc_hdll__a21o_4.pxi.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21o_4.pxi.spice
-* Created: Thu Aug 27 18:52:56 2020
+* Created: Wed Sep  2 08:17:19 2020
 * 
 x_PM_SKY130_FD_SC_HDLL__A21O_4%A_84_21# N_A_84_21#_M1000_s N_A_84_21#_M1017_s
 + N_A_84_21#_M1011_s N_A_84_21#_c_76_n N_A_84_21#_M1002_g N_A_84_21#_c_84_n
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice b/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice
index 1610e1c..efa10b3 100644
--- a/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice
+++ b/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21o_4.spice
-* Created: Thu Aug 27 18:52:56 2020
+* Created: Wed Sep  2 08:17:19 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * 
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_6.lvs.report b/cells/a21o/sky130_fd_sc_hdll__a21o_6.lvs.report
new file mode 100644
index 0000000..cacb980
--- /dev/null
+++ b/cells/a21o/sky130_fd_sc_hdll__a21o_6.lvs.report
@@ -0,0 +1,504 @@
+
+LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice"
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------
+
+Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice"
+Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice"
+Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice"
+Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice"
+Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice"
+Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice"
+Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice"
+Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice"
+Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice"
+Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice"
+Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice"
+Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice"
+Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice"
+Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice"
+Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice"
+Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice"
+Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice"
+Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice"
+Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice"
+Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice"
+Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice"
+Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice"
+Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice"
+Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice"
+
+
+
+
+                  ##################################################
+                  ##                                              ##
+                  ##         C A L I B R E    S Y S T E M         ##
+                  ##                                              ##
+                  ##             L V S   R E P O R T              ##
+                  ##                                              ##
+                  ##################################################
+
+
+
+REPORT FILE NAME:         sky130_fd_sc_hdll__a21o_6.lvs.report
+LAYOUT NAME:              svdb/sky130_fd_sc_hdll__a21o_6.sp ('sky130_fd_sc_hdll__a21o_6')
+SOURCE NAME:              /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice ('sky130_fd_sc_hdll__a21o_6')
+RULE FILE:                /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_
+CREATION TIME:            Wed Sep  2 08:17:23 2020
+CURRENT DIRECTORY:        /home/hlusk/repos/SkyWater/osugooglelib/calibre
+USER NAME:                hlusk
+CALIBRE VERSION:          v2018.4_34.26    Mon Dec 3 14:40:54 PST 2018
+
+
+
+                               OVERALL COMPARISON RESULTS
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+
+**************************************************************************************************************
+                                      CELL  SUMMARY
+**************************************************************************************************************
+
+  Result         Layout                        Source
+  -----------    -----------                   --------------
+  CORRECT        sky130_fd_sc_hdll__a21o_6     sky130_fd_sc_hdll__a21o_6
+
+
+
+**************************************************************************************************************
+                                      LVS PARAMETERS
+**************************************************************************************************************
+
+
+o LVS Setup:
+
+   // LVS COMPONENT TYPE PROPERTY
+   // LVS COMPONENT SUBTYPE PROPERTY
+   // LVS PIN NAME PROPERTY
+   // LVS POWER NAME
+   // LVS GROUND NAME
+   LVS CELL SUPPLY                        NO
+   LVS RECOGNIZE GATES                    ALL
+   LVS IGNORE PORTS                       NO
+   LVS CHECK PORT NAMES                   YES
+   LVS IGNORE TRIVIAL NAMED PORTS         NO
+   LVS BUILTIN DEVICE PIN SWAP            YES
+   LVS ALL CAPACITOR PINS SWAPPABLE       NO
+   LVS DISCARD PINS BY DEVICE             YES
+   LVS SOFT SUBSTRATE PINS                NO
+   LVS INJECT LOGIC                       NO
+   LVS EXPAND UNBALANCED CELLS            YES
+   LVS FLATTEN INSIDE CELL                NO
+   LVS EXPAND SEED PROMOTIONS             NO
+   LVS PRESERVE PARAMETERIZED CELLS       NO
+   LVS GLOBALS ARE PORTS                  YES
+   LVS REVERSE WL                         NO
+   LVS SPICE PREFER PINS                  YES
+   LVS SPICE SLASH IS SPACE               NO
+   LVS SPICE ALLOW FLOATING PINS          YES
+   LVS SPICE ALLOW INLINE PARAMETERS      NO
+   LVS SPICE ALLOW UNQUOTED STRINGS       YES
+   LVS SPICE CONDITIONAL LDD              NO
+   LVS SPICE CULL PRIMITIVE SUBCIRCUITS   NO
+   // LVS SPICE EXCLUDE CELL SOURCE
+   // LVS SPICE EXCLUDE CELL LAYOUT
+   LVS SPICE IMPLIED MOS AREA             NO
+   // LVS SPICE MULTIPLIER NAME
+   LVS SPICE OVERRIDE GLOBALS             YES
+   LVS SPICE REDEFINE PARAM               YES
+   LVS SPICE REPLICATE DEVICES            YES
+   LVS SPICE SCALE X PARAMETERS           NO
+   LVS SPICE STRICT WL                    YES
+   // LVS SPICE OPTION
+   LVS STRICT SUBTYPES                    YES
+   LVS EXACT SUBTYPES                     NO
+   LAYOUT CASE                            NO
+   SOURCE CASE                            NO
+   LVS COMPARE CASE                       NO
+   LVS DOWNCASE DEVICE                    NO
+   LVS REPORT MAXIMUM                     50
+   LVS PROPERTY RESOLUTION MAXIMUM        ALL
+   LVS SIGNATURE MAXIMUM                  ALL
+   // LVS FILTER UNUSED OPTION
+   // LVS REPORT OPTION
+   LVS REPORT UNITS                       YES
+   // LVS NON USER NAME PORT
+   LVS NON USER NAME NET                  "^n[0-9]*$" "^net[0-9]*$"
+   // LVS NON USER NAME INSTANCE
+   // LVS IGNORE DEVICE PIN
+   // LVS PREFER NETS FILTER SOURCE
+   // LVS PREFER NETS FILTER LAYOUT
+
+   // Device Type Map
+
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_2p85" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT
+
+   // Reduction
+
+   LVS REDUCE SERIES MOS                  NO
+   LVS REDUCE PARALLEL MOS                NO
+   LVS REDUCE SEMI SERIES MOS             NO
+   LVS REDUCE SPLIT GATES                 YES [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE PARALLEL BIPOLAR            NO
+   LVS REDUCE SERIES CAPACITORS           NO
+   LVS REDUCE PARALLEL CAPACITORS         NO
+   LVS REDUCE SERIES RESISTORS            NO
+   LVS REDUCE PARALLEL RESISTORS          NO
+   LVS REDUCE PARALLEL DIODES             NO
+
+   LVS REDUCE  condiode  PARALLEL
+   LVS REDUCE  condiodeHvPsub  PARALLEL
+   LVS REDUCE  p20vhv1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  n20vhviso1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  nvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  pvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MP  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  M  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MN  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  Q(npnpar1x1)  PARALLEL
+   LVS REDUCE  Q(npnpar1x2)  PARALLEL
+   LVS REDUCE  Q(npn_1x1_2p0_hv)  PARALLEL
+   LVS REDUCE  Q(pnppar)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  Q(pnppar5x)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  D  PARALLEL [ TOLERANCE a 1 p 1 ]
+   LVS REDUCE  D  SERIES POS NEG NO
+   LVS REDUCE  C(xcmimc1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  C(xcmimc2)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R(mrp1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  SERIES POS NEG NO
+   LVS REDUCE  R(short)  PARALLEL
+   LVS REDUCE  R(short)  SERIES POS NEG NO
+   LVS REDUCE  R(fuse)  PARALLEL NO
+   LVS REDUCE  R(fuse)  SERIES POS NEG NO
+   LVS REDUCE  R(metop)  PARALLEL [ TOLERANCE metopNumber 0 ]
+   LVS REDUCE  R(metop)  SERIES POS NEG NO
+   LVS REDUCTION PRIORITY                 PARALLEL
+   
+   LVS SHORT EQUIVALENT NODES             NO
+
+   // Filter
+
+   LVS FILTER  R(cds_thru)  SHORT SOURCE
+   LVS FILTER  R(cds_thru)  SHORT LAYOUT
+   LVS FILTER  Dpar  OPEN SOURCE
+   LVS FILTER  Dpar  OPEN LAYOUT
+   LVS FILTER  Probe  OPEN SOURCE
+   LVS FILTER  Probe  OPEN LAYOUT
+   LVS FILTER  icecap  OPEN SOURCE
+   LVS FILTER  s8fmlt_iref_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_neg_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_vdac_termx  OPEN SOURCE
+   LVS FILTER  D  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN LAYOUT
+   LVS FILTER  tap_dev  OPEN SOURCE
+   LVS FILTER  tap_dev  OPEN LAYOUT
+   LVS FILTER  cad_dummy_open_device  OPEN SOURCE
+   LVS FILTER  cad_dummy_open_device  OPEN LAYOUT
+
+   // Trace Property
+
+   TRACE PROPERTY  xcnwvc  m m 0
+   TRACE PROPERTY  xcnwvc  w w 0
+   TRACE PROPERTY  xcnwvc  l l 0
+   TRACE PROPERTY  xcnwvc2  m m 0
+   TRACE PROPERTY  xcnwvc2  w w 0
+   TRACE PROPERTY  xcnwvc2  l l 0
+   TRACE PROPERTY  xchvnwc  m m 0
+   TRACE PROPERTY  q(npnpar1x1)  m m 0
+   TRACE PROPERTY  q(npnpar1x2)  m m 0
+   TRACE PROPERTY  q(npn_1x1_2p0_hv)  m m 0
+   TRACE PROPERTY  q(pnppar)  barea barea 0
+   TRACE PROPERTY  q(pnppar)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar)  earea earea 0
+   TRACE PROPERTY  q(pnppar)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar)  m m 0
+   TRACE PROPERTY  q(pnppar5x)  barea barea 0
+   TRACE PROPERTY  q(pnppar5x)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar5x)  earea earea 0
+   TRACE PROPERTY  q(pnppar5x)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar5x)  m m 0
+   TRACE PROPERTY  d(ndiode)  a a 1
+   TRACE PROPERTY  d(ndiode)  p p 1
+   TRACE PROPERTY  d(ndiode)  m m 0
+   TRACE PROPERTY  d(ndiode_h)  a a 1
+   TRACE PROPERTY  d(ndiode_h)  p p 1
+   TRACE PROPERTY  d(ndiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  m m 0
+   TRACE PROPERTY  d(pdiode)  a a 1
+   TRACE PROPERTY  d(pdiode)  p p 1
+   TRACE PROPERTY  d(pdiode)  m m 0
+   TRACE PROPERTY  d(pdiode_h)  a a 1
+   TRACE PROPERTY  d(pdiode_h)  p p 1
+   TRACE PROPERTY  d(pdiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub)  a a 1
+   TRACE PROPERTY  d(dnwdiode_psub)  p p 1
+   TRACE PROPERTY  d(dnwdiode_psub)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  m m 0
+   TRACE PROPERTY  xcmvpp  m m 0
+   TRACE PROPERTY  xcmvpp_2  m m 0
+   TRACE PROPERTY  xcmvpp2_nhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp2_phv5x4  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap2_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l40  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l20  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l10  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x1  m m 0
+   TRACE PROPERTY  xcmvppx4_2xnhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym50p4shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m5shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_lim4shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m4shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4m5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp5  m m 0
+   TRACE PROPERTY  xcmvpp4  m m 0
+   TRACE PROPERTY  xcmvpp3  m m 0
+   TRACE PROPERTY  r(mrdn)  w w 1
+   TRACE PROPERTY  r(mrdn)  l l 1
+   TRACE PROPERTY  r(mrdn)  m m 0
+   TRACE PROPERTY  r(mrdn_hv)  w w 1
+   TRACE PROPERTY  r(mrdn_hv)  l l 1
+   TRACE PROPERTY  r(mrdn_hv)  m m 0
+   TRACE PROPERTY  r(mrdp)  w w 1
+   TRACE PROPERTY  r(mrdp)  l l 1
+   TRACE PROPERTY  r(mrdp)  m m 0
+   TRACE PROPERTY  r(mrdp_hv)  w w 1
+   TRACE PROPERTY  r(mrdp_hv)  l l 1
+   TRACE PROPERTY  r(mrdp_hv)  m m 0
+   TRACE PROPERTY  r(mrl1)  w w 1
+   TRACE PROPERTY  r(mrl1)  l l 1
+   TRACE PROPERTY  r(mrl1)  m m 0
+   TRACE PROPERTY  r(xpwres)  w w 1
+   TRACE PROPERTY  r(xpwres)  l l 1
+   TRACE PROPERTY  r(xpwres)  m m 0
+   TRACE PROPERTY  r(short)  m m 0
+   TRACE PROPERTY  r(fuse)  w w 1
+   TRACE PROPERTY  r(fuse)  l l 1
+   TRACE PROPERTY  r(fuse)  m m 0
+   TRACE PROPERTY  r(metop)  metopnumber metopnumber 0
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  m m 0
+   TRACE PROPERTY  d(nwdiode_victim)  a a 10
+   TRACE PROPERTY  d(nwdiode_victim)  p p 10
+   TRACE PROPERTY  d(nwdiode_victim)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  m m 0
+   TRACE PROPERTY  d(nwdiode_aggressor)  a a 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  p p 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  m m 0
+
+   // User Trace Property
+
+   TRACE PROPERTY  mn(nshort)  m mult w l
+   TRACE PROPERTY  mn(npass)  m mult w l
+   TRACE PROPERTY  mn(nlowvt)  m mult w l
+   TRACE PROPERTY  m(sonos_e)  m mult w l
+   TRACE PROPERTY  m  m mult w l
+   TRACE PROPERTY  m(fnpass)  m mult w l
+   TRACE PROPERTY  mn(nhv)  m mult w l
+   TRACE PROPERTY  mn(nhvnative)  m mult w l
+   TRACE PROPERTY  mn(ntvnative)  m mult w l
+   TRACE PROPERTY  mp(pshort)  m mult w l
+   TRACE PROPERTY  mp  m mult w l
+   TRACE PROPERTY  mp(phighvt)  m mult w l
+   TRACE PROPERTY  mp(plowvt)  m mult w l
+   TRACE PROPERTY  mp(phv)  m mult w l
+   TRACE PROPERTY  mn(nshortesd)  m mult w l
+   TRACE PROPERTY  mn(nhvesd)  m mult w l
+   TRACE PROPERTY  mn(nhvnativeesd)  m mult w l
+   TRACE PROPERTY  mp(phvesd)  m mult w l
+   TRACE PROPERTY  nvhv  m mult w l
+   TRACE PROPERTY  n20vhv1  m mult w l
+   TRACE PROPERTY  n20nativevhv1  m mult w l
+   TRACE PROPERTY  n20vhviso1  m mult w l
+   TRACE PROPERTY  n20nativevhviso1  m mult w l
+   TRACE PROPERTY  pvhv  m mult w l
+   TRACE PROPERTY  p20vhv1  m mult w l
+   TRACE PROPERTY  c(xcmimc1)  w l m
+   TRACE PROPERTY  c(xcmimc2)  w l m
+   TRACE PROPERTY  r(mrp1)  m w l
+   TRACE PROPERTY  xhrpoly_0p35  m w l
+   TRACE PROPERTY  xuhrpoly_0p35  m w l
+   TRACE PROPERTY  xhrpoly_0p69  m w l
+   TRACE PROPERTY  xuhrpoly_0p69  m w l
+   TRACE PROPERTY  xhrpoly_1p41  m w l
+   TRACE PROPERTY  xuhrpoly_1p41  m w l
+   TRACE PROPERTY  xhrpoly_2p85  m w l
+   TRACE PROPERTY  xuhrpoly_2p85  m w l
+
+
+
+                   CELL COMPARISON RESULTS ( TOP LEVEL )
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+LAYOUT CELL NAME:         sky130_fd_sc_hdll__a21o_6
+SOURCE CELL NAME:         sky130_fd_sc_hdll__a21o_6
+
+--------------------------------------------------------------------------------------------------------------
+
+INITIAL NUMBERS OF OBJECTS
+--------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:              8         8
+
+ Nets:              12        12
+
+ Instances:         12        12         MN (4 pins)
+                    12        12         MP (4 pins)
+                     1         0    *    Dpar (2 pins)
+                ------    ------
+ Total Inst:        25        24
+
+
+NUMBERS OF OBJECTS AFTER TRANSFORMATION
+---------------------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:              8         8
+
+ Nets:               9         9
+
+ Instances:          2         2         MN (4 pins)
+                     1         1         MP (4 pins)
+                     1         1         SMN2 (4 pins)
+                     1         1         SPMP_2_1 (5 pins)
+                ------    ------
+ Total Inst:         5         5
+
+
+       * = Number of objects in layout different from number in source.
+
+
+
+**************************************************************************************************************
+                               INFORMATION AND WARNINGS
+**************************************************************************************************************
+
+
+                  Matched    Matched    Unmatched    Unmatched    Component
+                   Layout     Source       Layout       Source    Type
+                  -------    -------    ---------    ---------    ---------
+   Ports:               8          8            0            0
+
+   Nets:                9          9            0            0
+
+   Instances:           2          2            0            0    MN(NSHORT)
+                        1          1            0            0    MP(PHIGHVT)
+                        1          1            0            0    SMN2
+                        1          1            0            0    SPMP_2_1
+                  -------    -------    ---------    ---------
+   Total Inst:          5          5            0            0
+
+
+o Statistics:
+
+   1 layout instance was filtered and its pins removed from adjoining nets.
+
+   24 layout mos transistors were reduced to 8.  1 connecting net was deleted.
+     14 mos transistors were deleted by parallel reduction.
+     2 mos transistors and 1 connecting net were deleted by split-gate reduction.
+   24 source mos transistors were reduced to 8.  1 connecting net was deleted.
+     14 mos transistors were deleted by parallel reduction.
+     2 mos transistors and 1 connecting net were deleted by split-gate reduction.
+
+
+o Initial Correspondence Points:
+
+   Ports:        VNB VPB A2 A1 B1 VPWR X VGND
+
+
+**************************************************************************************************************
+                                         SUMMARY
+**************************************************************************************************************
+
+Total CPU Time:      0 sec
+Total Elapsed Time:  0 sec
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_6.pex.spice b/cells/a21o/sky130_fd_sc_hdll__a21o_6.pex.spice
index 768c80d..3909136 100644
--- a/cells/a21o/sky130_fd_sc_hdll__a21o_6.pex.spice
+++ b/cells/a21o/sky130_fd_sc_hdll__a21o_6.pex.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21o_6.pex.spice
-* Created: Thu Aug 27 18:53:03 2020
+* Created: Wed Sep  2 08:17:26 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * Nominal Temperature: 27C
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_6.pxi.spice b/cells/a21o/sky130_fd_sc_hdll__a21o_6.pxi.spice
index 26be3f0..51950d5 100644
--- a/cells/a21o/sky130_fd_sc_hdll__a21o_6.pxi.spice
+++ b/cells/a21o/sky130_fd_sc_hdll__a21o_6.pxi.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21o_6.pxi.spice
-* Created: Thu Aug 27 18:53:03 2020
+* Created: Wed Sep  2 08:17:26 2020
 * 
 x_PM_SKY130_FD_SC_HDLL__A21O_6%A2 N_A2_c_100_n N_A2_M1010_g N_A2_c_101_n
 + N_A2_M1000_g N_A2_c_102_n N_A2_M1012_g N_A2_c_103_n N_A2_M1015_g N_A2_c_109_n
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice b/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice
index 56c89a3..39b4146 100644
--- a/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice
+++ b/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21o_6.spice
-* Created: Thu Aug 27 18:53:03 2020
+* Created: Wed Sep  2 08:17:26 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * 
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_8.lvs.report b/cells/a21o/sky130_fd_sc_hdll__a21o_8.lvs.report
new file mode 100644
index 0000000..e60614a
--- /dev/null
+++ b/cells/a21o/sky130_fd_sc_hdll__a21o_8.lvs.report
@@ -0,0 +1,508 @@
+
+LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice"
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------
+
+Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice"
+Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice"
+Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice"
+Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice"
+Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice"
+Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice"
+Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice"
+Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice"
+Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice"
+Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice"
+Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice"
+Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice"
+Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice"
+Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice"
+Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice"
+Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice"
+Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice"
+Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice"
+Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice"
+Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice"
+Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice"
+Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice"
+Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice"
+Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice"
+Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice"
+Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice"
+Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice"
+Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice"
+
+
+
+
+                  ##################################################
+                  ##                                              ##
+                  ##         C A L I B R E    S Y S T E M         ##
+                  ##                                              ##
+                  ##             L V S   R E P O R T              ##
+                  ##                                              ##
+                  ##################################################
+
+
+
+REPORT FILE NAME:         sky130_fd_sc_hdll__a21o_8.lvs.report
+LAYOUT NAME:              svdb/sky130_fd_sc_hdll__a21o_8.sp ('sky130_fd_sc_hdll__a21o_8')
+SOURCE NAME:              /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice ('sky130_fd_sc_hdll__a21o_8')
+RULE FILE:                /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_
+CREATION TIME:            Wed Sep  2 08:17:30 2020
+CURRENT DIRECTORY:        /home/hlusk/repos/SkyWater/osugooglelib/calibre
+USER NAME:                hlusk
+CALIBRE VERSION:          v2018.4_34.26    Mon Dec 3 14:40:54 PST 2018
+
+
+
+                               OVERALL COMPARISON RESULTS
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+
+**************************************************************************************************************
+                                      CELL  SUMMARY
+**************************************************************************************************************
+
+  Result         Layout                        Source
+  -----------    -----------                   --------------
+  CORRECT        sky130_fd_sc_hdll__a21o_8     sky130_fd_sc_hdll__a21o_8
+
+
+
+**************************************************************************************************************
+                                      LVS PARAMETERS
+**************************************************************************************************************
+
+
+o LVS Setup:
+
+   // LVS COMPONENT TYPE PROPERTY
+   // LVS COMPONENT SUBTYPE PROPERTY
+   // LVS PIN NAME PROPERTY
+   // LVS POWER NAME
+   // LVS GROUND NAME
+   LVS CELL SUPPLY                        NO
+   LVS RECOGNIZE GATES                    ALL
+   LVS IGNORE PORTS                       NO
+   LVS CHECK PORT NAMES                   YES
+   LVS IGNORE TRIVIAL NAMED PORTS         NO
+   LVS BUILTIN DEVICE PIN SWAP            YES
+   LVS ALL CAPACITOR PINS SWAPPABLE       NO
+   LVS DISCARD PINS BY DEVICE             YES
+   LVS SOFT SUBSTRATE PINS                NO
+   LVS INJECT LOGIC                       NO
+   LVS EXPAND UNBALANCED CELLS            YES
+   LVS FLATTEN INSIDE CELL                NO
+   LVS EXPAND SEED PROMOTIONS             NO
+   LVS PRESERVE PARAMETERIZED CELLS       NO
+   LVS GLOBALS ARE PORTS                  YES
+   LVS REVERSE WL                         NO
+   LVS SPICE PREFER PINS                  YES
+   LVS SPICE SLASH IS SPACE               NO
+   LVS SPICE ALLOW FLOATING PINS          YES
+   LVS SPICE ALLOW INLINE PARAMETERS      NO
+   LVS SPICE ALLOW UNQUOTED STRINGS       YES
+   LVS SPICE CONDITIONAL LDD              NO
+   LVS SPICE CULL PRIMITIVE SUBCIRCUITS   NO
+   // LVS SPICE EXCLUDE CELL SOURCE
+   // LVS SPICE EXCLUDE CELL LAYOUT
+   LVS SPICE IMPLIED MOS AREA             NO
+   // LVS SPICE MULTIPLIER NAME
+   LVS SPICE OVERRIDE GLOBALS             YES
+   LVS SPICE REDEFINE PARAM               YES
+   LVS SPICE REPLICATE DEVICES            YES
+   LVS SPICE SCALE X PARAMETERS           NO
+   LVS SPICE STRICT WL                    YES
+   // LVS SPICE OPTION
+   LVS STRICT SUBTYPES                    YES
+   LVS EXACT SUBTYPES                     NO
+   LAYOUT CASE                            NO
+   SOURCE CASE                            NO
+   LVS COMPARE CASE                       NO
+   LVS DOWNCASE DEVICE                    NO
+   LVS REPORT MAXIMUM                     50
+   LVS PROPERTY RESOLUTION MAXIMUM        ALL
+   LVS SIGNATURE MAXIMUM                  ALL
+   // LVS FILTER UNUSED OPTION
+   // LVS REPORT OPTION
+   LVS REPORT UNITS                       YES
+   // LVS NON USER NAME PORT
+   LVS NON USER NAME NET                  "^n[0-9]*$" "^net[0-9]*$"
+   // LVS NON USER NAME INSTANCE
+   // LVS IGNORE DEVICE PIN
+   // LVS PREFER NETS FILTER SOURCE
+   // LVS PREFER NETS FILTER LAYOUT
+
+   // Device Type Map
+
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_2p85" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT
+
+   // Reduction
+
+   LVS REDUCE SERIES MOS                  NO
+   LVS REDUCE PARALLEL MOS                NO
+   LVS REDUCE SEMI SERIES MOS             NO
+   LVS REDUCE SPLIT GATES                 YES [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE PARALLEL BIPOLAR            NO
+   LVS REDUCE SERIES CAPACITORS           NO
+   LVS REDUCE PARALLEL CAPACITORS         NO
+   LVS REDUCE SERIES RESISTORS            NO
+   LVS REDUCE PARALLEL RESISTORS          NO
+   LVS REDUCE PARALLEL DIODES             NO
+
+   LVS REDUCE  condiode  PARALLEL
+   LVS REDUCE  condiodeHvPsub  PARALLEL
+   LVS REDUCE  p20vhv1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  n20vhviso1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  nvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  pvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MP  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  M  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MN  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  Q(npnpar1x1)  PARALLEL
+   LVS REDUCE  Q(npnpar1x2)  PARALLEL
+   LVS REDUCE  Q(npn_1x1_2p0_hv)  PARALLEL
+   LVS REDUCE  Q(pnppar)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  Q(pnppar5x)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  D  PARALLEL [ TOLERANCE a 1 p 1 ]
+   LVS REDUCE  D  SERIES POS NEG NO
+   LVS REDUCE  C(xcmimc1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  C(xcmimc2)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R(mrp1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  SERIES POS NEG NO
+   LVS REDUCE  R(short)  PARALLEL
+   LVS REDUCE  R(short)  SERIES POS NEG NO
+   LVS REDUCE  R(fuse)  PARALLEL NO
+   LVS REDUCE  R(fuse)  SERIES POS NEG NO
+   LVS REDUCE  R(metop)  PARALLEL [ TOLERANCE metopNumber 0 ]
+   LVS REDUCE  R(metop)  SERIES POS NEG NO
+   LVS REDUCTION PRIORITY                 PARALLEL
+   
+   LVS SHORT EQUIVALENT NODES             NO
+
+   // Filter
+
+   LVS FILTER  R(cds_thru)  SHORT SOURCE
+   LVS FILTER  R(cds_thru)  SHORT LAYOUT
+   LVS FILTER  Dpar  OPEN SOURCE
+   LVS FILTER  Dpar  OPEN LAYOUT
+   LVS FILTER  Probe  OPEN SOURCE
+   LVS FILTER  Probe  OPEN LAYOUT
+   LVS FILTER  icecap  OPEN SOURCE
+   LVS FILTER  s8fmlt_iref_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_neg_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_vdac_termx  OPEN SOURCE
+   LVS FILTER  D  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN LAYOUT
+   LVS FILTER  tap_dev  OPEN SOURCE
+   LVS FILTER  tap_dev  OPEN LAYOUT
+   LVS FILTER  cad_dummy_open_device  OPEN SOURCE
+   LVS FILTER  cad_dummy_open_device  OPEN LAYOUT
+
+   // Trace Property
+
+   TRACE PROPERTY  xcnwvc  m m 0
+   TRACE PROPERTY  xcnwvc  w w 0
+   TRACE PROPERTY  xcnwvc  l l 0
+   TRACE PROPERTY  xcnwvc2  m m 0
+   TRACE PROPERTY  xcnwvc2  w w 0
+   TRACE PROPERTY  xcnwvc2  l l 0
+   TRACE PROPERTY  xchvnwc  m m 0
+   TRACE PROPERTY  q(npnpar1x1)  m m 0
+   TRACE PROPERTY  q(npnpar1x2)  m m 0
+   TRACE PROPERTY  q(npn_1x1_2p0_hv)  m m 0
+   TRACE PROPERTY  q(pnppar)  barea barea 0
+   TRACE PROPERTY  q(pnppar)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar)  earea earea 0
+   TRACE PROPERTY  q(pnppar)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar)  m m 0
+   TRACE PROPERTY  q(pnppar5x)  barea barea 0
+   TRACE PROPERTY  q(pnppar5x)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar5x)  earea earea 0
+   TRACE PROPERTY  q(pnppar5x)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar5x)  m m 0
+   TRACE PROPERTY  d(ndiode)  a a 1
+   TRACE PROPERTY  d(ndiode)  p p 1
+   TRACE PROPERTY  d(ndiode)  m m 0
+   TRACE PROPERTY  d(ndiode_h)  a a 1
+   TRACE PROPERTY  d(ndiode_h)  p p 1
+   TRACE PROPERTY  d(ndiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  m m 0
+   TRACE PROPERTY  d(pdiode)  a a 1
+   TRACE PROPERTY  d(pdiode)  p p 1
+   TRACE PROPERTY  d(pdiode)  m m 0
+   TRACE PROPERTY  d(pdiode_h)  a a 1
+   TRACE PROPERTY  d(pdiode_h)  p p 1
+   TRACE PROPERTY  d(pdiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub)  a a 1
+   TRACE PROPERTY  d(dnwdiode_psub)  p p 1
+   TRACE PROPERTY  d(dnwdiode_psub)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  m m 0
+   TRACE PROPERTY  xcmvpp  m m 0
+   TRACE PROPERTY  xcmvpp_2  m m 0
+   TRACE PROPERTY  xcmvpp2_nhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp2_phv5x4  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap2_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l40  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l20  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l10  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x1  m m 0
+   TRACE PROPERTY  xcmvppx4_2xnhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym50p4shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m5shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_lim4shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m4shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4m5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp5  m m 0
+   TRACE PROPERTY  xcmvpp4  m m 0
+   TRACE PROPERTY  xcmvpp3  m m 0
+   TRACE PROPERTY  r(mrdn)  w w 1
+   TRACE PROPERTY  r(mrdn)  l l 1
+   TRACE PROPERTY  r(mrdn)  m m 0
+   TRACE PROPERTY  r(mrdn_hv)  w w 1
+   TRACE PROPERTY  r(mrdn_hv)  l l 1
+   TRACE PROPERTY  r(mrdn_hv)  m m 0
+   TRACE PROPERTY  r(mrdp)  w w 1
+   TRACE PROPERTY  r(mrdp)  l l 1
+   TRACE PROPERTY  r(mrdp)  m m 0
+   TRACE PROPERTY  r(mrdp_hv)  w w 1
+   TRACE PROPERTY  r(mrdp_hv)  l l 1
+   TRACE PROPERTY  r(mrdp_hv)  m m 0
+   TRACE PROPERTY  r(mrl1)  w w 1
+   TRACE PROPERTY  r(mrl1)  l l 1
+   TRACE PROPERTY  r(mrl1)  m m 0
+   TRACE PROPERTY  r(xpwres)  w w 1
+   TRACE PROPERTY  r(xpwres)  l l 1
+   TRACE PROPERTY  r(xpwres)  m m 0
+   TRACE PROPERTY  r(short)  m m 0
+   TRACE PROPERTY  r(fuse)  w w 1
+   TRACE PROPERTY  r(fuse)  l l 1
+   TRACE PROPERTY  r(fuse)  m m 0
+   TRACE PROPERTY  r(metop)  metopnumber metopnumber 0
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  m m 0
+   TRACE PROPERTY  d(nwdiode_victim)  a a 10
+   TRACE PROPERTY  d(nwdiode_victim)  p p 10
+   TRACE PROPERTY  d(nwdiode_victim)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  m m 0
+   TRACE PROPERTY  d(nwdiode_aggressor)  a a 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  p p 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  m m 0
+
+   // User Trace Property
+
+   TRACE PROPERTY  mn(nshort)  m mult w l
+   TRACE PROPERTY  mn(npass)  m mult w l
+   TRACE PROPERTY  mn(nlowvt)  m mult w l
+   TRACE PROPERTY  m(sonos_e)  m mult w l
+   TRACE PROPERTY  m  m mult w l
+   TRACE PROPERTY  m(fnpass)  m mult w l
+   TRACE PROPERTY  mn(nhv)  m mult w l
+   TRACE PROPERTY  mn(nhvnative)  m mult w l
+   TRACE PROPERTY  mn(ntvnative)  m mult w l
+   TRACE PROPERTY  mp(pshort)  m mult w l
+   TRACE PROPERTY  mp  m mult w l
+   TRACE PROPERTY  mp(phighvt)  m mult w l
+   TRACE PROPERTY  mp(plowvt)  m mult w l
+   TRACE PROPERTY  mp(phv)  m mult w l
+   TRACE PROPERTY  mn(nshortesd)  m mult w l
+   TRACE PROPERTY  mn(nhvesd)  m mult w l
+   TRACE PROPERTY  mn(nhvnativeesd)  m mult w l
+   TRACE PROPERTY  mp(phvesd)  m mult w l
+   TRACE PROPERTY  nvhv  m mult w l
+   TRACE PROPERTY  n20vhv1  m mult w l
+   TRACE PROPERTY  n20nativevhv1  m mult w l
+   TRACE PROPERTY  n20vhviso1  m mult w l
+   TRACE PROPERTY  n20nativevhviso1  m mult w l
+   TRACE PROPERTY  pvhv  m mult w l
+   TRACE PROPERTY  p20vhv1  m mult w l
+   TRACE PROPERTY  c(xcmimc1)  w l m
+   TRACE PROPERTY  c(xcmimc2)  w l m
+   TRACE PROPERTY  r(mrp1)  m w l
+   TRACE PROPERTY  xhrpoly_0p35  m w l
+   TRACE PROPERTY  xuhrpoly_0p35  m w l
+   TRACE PROPERTY  xhrpoly_0p69  m w l
+   TRACE PROPERTY  xuhrpoly_0p69  m w l
+   TRACE PROPERTY  xhrpoly_1p41  m w l
+   TRACE PROPERTY  xuhrpoly_1p41  m w l
+   TRACE PROPERTY  xhrpoly_2p85  m w l
+   TRACE PROPERTY  xuhrpoly_2p85  m w l
+
+
+
+                   CELL COMPARISON RESULTS ( TOP LEVEL )
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+LAYOUT CELL NAME:         sky130_fd_sc_hdll__a21o_8
+SOURCE CELL NAME:         sky130_fd_sc_hdll__a21o_8
+
+--------------------------------------------------------------------------------------------------------------
+
+INITIAL NUMBERS OF OBJECTS
+--------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:              8         8
+
+ Nets:              12        12
+
+ Instances:         14        14         MN (4 pins)
+                    14        14         MP (4 pins)
+                     1         0    *    Dpar (2 pins)
+                ------    ------
+ Total Inst:        29        28
+
+
+NUMBERS OF OBJECTS AFTER TRANSFORMATION
+---------------------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:              8         8
+
+ Nets:               9         9
+
+ Instances:          2         2         MN (4 pins)
+                     1         1         MP (4 pins)
+                     1         1         SMN2 (4 pins)
+                     1         1         SPMP_2_1 (5 pins)
+                ------    ------
+ Total Inst:         5         5
+
+
+       * = Number of objects in layout different from number in source.
+
+
+
+**************************************************************************************************************
+                               INFORMATION AND WARNINGS
+**************************************************************************************************************
+
+
+                  Matched    Matched    Unmatched    Unmatched    Component
+                   Layout     Source       Layout       Source    Type
+                  -------    -------    ---------    ---------    ---------
+   Ports:               8          8            0            0
+
+   Nets:                9          9            0            0
+
+   Instances:           2          2            0            0    MN(NSHORT)
+                        1          1            0            0    MP(PHIGHVT)
+                        1          1            0            0    SMN2
+                        1          1            0            0    SPMP_2_1
+                  -------    -------    ---------    ---------
+   Total Inst:          5          5            0            0
+
+
+o Statistics:
+
+   1 layout instance was filtered and its pins removed from adjoining nets.
+
+   28 layout mos transistors were reduced to 8.  1 connecting net was deleted.
+     18 mos transistors were deleted by parallel reduction.
+     2 mos transistors and 1 connecting net were deleted by split-gate reduction.
+   28 source mos transistors were reduced to 8.  1 connecting net was deleted.
+     18 mos transistors were deleted by parallel reduction.
+     2 mos transistors and 1 connecting net were deleted by split-gate reduction.
+
+
+o Initial Correspondence Points:
+
+   Ports:        VNB VPB A2 A1 B1 VPWR X VGND
+
+
+**************************************************************************************************************
+                                         SUMMARY
+**************************************************************************************************************
+
+Total CPU Time:      0 sec
+Total Elapsed Time:  0 sec
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_8.pex.spice b/cells/a21o/sky130_fd_sc_hdll__a21o_8.pex.spice
index 581f656..a5406e9 100644
--- a/cells/a21o/sky130_fd_sc_hdll__a21o_8.pex.spice
+++ b/cells/a21o/sky130_fd_sc_hdll__a21o_8.pex.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21o_8.pex.spice
-* Created: Thu Aug 27 18:53:09 2020
+* Created: Wed Sep  2 08:17:33 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * Nominal Temperature: 27C
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_8.pxi.spice b/cells/a21o/sky130_fd_sc_hdll__a21o_8.pxi.spice
index 2e9f3b7..f12850d 100644
--- a/cells/a21o/sky130_fd_sc_hdll__a21o_8.pxi.spice
+++ b/cells/a21o/sky130_fd_sc_hdll__a21o_8.pxi.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21o_8.pxi.spice
-* Created: Thu Aug 27 18:53:09 2020
+* Created: Wed Sep  2 08:17:33 2020
 * 
 x_PM_SKY130_FD_SC_HDLL__A21O_8%A2 N_A2_c_112_n N_A2_M1011_g N_A2_c_113_n
 + N_A2_M1000_g N_A2_c_114_n N_A2_M1014_g N_A2_c_115_n N_A2_M1017_g N_A2_c_121_n
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice b/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice
index 5c55676..9f0ed3c 100644
--- a/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice
+++ b/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21o_8.spice
-* Created: Thu Aug 27 18:53:09 2020
+* Created: Wed Sep  2 08:17:33 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * 
diff --git a/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.lvs.report b/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.lvs.report
new file mode 100644
index 0000000..f557ea5
--- /dev/null
+++ b/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.lvs.report
@@ -0,0 +1,477 @@
+
+LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.spice"
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------
+
+Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.spice"
+
+
+
+
+                  ##################################################
+                  ##                                              ##
+                  ##         C A L I B R E    S Y S T E M         ##
+                  ##                                              ##
+                  ##             L V S   R E P O R T              ##
+                  ##                                              ##
+                  ##################################################
+
+
+
+REPORT FILE NAME:         sky130_fd_sc_hdll__a21oi_1.lvs.report
+LAYOUT NAME:              svdb/sky130_fd_sc_hdll__a21oi_1.sp ('sky130_fd_sc_hdll__a21oi_1')
+SOURCE NAME:              /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.spice ('sky130_fd_sc_hdll__a21oi_1')
+RULE FILE:                /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_
+CREATION TIME:            Wed Sep  2 08:17:38 2020
+CURRENT DIRECTORY:        /home/hlusk/repos/SkyWater/osugooglelib/calibre
+USER NAME:                hlusk
+CALIBRE VERSION:          v2018.4_34.26    Mon Dec 3 14:40:54 PST 2018
+
+
+
+                               OVERALL COMPARISON RESULTS
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+
+**************************************************************************************************************
+                                      CELL  SUMMARY
+**************************************************************************************************************
+
+  Result         Layout                        Source
+  -----------    -----------                   --------------
+  CORRECT        sky130_fd_sc_hdll__a21oi_1    sky130_fd_sc_hdll__a21oi_1
+
+
+
+**************************************************************************************************************
+                                      LVS PARAMETERS
+**************************************************************************************************************
+
+
+o LVS Setup:
+
+   // LVS COMPONENT TYPE PROPERTY
+   // LVS COMPONENT SUBTYPE PROPERTY
+   // LVS PIN NAME PROPERTY
+   // LVS POWER NAME
+   // LVS GROUND NAME
+   LVS CELL SUPPLY                        NO
+   LVS RECOGNIZE GATES                    ALL
+   LVS IGNORE PORTS                       NO
+   LVS CHECK PORT NAMES                   YES
+   LVS IGNORE TRIVIAL NAMED PORTS         NO
+   LVS BUILTIN DEVICE PIN SWAP            YES
+   LVS ALL CAPACITOR PINS SWAPPABLE       NO
+   LVS DISCARD PINS BY DEVICE             YES
+   LVS SOFT SUBSTRATE PINS                NO
+   LVS INJECT LOGIC                       NO
+   LVS EXPAND UNBALANCED CELLS            YES
+   LVS FLATTEN INSIDE CELL                NO
+   LVS EXPAND SEED PROMOTIONS             NO
+   LVS PRESERVE PARAMETERIZED CELLS       NO
+   LVS GLOBALS ARE PORTS                  YES
+   LVS REVERSE WL                         NO
+   LVS SPICE PREFER PINS                  YES
+   LVS SPICE SLASH IS SPACE               NO
+   LVS SPICE ALLOW FLOATING PINS          YES
+   LVS SPICE ALLOW INLINE PARAMETERS      NO
+   LVS SPICE ALLOW UNQUOTED STRINGS       YES
+   LVS SPICE CONDITIONAL LDD              NO
+   LVS SPICE CULL PRIMITIVE SUBCIRCUITS   NO
+   // LVS SPICE EXCLUDE CELL SOURCE
+   // LVS SPICE EXCLUDE CELL LAYOUT
+   LVS SPICE IMPLIED MOS AREA             NO
+   // LVS SPICE MULTIPLIER NAME
+   LVS SPICE OVERRIDE GLOBALS             YES
+   LVS SPICE REDEFINE PARAM               YES
+   LVS SPICE REPLICATE DEVICES            YES
+   LVS SPICE SCALE X PARAMETERS           NO
+   LVS SPICE STRICT WL                    YES
+   // LVS SPICE OPTION
+   LVS STRICT SUBTYPES                    YES
+   LVS EXACT SUBTYPES                     NO
+   LAYOUT CASE                            NO
+   SOURCE CASE                            NO
+   LVS COMPARE CASE                       NO
+   LVS DOWNCASE DEVICE                    NO
+   LVS REPORT MAXIMUM                     50
+   LVS PROPERTY RESOLUTION MAXIMUM        ALL
+   LVS SIGNATURE MAXIMUM                  ALL
+   // LVS FILTER UNUSED OPTION
+   // LVS REPORT OPTION
+   LVS REPORT UNITS                       YES
+   // LVS NON USER NAME PORT
+   LVS NON USER NAME NET                  "^n[0-9]*$" "^net[0-9]*$"
+   // LVS NON USER NAME INSTANCE
+   // LVS IGNORE DEVICE PIN
+   // LVS PREFER NETS FILTER SOURCE
+   // LVS PREFER NETS FILTER LAYOUT
+
+   // Device Type Map
+
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_2p85" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT
+
+   // Reduction
+
+   LVS REDUCE SERIES MOS                  NO
+   LVS REDUCE PARALLEL MOS                NO
+   LVS REDUCE SEMI SERIES MOS             NO
+   LVS REDUCE SPLIT GATES                 YES [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE PARALLEL BIPOLAR            NO
+   LVS REDUCE SERIES CAPACITORS           NO
+   LVS REDUCE PARALLEL CAPACITORS         NO
+   LVS REDUCE SERIES RESISTORS            NO
+   LVS REDUCE PARALLEL RESISTORS          NO
+   LVS REDUCE PARALLEL DIODES             NO
+
+   LVS REDUCE  condiode  PARALLEL
+   LVS REDUCE  condiodeHvPsub  PARALLEL
+   LVS REDUCE  p20vhv1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  n20vhviso1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  nvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  pvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MP  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  M  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MN  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  Q(npnpar1x1)  PARALLEL
+   LVS REDUCE  Q(npnpar1x2)  PARALLEL
+   LVS REDUCE  Q(npn_1x1_2p0_hv)  PARALLEL
+   LVS REDUCE  Q(pnppar)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  Q(pnppar5x)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  D  PARALLEL [ TOLERANCE a 1 p 1 ]
+   LVS REDUCE  D  SERIES POS NEG NO
+   LVS REDUCE  C(xcmimc1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  C(xcmimc2)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R(mrp1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  SERIES POS NEG NO
+   LVS REDUCE  R(short)  PARALLEL
+   LVS REDUCE  R(short)  SERIES POS NEG NO
+   LVS REDUCE  R(fuse)  PARALLEL NO
+   LVS REDUCE  R(fuse)  SERIES POS NEG NO
+   LVS REDUCE  R(metop)  PARALLEL [ TOLERANCE metopNumber 0 ]
+   LVS REDUCE  R(metop)  SERIES POS NEG NO
+   LVS REDUCTION PRIORITY                 PARALLEL
+   
+   LVS SHORT EQUIVALENT NODES             NO
+
+   // Filter
+
+   LVS FILTER  R(cds_thru)  SHORT SOURCE
+   LVS FILTER  R(cds_thru)  SHORT LAYOUT
+   LVS FILTER  Dpar  OPEN SOURCE
+   LVS FILTER  Dpar  OPEN LAYOUT
+   LVS FILTER  Probe  OPEN SOURCE
+   LVS FILTER  Probe  OPEN LAYOUT
+   LVS FILTER  icecap  OPEN SOURCE
+   LVS FILTER  s8fmlt_iref_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_neg_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_vdac_termx  OPEN SOURCE
+   LVS FILTER  D  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN LAYOUT
+   LVS FILTER  tap_dev  OPEN SOURCE
+   LVS FILTER  tap_dev  OPEN LAYOUT
+   LVS FILTER  cad_dummy_open_device  OPEN SOURCE
+   LVS FILTER  cad_dummy_open_device  OPEN LAYOUT
+
+   // Trace Property
+
+   TRACE PROPERTY  xcnwvc  m m 0
+   TRACE PROPERTY  xcnwvc  w w 0
+   TRACE PROPERTY  xcnwvc  l l 0
+   TRACE PROPERTY  xcnwvc2  m m 0
+   TRACE PROPERTY  xcnwvc2  w w 0
+   TRACE PROPERTY  xcnwvc2  l l 0
+   TRACE PROPERTY  xchvnwc  m m 0
+   TRACE PROPERTY  q(npnpar1x1)  m m 0
+   TRACE PROPERTY  q(npnpar1x2)  m m 0
+   TRACE PROPERTY  q(npn_1x1_2p0_hv)  m m 0
+   TRACE PROPERTY  q(pnppar)  barea barea 0
+   TRACE PROPERTY  q(pnppar)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar)  earea earea 0
+   TRACE PROPERTY  q(pnppar)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar)  m m 0
+   TRACE PROPERTY  q(pnppar5x)  barea barea 0
+   TRACE PROPERTY  q(pnppar5x)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar5x)  earea earea 0
+   TRACE PROPERTY  q(pnppar5x)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar5x)  m m 0
+   TRACE PROPERTY  d(ndiode)  a a 1
+   TRACE PROPERTY  d(ndiode)  p p 1
+   TRACE PROPERTY  d(ndiode)  m m 0
+   TRACE PROPERTY  d(ndiode_h)  a a 1
+   TRACE PROPERTY  d(ndiode_h)  p p 1
+   TRACE PROPERTY  d(ndiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  m m 0
+   TRACE PROPERTY  d(pdiode)  a a 1
+   TRACE PROPERTY  d(pdiode)  p p 1
+   TRACE PROPERTY  d(pdiode)  m m 0
+   TRACE PROPERTY  d(pdiode_h)  a a 1
+   TRACE PROPERTY  d(pdiode_h)  p p 1
+   TRACE PROPERTY  d(pdiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub)  a a 1
+   TRACE PROPERTY  d(dnwdiode_psub)  p p 1
+   TRACE PROPERTY  d(dnwdiode_psub)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  m m 0
+   TRACE PROPERTY  xcmvpp  m m 0
+   TRACE PROPERTY  xcmvpp_2  m m 0
+   TRACE PROPERTY  xcmvpp2_nhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp2_phv5x4  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap2_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l40  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l20  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l10  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x1  m m 0
+   TRACE PROPERTY  xcmvppx4_2xnhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym50p4shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m5shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_lim4shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m4shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4m5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp5  m m 0
+   TRACE PROPERTY  xcmvpp4  m m 0
+   TRACE PROPERTY  xcmvpp3  m m 0
+   TRACE PROPERTY  r(mrdn)  w w 1
+   TRACE PROPERTY  r(mrdn)  l l 1
+   TRACE PROPERTY  r(mrdn)  m m 0
+   TRACE PROPERTY  r(mrdn_hv)  w w 1
+   TRACE PROPERTY  r(mrdn_hv)  l l 1
+   TRACE PROPERTY  r(mrdn_hv)  m m 0
+   TRACE PROPERTY  r(mrdp)  w w 1
+   TRACE PROPERTY  r(mrdp)  l l 1
+   TRACE PROPERTY  r(mrdp)  m m 0
+   TRACE PROPERTY  r(mrdp_hv)  w w 1
+   TRACE PROPERTY  r(mrdp_hv)  l l 1
+   TRACE PROPERTY  r(mrdp_hv)  m m 0
+   TRACE PROPERTY  r(mrl1)  w w 1
+   TRACE PROPERTY  r(mrl1)  l l 1
+   TRACE PROPERTY  r(mrl1)  m m 0
+   TRACE PROPERTY  r(xpwres)  w w 1
+   TRACE PROPERTY  r(xpwres)  l l 1
+   TRACE PROPERTY  r(xpwres)  m m 0
+   TRACE PROPERTY  r(short)  m m 0
+   TRACE PROPERTY  r(fuse)  w w 1
+   TRACE PROPERTY  r(fuse)  l l 1
+   TRACE PROPERTY  r(fuse)  m m 0
+   TRACE PROPERTY  r(metop)  metopnumber metopnumber 0
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  m m 0
+   TRACE PROPERTY  d(nwdiode_victim)  a a 10
+   TRACE PROPERTY  d(nwdiode_victim)  p p 10
+   TRACE PROPERTY  d(nwdiode_victim)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  m m 0
+   TRACE PROPERTY  d(nwdiode_aggressor)  a a 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  p p 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  m m 0
+
+   // User Trace Property
+
+   TRACE PROPERTY  mn(nshort)  m mult w l
+   TRACE PROPERTY  mn(npass)  m mult w l
+   TRACE PROPERTY  mn(nlowvt)  m mult w l
+   TRACE PROPERTY  m(sonos_e)  m mult w l
+   TRACE PROPERTY  m  m mult w l
+   TRACE PROPERTY  m(fnpass)  m mult w l
+   TRACE PROPERTY  mn(nhv)  m mult w l
+   TRACE PROPERTY  mn(nhvnative)  m mult w l
+   TRACE PROPERTY  mn(ntvnative)  m mult w l
+   TRACE PROPERTY  mp(pshort)  m mult w l
+   TRACE PROPERTY  mp  m mult w l
+   TRACE PROPERTY  mp(phighvt)  m mult w l
+   TRACE PROPERTY  mp(plowvt)  m mult w l
+   TRACE PROPERTY  mp(phv)  m mult w l
+   TRACE PROPERTY  mn(nshortesd)  m mult w l
+   TRACE PROPERTY  mn(nhvesd)  m mult w l
+   TRACE PROPERTY  mn(nhvnativeesd)  m mult w l
+   TRACE PROPERTY  mp(phvesd)  m mult w l
+   TRACE PROPERTY  nvhv  m mult w l
+   TRACE PROPERTY  n20vhv1  m mult w l
+   TRACE PROPERTY  n20nativevhv1  m mult w l
+   TRACE PROPERTY  n20vhviso1  m mult w l
+   TRACE PROPERTY  n20nativevhviso1  m mult w l
+   TRACE PROPERTY  pvhv  m mult w l
+   TRACE PROPERTY  p20vhv1  m mult w l
+   TRACE PROPERTY  c(xcmimc1)  w l m
+   TRACE PROPERTY  c(xcmimc2)  w l m
+   TRACE PROPERTY  r(mrp1)  m w l
+   TRACE PROPERTY  xhrpoly_0p35  m w l
+   TRACE PROPERTY  xuhrpoly_0p35  m w l
+   TRACE PROPERTY  xhrpoly_0p69  m w l
+   TRACE PROPERTY  xuhrpoly_0p69  m w l
+   TRACE PROPERTY  xhrpoly_1p41  m w l
+   TRACE PROPERTY  xuhrpoly_1p41  m w l
+   TRACE PROPERTY  xhrpoly_2p85  m w l
+   TRACE PROPERTY  xuhrpoly_2p85  m w l
+
+
+
+                   CELL COMPARISON RESULTS ( TOP LEVEL )
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+LAYOUT CELL NAME:         sky130_fd_sc_hdll__a21oi_1
+SOURCE CELL NAME:         sky130_fd_sc_hdll__a21oi_1
+
+--------------------------------------------------------------------------------------------------------------
+
+INITIAL NUMBERS OF OBJECTS
+--------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:              8         8
+
+ Nets:              10        10
+
+ Instances:          3         3         MN (4 pins)
+                     3         3         MP (4 pins)
+                     1         0    *    Dpar (2 pins)
+                ------    ------
+ Total Inst:         7         6
+
+
+NUMBERS OF OBJECTS AFTER TRANSFORMATION
+---------------------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:              8         8
+
+ Nets:               8         8
+
+ Instances:          1         1         MN (4 pins)
+                     1         1         SMN2 (4 pins)
+                     1         1         SPMP_2_1 (5 pins)
+                ------    ------
+ Total Inst:         3         3
+
+
+       * = Number of objects in layout different from number in source.
+
+
+
+**************************************************************************************************************
+                               INFORMATION AND WARNINGS
+**************************************************************************************************************
+
+
+                  Matched    Matched    Unmatched    Unmatched    Component
+                   Layout     Source       Layout       Source    Type
+                  -------    -------    ---------    ---------    ---------
+   Ports:               8          8            0            0
+
+   Nets:                8          8            0            0
+
+   Instances:           1          1            0            0    MN(NSHORT)
+                        1          1            0            0    SMN2
+                        1          1            0            0    SPMP_2_1
+                  -------    -------    ---------    ---------
+   Total Inst:          3          3            0            0
+
+
+o Statistics:
+
+   1 layout instance was filtered and its pins removed from adjoining nets.
+
+
+o Initial Correspondence Points:
+
+   Ports:        VNB VPB B1 A1 A2 Y VPWR VGND
+
+
+**************************************************************************************************************
+                                         SUMMARY
+**************************************************************************************************************
+
+Total CPU Time:      0 sec
+Total Elapsed Time:  0 sec
diff --git a/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.pex.spice b/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.pex.spice
index 981367f..b2f90e8 100644
--- a/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.pex.spice
+++ b/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.pex.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21oi_1.pex.spice
-* Created: Thu Aug 27 18:53:16 2020
+* Created: Wed Sep  2 08:17:41 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * Nominal Temperature: 27C
diff --git a/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.pxi.spice b/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.pxi.spice
index 0a541c4..909b248 100644
--- a/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.pxi.spice
+++ b/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.pxi.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21oi_1.pxi.spice
-* Created: Thu Aug 27 18:53:16 2020
+* Created: Wed Sep  2 08:17:41 2020
 * 
 x_PM_SKY130_FD_SC_HDLL__A21OI_1%B1 N_B1_c_38_n N_B1_M1000_g N_B1_c_35_n
 + N_B1_M1001_g B1 B1 N_B1_c_37_n PM_SKY130_FD_SC_HDLL__A21OI_1%B1
diff --git a/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.spice b/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.spice
index 29bfda5..f399824 100644
--- a/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.spice
+++ b/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21oi_1.spice
-* Created: Thu Aug 27 18:53:16 2020
+* Created: Wed Sep  2 08:17:41 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * 
diff --git a/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.lvs.report b/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.lvs.report
new file mode 100644
index 0000000..5b5ffb1
--- /dev/null
+++ b/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.lvs.report
@@ -0,0 +1,493 @@
+
+LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.spice"
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------
+
+Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.spice"
+
+
+
+
+                  ##################################################
+                  ##                                              ##
+                  ##         C A L I B R E    S Y S T E M         ##
+                  ##                                              ##
+                  ##             L V S   R E P O R T              ##
+                  ##                                              ##
+                  ##################################################
+
+
+
+REPORT FILE NAME:         sky130_fd_sc_hdll__a21oi_2.lvs.report
+LAYOUT NAME:              svdb/sky130_fd_sc_hdll__a21oi_2.sp ('sky130_fd_sc_hdll__a21oi_2')
+SOURCE NAME:              /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.spice ('sky130_fd_sc_hdll__a21oi_2')
+RULE FILE:                /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_
+CREATION TIME:            Wed Sep  2 08:17:45 2020
+CURRENT DIRECTORY:        /home/hlusk/repos/SkyWater/osugooglelib/calibre
+USER NAME:                hlusk
+CALIBRE VERSION:          v2018.4_34.26    Mon Dec 3 14:40:54 PST 2018
+
+
+
+                               OVERALL COMPARISON RESULTS
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+
+**************************************************************************************************************
+                                      CELL  SUMMARY
+**************************************************************************************************************
+
+  Result         Layout                        Source
+  -----------    -----------                   --------------
+  CORRECT        sky130_fd_sc_hdll__a21oi_2    sky130_fd_sc_hdll__a21oi_2
+
+
+
+**************************************************************************************************************
+                                      LVS PARAMETERS
+**************************************************************************************************************
+
+
+o LVS Setup:
+
+   // LVS COMPONENT TYPE PROPERTY
+   // LVS COMPONENT SUBTYPE PROPERTY
+   // LVS PIN NAME PROPERTY
+   // LVS POWER NAME
+   // LVS GROUND NAME
+   LVS CELL SUPPLY                        NO
+   LVS RECOGNIZE GATES                    ALL
+   LVS IGNORE PORTS                       NO
+   LVS CHECK PORT NAMES                   YES
+   LVS IGNORE TRIVIAL NAMED PORTS         NO
+   LVS BUILTIN DEVICE PIN SWAP            YES
+   LVS ALL CAPACITOR PINS SWAPPABLE       NO
+   LVS DISCARD PINS BY DEVICE             YES
+   LVS SOFT SUBSTRATE PINS                NO
+   LVS INJECT LOGIC                       NO
+   LVS EXPAND UNBALANCED CELLS            YES
+   LVS FLATTEN INSIDE CELL                NO
+   LVS EXPAND SEED PROMOTIONS             NO
+   LVS PRESERVE PARAMETERIZED CELLS       NO
+   LVS GLOBALS ARE PORTS                  YES
+   LVS REVERSE WL                         NO
+   LVS SPICE PREFER PINS                  YES
+   LVS SPICE SLASH IS SPACE               NO
+   LVS SPICE ALLOW FLOATING PINS          YES
+   LVS SPICE ALLOW INLINE PARAMETERS      NO
+   LVS SPICE ALLOW UNQUOTED STRINGS       YES
+   LVS SPICE CONDITIONAL LDD              NO
+   LVS SPICE CULL PRIMITIVE SUBCIRCUITS   NO
+   // LVS SPICE EXCLUDE CELL SOURCE
+   // LVS SPICE EXCLUDE CELL LAYOUT
+   LVS SPICE IMPLIED MOS AREA             NO
+   // LVS SPICE MULTIPLIER NAME
+   LVS SPICE OVERRIDE GLOBALS             YES
+   LVS SPICE REDEFINE PARAM               YES
+   LVS SPICE REPLICATE DEVICES            YES
+   LVS SPICE SCALE X PARAMETERS           NO
+   LVS SPICE STRICT WL                    YES
+   // LVS SPICE OPTION
+   LVS STRICT SUBTYPES                    YES
+   LVS EXACT SUBTYPES                     NO
+   LAYOUT CASE                            NO
+   SOURCE CASE                            NO
+   LVS COMPARE CASE                       NO
+   LVS DOWNCASE DEVICE                    NO
+   LVS REPORT MAXIMUM                     50
+   LVS PROPERTY RESOLUTION MAXIMUM        ALL
+   LVS SIGNATURE MAXIMUM                  ALL
+   // LVS FILTER UNUSED OPTION
+   // LVS REPORT OPTION
+   LVS REPORT UNITS                       YES
+   // LVS NON USER NAME PORT
+   LVS NON USER NAME NET                  "^n[0-9]*$" "^net[0-9]*$"
+   // LVS NON USER NAME INSTANCE
+   // LVS IGNORE DEVICE PIN
+   // LVS PREFER NETS FILTER SOURCE
+   // LVS PREFER NETS FILTER LAYOUT
+
+   // Device Type Map
+
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_2p85" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT
+
+   // Reduction
+
+   LVS REDUCE SERIES MOS                  NO
+   LVS REDUCE PARALLEL MOS                NO
+   LVS REDUCE SEMI SERIES MOS             NO
+   LVS REDUCE SPLIT GATES                 YES [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE PARALLEL BIPOLAR            NO
+   LVS REDUCE SERIES CAPACITORS           NO
+   LVS REDUCE PARALLEL CAPACITORS         NO
+   LVS REDUCE SERIES RESISTORS            NO
+   LVS REDUCE PARALLEL RESISTORS          NO
+   LVS REDUCE PARALLEL DIODES             NO
+
+   LVS REDUCE  condiode  PARALLEL
+   LVS REDUCE  condiodeHvPsub  PARALLEL
+   LVS REDUCE  p20vhv1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  n20vhviso1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  nvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  pvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MP  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  M  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MN  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  Q(npnpar1x1)  PARALLEL
+   LVS REDUCE  Q(npnpar1x2)  PARALLEL
+   LVS REDUCE  Q(npn_1x1_2p0_hv)  PARALLEL
+   LVS REDUCE  Q(pnppar)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  Q(pnppar5x)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  D  PARALLEL [ TOLERANCE a 1 p 1 ]
+   LVS REDUCE  D  SERIES POS NEG NO
+   LVS REDUCE  C(xcmimc1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  C(xcmimc2)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R(mrp1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  SERIES POS NEG NO
+   LVS REDUCE  R(short)  PARALLEL
+   LVS REDUCE  R(short)  SERIES POS NEG NO
+   LVS REDUCE  R(fuse)  PARALLEL NO
+   LVS REDUCE  R(fuse)  SERIES POS NEG NO
+   LVS REDUCE  R(metop)  PARALLEL [ TOLERANCE metopNumber 0 ]
+   LVS REDUCE  R(metop)  SERIES POS NEG NO
+   LVS REDUCTION PRIORITY                 PARALLEL
+   
+   LVS SHORT EQUIVALENT NODES             NO
+
+   // Filter
+
+   LVS FILTER  R(cds_thru)  SHORT SOURCE
+   LVS FILTER  R(cds_thru)  SHORT LAYOUT
+   LVS FILTER  Dpar  OPEN SOURCE
+   LVS FILTER  Dpar  OPEN LAYOUT
+   LVS FILTER  Probe  OPEN SOURCE
+   LVS FILTER  Probe  OPEN LAYOUT
+   LVS FILTER  icecap  OPEN SOURCE
+   LVS FILTER  s8fmlt_iref_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_neg_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_vdac_termx  OPEN SOURCE
+   LVS FILTER  D  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN LAYOUT
+   LVS FILTER  tap_dev  OPEN SOURCE
+   LVS FILTER  tap_dev  OPEN LAYOUT
+   LVS FILTER  cad_dummy_open_device  OPEN SOURCE
+   LVS FILTER  cad_dummy_open_device  OPEN LAYOUT
+
+   // Trace Property
+
+   TRACE PROPERTY  xcnwvc  m m 0
+   TRACE PROPERTY  xcnwvc  w w 0
+   TRACE PROPERTY  xcnwvc  l l 0
+   TRACE PROPERTY  xcnwvc2  m m 0
+   TRACE PROPERTY  xcnwvc2  w w 0
+   TRACE PROPERTY  xcnwvc2  l l 0
+   TRACE PROPERTY  xchvnwc  m m 0
+   TRACE PROPERTY  q(npnpar1x1)  m m 0
+   TRACE PROPERTY  q(npnpar1x2)  m m 0
+   TRACE PROPERTY  q(npn_1x1_2p0_hv)  m m 0
+   TRACE PROPERTY  q(pnppar)  barea barea 0
+   TRACE PROPERTY  q(pnppar)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar)  earea earea 0
+   TRACE PROPERTY  q(pnppar)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar)  m m 0
+   TRACE PROPERTY  q(pnppar5x)  barea barea 0
+   TRACE PROPERTY  q(pnppar5x)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar5x)  earea earea 0
+   TRACE PROPERTY  q(pnppar5x)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar5x)  m m 0
+   TRACE PROPERTY  d(ndiode)  a a 1
+   TRACE PROPERTY  d(ndiode)  p p 1
+   TRACE PROPERTY  d(ndiode)  m m 0
+   TRACE PROPERTY  d(ndiode_h)  a a 1
+   TRACE PROPERTY  d(ndiode_h)  p p 1
+   TRACE PROPERTY  d(ndiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  m m 0
+   TRACE PROPERTY  d(pdiode)  a a 1
+   TRACE PROPERTY  d(pdiode)  p p 1
+   TRACE PROPERTY  d(pdiode)  m m 0
+   TRACE PROPERTY  d(pdiode_h)  a a 1
+   TRACE PROPERTY  d(pdiode_h)  p p 1
+   TRACE PROPERTY  d(pdiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub)  a a 1
+   TRACE PROPERTY  d(dnwdiode_psub)  p p 1
+   TRACE PROPERTY  d(dnwdiode_psub)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  m m 0
+   TRACE PROPERTY  xcmvpp  m m 0
+   TRACE PROPERTY  xcmvpp_2  m m 0
+   TRACE PROPERTY  xcmvpp2_nhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp2_phv5x4  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap2_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l40  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l20  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l10  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x1  m m 0
+   TRACE PROPERTY  xcmvppx4_2xnhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym50p4shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m5shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_lim4shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m4shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4m5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp5  m m 0
+   TRACE PROPERTY  xcmvpp4  m m 0
+   TRACE PROPERTY  xcmvpp3  m m 0
+   TRACE PROPERTY  r(mrdn)  w w 1
+   TRACE PROPERTY  r(mrdn)  l l 1
+   TRACE PROPERTY  r(mrdn)  m m 0
+   TRACE PROPERTY  r(mrdn_hv)  w w 1
+   TRACE PROPERTY  r(mrdn_hv)  l l 1
+   TRACE PROPERTY  r(mrdn_hv)  m m 0
+   TRACE PROPERTY  r(mrdp)  w w 1
+   TRACE PROPERTY  r(mrdp)  l l 1
+   TRACE PROPERTY  r(mrdp)  m m 0
+   TRACE PROPERTY  r(mrdp_hv)  w w 1
+   TRACE PROPERTY  r(mrdp_hv)  l l 1
+   TRACE PROPERTY  r(mrdp_hv)  m m 0
+   TRACE PROPERTY  r(mrl1)  w w 1
+   TRACE PROPERTY  r(mrl1)  l l 1
+   TRACE PROPERTY  r(mrl1)  m m 0
+   TRACE PROPERTY  r(xpwres)  w w 1
+   TRACE PROPERTY  r(xpwres)  l l 1
+   TRACE PROPERTY  r(xpwres)  m m 0
+   TRACE PROPERTY  r(short)  m m 0
+   TRACE PROPERTY  r(fuse)  w w 1
+   TRACE PROPERTY  r(fuse)  l l 1
+   TRACE PROPERTY  r(fuse)  m m 0
+   TRACE PROPERTY  r(metop)  metopnumber metopnumber 0
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  m m 0
+   TRACE PROPERTY  d(nwdiode_victim)  a a 10
+   TRACE PROPERTY  d(nwdiode_victim)  p p 10
+   TRACE PROPERTY  d(nwdiode_victim)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  m m 0
+   TRACE PROPERTY  d(nwdiode_aggressor)  a a 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  p p 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  m m 0
+
+   // User Trace Property
+
+   TRACE PROPERTY  mn(nshort)  m mult w l
+   TRACE PROPERTY  mn(npass)  m mult w l
+   TRACE PROPERTY  mn(nlowvt)  m mult w l
+   TRACE PROPERTY  m(sonos_e)  m mult w l
+   TRACE PROPERTY  m  m mult w l
+   TRACE PROPERTY  m(fnpass)  m mult w l
+   TRACE PROPERTY  mn(nhv)  m mult w l
+   TRACE PROPERTY  mn(nhvnative)  m mult w l
+   TRACE PROPERTY  mn(ntvnative)  m mult w l
+   TRACE PROPERTY  mp(pshort)  m mult w l
+   TRACE PROPERTY  mp  m mult w l
+   TRACE PROPERTY  mp(phighvt)  m mult w l
+   TRACE PROPERTY  mp(plowvt)  m mult w l
+   TRACE PROPERTY  mp(phv)  m mult w l
+   TRACE PROPERTY  mn(nshortesd)  m mult w l
+   TRACE PROPERTY  mn(nhvesd)  m mult w l
+   TRACE PROPERTY  mn(nhvnativeesd)  m mult w l
+   TRACE PROPERTY  mp(phvesd)  m mult w l
+   TRACE PROPERTY  nvhv  m mult w l
+   TRACE PROPERTY  n20vhv1  m mult w l
+   TRACE PROPERTY  n20nativevhv1  m mult w l
+   TRACE PROPERTY  n20vhviso1  m mult w l
+   TRACE PROPERTY  n20nativevhviso1  m mult w l
+   TRACE PROPERTY  pvhv  m mult w l
+   TRACE PROPERTY  p20vhv1  m mult w l
+   TRACE PROPERTY  c(xcmimc1)  w l m
+   TRACE PROPERTY  c(xcmimc2)  w l m
+   TRACE PROPERTY  r(mrp1)  m w l
+   TRACE PROPERTY  xhrpoly_0p35  m w l
+   TRACE PROPERTY  xuhrpoly_0p35  m w l
+   TRACE PROPERTY  xhrpoly_0p69  m w l
+   TRACE PROPERTY  xuhrpoly_0p69  m w l
+   TRACE PROPERTY  xhrpoly_1p41  m w l
+   TRACE PROPERTY  xuhrpoly_1p41  m w l
+   TRACE PROPERTY  xhrpoly_2p85  m w l
+   TRACE PROPERTY  xuhrpoly_2p85  m w l
+
+
+
+                   CELL COMPARISON RESULTS ( TOP LEVEL )
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+LAYOUT CELL NAME:         sky130_fd_sc_hdll__a21oi_2
+SOURCE CELL NAME:         sky130_fd_sc_hdll__a21oi_2
+
+--------------------------------------------------------------------------------------------------------------
+
+INITIAL NUMBERS OF OBJECTS
+--------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:              8         8
+
+ Nets:              12        11    *
+
+ Instances:          6         6         MN (4 pins)
+                     6         6         MP (4 pins)
+                     1         0    *    Dpar (2 pins)
+                     1         0    *    Probe (2 pins)
+                ------    ------
+ Total Inst:        14        12
+
+
+NUMBERS OF OBJECTS AFTER TRANSFORMATION
+---------------------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:              8         8
+
+ Nets:               8         8
+
+ Instances:          1         1         MN (4 pins)
+                     1         1         SMN2 (4 pins)
+                     1         1         SPMP_2_1 (5 pins)
+                ------    ------
+ Total Inst:         3         3
+
+
+       * = Number of objects in layout different from number in source.
+
+
+
+**************************************************************************************************************
+                               INFORMATION AND WARNINGS
+**************************************************************************************************************
+
+
+                  Matched    Matched    Unmatched    Unmatched    Component
+                   Layout     Source       Layout       Source    Type
+                  -------    -------    ---------    ---------    ---------
+   Ports:               8          8            0            0
+
+   Nets:                8          8            0            0
+
+   Instances:           1          1            0            0    MN(NSHORT)
+                        1          1            0            0    SMN2
+                        1          1            0            0    SPMP_2_1
+                  -------    -------    ---------    ---------
+   Total Inst:          3          3            0            0
+
+
+o Statistics:
+
+   2 layout instances were filtered and their pins removed from adjoining nets.
+
+   12 layout mos transistors were reduced to 6.  1 connecting net was deleted.
+     4 mos transistors were deleted by parallel reduction.
+     2 mos transistors and 1 connecting net were deleted by split-gate reduction.
+   12 source mos transistors were reduced to 6.  1 connecting net was deleted.
+     4 mos transistors were deleted by parallel reduction.
+     2 mos transistors and 1 connecting net were deleted by split-gate reduction.
+
+   1 layout net had all its pins removed and was deleted.
+
+
+o Initial Correspondence Points:
+
+   Ports:        VNB VPB A2 A1 B1 VPWR Y VGND
+
+
+**************************************************************************************************************
+                                         SUMMARY
+**************************************************************************************************************
+
+Total CPU Time:      0 sec
+Total Elapsed Time:  0 sec
diff --git a/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.pex.spice b/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.pex.spice
index a04c60f..70b5df0 100644
--- a/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.pex.spice
+++ b/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.pex.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21oi_2.pex.spice
-* Created: Thu Aug 27 18:53:23 2020
+* Created: Wed Sep  2 08:17:48 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * Nominal Temperature: 27C
diff --git a/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.pxi.spice b/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.pxi.spice
index 0b2d819..286cfc3 100644
--- a/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.pxi.spice
+++ b/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.pxi.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21oi_2.pxi.spice
-* Created: Thu Aug 27 18:53:23 2020
+* Created: Wed Sep  2 08:17:48 2020
 * 
 x_PM_SKY130_FD_SC_HDLL__A21OI_2%A2 N_A2_c_50_n N_A2_M1000_g N_A2_M1003_g
 + N_A2_c_52_n N_A2_M1007_g N_A2_c_53_n N_A2_M1011_g N_A2_c_62_p N_A2_c_54_n A2
diff --git a/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.spice b/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.spice
index 83aeb27..16b87f9 100644
--- a/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.spice
+++ b/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21oi_2.spice
-* Created: Thu Aug 27 18:53:23 2020
+* Created: Wed Sep  2 08:17:48 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * 
diff --git a/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.lvs.report b/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.lvs.report
new file mode 100644
index 0000000..c872ac4
--- /dev/null
+++ b/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.lvs.report
@@ -0,0 +1,503 @@
+
+LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice"
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------
+
+Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice"
+
+
+
+
+                  ##################################################
+                  ##                                              ##
+                  ##         C A L I B R E    S Y S T E M         ##
+                  ##                                              ##
+                  ##             L V S   R E P O R T              ##
+                  ##                                              ##
+                  ##################################################
+
+
+
+REPORT FILE NAME:         sky130_fd_sc_hdll__a21oi_4.lvs.report
+LAYOUT NAME:              svdb/sky130_fd_sc_hdll__a21oi_4.sp ('sky130_fd_sc_hdll__a21oi_4')
+SOURCE NAME:              /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice ('sky130_fd_sc_hdll__a21oi_4')
+RULE FILE:                /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_
+CREATION TIME:            Wed Sep  2 08:17:52 2020
+CURRENT DIRECTORY:        /home/hlusk/repos/SkyWater/osugooglelib/calibre
+USER NAME:                hlusk
+CALIBRE VERSION:          v2018.4_34.26    Mon Dec 3 14:40:54 PST 2018
+
+
+
+                               OVERALL COMPARISON RESULTS
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+
+**************************************************************************************************************
+                                      CELL  SUMMARY
+**************************************************************************************************************
+
+  Result         Layout                        Source
+  -----------    -----------                   --------------
+  CORRECT        sky130_fd_sc_hdll__a21oi_4    sky130_fd_sc_hdll__a21oi_4
+
+
+
+**************************************************************************************************************
+                                      LVS PARAMETERS
+**************************************************************************************************************
+
+
+o LVS Setup:
+
+   // LVS COMPONENT TYPE PROPERTY
+   // LVS COMPONENT SUBTYPE PROPERTY
+   // LVS PIN NAME PROPERTY
+   // LVS POWER NAME
+   // LVS GROUND NAME
+   LVS CELL SUPPLY                        NO
+   LVS RECOGNIZE GATES                    ALL
+   LVS IGNORE PORTS                       NO
+   LVS CHECK PORT NAMES                   YES
+   LVS IGNORE TRIVIAL NAMED PORTS         NO
+   LVS BUILTIN DEVICE PIN SWAP            YES
+   LVS ALL CAPACITOR PINS SWAPPABLE       NO
+   LVS DISCARD PINS BY DEVICE             YES
+   LVS SOFT SUBSTRATE PINS                NO
+   LVS INJECT LOGIC                       NO
+   LVS EXPAND UNBALANCED CELLS            YES
+   LVS FLATTEN INSIDE CELL                NO
+   LVS EXPAND SEED PROMOTIONS             NO
+   LVS PRESERVE PARAMETERIZED CELLS       NO
+   LVS GLOBALS ARE PORTS                  YES
+   LVS REVERSE WL                         NO
+   LVS SPICE PREFER PINS                  YES
+   LVS SPICE SLASH IS SPACE               NO
+   LVS SPICE ALLOW FLOATING PINS          YES
+   LVS SPICE ALLOW INLINE PARAMETERS      NO
+   LVS SPICE ALLOW UNQUOTED STRINGS       YES
+   LVS SPICE CONDITIONAL LDD              NO
+   LVS SPICE CULL PRIMITIVE SUBCIRCUITS   NO
+   // LVS SPICE EXCLUDE CELL SOURCE
+   // LVS SPICE EXCLUDE CELL LAYOUT
+   LVS SPICE IMPLIED MOS AREA             NO
+   // LVS SPICE MULTIPLIER NAME
+   LVS SPICE OVERRIDE GLOBALS             YES
+   LVS SPICE REDEFINE PARAM               YES
+   LVS SPICE REPLICATE DEVICES            YES
+   LVS SPICE SCALE X PARAMETERS           NO
+   LVS SPICE STRICT WL                    YES
+   // LVS SPICE OPTION
+   LVS STRICT SUBTYPES                    YES
+   LVS EXACT SUBTYPES                     NO
+   LAYOUT CASE                            NO
+   SOURCE CASE                            NO
+   LVS COMPARE CASE                       NO
+   LVS DOWNCASE DEVICE                    NO
+   LVS REPORT MAXIMUM                     50
+   LVS PROPERTY RESOLUTION MAXIMUM        ALL
+   LVS SIGNATURE MAXIMUM                  ALL
+   // LVS FILTER UNUSED OPTION
+   // LVS REPORT OPTION
+   LVS REPORT UNITS                       YES
+   // LVS NON USER NAME PORT
+   LVS NON USER NAME NET                  "^n[0-9]*$" "^net[0-9]*$"
+   // LVS NON USER NAME INSTANCE
+   // LVS IGNORE DEVICE PIN
+   // LVS PREFER NETS FILTER SOURCE
+   // LVS PREFER NETS FILTER LAYOUT
+
+   // Device Type Map
+
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_2p85" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT
+
+   // Reduction
+
+   LVS REDUCE SERIES MOS                  NO
+   LVS REDUCE PARALLEL MOS                NO
+   LVS REDUCE SEMI SERIES MOS             NO
+   LVS REDUCE SPLIT GATES                 YES [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE PARALLEL BIPOLAR            NO
+   LVS REDUCE SERIES CAPACITORS           NO
+   LVS REDUCE PARALLEL CAPACITORS         NO
+   LVS REDUCE SERIES RESISTORS            NO
+   LVS REDUCE PARALLEL RESISTORS          NO
+   LVS REDUCE PARALLEL DIODES             NO
+
+   LVS REDUCE  condiode  PARALLEL
+   LVS REDUCE  condiodeHvPsub  PARALLEL
+   LVS REDUCE  p20vhv1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  n20vhviso1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  nvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  pvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MP  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  M  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MN  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  Q(npnpar1x1)  PARALLEL
+   LVS REDUCE  Q(npnpar1x2)  PARALLEL
+   LVS REDUCE  Q(npn_1x1_2p0_hv)  PARALLEL
+   LVS REDUCE  Q(pnppar)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  Q(pnppar5x)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  D  PARALLEL [ TOLERANCE a 1 p 1 ]
+   LVS REDUCE  D  SERIES POS NEG NO
+   LVS REDUCE  C(xcmimc1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  C(xcmimc2)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R(mrp1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  SERIES POS NEG NO
+   LVS REDUCE  R(short)  PARALLEL
+   LVS REDUCE  R(short)  SERIES POS NEG NO
+   LVS REDUCE  R(fuse)  PARALLEL NO
+   LVS REDUCE  R(fuse)  SERIES POS NEG NO
+   LVS REDUCE  R(metop)  PARALLEL [ TOLERANCE metopNumber 0 ]
+   LVS REDUCE  R(metop)  SERIES POS NEG NO
+   LVS REDUCTION PRIORITY                 PARALLEL
+   
+   LVS SHORT EQUIVALENT NODES             NO
+
+   // Filter
+
+   LVS FILTER  R(cds_thru)  SHORT SOURCE
+   LVS FILTER  R(cds_thru)  SHORT LAYOUT
+   LVS FILTER  Dpar  OPEN SOURCE
+   LVS FILTER  Dpar  OPEN LAYOUT
+   LVS FILTER  Probe  OPEN SOURCE
+   LVS FILTER  Probe  OPEN LAYOUT
+   LVS FILTER  icecap  OPEN SOURCE
+   LVS FILTER  s8fmlt_iref_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_neg_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_vdac_termx  OPEN SOURCE
+   LVS FILTER  D  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN LAYOUT
+   LVS FILTER  tap_dev  OPEN SOURCE
+   LVS FILTER  tap_dev  OPEN LAYOUT
+   LVS FILTER  cad_dummy_open_device  OPEN SOURCE
+   LVS FILTER  cad_dummy_open_device  OPEN LAYOUT
+
+   // Trace Property
+
+   TRACE PROPERTY  xcnwvc  m m 0
+   TRACE PROPERTY  xcnwvc  w w 0
+   TRACE PROPERTY  xcnwvc  l l 0
+   TRACE PROPERTY  xcnwvc2  m m 0
+   TRACE PROPERTY  xcnwvc2  w w 0
+   TRACE PROPERTY  xcnwvc2  l l 0
+   TRACE PROPERTY  xchvnwc  m m 0
+   TRACE PROPERTY  q(npnpar1x1)  m m 0
+   TRACE PROPERTY  q(npnpar1x2)  m m 0
+   TRACE PROPERTY  q(npn_1x1_2p0_hv)  m m 0
+   TRACE PROPERTY  q(pnppar)  barea barea 0
+   TRACE PROPERTY  q(pnppar)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar)  earea earea 0
+   TRACE PROPERTY  q(pnppar)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar)  m m 0
+   TRACE PROPERTY  q(pnppar5x)  barea barea 0
+   TRACE PROPERTY  q(pnppar5x)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar5x)  earea earea 0
+   TRACE PROPERTY  q(pnppar5x)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar5x)  m m 0
+   TRACE PROPERTY  d(ndiode)  a a 1
+   TRACE PROPERTY  d(ndiode)  p p 1
+   TRACE PROPERTY  d(ndiode)  m m 0
+   TRACE PROPERTY  d(ndiode_h)  a a 1
+   TRACE PROPERTY  d(ndiode_h)  p p 1
+   TRACE PROPERTY  d(ndiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  m m 0
+   TRACE PROPERTY  d(pdiode)  a a 1
+   TRACE PROPERTY  d(pdiode)  p p 1
+   TRACE PROPERTY  d(pdiode)  m m 0
+   TRACE PROPERTY  d(pdiode_h)  a a 1
+   TRACE PROPERTY  d(pdiode_h)  p p 1
+   TRACE PROPERTY  d(pdiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub)  a a 1
+   TRACE PROPERTY  d(dnwdiode_psub)  p p 1
+   TRACE PROPERTY  d(dnwdiode_psub)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  m m 0
+   TRACE PROPERTY  xcmvpp  m m 0
+   TRACE PROPERTY  xcmvpp_2  m m 0
+   TRACE PROPERTY  xcmvpp2_nhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp2_phv5x4  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap2_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l40  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l20  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l10  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x1  m m 0
+   TRACE PROPERTY  xcmvppx4_2xnhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym50p4shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m5shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_lim4shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m4shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4m5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp5  m m 0
+   TRACE PROPERTY  xcmvpp4  m m 0
+   TRACE PROPERTY  xcmvpp3  m m 0
+   TRACE PROPERTY  r(mrdn)  w w 1
+   TRACE PROPERTY  r(mrdn)  l l 1
+   TRACE PROPERTY  r(mrdn)  m m 0
+   TRACE PROPERTY  r(mrdn_hv)  w w 1
+   TRACE PROPERTY  r(mrdn_hv)  l l 1
+   TRACE PROPERTY  r(mrdn_hv)  m m 0
+   TRACE PROPERTY  r(mrdp)  w w 1
+   TRACE PROPERTY  r(mrdp)  l l 1
+   TRACE PROPERTY  r(mrdp)  m m 0
+   TRACE PROPERTY  r(mrdp_hv)  w w 1
+   TRACE PROPERTY  r(mrdp_hv)  l l 1
+   TRACE PROPERTY  r(mrdp_hv)  m m 0
+   TRACE PROPERTY  r(mrl1)  w w 1
+   TRACE PROPERTY  r(mrl1)  l l 1
+   TRACE PROPERTY  r(mrl1)  m m 0
+   TRACE PROPERTY  r(xpwres)  w w 1
+   TRACE PROPERTY  r(xpwres)  l l 1
+   TRACE PROPERTY  r(xpwres)  m m 0
+   TRACE PROPERTY  r(short)  m m 0
+   TRACE PROPERTY  r(fuse)  w w 1
+   TRACE PROPERTY  r(fuse)  l l 1
+   TRACE PROPERTY  r(fuse)  m m 0
+   TRACE PROPERTY  r(metop)  metopnumber metopnumber 0
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  m m 0
+   TRACE PROPERTY  d(nwdiode_victim)  a a 10
+   TRACE PROPERTY  d(nwdiode_victim)  p p 10
+   TRACE PROPERTY  d(nwdiode_victim)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  m m 0
+   TRACE PROPERTY  d(nwdiode_aggressor)  a a 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  p p 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  m m 0
+
+   // User Trace Property
+
+   TRACE PROPERTY  mn(nshort)  m mult w l
+   TRACE PROPERTY  mn(npass)  m mult w l
+   TRACE PROPERTY  mn(nlowvt)  m mult w l
+   TRACE PROPERTY  m(sonos_e)  m mult w l
+   TRACE PROPERTY  m  m mult w l
+   TRACE PROPERTY  m(fnpass)  m mult w l
+   TRACE PROPERTY  mn(nhv)  m mult w l
+   TRACE PROPERTY  mn(nhvnative)  m mult w l
+   TRACE PROPERTY  mn(ntvnative)  m mult w l
+   TRACE PROPERTY  mp(pshort)  m mult w l
+   TRACE PROPERTY  mp  m mult w l
+   TRACE PROPERTY  mp(phighvt)  m mult w l
+   TRACE PROPERTY  mp(plowvt)  m mult w l
+   TRACE PROPERTY  mp(phv)  m mult w l
+   TRACE PROPERTY  mn(nshortesd)  m mult w l
+   TRACE PROPERTY  mn(nhvesd)  m mult w l
+   TRACE PROPERTY  mn(nhvnativeesd)  m mult w l
+   TRACE PROPERTY  mp(phvesd)  m mult w l
+   TRACE PROPERTY  nvhv  m mult w l
+   TRACE PROPERTY  n20vhv1  m mult w l
+   TRACE PROPERTY  n20nativevhv1  m mult w l
+   TRACE PROPERTY  n20vhviso1  m mult w l
+   TRACE PROPERTY  n20nativevhviso1  m mult w l
+   TRACE PROPERTY  pvhv  m mult w l
+   TRACE PROPERTY  p20vhv1  m mult w l
+   TRACE PROPERTY  c(xcmimc1)  w l m
+   TRACE PROPERTY  c(xcmimc2)  w l m
+   TRACE PROPERTY  r(mrp1)  m w l
+   TRACE PROPERTY  xhrpoly_0p35  m w l
+   TRACE PROPERTY  xuhrpoly_0p35  m w l
+   TRACE PROPERTY  xhrpoly_0p69  m w l
+   TRACE PROPERTY  xuhrpoly_0p69  m w l
+   TRACE PROPERTY  xhrpoly_1p41  m w l
+   TRACE PROPERTY  xuhrpoly_1p41  m w l
+   TRACE PROPERTY  xhrpoly_2p85  m w l
+   TRACE PROPERTY  xuhrpoly_2p85  m w l
+
+
+
+                   CELL COMPARISON RESULTS ( TOP LEVEL )
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+LAYOUT CELL NAME:         sky130_fd_sc_hdll__a21oi_4
+SOURCE CELL NAME:         sky130_fd_sc_hdll__a21oi_4
+
+--------------------------------------------------------------------------------------------------------------
+
+INITIAL NUMBERS OF OBJECTS
+--------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:              8         8
+
+ Nets:              11        10    *
+
+ Instances:         12        12         MN (4 pins)
+                    12        12         MP (4 pins)
+                     1         0    *    Dpar (2 pins)
+                     1         0    *    Probe (2 pins)
+                ------    ------
+ Total Inst:        26        24
+
+
+NUMBERS OF OBJECTS AFTER TRANSFORMATION
+---------------------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:              8         8
+
+ Nets:               8         8
+
+ Instances:          1         1         MN (4 pins)
+                     1         1         SMN2 (4 pins)
+                     1         1         SPMP_2_1 (5 pins)
+                ------    ------
+ Total Inst:         3         3
+
+
+       * = Number of objects in layout different from number in source.
+
+
+
+**************************************************************************************************************
+                               INFORMATION AND WARNINGS
+**************************************************************************************************************
+
+
+                  Matched    Matched    Unmatched    Unmatched    Component
+                   Layout     Source       Layout       Source    Type
+                  -------    -------    ---------    ---------    ---------
+   Ports:               8          8            0            0
+
+   Nets:                8          8            0            0
+
+   Instances:           1          1            0            0    MN(NSHORT)
+                        1          1            0            0    SMN2
+                        1          1            0            0    SPMP_2_1
+                  -------    -------    ---------    ---------
+   Total Inst:          3          3            0            0
+
+
+o Statistics:
+
+   2 layout instances were filtered and their pins removed from adjoining nets.
+
+   24 layout mos transistors were reduced to 6.
+     18 mos transistors were deleted by parallel reduction.
+   24 source mos transistors were reduced to 6.
+     18 mos transistors were deleted by parallel reduction.
+
+   1 layout net had all its pins removed and was deleted.
+
+
+o Initial Correspondence Points:
+
+   Ports:        VNB VPB B1 A2 A1 Y VPWR VGND
+
+
+**************************************************************************************************************
+                                         SUMMARY
+**************************************************************************************************************
+
+Total CPU Time:      0 sec
+Total Elapsed Time:  0 sec
diff --git a/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.pex.spice b/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.pex.spice
index 24a83a3..cc57297 100644
--- a/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.pex.spice
+++ b/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.pex.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21oi_4.pex.spice
-* Created: Thu Aug 27 18:53:30 2020
+* Created: Wed Sep  2 08:17:55 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * Nominal Temperature: 27C
diff --git a/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.pxi.spice b/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.pxi.spice
index 7faf82e..e5819ae 100644
--- a/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.pxi.spice
+++ b/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.pxi.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21oi_4.pxi.spice
-* Created: Thu Aug 27 18:53:30 2020
+* Created: Wed Sep  2 08:17:55 2020
 * 
 x_PM_SKY130_FD_SC_HDLL__A21OI_4%B1 N_B1_c_80_n N_B1_M1001_g N_B1_c_86_n
 + N_B1_M1006_g N_B1_c_87_n N_B1_M1009_g N_B1_c_81_n N_B1_M1003_g N_B1_c_88_n
diff --git a/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice b/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice
index 03615f2..9966cbb 100644
--- a/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice
+++ b/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a21oi_4.spice
-* Created: Thu Aug 27 18:53:30 2020
+* Created: Wed Sep  2 08:17:55 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * 
diff --git a/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.lvs.report b/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.lvs.report
new file mode 100644
index 0000000..be397af
--- /dev/null
+++ b/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.lvs.report
@@ -0,0 +1,481 @@
+
+LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.spice"
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------
+
+Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.spice"
+Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.spice"
+
+
+
+
+                  ##################################################
+                  ##                                              ##
+                  ##         C A L I B R E    S Y S T E M         ##
+                  ##                                              ##
+                  ##             L V S   R E P O R T              ##
+                  ##                                              ##
+                  ##################################################
+
+
+
+REPORT FILE NAME:         sky130_fd_sc_hdll__a221oi_1.lvs.report
+LAYOUT NAME:              svdb/sky130_fd_sc_hdll__a221oi_1.sp ('sky130_fd_sc_hdll__a221oi_1')
+SOURCE NAME:              /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.spice ('sky130_fd_sc_hdll__a221oi_1')
+RULE FILE:                /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_
+CREATION TIME:            Wed Sep  2 08:17:59 2020
+CURRENT DIRECTORY:        /home/hlusk/repos/SkyWater/osugooglelib/calibre
+USER NAME:                hlusk
+CALIBRE VERSION:          v2018.4_34.26    Mon Dec 3 14:40:54 PST 2018
+
+
+
+                               OVERALL COMPARISON RESULTS
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+
+**************************************************************************************************************
+                                      CELL  SUMMARY
+**************************************************************************************************************
+
+  Result         Layout                        Source
+  -----------    -----------                   --------------
+  CORRECT        sky130_fd_sc_hdll__a221oi_1   sky130_fd_sc_hdll__a221oi_1
+
+
+
+**************************************************************************************************************
+                                      LVS PARAMETERS
+**************************************************************************************************************
+
+
+o LVS Setup:
+
+   // LVS COMPONENT TYPE PROPERTY
+   // LVS COMPONENT SUBTYPE PROPERTY
+   // LVS PIN NAME PROPERTY
+   // LVS POWER NAME
+   // LVS GROUND NAME
+   LVS CELL SUPPLY                        NO
+   LVS RECOGNIZE GATES                    ALL
+   LVS IGNORE PORTS                       NO
+   LVS CHECK PORT NAMES                   YES
+   LVS IGNORE TRIVIAL NAMED PORTS         NO
+   LVS BUILTIN DEVICE PIN SWAP            YES
+   LVS ALL CAPACITOR PINS SWAPPABLE       NO
+   LVS DISCARD PINS BY DEVICE             YES
+   LVS SOFT SUBSTRATE PINS                NO
+   LVS INJECT LOGIC                       NO
+   LVS EXPAND UNBALANCED CELLS            YES
+   LVS FLATTEN INSIDE CELL                NO
+   LVS EXPAND SEED PROMOTIONS             NO
+   LVS PRESERVE PARAMETERIZED CELLS       NO
+   LVS GLOBALS ARE PORTS                  YES
+   LVS REVERSE WL                         NO
+   LVS SPICE PREFER PINS                  YES
+   LVS SPICE SLASH IS SPACE               NO
+   LVS SPICE ALLOW FLOATING PINS          YES
+   LVS SPICE ALLOW INLINE PARAMETERS      NO
+   LVS SPICE ALLOW UNQUOTED STRINGS       YES
+   LVS SPICE CONDITIONAL LDD              NO
+   LVS SPICE CULL PRIMITIVE SUBCIRCUITS   NO
+   // LVS SPICE EXCLUDE CELL SOURCE
+   // LVS SPICE EXCLUDE CELL LAYOUT
+   LVS SPICE IMPLIED MOS AREA             NO
+   // LVS SPICE MULTIPLIER NAME
+   LVS SPICE OVERRIDE GLOBALS             YES
+   LVS SPICE REDEFINE PARAM               YES
+   LVS SPICE REPLICATE DEVICES            YES
+   LVS SPICE SCALE X PARAMETERS           NO
+   LVS SPICE STRICT WL                    YES
+   // LVS SPICE OPTION
+   LVS STRICT SUBTYPES                    YES
+   LVS EXACT SUBTYPES                     NO
+   LAYOUT CASE                            NO
+   SOURCE CASE                            NO
+   LVS COMPARE CASE                       NO
+   LVS DOWNCASE DEVICE                    NO
+   LVS REPORT MAXIMUM                     50
+   LVS PROPERTY RESOLUTION MAXIMUM        ALL
+   LVS SIGNATURE MAXIMUM                  ALL
+   // LVS FILTER UNUSED OPTION
+   // LVS REPORT OPTION
+   LVS REPORT UNITS                       YES
+   // LVS NON USER NAME PORT
+   LVS NON USER NAME NET                  "^n[0-9]*$" "^net[0-9]*$"
+   // LVS NON USER NAME INSTANCE
+   // LVS IGNORE DEVICE PIN
+   // LVS PREFER NETS FILTER SOURCE
+   // LVS PREFER NETS FILTER LAYOUT
+
+   // Device Type Map
+
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_2p85" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT
+
+   // Reduction
+
+   LVS REDUCE SERIES MOS                  NO
+   LVS REDUCE PARALLEL MOS                NO
+   LVS REDUCE SEMI SERIES MOS             NO
+   LVS REDUCE SPLIT GATES                 YES [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE PARALLEL BIPOLAR            NO
+   LVS REDUCE SERIES CAPACITORS           NO
+   LVS REDUCE PARALLEL CAPACITORS         NO
+   LVS REDUCE SERIES RESISTORS            NO
+   LVS REDUCE PARALLEL RESISTORS          NO
+   LVS REDUCE PARALLEL DIODES             NO
+
+   LVS REDUCE  condiode  PARALLEL
+   LVS REDUCE  condiodeHvPsub  PARALLEL
+   LVS REDUCE  p20vhv1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  n20vhviso1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  nvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  pvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MP  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  M  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MN  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  Q(npnpar1x1)  PARALLEL
+   LVS REDUCE  Q(npnpar1x2)  PARALLEL
+   LVS REDUCE  Q(npn_1x1_2p0_hv)  PARALLEL
+   LVS REDUCE  Q(pnppar)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  Q(pnppar5x)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  D  PARALLEL [ TOLERANCE a 1 p 1 ]
+   LVS REDUCE  D  SERIES POS NEG NO
+   LVS REDUCE  C(xcmimc1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  C(xcmimc2)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R(mrp1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  SERIES POS NEG NO
+   LVS REDUCE  R(short)  PARALLEL
+   LVS REDUCE  R(short)  SERIES POS NEG NO
+   LVS REDUCE  R(fuse)  PARALLEL NO
+   LVS REDUCE  R(fuse)  SERIES POS NEG NO
+   LVS REDUCE  R(metop)  PARALLEL [ TOLERANCE metopNumber 0 ]
+   LVS REDUCE  R(metop)  SERIES POS NEG NO
+   LVS REDUCTION PRIORITY                 PARALLEL
+   
+   LVS SHORT EQUIVALENT NODES             NO
+
+   // Filter
+
+   LVS FILTER  R(cds_thru)  SHORT SOURCE
+   LVS FILTER  R(cds_thru)  SHORT LAYOUT
+   LVS FILTER  Dpar  OPEN SOURCE
+   LVS FILTER  Dpar  OPEN LAYOUT
+   LVS FILTER  Probe  OPEN SOURCE
+   LVS FILTER  Probe  OPEN LAYOUT
+   LVS FILTER  icecap  OPEN SOURCE
+   LVS FILTER  s8fmlt_iref_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_neg_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_vdac_termx  OPEN SOURCE
+   LVS FILTER  D  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN LAYOUT
+   LVS FILTER  tap_dev  OPEN SOURCE
+   LVS FILTER  tap_dev  OPEN LAYOUT
+   LVS FILTER  cad_dummy_open_device  OPEN SOURCE
+   LVS FILTER  cad_dummy_open_device  OPEN LAYOUT
+
+   // Trace Property
+
+   TRACE PROPERTY  xcnwvc  m m 0
+   TRACE PROPERTY  xcnwvc  w w 0
+   TRACE PROPERTY  xcnwvc  l l 0
+   TRACE PROPERTY  xcnwvc2  m m 0
+   TRACE PROPERTY  xcnwvc2  w w 0
+   TRACE PROPERTY  xcnwvc2  l l 0
+   TRACE PROPERTY  xchvnwc  m m 0
+   TRACE PROPERTY  q(npnpar1x1)  m m 0
+   TRACE PROPERTY  q(npnpar1x2)  m m 0
+   TRACE PROPERTY  q(npn_1x1_2p0_hv)  m m 0
+   TRACE PROPERTY  q(pnppar)  barea barea 0
+   TRACE PROPERTY  q(pnppar)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar)  earea earea 0
+   TRACE PROPERTY  q(pnppar)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar)  m m 0
+   TRACE PROPERTY  q(pnppar5x)  barea barea 0
+   TRACE PROPERTY  q(pnppar5x)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar5x)  earea earea 0
+   TRACE PROPERTY  q(pnppar5x)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar5x)  m m 0
+   TRACE PROPERTY  d(ndiode)  a a 1
+   TRACE PROPERTY  d(ndiode)  p p 1
+   TRACE PROPERTY  d(ndiode)  m m 0
+   TRACE PROPERTY  d(ndiode_h)  a a 1
+   TRACE PROPERTY  d(ndiode_h)  p p 1
+   TRACE PROPERTY  d(ndiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  m m 0
+   TRACE PROPERTY  d(pdiode)  a a 1
+   TRACE PROPERTY  d(pdiode)  p p 1
+   TRACE PROPERTY  d(pdiode)  m m 0
+   TRACE PROPERTY  d(pdiode_h)  a a 1
+   TRACE PROPERTY  d(pdiode_h)  p p 1
+   TRACE PROPERTY  d(pdiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub)  a a 1
+   TRACE PROPERTY  d(dnwdiode_psub)  p p 1
+   TRACE PROPERTY  d(dnwdiode_psub)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  m m 0
+   TRACE PROPERTY  xcmvpp  m m 0
+   TRACE PROPERTY  xcmvpp_2  m m 0
+   TRACE PROPERTY  xcmvpp2_nhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp2_phv5x4  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap2_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l40  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l20  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l10  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x1  m m 0
+   TRACE PROPERTY  xcmvppx4_2xnhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym50p4shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m5shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_lim4shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m4shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4m5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp5  m m 0
+   TRACE PROPERTY  xcmvpp4  m m 0
+   TRACE PROPERTY  xcmvpp3  m m 0
+   TRACE PROPERTY  r(mrdn)  w w 1
+   TRACE PROPERTY  r(mrdn)  l l 1
+   TRACE PROPERTY  r(mrdn)  m m 0
+   TRACE PROPERTY  r(mrdn_hv)  w w 1
+   TRACE PROPERTY  r(mrdn_hv)  l l 1
+   TRACE PROPERTY  r(mrdn_hv)  m m 0
+   TRACE PROPERTY  r(mrdp)  w w 1
+   TRACE PROPERTY  r(mrdp)  l l 1
+   TRACE PROPERTY  r(mrdp)  m m 0
+   TRACE PROPERTY  r(mrdp_hv)  w w 1
+   TRACE PROPERTY  r(mrdp_hv)  l l 1
+   TRACE PROPERTY  r(mrdp_hv)  m m 0
+   TRACE PROPERTY  r(mrl1)  w w 1
+   TRACE PROPERTY  r(mrl1)  l l 1
+   TRACE PROPERTY  r(mrl1)  m m 0
+   TRACE PROPERTY  r(xpwres)  w w 1
+   TRACE PROPERTY  r(xpwres)  l l 1
+   TRACE PROPERTY  r(xpwres)  m m 0
+   TRACE PROPERTY  r(short)  m m 0
+   TRACE PROPERTY  r(fuse)  w w 1
+   TRACE PROPERTY  r(fuse)  l l 1
+   TRACE PROPERTY  r(fuse)  m m 0
+   TRACE PROPERTY  r(metop)  metopnumber metopnumber 0
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  m m 0
+   TRACE PROPERTY  d(nwdiode_victim)  a a 10
+   TRACE PROPERTY  d(nwdiode_victim)  p p 10
+   TRACE PROPERTY  d(nwdiode_victim)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  m m 0
+   TRACE PROPERTY  d(nwdiode_aggressor)  a a 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  p p 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  m m 0
+
+   // User Trace Property
+
+   TRACE PROPERTY  mn(nshort)  m mult w l
+   TRACE PROPERTY  mn(npass)  m mult w l
+   TRACE PROPERTY  mn(nlowvt)  m mult w l
+   TRACE PROPERTY  m(sonos_e)  m mult w l
+   TRACE PROPERTY  m  m mult w l
+   TRACE PROPERTY  m(fnpass)  m mult w l
+   TRACE PROPERTY  mn(nhv)  m mult w l
+   TRACE PROPERTY  mn(nhvnative)  m mult w l
+   TRACE PROPERTY  mn(ntvnative)  m mult w l
+   TRACE PROPERTY  mp(pshort)  m mult w l
+   TRACE PROPERTY  mp  m mult w l
+   TRACE PROPERTY  mp(phighvt)  m mult w l
+   TRACE PROPERTY  mp(plowvt)  m mult w l
+   TRACE PROPERTY  mp(phv)  m mult w l
+   TRACE PROPERTY  mn(nshortesd)  m mult w l
+   TRACE PROPERTY  mn(nhvesd)  m mult w l
+   TRACE PROPERTY  mn(nhvnativeesd)  m mult w l
+   TRACE PROPERTY  mp(phvesd)  m mult w l
+   TRACE PROPERTY  nvhv  m mult w l
+   TRACE PROPERTY  n20vhv1  m mult w l
+   TRACE PROPERTY  n20nativevhv1  m mult w l
+   TRACE PROPERTY  n20vhviso1  m mult w l
+   TRACE PROPERTY  n20nativevhviso1  m mult w l
+   TRACE PROPERTY  pvhv  m mult w l
+   TRACE PROPERTY  p20vhv1  m mult w l
+   TRACE PROPERTY  c(xcmimc1)  w l m
+   TRACE PROPERTY  c(xcmimc2)  w l m
+   TRACE PROPERTY  r(mrp1)  m w l
+   TRACE PROPERTY  xhrpoly_0p35  m w l
+   TRACE PROPERTY  xuhrpoly_0p35  m w l
+   TRACE PROPERTY  xhrpoly_0p69  m w l
+   TRACE PROPERTY  xuhrpoly_0p69  m w l
+   TRACE PROPERTY  xhrpoly_1p41  m w l
+   TRACE PROPERTY  xuhrpoly_1p41  m w l
+   TRACE PROPERTY  xhrpoly_2p85  m w l
+   TRACE PROPERTY  xuhrpoly_2p85  m w l
+
+
+
+                   CELL COMPARISON RESULTS ( TOP LEVEL )
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+LAYOUT CELL NAME:         sky130_fd_sc_hdll__a221oi_1
+SOURCE CELL NAME:         sky130_fd_sc_hdll__a221oi_1
+
+--------------------------------------------------------------------------------------------------------------
+
+INITIAL NUMBERS OF OBJECTS
+--------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:             10        10
+
+ Nets:              14        14
+
+ Instances:          5         5         MN (4 pins)
+                     5         5         MP (4 pins)
+                     1         0    *    Dpar (2 pins)
+                ------    ------
+ Total Inst:        11        10
+
+
+NUMBERS OF OBJECTS AFTER TRANSFORMATION
+---------------------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:             10        10
+
+ Nets:              10        10
+
+ Instances:          1         1         MN (4 pins)
+                     2         2         SMN2 (4 pins)
+                     1         1         SPMP_2_2_1 (7 pins)
+                ------    ------
+ Total Inst:         4         4
+
+
+       * = Number of objects in layout different from number in source.
+
+
+
+**************************************************************************************************************
+                               INFORMATION AND WARNINGS
+**************************************************************************************************************
+
+
+                  Matched    Matched    Unmatched    Unmatched    Component
+                   Layout     Source       Layout       Source    Type
+                  -------    -------    ---------    ---------    ---------
+   Ports:              10         10            0            0
+
+   Nets:               10         10            0            0
+
+   Instances:           1          1            0            0    MN(NSHORT)
+                        2          2            0            0    SMN2
+                        1          1            0            0    SPMP_2_2_1
+                  -------    -------    ---------    ---------
+   Total Inst:          4          4            0            0
+
+
+o Statistics:
+
+   1 layout instance was filtered and its pins removed from adjoining nets.
+
+
+o Initial Correspondence Points:
+
+   Ports:        VNB VPB C1 B2 B1 A1 A2 Y VPWR VGND
+
+
+**************************************************************************************************************
+                                         SUMMARY
+**************************************************************************************************************
+
+Total CPU Time:      0 sec
+Total Elapsed Time:  0 sec
diff --git a/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.pex.spice b/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.pex.spice
index f3efe64..a35a969 100644
--- a/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.pex.spice
+++ b/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.pex.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a221oi_1.pex.spice
-* Created: Thu Aug 27 18:53:36 2020
+* Created: Wed Sep  2 08:18:02 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * Nominal Temperature: 27C
diff --git a/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.pxi.spice b/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.pxi.spice
index 486a2df..5365ea0 100644
--- a/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.pxi.spice
+++ b/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.pxi.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a221oi_1.pxi.spice
-* Created: Thu Aug 27 18:53:36 2020
+* Created: Wed Sep  2 08:18:02 2020
 * 
 x_PM_SKY130_FD_SC_HDLL__A221OI_1%C1 N_C1_c_58_n N_C1_M1006_g N_C1_c_55_n
 + N_C1_M1008_g C1 N_C1_c_57_n PM_SKY130_FD_SC_HDLL__A221OI_1%C1
diff --git a/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.spice b/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.spice
index c419eb7..4c6b07f 100644
--- a/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.spice
+++ b/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a221oi_1.spice
-* Created: Thu Aug 27 18:53:36 2020
+* Created: Wed Sep  2 08:18:02 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * 
diff --git a/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.lvs.report b/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.lvs.report
new file mode 100644
index 0000000..fc89f28
--- /dev/null
+++ b/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.lvs.report
@@ -0,0 +1,499 @@
+
+LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice"
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------
+
+Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice"
+Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice"
+
+
+
+
+                  ##################################################
+                  ##                                              ##
+                  ##         C A L I B R E    S Y S T E M         ##
+                  ##                                              ##
+                  ##             L V S   R E P O R T              ##
+                  ##                                              ##
+                  ##################################################
+
+
+
+REPORT FILE NAME:         sky130_fd_sc_hdll__a221oi_2.lvs.report
+LAYOUT NAME:              svdb/sky130_fd_sc_hdll__a221oi_2.sp ('sky130_fd_sc_hdll__a221oi_2')
+SOURCE NAME:              /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice ('sky130_fd_sc_hdll__a221oi_2')
+RULE FILE:                /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_
+CREATION TIME:            Wed Sep  2 08:18:06 2020
+CURRENT DIRECTORY:        /home/hlusk/repos/SkyWater/osugooglelib/calibre
+USER NAME:                hlusk
+CALIBRE VERSION:          v2018.4_34.26    Mon Dec 3 14:40:54 PST 2018
+
+
+
+                               OVERALL COMPARISON RESULTS
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+
+**************************************************************************************************************
+                                      CELL  SUMMARY
+**************************************************************************************************************
+
+  Result         Layout                        Source
+  -----------    -----------                   --------------
+  CORRECT        sky130_fd_sc_hdll__a221oi_2   sky130_fd_sc_hdll__a221oi_2
+
+
+
+**************************************************************************************************************
+                                      LVS PARAMETERS
+**************************************************************************************************************
+
+
+o LVS Setup:
+
+   // LVS COMPONENT TYPE PROPERTY
+   // LVS COMPONENT SUBTYPE PROPERTY
+   // LVS PIN NAME PROPERTY
+   // LVS POWER NAME
+   // LVS GROUND NAME
+   LVS CELL SUPPLY                        NO
+   LVS RECOGNIZE GATES                    ALL
+   LVS IGNORE PORTS                       NO
+   LVS CHECK PORT NAMES                   YES
+   LVS IGNORE TRIVIAL NAMED PORTS         NO
+   LVS BUILTIN DEVICE PIN SWAP            YES
+   LVS ALL CAPACITOR PINS SWAPPABLE       NO
+   LVS DISCARD PINS BY DEVICE             YES
+   LVS SOFT SUBSTRATE PINS                NO
+   LVS INJECT LOGIC                       NO
+   LVS EXPAND UNBALANCED CELLS            YES
+   LVS FLATTEN INSIDE CELL                NO
+   LVS EXPAND SEED PROMOTIONS             NO
+   LVS PRESERVE PARAMETERIZED CELLS       NO
+   LVS GLOBALS ARE PORTS                  YES
+   LVS REVERSE WL                         NO
+   LVS SPICE PREFER PINS                  YES
+   LVS SPICE SLASH IS SPACE               NO
+   LVS SPICE ALLOW FLOATING PINS          YES
+   LVS SPICE ALLOW INLINE PARAMETERS      NO
+   LVS SPICE ALLOW UNQUOTED STRINGS       YES
+   LVS SPICE CONDITIONAL LDD              NO
+   LVS SPICE CULL PRIMITIVE SUBCIRCUITS   NO
+   // LVS SPICE EXCLUDE CELL SOURCE
+   // LVS SPICE EXCLUDE CELL LAYOUT
+   LVS SPICE IMPLIED MOS AREA             NO
+   // LVS SPICE MULTIPLIER NAME
+   LVS SPICE OVERRIDE GLOBALS             YES
+   LVS SPICE REDEFINE PARAM               YES
+   LVS SPICE REPLICATE DEVICES            YES
+   LVS SPICE SCALE X PARAMETERS           NO
+   LVS SPICE STRICT WL                    YES
+   // LVS SPICE OPTION
+   LVS STRICT SUBTYPES                    YES
+   LVS EXACT SUBTYPES                     NO
+   LAYOUT CASE                            NO
+   SOURCE CASE                            NO
+   LVS COMPARE CASE                       NO
+   LVS DOWNCASE DEVICE                    NO
+   LVS REPORT MAXIMUM                     50
+   LVS PROPERTY RESOLUTION MAXIMUM        ALL
+   LVS SIGNATURE MAXIMUM                  ALL
+   // LVS FILTER UNUSED OPTION
+   // LVS REPORT OPTION
+   LVS REPORT UNITS                       YES
+   // LVS NON USER NAME PORT
+   LVS NON USER NAME NET                  "^n[0-9]*$" "^net[0-9]*$"
+   // LVS NON USER NAME INSTANCE
+   // LVS IGNORE DEVICE PIN
+   // LVS PREFER NETS FILTER SOURCE
+   // LVS PREFER NETS FILTER LAYOUT
+
+   // Device Type Map
+
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xhrpoly_2p85" SOURCE LAYOUT
+   LVS DEVICE TYPE                        RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT
+
+   // Reduction
+
+   LVS REDUCE SERIES MOS                  NO
+   LVS REDUCE PARALLEL MOS                NO
+   LVS REDUCE SEMI SERIES MOS             NO
+   LVS REDUCE SPLIT GATES                 YES [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE PARALLEL BIPOLAR            NO
+   LVS REDUCE SERIES CAPACITORS           NO
+   LVS REDUCE PARALLEL CAPACITORS         NO
+   LVS REDUCE SERIES RESISTORS            NO
+   LVS REDUCE PARALLEL RESISTORS          NO
+   LVS REDUCE PARALLEL DIODES             NO
+
+   LVS REDUCE  condiode  PARALLEL
+   LVS REDUCE  condiodeHvPsub  PARALLEL
+   LVS REDUCE  p20vhv1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  n20vhviso1  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  nvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  pvhv  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MP  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  M  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  MN  PARALLEL [ TOLERANCE l 1 w 1 ]
+   LVS REDUCE  Q(npnpar1x1)  PARALLEL
+   LVS REDUCE  Q(npnpar1x2)  PARALLEL
+   LVS REDUCE  Q(npn_1x1_2p0_hv)  PARALLEL
+   LVS REDUCE  Q(pnppar)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  Q(pnppar5x)  PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ]
+   LVS REDUCE  D  PARALLEL [ TOLERANCE a 1 p 1 ]
+   LVS REDUCE  D  SERIES POS NEG NO
+   LVS REDUCE  C(xcmimc1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  C(xcmimc2)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R(mrp1)  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  PARALLEL [ TOLERANCE w 1 l 1 ]
+   LVS REDUCE  R  SERIES POS NEG NO
+   LVS REDUCE  R(short)  PARALLEL
+   LVS REDUCE  R(short)  SERIES POS NEG NO
+   LVS REDUCE  R(fuse)  PARALLEL NO
+   LVS REDUCE  R(fuse)  SERIES POS NEG NO
+   LVS REDUCE  R(metop)  PARALLEL [ TOLERANCE metopNumber 0 ]
+   LVS REDUCE  R(metop)  SERIES POS NEG NO
+   LVS REDUCTION PRIORITY                 PARALLEL
+   
+   LVS SHORT EQUIVALENT NODES             NO
+
+   // Filter
+
+   LVS FILTER  R(cds_thru)  SHORT SOURCE
+   LVS FILTER  R(cds_thru)  SHORT LAYOUT
+   LVS FILTER  Dpar  OPEN SOURCE
+   LVS FILTER  Dpar  OPEN LAYOUT
+   LVS FILTER  Probe  OPEN SOURCE
+   LVS FILTER  Probe  OPEN LAYOUT
+   LVS FILTER  icecap  OPEN SOURCE
+   LVS FILTER  s8fmlt_iref_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_neg_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_termx  OPEN SOURCE
+   LVS FILTER  s8fmlt_vdac_termx  OPEN SOURCE
+   LVS FILTER  D  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN SOURCE
+   LVS FILTER  diff_dev  OPEN LAYOUT
+   LVS FILTER  tap_dev  OPEN SOURCE
+   LVS FILTER  tap_dev  OPEN LAYOUT
+   LVS FILTER  cad_dummy_open_device  OPEN SOURCE
+   LVS FILTER  cad_dummy_open_device  OPEN LAYOUT
+
+   // Trace Property
+
+   TRACE PROPERTY  xcnwvc  m m 0
+   TRACE PROPERTY  xcnwvc  w w 0
+   TRACE PROPERTY  xcnwvc  l l 0
+   TRACE PROPERTY  xcnwvc2  m m 0
+   TRACE PROPERTY  xcnwvc2  w w 0
+   TRACE PROPERTY  xcnwvc2  l l 0
+   TRACE PROPERTY  xchvnwc  m m 0
+   TRACE PROPERTY  q(npnpar1x1)  m m 0
+   TRACE PROPERTY  q(npnpar1x2)  m m 0
+   TRACE PROPERTY  q(npn_1x1_2p0_hv)  m m 0
+   TRACE PROPERTY  q(pnppar)  barea barea 0
+   TRACE PROPERTY  q(pnppar)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar)  earea earea 0
+   TRACE PROPERTY  q(pnppar)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar)  m m 0
+   TRACE PROPERTY  q(pnppar5x)  barea barea 0
+   TRACE PROPERTY  q(pnppar5x)  bperi bperi 0
+   TRACE PROPERTY  q(pnppar5x)  earea earea 0
+   TRACE PROPERTY  q(pnppar5x)  eperi eperi 0
+   TRACE PROPERTY  q(pnppar5x)  m m 0
+   TRACE PROPERTY  d(ndiode)  a a 1
+   TRACE PROPERTY  d(ndiode)  p p 1
+   TRACE PROPERTY  d(ndiode)  m m 0
+   TRACE PROPERTY  d(ndiode_h)  a a 1
+   TRACE PROPERTY  d(ndiode_h)  p p 1
+   TRACE PROPERTY  d(ndiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_300)  m m 0
+   TRACE PROPERTY  d(pdiode)  a a 1
+   TRACE PROPERTY  d(pdiode)  p p 1
+   TRACE PROPERTY  d(pdiode)  m m 0
+   TRACE PROPERTY  d(pdiode_h)  a a 1
+   TRACE PROPERTY  d(pdiode_h)  p p 1
+   TRACE PROPERTY  d(pdiode_h)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_100)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_200)  m m 0
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  a a 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  p p 1
+   TRACE PROPERTY  d(xesd_pdiode_h_300)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub)  a a 1
+   TRACE PROPERTY  d(dnwdiode_psub)  p p 1
+   TRACE PROPERTY  d(dnwdiode_psub)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_100)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_200)  m m 0
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  a a 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  p p 1
+   TRACE PROPERTY  d(xesd_ndiode_h_dnwl_300)  m m 0
+   TRACE PROPERTY  xcmvpp  m m 0
+   TRACE PROPERTY  xcmvpp_2  m m 0
+   TRACE PROPERTY  xcmvpp2_nhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp2_phv5x4  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap2_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_wafflecap1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l40  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l20  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l10  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_atlas_fingercap_l5  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1_met5pullin  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_5x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_4x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_3x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_2x1  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x2  m m 0
+   TRACE PROPERTY  xcmvpp_hd5_1x1  m m 0
+   TRACE PROPERTY  xcmvppx4_2xnhvnative10x4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym50p4shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_lim5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m5shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_lim4shield  m m 0
+   TRACE PROPERTY  xcmvpp6p8x6p1_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_polym4shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m4shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3_lishield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp8p6x7p9_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp1p8x1p8_m3shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4m5shield  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m4  m m 0
+   TRACE PROPERTY  xcmvpp11p5x11p7_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp4p4x4p6_m1m2  m m 0
+   TRACE PROPERTY  xcmvpp5  m m 0
+   TRACE PROPERTY  xcmvpp4  m m 0
+   TRACE PROPERTY  xcmvpp3  m m 0
+   TRACE PROPERTY  r(mrdn)  w w 1
+   TRACE PROPERTY  r(mrdn)  l l 1
+   TRACE PROPERTY  r(mrdn)  m m 0
+   TRACE PROPERTY  r(mrdn_hv)  w w 1
+   TRACE PROPERTY  r(mrdn_hv)  l l 1
+   TRACE PROPERTY  r(mrdn_hv)  m m 0
+   TRACE PROPERTY  r(mrdp)  w w 1
+   TRACE PROPERTY  r(mrdp)  l l 1
+   TRACE PROPERTY  r(mrdp)  m m 0
+   TRACE PROPERTY  r(mrdp_hv)  w w 1
+   TRACE PROPERTY  r(mrdp_hv)  l l 1
+   TRACE PROPERTY  r(mrdp_hv)  m m 0
+   TRACE PROPERTY  r(mrl1)  w w 1
+   TRACE PROPERTY  r(mrl1)  l l 1
+   TRACE PROPERTY  r(mrl1)  m m 0
+   TRACE PROPERTY  r(xpwres)  w w 1
+   TRACE PROPERTY  r(xpwres)  l l 1
+   TRACE PROPERTY  r(xpwres)  m m 0
+   TRACE PROPERTY  r(short)  m m 0
+   TRACE PROPERTY  r(fuse)  w w 1
+   TRACE PROPERTY  r(fuse)  l l 1
+   TRACE PROPERTY  r(fuse)  m m 0
+   TRACE PROPERTY  r(metop)  metopnumber metopnumber 0
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_victim)  m m 0
+   TRACE PROPERTY  d(nwdiode_victim)  a a 10
+   TRACE PROPERTY  d(nwdiode_victim)  p p 10
+   TRACE PROPERTY  d(nwdiode_victim)  m m 0
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  a a 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  p p 10
+   TRACE PROPERTY  d(dnwdiode_psub_aggressor)  m m 0
+   TRACE PROPERTY  d(nwdiode_aggressor)  a a 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  p p 10
+   TRACE PROPERTY  d(nwdiode_aggressor)  m m 0
+
+   // User Trace Property
+
+   TRACE PROPERTY  mn(nshort)  m mult w l
+   TRACE PROPERTY  mn(npass)  m mult w l
+   TRACE PROPERTY  mn(nlowvt)  m mult w l
+   TRACE PROPERTY  m(sonos_e)  m mult w l
+   TRACE PROPERTY  m  m mult w l
+   TRACE PROPERTY  m(fnpass)  m mult w l
+   TRACE PROPERTY  mn(nhv)  m mult w l
+   TRACE PROPERTY  mn(nhvnative)  m mult w l
+   TRACE PROPERTY  mn(ntvnative)  m mult w l
+   TRACE PROPERTY  mp(pshort)  m mult w l
+   TRACE PROPERTY  mp  m mult w l
+   TRACE PROPERTY  mp(phighvt)  m mult w l
+   TRACE PROPERTY  mp(plowvt)  m mult w l
+   TRACE PROPERTY  mp(phv)  m mult w l
+   TRACE PROPERTY  mn(nshortesd)  m mult w l
+   TRACE PROPERTY  mn(nhvesd)  m mult w l
+   TRACE PROPERTY  mn(nhvnativeesd)  m mult w l
+   TRACE PROPERTY  mp(phvesd)  m mult w l
+   TRACE PROPERTY  nvhv  m mult w l
+   TRACE PROPERTY  n20vhv1  m mult w l
+   TRACE PROPERTY  n20nativevhv1  m mult w l
+   TRACE PROPERTY  n20vhviso1  m mult w l
+   TRACE PROPERTY  n20nativevhviso1  m mult w l
+   TRACE PROPERTY  pvhv  m mult w l
+   TRACE PROPERTY  p20vhv1  m mult w l
+   TRACE PROPERTY  c(xcmimc1)  w l m
+   TRACE PROPERTY  c(xcmimc2)  w l m
+   TRACE PROPERTY  r(mrp1)  m w l
+   TRACE PROPERTY  xhrpoly_0p35  m w l
+   TRACE PROPERTY  xuhrpoly_0p35  m w l
+   TRACE PROPERTY  xhrpoly_0p69  m w l
+   TRACE PROPERTY  xuhrpoly_0p69  m w l
+   TRACE PROPERTY  xhrpoly_1p41  m w l
+   TRACE PROPERTY  xuhrpoly_1p41  m w l
+   TRACE PROPERTY  xhrpoly_2p85  m w l
+   TRACE PROPERTY  xuhrpoly_2p85  m w l
+
+
+
+                   CELL COMPARISON RESULTS ( TOP LEVEL )
+
+
+
+                         #       ###################       _   _   
+                        #        #                 #       *   *   
+                   #   #         #     CORRECT     #         |     
+                    # #          #                 #       \___/  
+                     #           ###################               
+
+
+
+LAYOUT CELL NAME:         sky130_fd_sc_hdll__a221oi_2
+SOURCE CELL NAME:         sky130_fd_sc_hdll__a221oi_2
+
+--------------------------------------------------------------------------------------------------------------
+
+INITIAL NUMBERS OF OBJECTS
+--------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:             10        10
+
+ Nets:              17        14    *
+
+ Instances:         10        10         MN (4 pins)
+                    10        10         MP (4 pins)
+                     1         0    *    Dpar (2 pins)
+                     3         0    *    Probe (2 pins)
+                ------    ------
+ Total Inst:        24        20
+
+
+NUMBERS OF OBJECTS AFTER TRANSFORMATION
+---------------------------------------
+
+                Layout    Source         Component Type
+                ------    ------         --------------
+ Ports:             10        10
+
+ Nets:              10        10
+
+ Instances:          1         1         MN (4 pins)
+                     2         2         SMN2 (4 pins)
+                     1         1         SPMP_2_2_1 (7 pins)
+                ------    ------
+ Total Inst:         4         4
+
+
+       * = Number of objects in layout different from number in source.
+
+
+
+**************************************************************************************************************
+                               INFORMATION AND WARNINGS
+**************************************************************************************************************
+
+
+                  Matched    Matched    Unmatched    Unmatched    Component
+                   Layout     Source       Layout       Source    Type
+                  -------    -------    ---------    ---------    ---------
+   Ports:              10         10            0            0
+
+   Nets:               10         10            0            0
+
+   Instances:           1          1            0            0    MN(NSHORT)
+                        2          2            0            0    SMN2
+                        1          1            0            0    SPMP_2_2_1
+                  -------    -------    ---------    ---------
+   Total Inst:          4          4            0            0
+
+
+o Statistics:
+
+   4 layout instances were filtered and their pins removed from adjoining nets.
+
+   20 layout mos transistors were reduced to 10.
+     10 mos transistors were deleted by parallel reduction.
+   20 source mos transistors were reduced to 10.
+     10 mos transistors were deleted by parallel reduction.
+
+   3 layout nets had all their pins removed and were deleted.
+
+
+o Initial Correspondence Points:
+
+   Ports:        VNB VPB C1 B2 B1 A2 A1 Y VPWR VGND
+
+
+**************************************************************************************************************
+                                         SUMMARY
+**************************************************************************************************************
+
+Total CPU Time:      0 sec
+Total Elapsed Time:  0 sec
diff --git a/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.pex.spice b/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.pex.spice
index cf704d4..ff2b85a 100644
--- a/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.pex.spice
+++ b/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.pex.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a221oi_2.pex.spice
-* Created: Thu Aug 27 18:53:43 2020
+* Created: Wed Sep  2 08:18:09 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * Nominal Temperature: 27C
diff --git a/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.pxi.spice b/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.pxi.spice
index 4476778..8b3f540 100644
--- a/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.pxi.spice
+++ b/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.pxi.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a221oi_2.pxi.spice
-* Created: Thu Aug 27 18:53:43 2020
+* Created: Wed Sep  2 08:18:09 2020
 * 
 x_PM_SKY130_FD_SC_HDLL__A221OI_2%C1 N_C1_c_90_n N_C1_M1004_g N_C1_c_86_n
 + N_C1_M1007_g N_C1_c_91_n N_C1_M1018_g N_C1_c_87_n N_C1_M1016_g C1 C1
diff --git a/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice b/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice
index 487ef48..d25a0eb 100644
--- a/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice
+++ b/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice
@@ -1,5 +1,5 @@
 * File: sky130_fd_sc_hdll__a221oi_2.spice
-* Created: Thu Aug 27 18:53:43 2020
+* Created: Wed Sep  2 08:18:09 2020
 * Program "Calibre xRC"
 * Version "v2018.4_34.26"
 * 
diff --git a/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.lvs.report b/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.lvs.report
new file mode 100644
index 0000000..f542e37
--- /dev/null
+++ b/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.lvs.report
@@ -0,0 +1,519 @@
+
+LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------
+
+Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 87 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 89 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 91 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 93 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 95 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+Warning: Duplicate parameter definition "MULT" at line 97 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice"
+
+
+
+
+                  ##################################################
+                  ##                                              ##
+                  ##         C A L I B R E    S Y S T E M         ##
+                  ##