Updates to spice PE and PXI files as well as the addition of lvs reports
diff --git a/cells/a211o/sky130_fd_sc_hdll__a211o_1.lvs.report b/cells/a211o/sky130_fd_sc_hdll__a211o_1.lvs.report new file mode 100644 index 0000000..5b4e291 --- /dev/null +++ b/cells/a211o/sky130_fd_sc_hdll__a211o_1.lvs.report
@@ -0,0 +1,486 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_1.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a211o_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a211o_1.sp ('sky130_fd_sc_hdll__a211o_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_1.spice ('sky130_fd_sc_hdll__a211o_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:15:39 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a211o_1 sky130_fd_sc_hdll__a211o_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a211o_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__a211o_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 14 13 * + + Instances: 5 5 MN (4 pins) + 5 5 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 12 10 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 10 10 + + Instances: 3 3 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SPMP_2_1_1 (6 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 10 10 0 0 + + Instances: 3 3 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SPMP_2_1_1 + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A2 A1 B1 C1 X VPWR VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a211o/sky130_fd_sc_hdll__a211o_1.pex.spice b/cells/a211o/sky130_fd_sc_hdll__a211o_1.pex.spice index 58fbf9e..b8bb8fb 100644 --- a/cells/a211o/sky130_fd_sc_hdll__a211o_1.pex.spice +++ b/cells/a211o/sky130_fd_sc_hdll__a211o_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a211o_1.pex.spice -* Created: Thu Aug 27 18:51:24 2020 +* Created: Wed Sep 2 08:15:42 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a211o/sky130_fd_sc_hdll__a211o_1.pxi.spice b/cells/a211o/sky130_fd_sc_hdll__a211o_1.pxi.spice index a56a147..2a4d663 100644 --- a/cells/a211o/sky130_fd_sc_hdll__a211o_1.pxi.spice +++ b/cells/a211o/sky130_fd_sc_hdll__a211o_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a211o_1.pxi.spice -* Created: Thu Aug 27 18:51:24 2020 +* Created: Wed Sep 2 08:15:42 2020 * x_PM_SKY130_FD_SC_HDLL__A211O_1%A_80_21# N_A_80_21#_M1006_d N_A_80_21#_M1009_d + N_A_80_21#_M1000_d N_A_80_21#_c_52_n N_A_80_21#_M1003_g N_A_80_21#_c_56_n
diff --git a/cells/a211o/sky130_fd_sc_hdll__a211o_1.spice b/cells/a211o/sky130_fd_sc_hdll__a211o_1.spice index 840c14e..932c592 100644 --- a/cells/a211o/sky130_fd_sc_hdll__a211o_1.spice +++ b/cells/a211o/sky130_fd_sc_hdll__a211o_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a211o_1.spice -* Created: Thu Aug 27 18:51:24 2020 +* Created: Wed Sep 2 08:15:42 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a211o/sky130_fd_sc_hdll__a211o_2.lvs.report b/cells/a211o/sky130_fd_sc_hdll__a211o_2.lvs.report new file mode 100644 index 0000000..f209b56 --- /dev/null +++ b/cells/a211o/sky130_fd_sc_hdll__a211o_2.lvs.report
@@ -0,0 +1,493 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_2.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a211o_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a211o_2.sp ('sky130_fd_sc_hdll__a211o_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_2.spice ('sky130_fd_sc_hdll__a211o_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:15:46 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a211o_2 sky130_fd_sc_hdll__a211o_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a211o_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__a211o_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 14 13 * + + Instances: 6 6 MN (4 pins) + 6 6 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 14 12 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 10 10 + + Instances: 3 3 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SPMP_2_1_1 (6 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 10 10 0 0 + + Instances: 3 3 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SPMP_2_1_1 + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A2 A1 B1 C1 VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a211o/sky130_fd_sc_hdll__a211o_2.pex.spice b/cells/a211o/sky130_fd_sc_hdll__a211o_2.pex.spice index 5650f7a..b2c417b 100644 --- a/cells/a211o/sky130_fd_sc_hdll__a211o_2.pex.spice +++ b/cells/a211o/sky130_fd_sc_hdll__a211o_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a211o_2.pex.spice -* Created: Thu Aug 27 18:51:30 2020 +* Created: Wed Sep 2 08:15:48 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a211o/sky130_fd_sc_hdll__a211o_2.pxi.spice b/cells/a211o/sky130_fd_sc_hdll__a211o_2.pxi.spice index b617941..2f85274 100644 --- a/cells/a211o/sky130_fd_sc_hdll__a211o_2.pxi.spice +++ b/cells/a211o/sky130_fd_sc_hdll__a211o_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a211o_2.pxi.spice -* Created: Thu Aug 27 18:51:30 2020 +* Created: Wed Sep 2 08:15:48 2020 * x_PM_SKY130_FD_SC_HDLL__A211O_2%A_79_21# N_A_79_21#_M1010_d N_A_79_21#_M1005_d + N_A_79_21#_M1009_d N_A_79_21#_c_54_n N_A_79_21#_M1008_g N_A_79_21#_c_60_n
diff --git a/cells/a211o/sky130_fd_sc_hdll__a211o_2.spice b/cells/a211o/sky130_fd_sc_hdll__a211o_2.spice index 77af58f..47c51aa 100644 --- a/cells/a211o/sky130_fd_sc_hdll__a211o_2.spice +++ b/cells/a211o/sky130_fd_sc_hdll__a211o_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a211o_2.spice -* Created: Thu Aug 27 18:51:30 2020 +* Created: Wed Sep 2 08:15:48 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a211o/sky130_fd_sc_hdll__a211o_4.lvs.report b/cells/a211o/sky130_fd_sc_hdll__a211o_4.lvs.report new file mode 100644 index 0000000..9a875a8 --- /dev/null +++ b/cells/a211o/sky130_fd_sc_hdll__a211o_4.lvs.report
@@ -0,0 +1,507 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a211o_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a211o_4.sp ('sky130_fd_sc_hdll__a211o_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice ('sky130_fd_sc_hdll__a211o_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:15:52 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a211o_4 sky130_fd_sc_hdll__a211o_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a211o_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__a211o_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 19 15 * + + Instances: 12 12 MN (4 pins) + 12 12 MP (4 pins) + 1 0 * Dpar (2 pins) + 4 0 * Probe (2 pins) + ------ ------ + Total Inst: 29 24 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 10 10 + + Instances: 3 3 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SPMP_2_1_1 (6 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 10 10 0 0 + + Instances: 3 3 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SPMP_2_1_1 + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 5 layout instances were filtered and their pins removed from adjoining nets. + + 24 layout mos transistors were reduced to 10. 2 connecting nets were deleted. + 10 mos transistors were deleted by parallel reduction. + 4 mos transistors and 2 connecting nets were deleted by split-gate reduction. + 24 source mos transistors were reduced to 10. 2 connecting nets were deleted. + 10 mos transistors were deleted by parallel reduction. + 4 mos transistors and 2 connecting nets were deleted by split-gate reduction. + + 4 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB B1 C1 A2 A1 VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a211o/sky130_fd_sc_hdll__a211o_4.pex.spice b/cells/a211o/sky130_fd_sc_hdll__a211o_4.pex.spice index 9f89006..58ebea3 100644 --- a/cells/a211o/sky130_fd_sc_hdll__a211o_4.pex.spice +++ b/cells/a211o/sky130_fd_sc_hdll__a211o_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a211o_4.pex.spice -* Created: Thu Aug 27 18:51:37 2020 +* Created: Wed Sep 2 08:15:55 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a211o/sky130_fd_sc_hdll__a211o_4.pxi.spice b/cells/a211o/sky130_fd_sc_hdll__a211o_4.pxi.spice index 423b2c8..e6639fb 100644 --- a/cells/a211o/sky130_fd_sc_hdll__a211o_4.pxi.spice +++ b/cells/a211o/sky130_fd_sc_hdll__a211o_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a211o_4.pxi.spice -* Created: Thu Aug 27 18:51:37 2020 +* Created: Wed Sep 2 08:15:55 2020 * x_PM_SKY130_FD_SC_HDLL__A211O_4%A_79_204# N_A_79_204#_M1007_d + N_A_79_204#_M1023_d N_A_79_204#_M1016_s N_A_79_204#_M1006_s
diff --git a/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice b/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice index 9c1b8bb..095d2c2 100644 --- a/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice +++ b/cells/a211o/sky130_fd_sc_hdll__a211o_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a211o_4.spice -* Created: Thu Aug 27 18:51:37 2020 +* Created: Wed Sep 2 08:15:55 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.lvs.report b/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.lvs.report new file mode 100644 index 0000000..2bb87c0 --- /dev/null +++ b/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.lvs.report
@@ -0,0 +1,482 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a211oi_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a211oi_1.sp ('sky130_fd_sc_hdll__a211oi_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.spice ('sky130_fd_sc_hdll__a211oi_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:15:59 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a211oi_1 sky130_fd_sc_hdll__a211oi_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a211oi_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__a211oi_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 16 12 * + + Instances: 4 4 MN (4 pins) + 4 4 MP (4 pins) + 1 0 * Dpar (2 pins) + 4 0 * Probe (2 pins) + ------ ------ + Total Inst: 13 8 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 9 9 + + Instances: 2 2 MN (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SPMP_2_1_1 (6 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 9 9 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 1 1 0 0 SMN2 + 1 1 0 0 SPMP_2_1_1 + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 5 layout instances were filtered and their pins removed from adjoining nets. + + 4 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A2 A1 B1 C1 VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.pex.spice b/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.pex.spice index 60480c7..7a51bb7 100644 --- a/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.pex.spice +++ b/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a211oi_1.pex.spice -* Created: Thu Aug 27 18:51:44 2020 +* Created: Wed Sep 2 08:16:02 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.pxi.spice b/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.pxi.spice index 5c35a37..82edb28 100644 --- a/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.pxi.spice +++ b/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a211oi_1.pxi.spice -* Created: Thu Aug 27 18:51:44 2020 +* Created: Wed Sep 2 08:16:02 2020 * x_PM_SKY130_FD_SC_HDLL__A211OI_1%A2 N_A2_c_40_n N_A2_M1000_g N_A2_c_41_n + N_A2_M1002_g A2 A2 PM_SKY130_FD_SC_HDLL__A211OI_1%A2
diff --git a/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.spice b/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.spice index 6cb3674..9ea0a8f 100644 --- a/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.spice +++ b/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a211oi_1.spice -* Created: Thu Aug 27 18:51:44 2020 +* Created: Wed Sep 2 08:16:02 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.lvs.report b/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.lvs.report new file mode 100644 index 0000000..df538c7 --- /dev/null +++ b/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.lvs.report
@@ -0,0 +1,495 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a211oi_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a211oi_2.sp ('sky130_fd_sc_hdll__a211oi_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice ('sky130_fd_sc_hdll__a211oi_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:16:06 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a211oi_2 sky130_fd_sc_hdll__a211oi_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a211oi_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__a211oi_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 15 12 * + + Instances: 8 8 MN (4 pins) + 8 8 MP (4 pins) + 1 0 * Dpar (2 pins) + 3 0 * Probe (2 pins) + ------ ------ + Total Inst: 20 16 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 9 9 + + Instances: 2 2 MN (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SPMP_2_1_1 (6 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 9 9 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 1 1 0 0 SMN2 + 1 1 0 0 SPMP_2_1_1 + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 4 layout instances were filtered and their pins removed from adjoining nets. + + 16 layout mos transistors were reduced to 8. + 8 mos transistors were deleted by parallel reduction. + 16 source mos transistors were reduced to 8. + 8 mos transistors were deleted by parallel reduction. + + 3 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB C1 B1 A1 A2 Y VPWR VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.pex.spice b/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.pex.spice index 558c989..f13bfd4 100644 --- a/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.pex.spice +++ b/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a211oi_2.pex.spice -* Created: Thu Aug 27 18:51:50 2020 +* Created: Wed Sep 2 08:16:09 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.pxi.spice b/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.pxi.spice index 7c35d77..d74e96f 100644 --- a/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.pxi.spice +++ b/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a211oi_2.pxi.spice -* Created: Thu Aug 27 18:51:50 2020 +* Created: Wed Sep 2 08:16:09 2020 * x_PM_SKY130_FD_SC_HDLL__A211OI_2%C1 N_C1_c_79_n N_C1_M1004_g N_C1_c_75_n + N_C1_M1012_g N_C1_c_80_n N_C1_M1011_g N_C1_c_76_n N_C1_M1014_g C1 C1
diff --git a/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice b/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice index 0a6c6b2..1b42d5d 100644 --- a/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice +++ b/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a211oi_2.spice -* Created: Thu Aug 27 18:51:50 2020 +* Created: Wed Sep 2 08:16:09 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.lvs.report b/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.lvs.report new file mode 100644 index 0000000..36d8b8b --- /dev/null +++ b/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.lvs.report
@@ -0,0 +1,513 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a211oi_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a211oi_4.sp ('sky130_fd_sc_hdll__a211oi_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice ('sky130_fd_sc_hdll__a211oi_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:16:13 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a211oi_4 sky130_fd_sc_hdll__a211oi_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a211oi_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__a211oi_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 15 14 * + + Instances: 16 16 MN (4 pins) + 16 16 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 34 32 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 9 9 + + Instances: 2 2 MN (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SPMP_2_1_1 (6 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 9 9 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 1 1 0 0 SMN2 + 1 1 0 0 SPMP_2_1_1 + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 32 layout mos transistors were reduced to 8. 2 connecting nets were deleted. + 20 mos transistors were deleted by parallel reduction. + 4 mos transistors and 2 connecting nets were deleted by split-gate reduction. + 32 source mos transistors were reduced to 8. 2 connecting nets were deleted. + 20 mos transistors were deleted by parallel reduction. + 4 mos transistors and 2 connecting nets were deleted by split-gate reduction. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A2 A1 B1 C1 VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.pex.spice b/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.pex.spice index fa17e94..20e3e4c 100644 --- a/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.pex.spice +++ b/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a211oi_4.pex.spice -* Created: Thu Aug 27 18:51:57 2020 +* Created: Wed Sep 2 08:16:16 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C @@ -288,7 +288,7 @@ + $X2=5.695 $Y2=1.985 .ends -.subckt PM_SKY130_FD_SC_HDLL__A211OI_4%noxref_7 1 2 3 4 5 6 7 22 24 26 30 32 36 +.subckt PM_SKY130_FD_SC_HDLL__A211OI_4%A_27_297# 1 2 3 4 5 6 7 22 24 26 30 32 36 + 38 42 44 46 47 52 57 59 61 c101 46 0 4.11428e-20 $X=4.02 $Y=2.105 c102 7 0 1.43842e-19 $X=7.755 $Y=1.485 @@ -462,7 +462,7 @@ + $Y=1.485 $X2=0.73 $Y2=2.34 .ends -.subckt PM_SKY130_FD_SC_HDLL__A211OI_4%noxref_9 1 2 7 13 15 +.subckt PM_SKY130_FD_SC_HDLL__A211OI_4%A_869_297# 1 2 7 13 15 r46 15 17 12.7467 $w=3.28e-07 $l=3.65e-07 $layer=LI1_cond $X=5.295 $Y=1.57 + $X2=5.295 $Y2=1.935 r47 11 15 2.36532 $w=2.5e-07 $l=1.65e-07 $layer=LI1_cond $X=5.46 $Y=1.57
diff --git a/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.pxi.spice b/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.pxi.spice index d44bd4a..adaf91e 100644 --- a/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.pxi.spice +++ b/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.pxi.spice
@@ -1,47 +1,46 @@ * File: sky130_fd_sc_hdll__a211oi_4.pxi.spice -* Created: Thu Aug 27 18:51:57 2020 +* Created: Wed Sep 2 08:16:16 2020 * -x_PM_SKY130_FD_SC_HDLL__A211OI_4%A2 N_A2_c_109_n N_A2_M16_noxref_g N_A2_M1003_g -+ N_A2_c_110_n N_A2_M17_noxref_g N_A2_M1011_g N_A2_c_111_n N_A2_M18_noxref_g -+ N_A2_M1020_g N_A2_c_103_n N_A2_M23_noxref_g N_A2_c_104_n N_A2_M1031_g -+ N_A2_c_113_n N_A2_c_105_n A2 N_A2_c_107_n N_A2_c_108_n -+ PM_SKY130_FD_SC_HDLL__A211OI_4%A2 -x_PM_SKY130_FD_SC_HDLL__A211OI_4%A1 N_A1_M1012_g N_A1_c_225_n N_A1_M19_noxref_g -+ N_A1_M1025_g N_A1_c_226_n N_A1_M20_noxref_g N_A1_M1028_g N_A1_c_227_n -+ N_A1_M21_noxref_g N_A1_c_228_n N_A1_M22_noxref_g N_A1_M1030_g A1 N_A1_c_223_n -+ N_A1_c_224_n A1 PM_SKY130_FD_SC_HDLL__A211OI_4%A1 +x_PM_SKY130_FD_SC_HDLL__A211OI_4%A2 N_A2_c_109_n N_A2_M1000_g N_A2_M1003_g ++ N_A2_c_110_n N_A2_M1002_g N_A2_M1011_g N_A2_c_111_n N_A2_M1014_g N_A2_M1020_g ++ N_A2_c_103_n N_A2_M1029_g N_A2_c_104_n N_A2_M1031_g N_A2_c_113_n N_A2_c_105_n ++ A2 N_A2_c_107_n N_A2_c_108_n PM_SKY130_FD_SC_HDLL__A211OI_4%A2 +x_PM_SKY130_FD_SC_HDLL__A211OI_4%A1 N_A1_M1012_g N_A1_c_225_n N_A1_M1007_g ++ N_A1_M1025_g N_A1_c_226_n N_A1_M1010_g N_A1_M1028_g N_A1_c_227_n N_A1_M1016_g ++ N_A1_c_228_n N_A1_M1018_g N_A1_M1030_g A1 N_A1_c_223_n N_A1_c_224_n A1 ++ PM_SKY130_FD_SC_HDLL__A211OI_4%A1 x_PM_SKY130_FD_SC_HDLL__A211OI_4%B1 N_B1_c_290_n N_B1_M1005_g N_B1_c_298_n -+ N_B1_M24_noxref_g N_B1_c_299_n N_B1_M25_noxref_g N_B1_c_291_n N_B1_M1008_g -+ N_B1_c_300_n N_B1_M26_noxref_g N_B1_c_292_n N_B1_M1021_g N_B1_c_293_n -+ N_B1_M31_noxref_g N_B1_c_294_n N_B1_M1024_g N_B1_c_325_p N_B1_c_295_n -+ N_B1_c_303_n N_B1_c_311_n N_B1_c_304_n N_B1_c_305_n B1 N_B1_c_296_n -+ N_B1_c_297_n PM_SKY130_FD_SC_HDLL__A211OI_4%B1 -x_PM_SKY130_FD_SC_HDLL__A211OI_4%C1 N_C1_c_432_n N_C1_M27_noxref_g N_C1_c_426_n -+ N_C1_M1001_g N_C1_c_433_n N_C1_M28_noxref_g N_C1_c_427_n N_C1_M1004_g -+ N_C1_c_434_n N_C1_M29_noxref_g N_C1_c_428_n N_C1_M1013_g N_C1_c_435_n -+ N_C1_M30_noxref_g N_C1_c_429_n N_C1_M1022_g N_C1_c_430_n N_C1_c_436_n C1 -+ N_C1_c_431_n PM_SKY130_FD_SC_HDLL__A211OI_4%C1 -x_PM_SKY130_FD_SC_HDLL__A211OI_4%noxref_7 N_noxref_7_M16_noxref_s -+ N_noxref_7_M17_noxref_d N_noxref_7_M19_noxref_d N_noxref_7_M21_noxref_d -+ N_noxref_7_M23_noxref_d N_noxref_7_M25_noxref_d N_noxref_7_M31_noxref_d -+ N_noxref_7_c_514_n N_noxref_7_c_515_n N_noxref_7_c_524_n N_noxref_7_c_561_p -+ N_noxref_7_c_528_n N_noxref_7_c_564_p N_noxref_7_c_530_n N_noxref_7_c_567_p -+ N_noxref_7_c_531_n N_noxref_7_c_533_n N_noxref_7_c_570_p N_noxref_7_c_516_n -+ N_noxref_7_c_534_n N_noxref_7_c_536_n N_noxref_7_c_537_n -+ PM_SKY130_FD_SC_HDLL__A211OI_4%noxref_7 -x_PM_SKY130_FD_SC_HDLL__A211OI_4%VPWR N_VPWR_M16_noxref_d N_VPWR_M18_noxref_d -+ N_VPWR_M20_noxref_d N_VPWR_M22_noxref_d VPWR N_VPWR_c_616_n N_VPWR_c_617_n ++ N_B1_M1017_g N_B1_c_299_n N_B1_M1023_g N_B1_c_291_n N_B1_M1008_g N_B1_c_300_n ++ N_B1_M1009_g N_B1_c_292_n N_B1_M1021_g N_B1_c_293_n N_B1_M1027_g N_B1_c_294_n ++ N_B1_M1024_g N_B1_c_325_p N_B1_c_295_n N_B1_c_303_n N_B1_c_311_n N_B1_c_304_n ++ N_B1_c_305_n B1 N_B1_c_296_n N_B1_c_297_n PM_SKY130_FD_SC_HDLL__A211OI_4%B1 +x_PM_SKY130_FD_SC_HDLL__A211OI_4%C1 N_C1_c_432_n N_C1_M1015_g N_C1_c_426_n ++ N_C1_M1001_g N_C1_c_433_n N_C1_M1006_g N_C1_c_427_n N_C1_M1004_g N_C1_c_434_n ++ N_C1_M1019_g N_C1_c_428_n N_C1_M1013_g N_C1_c_435_n N_C1_M1026_g N_C1_c_429_n ++ N_C1_M1022_g N_C1_c_430_n N_C1_c_436_n C1 N_C1_c_431_n ++ PM_SKY130_FD_SC_HDLL__A211OI_4%C1 +x_PM_SKY130_FD_SC_HDLL__A211OI_4%A_27_297# N_A_27_297#_M1000_d ++ N_A_27_297#_M1002_d N_A_27_297#_M1007_s N_A_27_297#_M1016_s ++ N_A_27_297#_M1029_d N_A_27_297#_M1023_d N_A_27_297#_M1027_d ++ N_A_27_297#_c_514_n N_A_27_297#_c_515_n N_A_27_297#_c_524_n ++ N_A_27_297#_c_561_p N_A_27_297#_c_528_n N_A_27_297#_c_564_p ++ N_A_27_297#_c_530_n N_A_27_297#_c_567_p N_A_27_297#_c_531_n ++ N_A_27_297#_c_533_n N_A_27_297#_c_570_p N_A_27_297#_c_516_n ++ N_A_27_297#_c_534_n N_A_27_297#_c_536_n N_A_27_297#_c_537_n ++ PM_SKY130_FD_SC_HDLL__A211OI_4%A_27_297# +x_PM_SKY130_FD_SC_HDLL__A211OI_4%VPWR N_VPWR_M1000_s N_VPWR_M1014_s ++ N_VPWR_M1010_d N_VPWR_M1018_d VPWR N_VPWR_c_616_n N_VPWR_c_617_n + N_VPWR_c_618_n N_VPWR_c_619_n N_VPWR_c_620_n N_VPWR_c_615_n N_VPWR_c_622_n + N_VPWR_c_623_n N_VPWR_c_624_n N_VPWR_c_625_n + PM_SKY130_FD_SC_HDLL__A211OI_4%VPWR -x_PM_SKY130_FD_SC_HDLL__A211OI_4%noxref_9 N_noxref_9_M24_noxref_d -+ N_noxref_9_M28_noxref_d N_noxref_9_c_736_n N_noxref_9_c_732_n -+ N_noxref_9_c_733_n PM_SKY130_FD_SC_HDLL__A211OI_4%noxref_9 +x_PM_SKY130_FD_SC_HDLL__A211OI_4%A_869_297# N_A_869_297#_M1017_s ++ N_A_869_297#_M1006_d N_A_869_297#_c_736_n N_A_869_297#_c_732_n ++ N_A_869_297#_c_733_n PM_SKY130_FD_SC_HDLL__A211OI_4%A_869_297# x_PM_SKY130_FD_SC_HDLL__A211OI_4%Y N_Y_M1012_s N_Y_M1028_s N_Y_M1005_s -+ N_Y_M1021_s N_Y_M1004_s N_Y_M1022_s N_Y_M27_noxref_d N_Y_M29_noxref_d -+ N_Y_c_786_n N_Y_c_787_n N_Y_c_801_n N_Y_c_882_p N_Y_c_834_n N_Y_c_807_n -+ N_Y_c_884_p N_Y_c_812_n N_Y_c_782_n N_Y_c_789_n N_Y_c_791_n N_Y_c_823_n -+ N_Y_c_852_n N_Y_c_876_p Y N_Y_c_783_n PM_SKY130_FD_SC_HDLL__A211OI_4%Y ++ N_Y_M1021_s N_Y_M1004_s N_Y_M1022_s N_Y_M1015_s N_Y_M1019_s N_Y_c_786_n ++ N_Y_c_787_n N_Y_c_801_n N_Y_c_882_p N_Y_c_834_n N_Y_c_807_n N_Y_c_884_p ++ N_Y_c_812_n N_Y_c_782_n N_Y_c_789_n N_Y_c_791_n N_Y_c_823_n N_Y_c_852_n ++ N_Y_c_876_p Y N_Y_c_783_n PM_SKY130_FD_SC_HDLL__A211OI_4%Y x_PM_SKY130_FD_SC_HDLL__A211OI_4%VGND N_VGND_M1003_d N_VGND_M1011_d + N_VGND_M1031_d N_VGND_M1008_d N_VGND_M1001_d N_VGND_M1013_d N_VGND_M1024_d + N_VGND_c_924_n N_VGND_c_925_n N_VGND_c_926_n N_VGND_c_927_n N_VGND_c_928_n @@ -136,9 +135,9 @@ cc_80 VPB N_C1_c_435_n 0.01663f $X=-0.19 $Y=1.305 $X2=1.46 $Y2=0.56 cc_81 VPB N_C1_c_436_n 0.00228439f $X=-0.19 $Y=1.305 $X2=1.535 $Y2=1.535 cc_82 VPB N_C1_c_431_n 0.0491383f $X=-0.19 $Y=1.305 $X2=0.965 $Y2=1.217 -cc_83 VPB N_noxref_7_c_514_n 0.0125686f $X=-0.19 $Y=1.305 $X2=3.785 $Y2=1.41 -cc_84 VPB N_noxref_7_c_515_n 0.0144536f $X=-0.19 $Y=1.305 $X2=3.785 $Y2=1.985 -cc_85 VPB N_noxref_7_c_516_n 0.00955326f $X=-0.19 $Y=1.305 $X2=0.93 $Y2=1.33 +cc_83 VPB N_A_27_297#_c_514_n 0.0125686f $X=-0.19 $Y=1.305 $X2=3.785 $Y2=1.41 +cc_84 VPB N_A_27_297#_c_515_n 0.0144536f $X=-0.19 $Y=1.305 $X2=3.785 $Y2=1.985 +cc_85 VPB N_A_27_297#_c_516_n 0.00955326f $X=-0.19 $Y=1.305 $X2=0.93 $Y2=1.33 cc_86 VPB N_VPWR_c_616_n 0.0143912f $X=-0.19 $Y=1.305 $X2=1.435 $Y2=1.41 cc_87 VPB N_VPWR_c_617_n 0.0123455f $X=-0.19 $Y=1.305 $X2=1.46 $Y2=0.56 cc_88 VPB N_VPWR_c_618_n 0.0123059f $X=-0.19 $Y=1.305 $X2=3.81 $Y2=0.995 @@ -149,8 +148,8 @@ cc_93 VPB N_VPWR_c_623_n 0.00537738f $X=-0.19 $Y=1.305 $X2=0 $Y2=0 cc_94 VPB N_VPWR_c_624_n 0.00537738f $X=-0.19 $Y=1.305 $X2=1.535 $Y2=1.33 cc_95 VPB N_VPWR_c_625_n 0.00547137f $X=-0.19 $Y=1.305 $X2=0 $Y2=0 -cc_96 VPB N_noxref_9_c_732_n 0.00541979f $X=-0.19 $Y=1.305 $X2=0.99 $Y2=0.56 -cc_97 VPB N_noxref_9_c_733_n 0.00218946f $X=-0.19 $Y=1.305 $X2=1.435 $Y2=1.41 +cc_96 VPB N_A_869_297#_c_732_n 0.00541979f $X=-0.19 $Y=1.305 $X2=0.99 $Y2=0.56 +cc_97 VPB N_A_869_297#_c_733_n 0.00218946f $X=-0.19 $Y=1.305 $X2=1.435 $Y2=1.41 cc_98 VPB Y 0.0275049f $X=-0.19 $Y=1.305 $X2=0 $Y2=0 cc_99 VPB N_Y_c_783_n 0.00967841f $X=-0.19 $Y=1.305 $X2=0 $Y2=0 cc_100 N_A2_M1020_g N_A1_M1012_g 0.0232139f $X=1.46 $Y=0.56 $X2=0 $Y2=0 @@ -183,38 +182,37 @@ cc_127 N_A2_c_103_n N_B1_c_297_n 0.00162342f $X=3.785 $Y=1.41 $X2=0 $Y2=0 cc_128 N_A2_c_113_n N_B1_c_297_n 0.0083273f $X=3.595 $Y=1.535 $X2=0 $Y2=0 cc_129 N_A2_c_105_n N_B1_c_297_n 0.0363011f $X=3.76 $Y=1.16 $X2=0 $Y2=0 -cc_130 A2 N_noxref_7_M16_noxref_s 0.00295363f $X=1.07 $Y=1.445 $X2=-0.19 -+ $Y2=-0.24 -cc_131 A2 N_noxref_7_M17_noxref_d 0.0013695f $X=1.07 $Y=1.445 $X2=0 $Y2=0 -cc_132 N_A2_c_108_n N_noxref_7_M17_noxref_d 4.96997e-19 $X=1.535 $Y=1.33 $X2=0 +cc_130 A2 N_A_27_297#_M1000_d 0.00295363f $X=1.07 $Y=1.445 $X2=-0.19 $Y2=-0.24 +cc_131 A2 N_A_27_297#_M1002_d 0.0013695f $X=1.07 $Y=1.445 $X2=0 $Y2=0 +cc_132 N_A2_c_108_n N_A_27_297#_M1002_d 4.96997e-19 $X=1.535 $Y=1.33 $X2=0 $Y2=0 +cc_133 N_A2_c_113_n N_A_27_297#_M1007_s 0.00181032f $X=3.595 $Y=1.535 $X2=0 + $Y2=0 -cc_133 N_A2_c_113_n N_noxref_7_M19_noxref_d 0.00181032f $X=3.595 $Y=1.535 $X2=0 +cc_134 N_A2_c_113_n N_A_27_297#_M1016_s 0.00181032f $X=3.595 $Y=1.535 $X2=0 + $Y2=0 -cc_134 N_A2_c_113_n N_noxref_7_M21_noxref_d 0.00181032f $X=3.595 $Y=1.535 $X2=0 +cc_135 N_A2_c_113_n N_A_27_297#_M1029_d 0.00153522f $X=3.595 $Y=1.535 $X2=0 + $Y2=0 -cc_135 N_A2_c_113_n N_noxref_7_M23_noxref_d 0.00153522f $X=3.595 $Y=1.535 $X2=0 +cc_136 A2 N_A_27_297#_c_514_n 0.0218555f $X=1.07 $Y=1.445 $X2=0 $Y2=0 +cc_137 N_A2_c_109_n N_A_27_297#_c_524_n 0.0143534f $X=0.495 $Y=1.41 $X2=0 $Y2=0 +cc_138 N_A2_c_110_n N_A_27_297#_c_524_n 0.0148071f $X=0.965 $Y=1.41 $X2=0 $Y2=0 +cc_139 A2 N_A_27_297#_c_524_n 0.0428155f $X=1.07 $Y=1.445 $X2=0 $Y2=0 +cc_140 N_A2_c_107_n N_A_27_297#_c_524_n 8.48578e-19 $X=1.435 $Y=1.217 $X2=0 + $Y2=0 -cc_136 A2 N_noxref_7_c_514_n 0.0218555f $X=1.07 $Y=1.445 $X2=0 $Y2=0 -cc_137 N_A2_c_109_n N_noxref_7_c_524_n 0.0143534f $X=0.495 $Y=1.41 $X2=0 $Y2=0 -cc_138 N_A2_c_110_n N_noxref_7_c_524_n 0.0148071f $X=0.965 $Y=1.41 $X2=0 $Y2=0 -cc_139 A2 N_noxref_7_c_524_n 0.0428155f $X=1.07 $Y=1.445 $X2=0 $Y2=0 -cc_140 N_A2_c_107_n N_noxref_7_c_524_n 8.48578e-19 $X=1.435 $Y=1.217 $X2=0 $Y2=0 -cc_141 N_A2_c_111_n N_noxref_7_c_528_n 0.0148013f $X=1.435 $Y=1.41 $X2=0 $Y2=0 -cc_142 N_A2_c_108_n N_noxref_7_c_528_n 0.0405214f $X=1.535 $Y=1.33 $X2=0 $Y2=0 -cc_143 N_A2_c_113_n N_noxref_7_c_530_n 0.0392728f $X=3.595 $Y=1.535 $X2=0 $Y2=0 -cc_144 N_A2_c_103_n N_noxref_7_c_531_n 0.0153796f $X=3.785 $Y=1.41 $X2=0 $Y2=0 -cc_145 N_A2_c_113_n N_noxref_7_c_531_n 0.040879f $X=3.595 $Y=1.535 $X2=0 $Y2=0 -cc_146 N_A2_c_113_n N_noxref_7_c_533_n 0.00356588f $X=3.595 $Y=1.535 $X2=0 $Y2=0 -cc_147 A2 N_noxref_7_c_534_n 0.0150366f $X=1.07 $Y=1.445 $X2=0 $Y2=0 -cc_148 N_A2_c_107_n N_noxref_7_c_534_n 6.76214e-19 $X=1.435 $Y=1.217 $X2=0 $Y2=0 -cc_149 N_A2_c_113_n N_noxref_7_c_536_n 0.0138678f $X=3.595 $Y=1.535 $X2=0 $Y2=0 -cc_150 N_A2_c_113_n N_noxref_7_c_537_n 0.0138678f $X=3.595 $Y=1.535 $X2=0 $Y2=0 -cc_151 A2 N_VPWR_M16_noxref_d 0.00194857f $X=1.07 $Y=1.445 $X2=-0.19 $Y2=-0.24 -cc_152 N_A2_c_113_n N_VPWR_M18_noxref_d 0.00187879f $X=3.595 $Y=1.535 $X2=0 +cc_141 N_A2_c_111_n N_A_27_297#_c_528_n 0.0148013f $X=1.435 $Y=1.41 $X2=0 $Y2=0 +cc_142 N_A2_c_108_n N_A_27_297#_c_528_n 0.0405214f $X=1.535 $Y=1.33 $X2=0 $Y2=0 +cc_143 N_A2_c_113_n N_A_27_297#_c_530_n 0.0392728f $X=3.595 $Y=1.535 $X2=0 $Y2=0 +cc_144 N_A2_c_103_n N_A_27_297#_c_531_n 0.0153796f $X=3.785 $Y=1.41 $X2=0 $Y2=0 +cc_145 N_A2_c_113_n N_A_27_297#_c_531_n 0.040879f $X=3.595 $Y=1.535 $X2=0 $Y2=0 +cc_146 N_A2_c_113_n N_A_27_297#_c_533_n 0.00356588f $X=3.595 $Y=1.535 $X2=0 + $Y2=0 -cc_153 N_A2_c_113_n N_VPWR_M20_noxref_d 0.00187879f $X=3.595 $Y=1.535 $X2=0 +cc_147 A2 N_A_27_297#_c_534_n 0.0150366f $X=1.07 $Y=1.445 $X2=0 $Y2=0 +cc_148 N_A2_c_107_n N_A_27_297#_c_534_n 6.76214e-19 $X=1.435 $Y=1.217 $X2=0 + $Y2=0 -cc_154 N_A2_c_113_n N_VPWR_M22_noxref_d 0.001873f $X=3.595 $Y=1.535 $X2=0 $Y2=0 +cc_149 N_A2_c_113_n N_A_27_297#_c_536_n 0.0138678f $X=3.595 $Y=1.535 $X2=0 $Y2=0 +cc_150 N_A2_c_113_n N_A_27_297#_c_537_n 0.0138678f $X=3.595 $Y=1.535 $X2=0 $Y2=0 +cc_151 A2 N_VPWR_M1000_s 0.00194857f $X=1.07 $Y=1.445 $X2=-0.19 $Y2=-0.24 +cc_152 N_A2_c_113_n N_VPWR_M1014_s 0.00187879f $X=3.595 $Y=1.535 $X2=0 $Y2=0 +cc_153 N_A2_c_113_n N_VPWR_M1010_d 0.00187879f $X=3.595 $Y=1.535 $X2=0 $Y2=0 +cc_154 N_A2_c_113_n N_VPWR_M1018_d 0.001873f $X=3.595 $Y=1.535 $X2=0 $Y2=0 cc_155 N_A2_c_109_n N_VPWR_c_616_n 0.00311736f $X=0.495 $Y=1.41 $X2=0 $Y2=0 cc_156 N_A2_c_110_n N_VPWR_c_617_n 0.00453434f $X=0.965 $Y=1.41 $X2=0 $Y2=0 cc_157 N_A2_c_111_n N_VPWR_c_617_n 0.00309549f $X=1.435 $Y=1.41 $X2=0 $Y2=0 @@ -265,10 +263,10 @@ cc_199 A2 N_A_119_47#_c_1061_n 0.0155201f $X=1.07 $Y=1.445 $X2=0 $Y2=0 cc_200 N_A2_c_107_n N_A_119_47#_c_1061_n 0.00308075f $X=1.435 $Y=1.217 $X2=0 + $Y2=0 -cc_201 N_A1_c_225_n N_noxref_7_c_528_n 0.0152244f $X=1.905 $Y=1.41 $X2=0 $Y2=0 -cc_202 N_A1_c_226_n N_noxref_7_c_530_n 0.0148803f $X=2.375 $Y=1.41 $X2=0 $Y2=0 -cc_203 N_A1_c_227_n N_noxref_7_c_530_n 0.0153033f $X=2.845 $Y=1.41 $X2=0 $Y2=0 -cc_204 N_A1_c_228_n N_noxref_7_c_531_n 0.0148013f $X=3.315 $Y=1.41 $X2=0 $Y2=0 +cc_201 N_A1_c_225_n N_A_27_297#_c_528_n 0.0152244f $X=1.905 $Y=1.41 $X2=0 $Y2=0 +cc_202 N_A1_c_226_n N_A_27_297#_c_530_n 0.0148803f $X=2.375 $Y=1.41 $X2=0 $Y2=0 +cc_203 N_A1_c_227_n N_A_27_297#_c_530_n 0.0153033f $X=2.845 $Y=1.41 $X2=0 $Y2=0 +cc_204 N_A1_c_228_n N_A_27_297#_c_531_n 0.0148013f $X=3.315 $Y=1.41 $X2=0 $Y2=0 cc_205 N_A1_c_225_n N_VPWR_c_618_n 0.00450253f $X=1.905 $Y=1.41 $X2=0 $Y2=0 cc_206 N_A1_c_226_n N_VPWR_c_618_n 0.00309549f $X=2.375 $Y=1.41 $X2=0 $Y2=0 cc_207 N_A1_c_227_n N_VPWR_c_619_n 0.00450253f $X=2.845 $Y=1.41 $X2=0 $Y2=0 @@ -325,16 +323,14 @@ cc_258 N_B1_c_303_n N_C1_c_431_n 0.00322928f $X=7.28 $Y=1.53 $X2=0 $Y2=0 cc_259 N_B1_c_305_n N_C1_c_431_n 7.84743e-19 $X=7.425 $Y=1.53 $X2=0 $Y2=0 cc_260 N_B1_c_296_n N_C1_c_431_n 0.0273394f $X=5.195 $Y=1.202 $X2=0 $Y2=0 -cc_261 N_B1_c_303_n N_noxref_7_M25_noxref_d 0.00116348f $X=7.28 $Y=1.53 $X2=0 -+ $Y2=0 -cc_262 N_B1_c_297_n N_noxref_7_M25_noxref_d 0.00163863f $X=4.96 $Y=1.325 $X2=0 -+ $Y2=0 -cc_263 N_B1_c_298_n N_noxref_7_c_516_n 0.01165f $X=4.255 $Y=1.41 $X2=0 $Y2=0 -cc_264 N_B1_c_299_n N_noxref_7_c_516_n 0.0100267f $X=4.725 $Y=1.41 $X2=0 $Y2=0 -cc_265 N_B1_c_300_n N_noxref_7_c_516_n 0.0102134f $X=5.195 $Y=1.41 $X2=0 $Y2=0 -cc_266 N_B1_c_293_n N_noxref_7_c_516_n 0.0102822f $X=7.665 $Y=1.41 $X2=0 $Y2=0 -cc_267 N_B1_c_311_n N_noxref_7_c_516_n 0.00114739f $X=4.515 $Y=1.53 $X2=0 $Y2=0 -cc_268 N_B1_c_297_n N_noxref_7_c_516_n 0.0020586f $X=4.96 $Y=1.325 $X2=0 $Y2=0 +cc_261 N_B1_c_303_n N_A_27_297#_M1023_d 0.00116348f $X=7.28 $Y=1.53 $X2=0 $Y2=0 +cc_262 N_B1_c_297_n N_A_27_297#_M1023_d 0.00163863f $X=4.96 $Y=1.325 $X2=0 $Y2=0 +cc_263 N_B1_c_298_n N_A_27_297#_c_516_n 0.01165f $X=4.255 $Y=1.41 $X2=0 $Y2=0 +cc_264 N_B1_c_299_n N_A_27_297#_c_516_n 0.0100267f $X=4.725 $Y=1.41 $X2=0 $Y2=0 +cc_265 N_B1_c_300_n N_A_27_297#_c_516_n 0.0102134f $X=5.195 $Y=1.41 $X2=0 $Y2=0 +cc_266 N_B1_c_293_n N_A_27_297#_c_516_n 0.0102822f $X=7.665 $Y=1.41 $X2=0 $Y2=0 +cc_267 N_B1_c_311_n N_A_27_297#_c_516_n 0.00114739f $X=4.515 $Y=1.53 $X2=0 $Y2=0 +cc_268 N_B1_c_297_n N_A_27_297#_c_516_n 0.0020586f $X=4.96 $Y=1.325 $X2=0 $Y2=0 cc_269 N_B1_c_298_n N_VPWR_c_620_n 0.00429453f $X=4.255 $Y=1.41 $X2=0 $Y2=0 cc_270 N_B1_c_299_n N_VPWR_c_620_n 0.00429453f $X=4.725 $Y=1.41 $X2=0 $Y2=0 cc_271 N_B1_c_300_n N_VPWR_c_620_n 0.00429453f $X=5.195 $Y=1.41 $X2=0 $Y2=0 @@ -344,28 +340,35 @@ cc_275 N_B1_c_300_n N_VPWR_c_615_n 0.00615459f $X=5.195 $Y=1.41 $X2=0 $Y2=0 cc_276 N_B1_c_293_n N_VPWR_c_615_n 0.00718326f $X=7.665 $Y=1.41 $X2=0 $Y2=0 cc_277 N_B1_c_298_n N_VPWR_c_625_n 0.00100567f $X=4.255 $Y=1.41 $X2=0 $Y2=0 -cc_278 N_B1_c_311_n N_noxref_9_M24_noxref_d 0.0018074f $X=4.515 $Y=1.53 -+ $X2=-0.19 $Y2=-0.24 -cc_279 N_B1_c_297_n N_noxref_9_M24_noxref_d 0.00123452f $X=4.96 $Y=1.325 -+ $X2=-0.19 $Y2=-0.24 -cc_280 N_B1_c_298_n N_noxref_9_c_736_n 0.00638325f $X=4.255 $Y=1.41 $X2=0 $Y2=0 -cc_281 N_B1_c_299_n N_noxref_9_c_736_n 0.0138426f $X=4.725 $Y=1.41 $X2=0 $Y2=0 -cc_282 N_B1_c_300_n N_noxref_9_c_736_n 0.00620876f $X=5.195 $Y=1.41 $X2=0 $Y2=0 -cc_283 N_B1_c_325_p N_noxref_9_c_736_n 0.0019017f $X=5.09 $Y=1.16 $X2=0 $Y2=0 -cc_284 N_B1_c_303_n N_noxref_9_c_736_n 0.00842081f $X=7.28 $Y=1.53 $X2=0 $Y2=0 -cc_285 N_B1_c_311_n N_noxref_9_c_736_n 0.00660439f $X=4.515 $Y=1.53 $X2=0 $Y2=0 -cc_286 N_B1_c_296_n N_noxref_9_c_736_n 0.00378307f $X=5.195 $Y=1.202 $X2=0 $Y2=0 -cc_287 N_B1_c_297_n N_noxref_9_c_736_n 0.0372219f $X=4.96 $Y=1.325 $X2=0 $Y2=0 -cc_288 N_B1_c_300_n N_noxref_9_c_732_n 2.71904e-19 $X=5.195 $Y=1.41 $X2=0 $Y2=0 -cc_289 N_B1_c_303_n N_noxref_9_c_732_n 0.0549799f $X=7.28 $Y=1.53 $X2=0 $Y2=0 -cc_290 N_B1_c_299_n N_noxref_9_c_733_n 0.00144139f $X=4.725 $Y=1.41 $X2=0 $Y2=0 -cc_291 N_B1_c_300_n N_noxref_9_c_733_n 0.0228638f $X=5.195 $Y=1.41 $X2=0 $Y2=0 -cc_292 N_B1_c_325_p N_noxref_9_c_733_n 0.0124633f $X=5.09 $Y=1.16 $X2=0 $Y2=0 -cc_293 N_B1_c_303_n N_noxref_9_c_733_n 0.0270528f $X=7.28 $Y=1.53 $X2=0 $Y2=0 -cc_294 N_B1_c_311_n N_noxref_9_c_733_n 0.0010382f $X=4.515 $Y=1.53 $X2=0 $Y2=0 -cc_295 N_B1_c_296_n N_noxref_9_c_733_n 0.00288506f $X=5.195 $Y=1.202 $X2=0 $Y2=0 -cc_296 N_B1_c_297_n N_noxref_9_c_733_n 0.0119831f $X=4.96 $Y=1.325 $X2=0 $Y2=0 -cc_297 N_B1_c_303_n N_Y_M29_noxref_d 8.82306e-19 $X=7.28 $Y=1.53 $X2=0 $Y2=0 +cc_278 N_B1_c_311_n N_A_869_297#_M1017_s 0.0018074f $X=4.515 $Y=1.53 $X2=-0.19 ++ $Y2=-0.24 +cc_279 N_B1_c_297_n N_A_869_297#_M1017_s 0.00123452f $X=4.96 $Y=1.325 $X2=-0.19 ++ $Y2=-0.24 +cc_280 N_B1_c_298_n N_A_869_297#_c_736_n 0.00638325f $X=4.255 $Y=1.41 $X2=0 ++ $Y2=0 +cc_281 N_B1_c_299_n N_A_869_297#_c_736_n 0.0138426f $X=4.725 $Y=1.41 $X2=0 $Y2=0 +cc_282 N_B1_c_300_n N_A_869_297#_c_736_n 0.00620876f $X=5.195 $Y=1.41 $X2=0 ++ $Y2=0 +cc_283 N_B1_c_325_p N_A_869_297#_c_736_n 0.0019017f $X=5.09 $Y=1.16 $X2=0 $Y2=0 +cc_284 N_B1_c_303_n N_A_869_297#_c_736_n 0.00842081f $X=7.28 $Y=1.53 $X2=0 $Y2=0 +cc_285 N_B1_c_311_n N_A_869_297#_c_736_n 0.00660439f $X=4.515 $Y=1.53 $X2=0 ++ $Y2=0 +cc_286 N_B1_c_296_n N_A_869_297#_c_736_n 0.00378307f $X=5.195 $Y=1.202 $X2=0 ++ $Y2=0 +cc_287 N_B1_c_297_n N_A_869_297#_c_736_n 0.0372219f $X=4.96 $Y=1.325 $X2=0 $Y2=0 +cc_288 N_B1_c_300_n N_A_869_297#_c_732_n 2.71904e-19 $X=5.195 $Y=1.41 $X2=0 ++ $Y2=0 +cc_289 N_B1_c_303_n N_A_869_297#_c_732_n 0.0549799f $X=7.28 $Y=1.53 $X2=0 $Y2=0 +cc_290 N_B1_c_299_n N_A_869_297#_c_733_n 0.00144139f $X=4.725 $Y=1.41 $X2=0 ++ $Y2=0 +cc_291 N_B1_c_300_n N_A_869_297#_c_733_n 0.0228638f $X=5.195 $Y=1.41 $X2=0 $Y2=0 +cc_292 N_B1_c_325_p N_A_869_297#_c_733_n 0.0124633f $X=5.09 $Y=1.16 $X2=0 $Y2=0 +cc_293 N_B1_c_303_n N_A_869_297#_c_733_n 0.0270528f $X=7.28 $Y=1.53 $X2=0 $Y2=0 +cc_294 N_B1_c_311_n N_A_869_297#_c_733_n 0.0010382f $X=4.515 $Y=1.53 $X2=0 $Y2=0 +cc_295 N_B1_c_296_n N_A_869_297#_c_733_n 0.00288506f $X=5.195 $Y=1.202 $X2=0 ++ $Y2=0 +cc_296 N_B1_c_297_n N_A_869_297#_c_733_n 0.0119831f $X=4.96 $Y=1.325 $X2=0 $Y2=0 +cc_297 N_B1_c_303_n N_Y_M1019_s 8.82306e-19 $X=7.28 $Y=1.53 $X2=0 $Y2=0 cc_298 N_B1_c_290_n N_Y_c_787_n 0.00889752f $X=4.23 $Y=0.995 $X2=0 $Y2=0 cc_299 N_B1_c_297_n N_Y_c_787_n 0.00932849f $X=4.96 $Y=1.325 $X2=0 $Y2=0 cc_300 N_B1_c_290_n N_Y_c_801_n 2.03469e-19 $X=4.23 $Y=0.995 $X2=0 $Y2=0 @@ -400,9 +403,9 @@ cc_329 N_B1_c_295_n N_Y_c_783_n 0.0260895f $X=7.6 $Y=1.16 $X2=0 $Y2=0 cc_330 N_B1_c_304_n N_Y_c_783_n 0.00228238f $X=7.425 $Y=1.53 $X2=0 $Y2=0 cc_331 N_B1_c_305_n N_Y_c_783_n 0.00618043f $X=7.425 $Y=1.53 $X2=0 $Y2=0 -cc_332 N_B1_c_303_n noxref_12 2.99984e-19 $X=7.28 $Y=1.53 $X2=-0.19 $Y2=-0.24 -cc_333 N_B1_c_304_n noxref_12 0.00247248f $X=7.425 $Y=1.53 $X2=-0.19 $Y2=-0.24 -cc_334 N_B1_c_305_n noxref_12 0.00501617f $X=7.425 $Y=1.53 $X2=-0.19 $Y2=-0.24 +cc_332 N_B1_c_303_n A_1449_297# 2.99984e-19 $X=7.28 $Y=1.53 $X2=-0.19 $Y2=-0.24 +cc_333 N_B1_c_304_n A_1449_297# 0.00247248f $X=7.425 $Y=1.53 $X2=-0.19 $Y2=-0.24 +cc_334 N_B1_c_305_n A_1449_297# 0.00501617f $X=7.425 $Y=1.53 $X2=-0.19 $Y2=-0.24 cc_335 N_B1_c_290_n N_VGND_c_927_n 0.00268723f $X=4.23 $Y=0.995 $X2=0 $Y2=0 cc_336 N_B1_c_290_n N_VGND_c_928_n 0.00104422f $X=4.23 $Y=0.995 $X2=0 $Y2=0 cc_337 N_B1_c_291_n N_VGND_c_928_n 0.00767007f $X=4.815 $Y=0.995 $X2=0 $Y2=0 @@ -417,10 +420,10 @@ cc_346 N_B1_c_291_n N_VGND_c_943_n 0.00448048f $X=4.815 $Y=0.995 $X2=0 $Y2=0 cc_347 N_B1_c_292_n N_VGND_c_943_n 0.00586577f $X=5.295 $Y=0.995 $X2=0 $Y2=0 cc_348 N_B1_c_294_n N_VGND_c_943_n 0.00302906f $X=7.66 $Y=0.995 $X2=0 $Y2=0 -cc_349 N_C1_c_432_n N_noxref_7_c_516_n 0.0143764f $X=5.695 $Y=1.41 $X2=0 $Y2=0 -cc_350 N_C1_c_433_n N_noxref_7_c_516_n 0.0128283f $X=6.175 $Y=1.41 $X2=0 $Y2=0 -cc_351 N_C1_c_434_n N_noxref_7_c_516_n 0.0129691f $X=6.655 $Y=1.41 $X2=0 $Y2=0 -cc_352 N_C1_c_435_n N_noxref_7_c_516_n 0.0131148f $X=7.155 $Y=1.41 $X2=0 $Y2=0 +cc_349 N_C1_c_432_n N_A_27_297#_c_516_n 0.0143764f $X=5.695 $Y=1.41 $X2=0 $Y2=0 +cc_350 N_C1_c_433_n N_A_27_297#_c_516_n 0.0128283f $X=6.175 $Y=1.41 $X2=0 $Y2=0 +cc_351 N_C1_c_434_n N_A_27_297#_c_516_n 0.0129691f $X=6.655 $Y=1.41 $X2=0 $Y2=0 +cc_352 N_C1_c_435_n N_A_27_297#_c_516_n 0.0131148f $X=7.155 $Y=1.41 $X2=0 $Y2=0 cc_353 N_C1_c_432_n N_VPWR_c_620_n 0.00429453f $X=5.695 $Y=1.41 $X2=0 $Y2=0 cc_354 N_C1_c_433_n N_VPWR_c_620_n 0.00429453f $X=6.175 $Y=1.41 $X2=0 $Y2=0 cc_355 N_C1_c_434_n N_VPWR_c_620_n 0.00429453f $X=6.655 $Y=1.41 $X2=0 $Y2=0 @@ -429,14 +432,17 @@ cc_358 N_C1_c_433_n N_VPWR_c_615_n 0.00615861f $X=6.175 $Y=1.41 $X2=0 $Y2=0 cc_359 N_C1_c_434_n N_VPWR_c_615_n 0.00620984f $X=6.655 $Y=1.41 $X2=0 $Y2=0 cc_360 N_C1_c_435_n N_VPWR_c_615_n 0.00630544f $X=7.155 $Y=1.41 $X2=0 $Y2=0 -cc_361 N_C1_c_432_n N_noxref_9_c_732_n 0.0158668f $X=5.695 $Y=1.41 $X2=0 $Y2=0 -cc_362 N_C1_c_433_n N_noxref_9_c_732_n 0.0127349f $X=6.175 $Y=1.41 $X2=0 $Y2=0 -cc_363 N_C1_c_434_n N_noxref_9_c_732_n 0.00457561f $X=6.655 $Y=1.41 $X2=0 $Y2=0 -cc_364 N_C1_c_430_n N_noxref_9_c_732_n 0.0717187f $X=6.83 $Y=1.155 $X2=0 $Y2=0 -cc_365 N_C1_c_436_n N_noxref_9_c_732_n 0.0143237f $X=6.885 $Y=1.16 $X2=0 $Y2=0 -cc_366 N_C1_c_431_n N_noxref_9_c_732_n 0.0164942f $X=7.155 $Y=1.202 $X2=0 $Y2=0 -cc_367 N_C1_c_432_n N_noxref_9_c_733_n 0.00636651f $X=5.695 $Y=1.41 $X2=0 $Y2=0 -cc_368 N_C1_c_436_n N_Y_M29_noxref_d 0.00528592f $X=6.885 $Y=1.16 $X2=0 $Y2=0 +cc_361 N_C1_c_432_n N_A_869_297#_c_732_n 0.0158668f $X=5.695 $Y=1.41 $X2=0 $Y2=0 +cc_362 N_C1_c_433_n N_A_869_297#_c_732_n 0.0127349f $X=6.175 $Y=1.41 $X2=0 $Y2=0 +cc_363 N_C1_c_434_n N_A_869_297#_c_732_n 0.00457561f $X=6.655 $Y=1.41 $X2=0 ++ $Y2=0 +cc_364 N_C1_c_430_n N_A_869_297#_c_732_n 0.0717187f $X=6.83 $Y=1.155 $X2=0 $Y2=0 +cc_365 N_C1_c_436_n N_A_869_297#_c_732_n 0.0143237f $X=6.885 $Y=1.16 $X2=0 $Y2=0 +cc_366 N_C1_c_431_n N_A_869_297#_c_732_n 0.0164942f $X=7.155 $Y=1.202 $X2=0 ++ $Y2=0 +cc_367 N_C1_c_432_n N_A_869_297#_c_733_n 0.00636651f $X=5.695 $Y=1.41 $X2=0 ++ $Y2=0 +cc_368 N_C1_c_436_n N_Y_M1019_s 0.00528592f $X=6.885 $Y=1.16 $X2=0 $Y2=0 cc_369 N_C1_c_426_n N_Y_c_834_n 0.0116741f $X=5.77 $Y=0.995 $X2=0 $Y2=0 cc_370 N_C1_c_427_n N_Y_c_834_n 0.0119432f $X=6.24 $Y=0.995 $X2=0 $Y2=0 cc_371 N_C1_c_430_n N_Y_c_834_n 0.0466473f $X=6.83 $Y=1.155 $X2=0 $Y2=0 @@ -472,120 +478,131 @@ cc_401 N_C1_c_427_n N_VGND_c_943_n 0.00582317f $X=6.24 $Y=0.995 $X2=0 $Y2=0 cc_402 N_C1_c_428_n N_VGND_c_943_n 0.00403265f $X=6.71 $Y=0.995 $X2=0 $Y2=0 cc_403 N_C1_c_429_n N_VGND_c_943_n 0.00588951f $X=7.18 $Y=0.995 $X2=0 $Y2=0 -cc_404 N_noxref_7_c_524_n N_VPWR_M16_noxref_d 0.00352421f $X=1.115 $Y=1.94 -+ $X2=-0.19 $Y2=1.305 -cc_405 N_noxref_7_c_528_n N_VPWR_M18_noxref_d 0.00373688f $X=2.055 $Y=1.95 $X2=0 -+ $Y2=0 -cc_406 N_noxref_7_c_530_n N_VPWR_M20_noxref_d 0.00352431f $X=2.995 $Y=1.95 $X2=0 -+ $Y2=0 -cc_407 N_noxref_7_c_531_n N_VPWR_M22_noxref_d 0.00371889f $X=3.935 $Y=1.95 $X2=0 -+ $Y2=0 -cc_408 N_noxref_7_c_515_n N_VPWR_c_616_n 0.017474f $X=0.26 $Y=2.3 $X2=0 $Y2=0 -cc_409 N_noxref_7_c_524_n N_VPWR_c_616_n 0.0024418f $X=1.115 $Y=1.94 $X2=0 $Y2=0 -cc_410 N_noxref_7_c_524_n N_VPWR_c_617_n 0.0032881f $X=1.115 $Y=1.94 $X2=0 $Y2=0 -cc_411 N_noxref_7_c_561_p N_VPWR_c_617_n 0.011801f $X=1.2 $Y=2.3 $X2=0 $Y2=0 -cc_412 N_noxref_7_c_528_n N_VPWR_c_617_n 0.00257067f $X=2.055 $Y=1.95 $X2=0 -+ $Y2=0 -cc_413 N_noxref_7_c_528_n N_VPWR_c_618_n 0.00346124f $X=2.055 $Y=1.95 $X2=0 -+ $Y2=0 -cc_414 N_noxref_7_c_564_p N_VPWR_c_618_n 0.011801f $X=2.14 $Y=2.3 $X2=0 $Y2=0 -cc_415 N_noxref_7_c_530_n N_VPWR_c_618_n 0.00257067f $X=2.995 $Y=1.95 $X2=0 -+ $Y2=0 -cc_416 N_noxref_7_c_530_n N_VPWR_c_619_n 0.00346124f $X=2.995 $Y=1.95 $X2=0 -+ $Y2=0 -cc_417 N_noxref_7_c_567_p N_VPWR_c_619_n 0.011801f $X=3.08 $Y=2.3 $X2=0 $Y2=0 -cc_418 N_noxref_7_c_531_n N_VPWR_c_619_n 0.00257067f $X=3.935 $Y=1.95 $X2=0 -+ $Y2=0 -cc_419 N_noxref_7_c_531_n N_VPWR_c_620_n 0.00346124f $X=3.935 $Y=1.95 $X2=0 -+ $Y2=0 -cc_420 N_noxref_7_c_570_p N_VPWR_c_620_n 0.0119415f $X=4.02 $Y=2.255 $X2=0 $Y2=0 -cc_421 N_noxref_7_c_516_n N_VPWR_c_620_n 0.225533f $X=7.9 $Y=2.34 $X2=0 $Y2=0 -cc_422 N_noxref_7_M16_noxref_s N_VPWR_c_615_n 0.00238238f $X=0.135 $Y=1.485 -+ $X2=0 $Y2=0 -cc_423 N_noxref_7_M17_noxref_d N_VPWR_c_615_n 0.00271014f $X=1.055 $Y=1.485 -+ $X2=0 $Y2=0 -cc_424 N_noxref_7_M19_noxref_d N_VPWR_c_615_n 0.00269325f $X=1.995 $Y=1.485 -+ $X2=0 $Y2=0 -cc_425 N_noxref_7_M21_noxref_d N_VPWR_c_615_n 0.00269325f $X=2.935 $Y=1.485 -+ $X2=0 $Y2=0 -cc_426 N_noxref_7_M23_noxref_d N_VPWR_c_615_n 0.00251101f $X=3.875 $Y=1.485 -+ $X2=0 $Y2=0 -cc_427 N_noxref_7_M25_noxref_d N_VPWR_c_615_n 0.00231289f $X=4.815 $Y=1.485 -+ $X2=0 $Y2=0 -cc_428 N_noxref_7_M31_noxref_d N_VPWR_c_615_n 0.00217543f $X=7.755 $Y=1.485 -+ $X2=0 $Y2=0 -cc_429 N_noxref_7_c_515_n N_VPWR_c_615_n 0.00954719f $X=0.26 $Y=2.3 $X2=0 $Y2=0 -cc_430 N_noxref_7_c_524_n N_VPWR_c_615_n 0.0115793f $X=1.115 $Y=1.94 $X2=0 $Y2=0 -cc_431 N_noxref_7_c_561_p N_VPWR_c_615_n 0.00646745f $X=1.2 $Y=2.3 $X2=0 $Y2=0 -cc_432 N_noxref_7_c_528_n N_VPWR_c_615_n 0.0118582f $X=2.055 $Y=1.95 $X2=0 $Y2=0 -cc_433 N_noxref_7_c_564_p N_VPWR_c_615_n 0.00646745f $X=2.14 $Y=2.3 $X2=0 $Y2=0 -cc_434 N_noxref_7_c_530_n N_VPWR_c_615_n 0.0118582f $X=2.995 $Y=1.95 $X2=0 $Y2=0 -cc_435 N_noxref_7_c_567_p N_VPWR_c_615_n 0.00646745f $X=3.08 $Y=2.3 $X2=0 $Y2=0 -cc_436 N_noxref_7_c_531_n N_VPWR_c_615_n 0.0118582f $X=3.935 $Y=1.95 $X2=0 $Y2=0 -cc_437 N_noxref_7_c_570_p N_VPWR_c_615_n 0.00654444f $X=4.02 $Y=2.255 $X2=0 -+ $Y2=0 -cc_438 N_noxref_7_c_516_n N_VPWR_c_615_n 0.141495f $X=7.9 $Y=2.34 $X2=0 $Y2=0 -cc_439 N_noxref_7_c_515_n N_VPWR_c_622_n 0.016131f $X=0.26 $Y=2.3 $X2=0 $Y2=0 -cc_440 N_noxref_7_c_524_n N_VPWR_c_622_n 0.0203416f $X=1.115 $Y=1.94 $X2=0 $Y2=0 -cc_441 N_noxref_7_c_561_p N_VPWR_c_622_n 0.0128538f $X=1.2 $Y=2.3 $X2=0 $Y2=0 -cc_442 N_noxref_7_c_561_p N_VPWR_c_623_n 0.0141845f $X=1.2 $Y=2.3 $X2=0 $Y2=0 -cc_443 N_noxref_7_c_528_n N_VPWR_c_623_n 0.0203018f $X=2.055 $Y=1.95 $X2=0 $Y2=0 -cc_444 N_noxref_7_c_564_p N_VPWR_c_623_n 0.0116296f $X=2.14 $Y=2.3 $X2=0 $Y2=0 -cc_445 N_noxref_7_c_564_p N_VPWR_c_624_n 0.0141845f $X=2.14 $Y=2.3 $X2=0 $Y2=0 -cc_446 N_noxref_7_c_530_n N_VPWR_c_624_n 0.0203018f $X=2.995 $Y=1.95 $X2=0 $Y2=0 -cc_447 N_noxref_7_c_567_p N_VPWR_c_624_n 0.0116296f $X=3.08 $Y=2.3 $X2=0 $Y2=0 -cc_448 N_noxref_7_c_567_p N_VPWR_c_625_n 0.0141845f $X=3.08 $Y=2.3 $X2=0 $Y2=0 -cc_449 N_noxref_7_c_531_n N_VPWR_c_625_n 0.0203018f $X=3.935 $Y=1.95 $X2=0 $Y2=0 -cc_450 N_noxref_7_c_570_p N_VPWR_c_625_n 0.0129886f $X=4.02 $Y=2.255 $X2=0 $Y2=0 -cc_451 N_noxref_7_c_516_n N_noxref_9_M24_noxref_d 0.00353637f $X=7.9 $Y=2.34 -+ $X2=-0.19 $Y2=1.305 -cc_452 N_noxref_7_c_516_n N_noxref_9_M28_noxref_d 0.00375335f $X=7.9 $Y=2.34 -+ $X2=0 $Y2=0 -cc_453 N_noxref_7_M25_noxref_d N_noxref_9_c_736_n 0.00375343f $X=4.815 $Y=1.485 -+ $X2=0 $Y2=0 -cc_454 N_noxref_7_c_533_n N_noxref_9_c_736_n 0.0252594f $X=4.02 $Y=2.105 $X2=0 -+ $Y2=0 -cc_455 N_noxref_7_c_516_n N_noxref_9_c_736_n 0.044002f $X=7.9 $Y=2.34 $X2=0 -+ $Y2=0 -cc_456 N_noxref_7_c_516_n N_noxref_9_c_732_n 0.00581426f $X=7.9 $Y=2.34 $X2=0 -+ $Y2=0 -cc_457 N_noxref_7_c_516_n N_noxref_9_c_733_n 0.0202793f $X=7.9 $Y=2.34 $X2=0 -+ $Y2=0 -cc_458 N_noxref_7_c_516_n noxref_10 0.00489103f $X=7.9 $Y=2.34 $X2=-0.19 +cc_404 N_A_27_297#_c_524_n N_VPWR_M1000_s 0.00352421f $X=1.115 $Y=1.94 $X2=-0.19 + $Y2=1.305 -cc_459 N_noxref_7_c_516_n N_Y_M27_noxref_d 0.00375335f $X=7.9 $Y=2.34 $X2=0 +cc_405 N_A_27_297#_c_528_n N_VPWR_M1014_s 0.00373688f $X=2.055 $Y=1.95 $X2=0 + $Y2=0 -cc_460 N_noxref_7_c_516_n N_Y_M29_noxref_d 0.00415694f $X=7.9 $Y=2.34 $X2=0 +cc_406 N_A_27_297#_c_530_n N_VPWR_M1010_d 0.00352431f $X=2.995 $Y=1.95 $X2=0 + $Y2=0 -cc_461 N_noxref_7_c_516_n N_Y_c_807_n 0.103509f $X=7.9 $Y=2.34 $X2=0 $Y2=0 -cc_462 N_noxref_7_M31_noxref_d Y 0.00705879f $X=7.755 $Y=1.485 $X2=0 $Y2=0 -cc_463 N_noxref_7_c_516_n Y 0.0254904f $X=7.9 $Y=2.34 $X2=0 $Y2=0 -cc_464 N_noxref_7_c_516_n noxref_12 0.0043297f $X=7.9 $Y=2.34 $X2=-0.19 +cc_407 N_A_27_297#_c_531_n N_VPWR_M1018_d 0.00371889f $X=3.935 $Y=1.95 $X2=0 ++ $Y2=0 +cc_408 N_A_27_297#_c_515_n N_VPWR_c_616_n 0.017474f $X=0.26 $Y=2.3 $X2=0 $Y2=0 +cc_409 N_A_27_297#_c_524_n N_VPWR_c_616_n 0.0024418f $X=1.115 $Y=1.94 $X2=0 ++ $Y2=0 +cc_410 N_A_27_297#_c_524_n N_VPWR_c_617_n 0.0032881f $X=1.115 $Y=1.94 $X2=0 ++ $Y2=0 +cc_411 N_A_27_297#_c_561_p N_VPWR_c_617_n 0.011801f $X=1.2 $Y=2.3 $X2=0 $Y2=0 +cc_412 N_A_27_297#_c_528_n N_VPWR_c_617_n 0.00257067f $X=2.055 $Y=1.95 $X2=0 ++ $Y2=0 +cc_413 N_A_27_297#_c_528_n N_VPWR_c_618_n 0.00346124f $X=2.055 $Y=1.95 $X2=0 ++ $Y2=0 +cc_414 N_A_27_297#_c_564_p N_VPWR_c_618_n 0.011801f $X=2.14 $Y=2.3 $X2=0 $Y2=0 +cc_415 N_A_27_297#_c_530_n N_VPWR_c_618_n 0.00257067f $X=2.995 $Y=1.95 $X2=0 ++ $Y2=0 +cc_416 N_A_27_297#_c_530_n N_VPWR_c_619_n 0.00346124f $X=2.995 $Y=1.95 $X2=0 ++ $Y2=0 +cc_417 N_A_27_297#_c_567_p N_VPWR_c_619_n 0.011801f $X=3.08 $Y=2.3 $X2=0 $Y2=0 +cc_418 N_A_27_297#_c_531_n N_VPWR_c_619_n 0.00257067f $X=3.935 $Y=1.95 $X2=0 ++ $Y2=0 +cc_419 N_A_27_297#_c_531_n N_VPWR_c_620_n 0.00346124f $X=3.935 $Y=1.95 $X2=0 ++ $Y2=0 +cc_420 N_A_27_297#_c_570_p N_VPWR_c_620_n 0.0119415f $X=4.02 $Y=2.255 $X2=0 ++ $Y2=0 +cc_421 N_A_27_297#_c_516_n N_VPWR_c_620_n 0.225533f $X=7.9 $Y=2.34 $X2=0 $Y2=0 +cc_422 N_A_27_297#_M1000_d N_VPWR_c_615_n 0.00238238f $X=0.135 $Y=1.485 $X2=0 ++ $Y2=0 +cc_423 N_A_27_297#_M1002_d N_VPWR_c_615_n 0.00271014f $X=1.055 $Y=1.485 $X2=0 ++ $Y2=0 +cc_424 N_A_27_297#_M1007_s N_VPWR_c_615_n 0.00269325f $X=1.995 $Y=1.485 $X2=0 ++ $Y2=0 +cc_425 N_A_27_297#_M1016_s N_VPWR_c_615_n 0.00269325f $X=2.935 $Y=1.485 $X2=0 ++ $Y2=0 +cc_426 N_A_27_297#_M1029_d N_VPWR_c_615_n 0.00251101f $X=3.875 $Y=1.485 $X2=0 ++ $Y2=0 +cc_427 N_A_27_297#_M1023_d N_VPWR_c_615_n 0.00231289f $X=4.815 $Y=1.485 $X2=0 ++ $Y2=0 +cc_428 N_A_27_297#_M1027_d N_VPWR_c_615_n 0.00217543f $X=7.755 $Y=1.485 $X2=0 ++ $Y2=0 +cc_429 N_A_27_297#_c_515_n N_VPWR_c_615_n 0.00954719f $X=0.26 $Y=2.3 $X2=0 $Y2=0 +cc_430 N_A_27_297#_c_524_n N_VPWR_c_615_n 0.0115793f $X=1.115 $Y=1.94 $X2=0 ++ $Y2=0 +cc_431 N_A_27_297#_c_561_p N_VPWR_c_615_n 0.00646745f $X=1.2 $Y=2.3 $X2=0 $Y2=0 +cc_432 N_A_27_297#_c_528_n N_VPWR_c_615_n 0.0118582f $X=2.055 $Y=1.95 $X2=0 ++ $Y2=0 +cc_433 N_A_27_297#_c_564_p N_VPWR_c_615_n 0.00646745f $X=2.14 $Y=2.3 $X2=0 $Y2=0 +cc_434 N_A_27_297#_c_530_n N_VPWR_c_615_n 0.0118582f $X=2.995 $Y=1.95 $X2=0 ++ $Y2=0 +cc_435 N_A_27_297#_c_567_p N_VPWR_c_615_n 0.00646745f $X=3.08 $Y=2.3 $X2=0 $Y2=0 +cc_436 N_A_27_297#_c_531_n N_VPWR_c_615_n 0.0118582f $X=3.935 $Y=1.95 $X2=0 ++ $Y2=0 +cc_437 N_A_27_297#_c_570_p N_VPWR_c_615_n 0.00654444f $X=4.02 $Y=2.255 $X2=0 ++ $Y2=0 +cc_438 N_A_27_297#_c_516_n N_VPWR_c_615_n 0.141495f $X=7.9 $Y=2.34 $X2=0 $Y2=0 +cc_439 N_A_27_297#_c_515_n N_VPWR_c_622_n 0.016131f $X=0.26 $Y=2.3 $X2=0 $Y2=0 +cc_440 N_A_27_297#_c_524_n N_VPWR_c_622_n 0.0203416f $X=1.115 $Y=1.94 $X2=0 ++ $Y2=0 +cc_441 N_A_27_297#_c_561_p N_VPWR_c_622_n 0.0128538f $X=1.2 $Y=2.3 $X2=0 $Y2=0 +cc_442 N_A_27_297#_c_561_p N_VPWR_c_623_n 0.0141845f $X=1.2 $Y=2.3 $X2=0 $Y2=0 +cc_443 N_A_27_297#_c_528_n N_VPWR_c_623_n 0.0203018f $X=2.055 $Y=1.95 $X2=0 ++ $Y2=0 +cc_444 N_A_27_297#_c_564_p N_VPWR_c_623_n 0.0116296f $X=2.14 $Y=2.3 $X2=0 $Y2=0 +cc_445 N_A_27_297#_c_564_p N_VPWR_c_624_n 0.0141845f $X=2.14 $Y=2.3 $X2=0 $Y2=0 +cc_446 N_A_27_297#_c_530_n N_VPWR_c_624_n 0.0203018f $X=2.995 $Y=1.95 $X2=0 ++ $Y2=0 +cc_447 N_A_27_297#_c_567_p N_VPWR_c_624_n 0.0116296f $X=3.08 $Y=2.3 $X2=0 $Y2=0 +cc_448 N_A_27_297#_c_567_p N_VPWR_c_625_n 0.0141845f $X=3.08 $Y=2.3 $X2=0 $Y2=0 +cc_449 N_A_27_297#_c_531_n N_VPWR_c_625_n 0.0203018f $X=3.935 $Y=1.95 $X2=0 ++ $Y2=0 +cc_450 N_A_27_297#_c_570_p N_VPWR_c_625_n 0.0129886f $X=4.02 $Y=2.255 $X2=0 ++ $Y2=0 +cc_451 N_A_27_297#_c_516_n N_A_869_297#_M1017_s 0.00353637f $X=7.9 $Y=2.34 ++ $X2=-0.19 $Y2=1.305 +cc_452 N_A_27_297#_c_516_n N_A_869_297#_M1006_d 0.00375335f $X=7.9 $Y=2.34 $X2=0 ++ $Y2=0 +cc_453 N_A_27_297#_M1023_d N_A_869_297#_c_736_n 0.00375343f $X=4.815 $Y=1.485 ++ $X2=0 $Y2=0 +cc_454 N_A_27_297#_c_533_n N_A_869_297#_c_736_n 0.0252594f $X=4.02 $Y=2.105 ++ $X2=0 $Y2=0 +cc_455 N_A_27_297#_c_516_n N_A_869_297#_c_736_n 0.044002f $X=7.9 $Y=2.34 $X2=0 ++ $Y2=0 +cc_456 N_A_27_297#_c_516_n N_A_869_297#_c_732_n 0.00581426f $X=7.9 $Y=2.34 $X2=0 ++ $Y2=0 +cc_457 N_A_27_297#_c_516_n N_A_869_297#_c_733_n 0.0202793f $X=7.9 $Y=2.34 $X2=0 ++ $Y2=0 +cc_458 N_A_27_297#_c_516_n A_1057_297# 0.00489103f $X=7.9 $Y=2.34 $X2=-0.19 + $Y2=1.305 -cc_465 N_VPWR_c_615_n N_noxref_9_M24_noxref_d 0.00232895f $X=8.05 $Y=2.72 -+ $X2=-0.19 $Y2=-0.24 -cc_466 N_VPWR_c_615_n N_noxref_9_M28_noxref_d 0.00240926f $X=8.05 $Y=2.72 $X2=0 +cc_459 N_A_27_297#_c_516_n N_Y_M1015_s 0.00375335f $X=7.9 $Y=2.34 $X2=0 $Y2=0 +cc_460 N_A_27_297#_c_516_n N_Y_M1019_s 0.00415694f $X=7.9 $Y=2.34 $X2=0 $Y2=0 +cc_461 N_A_27_297#_c_516_n N_Y_c_807_n 0.103509f $X=7.9 $Y=2.34 $X2=0 $Y2=0 +cc_462 N_A_27_297#_M1027_d Y 0.00705879f $X=7.755 $Y=1.485 $X2=0 $Y2=0 +cc_463 N_A_27_297#_c_516_n Y 0.0254904f $X=7.9 $Y=2.34 $X2=0 $Y2=0 +cc_464 N_A_27_297#_c_516_n A_1449_297# 0.0043297f $X=7.9 $Y=2.34 $X2=-0.19 ++ $Y2=1.305 +cc_465 N_VPWR_c_615_n N_A_869_297#_M1017_s 0.00232895f $X=8.05 $Y=2.72 $X2=-0.19 ++ $Y2=-0.24 +cc_466 N_VPWR_c_615_n N_A_869_297#_M1006_d 0.00240926f $X=8.05 $Y=2.72 $X2=0 + $Y2=0 -cc_467 N_VPWR_c_615_n noxref_10 0.00256987f $X=8.05 $Y=2.72 $X2=-0.19 $Y2=-0.24 -cc_468 N_VPWR_c_615_n N_Y_M27_noxref_d 0.00240926f $X=8.05 $Y=2.72 $X2=0 $Y2=0 -cc_469 N_VPWR_c_615_n N_Y_M29_noxref_d 0.00256987f $X=8.05 $Y=2.72 $X2=0 $Y2=0 +cc_467 N_VPWR_c_615_n A_1057_297# 0.00256987f $X=8.05 $Y=2.72 $X2=-0.19 ++ $Y2=-0.24 +cc_468 N_VPWR_c_615_n N_Y_M1015_s 0.00240926f $X=8.05 $Y=2.72 $X2=0 $Y2=0 +cc_469 N_VPWR_c_615_n N_Y_M1019_s 0.00256987f $X=8.05 $Y=2.72 $X2=0 $Y2=0 cc_470 N_VPWR_c_620_n Y 0.00180709f $X=8.05 $Y=2.72 $X2=0 $Y2=0 cc_471 N_VPWR_c_615_n Y 0.00362255f $X=8.05 $Y=2.72 $X2=0 $Y2=0 -cc_472 N_VPWR_c_615_n noxref_12 0.00265018f $X=8.05 $Y=2.72 $X2=-0.19 $Y2=-0.24 -cc_473 N_noxref_9_c_732_n noxref_10 0.00193908f $X=6.415 $Y=1.61 $X2=-0.19 +cc_472 N_VPWR_c_615_n A_1449_297# 0.00265018f $X=8.05 $Y=2.72 $X2=-0.19 ++ $Y2=-0.24 +cc_473 N_A_869_297#_c_732_n A_1057_297# 0.00193908f $X=6.415 $Y=1.61 $X2=-0.19 + $Y2=1.305 -cc_474 N_noxref_9_c_733_n noxref_10 0.00578553f $X=5.295 $Y=1.57 $X2=-0.19 +cc_474 N_A_869_297#_c_733_n A_1057_297# 0.00578553f $X=5.295 $Y=1.57 $X2=-0.19 + $Y2=1.305 -cc_475 N_noxref_9_c_732_n N_Y_M27_noxref_d 0.00200574f $X=6.415 $Y=1.61 $X2=0 +cc_475 N_A_869_297#_c_732_n N_Y_M1015_s 0.00200574f $X=6.415 $Y=1.61 $X2=0 $Y2=0 +cc_476 N_A_869_297#_c_733_n N_Y_c_801_n 0.00283531f $X=5.295 $Y=1.57 $X2=0 $Y2=0 +cc_477 N_A_869_297#_M1006_d N_Y_c_807_n 0.00359876f $X=6.265 $Y=1.485 $X2=0 + $Y2=0 -cc_476 N_noxref_9_c_733_n N_Y_c_801_n 0.00283531f $X=5.295 $Y=1.57 $X2=0 $Y2=0 -cc_477 N_noxref_9_M28_noxref_d N_Y_c_807_n 0.00359876f $X=6.265 $Y=1.485 $X2=0 -+ $Y2=0 -cc_478 N_noxref_9_c_732_n N_Y_c_807_n 0.0452041f $X=6.415 $Y=1.61 $X2=0 $Y2=0 -cc_479 N_noxref_9_c_733_n N_Y_c_807_n 0.012939f $X=5.295 $Y=1.57 $X2=0 $Y2=0 -cc_480 N_noxref_9_c_732_n N_Y_c_823_n 0.00246739f $X=6.415 $Y=1.61 $X2=0 $Y2=0 -cc_481 N_noxref_9_c_733_n N_Y_c_823_n 0.00100183f $X=5.295 $Y=1.57 $X2=0 $Y2=0 -cc_482 N_Y_c_807_n noxref_12 0.00453035f $X=7.68 $Y=1.975 $X2=-0.19 $Y2=-0.24 +cc_478 N_A_869_297#_c_732_n N_Y_c_807_n 0.0452041f $X=6.415 $Y=1.61 $X2=0 $Y2=0 +cc_479 N_A_869_297#_c_733_n N_Y_c_807_n 0.012939f $X=5.295 $Y=1.57 $X2=0 $Y2=0 +cc_480 N_A_869_297#_c_732_n N_Y_c_823_n 0.00246739f $X=6.415 $Y=1.61 $X2=0 $Y2=0 +cc_481 N_A_869_297#_c_733_n N_Y_c_823_n 0.00100183f $X=5.295 $Y=1.57 $X2=0 $Y2=0 +cc_482 N_Y_c_807_n A_1449_297# 0.00453035f $X=7.68 $Y=1.975 $X2=-0.19 $Y2=-0.24 cc_483 N_Y_c_787_n N_VGND_M1031_d 0.00665097f $X=4.275 $Y=0.78 $X2=0 $Y2=0 cc_484 N_Y_c_801_n N_VGND_M1008_d 0.00415578f $X=5.425 $Y=0.74 $X2=0 $Y2=0 cc_485 N_Y_c_834_n N_VGND_M1001_d 0.00402934f $X=6.365 $Y=0.745 $X2=0 $Y2=0
diff --git a/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice b/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice index b517f08..4b02815 100644 --- a/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice +++ b/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a211oi_4.spice -* Created: Thu Aug 27 18:51:57 2020 +* Created: Wed Sep 2 08:16:16 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * @@ -63,54 +63,54 @@ MM1024 N_VGND_M1024_d N_B1_M1024_g N_Y_M1022_s VNB NSHORT L=0.15 W=0.65 + AD=0.1885 AS=0.10725 PD=1.88 PS=0.98 NRD=0.912 NRS=8.304 M=1 R=4.33333 + SA=75007.4 SB=75000.2 A=0.0975 P=1.6 MULT=1 -MM16_noxref N_VPWR_M16_noxref_d N_A2_M16_noxref_g N_noxref_7_M16_noxref_s VPB -+ PHIGHVT L=0.18 W=1 AD=0.145 AS=0.27 PD=1.29 PS=2.54 NRD=0.9653 NRS=0.9653 M=1 -+ R=5.55556 SA=90000.2 SB=90007.3 A=0.18 P=2.36 MULT=1 -MM17_noxref N_noxref_7_M17_noxref_d N_A2_M17_noxref_g N_VPWR_M16_noxref_d VPB -+ PHIGHVT L=0.18 W=1 AD=0.145 AS=0.145 PD=1.29 PS=1.29 NRD=0.9653 NRS=0.9653 M=1 -+ R=5.55556 SA=90000.6 SB=90006.9 A=0.18 P=2.36 MULT=1 -MM18_noxref N_VPWR_M18_noxref_d N_A2_M18_noxref_g N_noxref_7_M17_noxref_d VPB -+ PHIGHVT L=0.18 W=1 AD=0.145 AS=0.145 PD=1.29 PS=1.29 NRD=0.9653 NRS=0.9653 M=1 -+ R=5.55556 SA=90001.1 SB=90006.4 A=0.18 P=2.36 MULT=1 -MM19_noxref N_noxref_7_M19_noxref_d N_A1_M19_noxref_g N_VPWR_M18_noxref_d VPB -+ PHIGHVT L=0.18 W=1 AD=0.145 AS=0.145 PD=1.29 PS=1.29 NRD=0.9653 NRS=0.9653 M=1 -+ R=5.55556 SA=90001.6 SB=90005.9 A=0.18 P=2.36 MULT=1 -MM20_noxref N_VPWR_M20_noxref_d N_A1_M20_noxref_g N_noxref_7_M19_noxref_d VPB -+ PHIGHVT L=0.18 W=1 AD=0.145 AS=0.145 PD=1.29 PS=1.29 NRD=0.9653 NRS=0.9653 M=1 -+ R=5.55556 SA=90002.1 SB=90005.5 A=0.18 P=2.36 MULT=1 -MM21_noxref N_noxref_7_M21_noxref_d N_A1_M21_noxref_g N_VPWR_M20_noxref_d VPB -+ PHIGHVT L=0.18 W=1 AD=0.145 AS=0.145 PD=1.29 PS=1.29 NRD=0.9653 NRS=0.9653 M=1 -+ R=5.55556 SA=90002.5 SB=90005 A=0.18 P=2.36 MULT=1 -MM22_noxref N_VPWR_M22_noxref_d N_A1_M22_noxref_g N_noxref_7_M21_noxref_d VPB -+ PHIGHVT L=0.18 W=1 AD=0.145 AS=0.145 PD=1.29 PS=1.29 NRD=0.9653 NRS=0.9653 M=1 -+ R=5.55556 SA=90003 SB=90004.5 A=0.18 P=2.36 MULT=1 -MM23_noxref N_noxref_7_M23_noxref_d N_A2_M23_noxref_g N_VPWR_M22_noxref_d VPB -+ PHIGHVT L=0.18 W=1 AD=0.145 AS=0.145 PD=1.29 PS=1.29 NRD=0.9653 NRS=0.9653 M=1 -+ R=5.55556 SA=90003.5 SB=90004.1 A=0.18 P=2.36 MULT=1 -MM24_noxref N_noxref_9_M24_noxref_d N_B1_M24_noxref_g N_noxref_7_M23_noxref_d -+ VPB PHIGHVT L=0.18 W=1 AD=0.145 AS=0.145 PD=1.29 PS=1.29 NRD=0.9653 NRS=0.9653 -+ M=1 R=5.55556 SA=90003.9 SB=90003.6 A=0.18 P=2.36 MULT=1 -MM25_noxref N_noxref_7_M25_noxref_d N_B1_M25_noxref_g N_noxref_9_M24_noxref_d -+ VPB PHIGHVT L=0.18 W=1 AD=0.145 AS=0.145 PD=1.29 PS=1.29 NRD=0.9653 NRS=0.9653 -+ M=1 R=5.55556 SA=90004.4 SB=90003.1 A=0.18 P=2.36 MULT=1 -MM26_noxref noxref_10 N_B1_M26_noxref_g N_noxref_7_M25_noxref_d VPB PHIGHVT -+ L=0.18 W=1 AD=0.16 AS=0.145 PD=1.32 PS=1.29 NRD=20.6653 NRS=0.9653 M=1 -+ R=5.55556 SA=90004.9 SB=90002.6 A=0.18 P=2.36 MULT=1 -MM27_noxref N_Y_M27_noxref_d N_C1_M27_noxref_g noxref_10 VPB PHIGHVT L=0.18 W=1 -+ AD=0.15 AS=0.16 PD=1.3 PS=1.32 NRD=1.9503 NRS=20.6653 M=1 R=5.55556 SA=90005.4 +MM1000 N_A_27_297#_M1000_d N_A2_M1000_g N_VPWR_M1000_s VPB PHIGHVT L=0.18 W=1 ++ AD=0.27 AS=0.145 PD=2.54 PS=1.29 NRD=0.9653 NRS=0.9653 M=1 R=5.55556 ++ SA=90000.2 SB=90007.3 A=0.18 P=2.36 MULT=1 +MM1002 N_A_27_297#_M1002_d N_A2_M1002_g N_VPWR_M1000_s VPB PHIGHVT L=0.18 W=1 ++ AD=0.145 AS=0.145 PD=1.29 PS=1.29 NRD=0.9653 NRS=0.9653 M=1 R=5.55556 ++ SA=90000.6 SB=90006.9 A=0.18 P=2.36 MULT=1 +MM1014 N_A_27_297#_M1002_d N_A2_M1014_g N_VPWR_M1014_s VPB PHIGHVT L=0.18 W=1 ++ AD=0.145 AS=0.145 PD=1.29 PS=1.29 NRD=0.9653 NRS=0.9653 M=1 R=5.55556 ++ SA=90001.1 SB=90006.4 A=0.18 P=2.36 MULT=1 +MM1007 N_VPWR_M1014_s N_A1_M1007_g N_A_27_297#_M1007_s VPB PHIGHVT L=0.18 W=1 ++ AD=0.145 AS=0.145 PD=1.29 PS=1.29 NRD=0.9653 NRS=0.9653 M=1 R=5.55556 ++ SA=90001.6 SB=90005.9 A=0.18 P=2.36 MULT=1 +MM1010 N_VPWR_M1010_d N_A1_M1010_g N_A_27_297#_M1007_s VPB PHIGHVT L=0.18 W=1 ++ AD=0.145 AS=0.145 PD=1.29 PS=1.29 NRD=0.9653 NRS=0.9653 M=1 R=5.55556 ++ SA=90002.1 SB=90005.5 A=0.18 P=2.36 MULT=1 +MM1016 N_VPWR_M1010_d N_A1_M1016_g N_A_27_297#_M1016_s VPB PHIGHVT L=0.18 W=1 ++ AD=0.145 AS=0.145 PD=1.29 PS=1.29 NRD=0.9653 NRS=0.9653 M=1 R=5.55556 ++ SA=90002.5 SB=90005 A=0.18 P=2.36 MULT=1 +MM1018 N_VPWR_M1018_d N_A1_M1018_g N_A_27_297#_M1016_s VPB PHIGHVT L=0.18 W=1 ++ AD=0.145 AS=0.145 PD=1.29 PS=1.29 NRD=0.9653 NRS=0.9653 M=1 R=5.55556 SA=90003 ++ SB=90004.5 A=0.18 P=2.36 MULT=1 +MM1029 N_A_27_297#_M1029_d N_A2_M1029_g N_VPWR_M1018_d VPB PHIGHVT L=0.18 W=1 ++ AD=0.145 AS=0.145 PD=1.29 PS=1.29 NRD=0.9653 NRS=0.9653 M=1 R=5.55556 ++ SA=90003.5 SB=90004.1 A=0.18 P=2.36 MULT=1 +MM1017 N_A_27_297#_M1029_d N_B1_M1017_g N_A_869_297#_M1017_s VPB PHIGHVT L=0.18 ++ W=1 AD=0.145 AS=0.145 PD=1.29 PS=1.29 NRD=0.9653 NRS=0.9653 M=1 R=5.55556 ++ SA=90003.9 SB=90003.6 A=0.18 P=2.36 MULT=1 +MM1023 N_A_27_297#_M1023_d N_B1_M1023_g N_A_869_297#_M1017_s VPB PHIGHVT L=0.18 ++ W=1 AD=0.145 AS=0.145 PD=1.29 PS=1.29 NRD=0.9653 NRS=0.9653 M=1 R=5.55556 ++ SA=90004.4 SB=90003.1 A=0.18 P=2.36 MULT=1 +MM1009 N_A_27_297#_M1023_d N_B1_M1009_g A_1057_297# VPB PHIGHVT L=0.18 W=1 ++ AD=0.145 AS=0.16 PD=1.29 PS=1.32 NRD=0.9653 NRS=20.6653 M=1 R=5.55556 ++ SA=90004.9 SB=90002.6 A=0.18 P=2.36 MULT=1 +MM1015 A_1057_297# N_C1_M1015_g N_Y_M1015_s VPB PHIGHVT L=0.18 W=1 AD=0.16 ++ AS=0.15 PD=1.32 PS=1.3 NRD=20.6653 NRS=1.9503 M=1 R=5.55556 SA=90005.4 + SB=90002.1 A=0.18 P=2.36 MULT=1 -MM28_noxref N_noxref_9_M28_noxref_d N_C1_M28_noxref_g N_Y_M27_noxref_d VPB -+ PHIGHVT L=0.18 W=1 AD=0.15 AS=0.15 PD=1.3 PS=1.3 NRD=1.9503 NRS=1.9503 M=1 -+ R=5.55556 SA=90005.9 SB=90001.7 A=0.18 P=2.36 MULT=1 -MM29_noxref N_Y_M29_noxref_d N_C1_M29_noxref_g N_noxref_9_M28_noxref_d VPB -+ PHIGHVT L=0.18 W=1 AD=0.16 AS=0.15 PD=1.32 PS=1.3 NRD=5.8903 NRS=1.9503 M=1 -+ R=5.55556 SA=90006.3 SB=90001.2 A=0.18 P=2.36 MULT=1 -MM30_noxref noxref_12 N_C1_M30_noxref_g N_Y_M29_noxref_d VPB PHIGHVT L=0.18 W=1 -+ AD=0.165 AS=0.16 PD=1.33 PS=1.32 NRD=21.6503 NRS=1.9503 M=1 R=5.55556 -+ SA=90006.8 SB=90000.7 A=0.18 P=2.36 MULT=1 -MM31_noxref N_noxref_7_M31_noxref_d N_B1_M31_noxref_g noxref_12 VPB PHIGHVT -+ L=0.18 W=1 AD=0.27 AS=0.165 PD=2.54 PS=1.33 NRD=0.9653 NRS=21.6503 M=1 -+ R=5.55556 SA=90007.3 SB=90000.2 A=0.18 P=2.36 MULT=1 +MM1006 N_A_869_297#_M1006_d N_C1_M1006_g N_Y_M1015_s VPB PHIGHVT L=0.18 W=1 ++ AD=0.15 AS=0.15 PD=1.3 PS=1.3 NRD=1.9503 NRS=1.9503 M=1 R=5.55556 SA=90005.9 ++ SB=90001.7 A=0.18 P=2.36 MULT=1 +MM1019 N_A_869_297#_M1006_d N_C1_M1019_g N_Y_M1019_s VPB PHIGHVT L=0.18 W=1 ++ AD=0.15 AS=0.16 PD=1.3 PS=1.32 NRD=1.9503 NRS=5.8903 M=1 R=5.55556 SA=90006.3 ++ SB=90001.2 A=0.18 P=2.36 MULT=1 +MM1026 A_1449_297# N_C1_M1026_g N_Y_M1019_s VPB PHIGHVT L=0.18 W=1 AD=0.165 ++ AS=0.16 PD=1.33 PS=1.32 NRD=21.6503 NRS=1.9503 M=1 R=5.55556 SA=90006.8 ++ SB=90000.7 A=0.18 P=2.36 MULT=1 +MM1027 N_A_27_297#_M1027_d N_B1_M1027_g A_1449_297# VPB PHIGHVT L=0.18 W=1 ++ AD=0.27 AS=0.165 PD=2.54 PS=1.33 NRD=0.9653 NRS=21.6503 M=1 R=5.55556 ++ SA=90007.3 SB=90000.2 A=0.18 P=2.36 MULT=1 DX32_noxref VNB VPB NWDIODE A=13.8993 P=20.53 pX33_noxref noxref_15 Y Y PROBETYPE=1 *
diff --git a/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.lvs.report b/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.lvs.report new file mode 100644 index 0000000..31d40e0 --- /dev/null +++ b/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.lvs.report
@@ -0,0 +1,483 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a21bo_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a21bo_1.sp ('sky130_fd_sc_hdll__a21bo_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.spice ('sky130_fd_sc_hdll__a21bo_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:16:20 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a21bo_1 sky130_fd_sc_hdll__a21bo_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a21bo_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__a21bo_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 12 12 + + Instances: 5 5 MN (4 pins) + 5 5 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 11 10 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 10 10 + + Instances: 3 3 MN (4 pins) + 2 2 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SPMP_2_1 (5 pins) + ------ ------ + Total Inst: 7 7 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 10 10 0 0 + + Instances: 3 3 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SPMP_2_1 + ------- ------- --------- --------- + Total Inst: 7 7 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB B1_N A1 A2 VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.pex.spice b/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.pex.spice index 063c932..7bdece9 100644 --- a/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.pex.spice +++ b/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21bo_1.pex.spice -* Created: Thu Aug 27 18:52:03 2020 +* Created: Wed Sep 2 08:16:23 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.pxi.spice b/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.pxi.spice index 60006d2..9c8e0ed 100644 --- a/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.pxi.spice +++ b/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21bo_1.pxi.spice -* Created: Thu Aug 27 18:52:03 2020 +* Created: Wed Sep 2 08:16:23 2020 * x_PM_SKY130_FD_SC_HDLL__A21BO_1%B1_N N_B1_N_c_62_n N_B1_N_c_63_n N_B1_N_c_67_n + N_B1_N_M1002_g N_B1_N_c_64_n N_B1_N_M1004_g N_B1_N_c_68_n B1_N B1_N B1_N B1_N
diff --git a/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.spice b/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.spice index ebc66df..8779d33 100644 --- a/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.spice +++ b/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21bo_1.spice -* Created: Thu Aug 27 18:52:03 2020 +* Created: Wed Sep 2 08:16:23 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.lvs.report b/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.lvs.report new file mode 100644 index 0000000..b694b30 --- /dev/null +++ b/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.lvs.report
@@ -0,0 +1,493 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a21bo_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a21bo_2.sp ('sky130_fd_sc_hdll__a21bo_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.spice ('sky130_fd_sc_hdll__a21bo_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:16:27 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a21bo_2 sky130_fd_sc_hdll__a21bo_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a21bo_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__a21bo_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 13 12 * + + Instances: 6 6 MN (4 pins) + 6 6 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 14 12 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 10 10 + + Instances: 3 3 MN (4 pins) + 2 2 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SPMP_2_1 (5 pins) + ------ ------ + Total Inst: 7 7 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 10 10 0 0 + + Instances: 3 3 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SPMP_2_1 + ------- ------- --------- --------- + Total Inst: 7 7 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB B1_N A1 A2 VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.pex.spice b/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.pex.spice index b9f4191..60bfb23 100644 --- a/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.pex.spice +++ b/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21bo_2.pex.spice -* Created: Thu Aug 27 18:52:10 2020 +* Created: Wed Sep 2 08:16:30 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.pxi.spice b/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.pxi.spice index 446a160..2ebcfdb 100644 --- a/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.pxi.spice +++ b/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21bo_2.pxi.spice -* Created: Thu Aug 27 18:52:10 2020 +* Created: Wed Sep 2 08:16:30 2020 * x_PM_SKY130_FD_SC_HDLL__A21BO_2%A_79_21# N_A_79_21#_M1011_d N_A_79_21#_M1005_s + N_A_79_21#_M1004_g N_A_79_21#_c_77_n N_A_79_21#_M1003_g N_A_79_21#_c_78_n
diff --git a/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.spice b/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.spice index d114e8e..dbf9ab7 100644 --- a/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.spice +++ b/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21bo_2.spice -* Created: Thu Aug 27 18:52:10 2020 +* Created: Wed Sep 2 08:16:30 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.lvs.report b/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.lvs.report new file mode 100644 index 0000000..3ce90bc --- /dev/null +++ b/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.lvs.report
@@ -0,0 +1,505 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a21bo_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a21bo_4.sp ('sky130_fd_sc_hdll__a21bo_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice ('sky130_fd_sc_hdll__a21bo_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:16:34 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a21bo_4 sky130_fd_sc_hdll__a21bo_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a21bo_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__a21bo_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 14 13 * + + Instances: 11 11 MN (4 pins) + 11 11 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 24 22 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 10 10 + + Instances: 3 3 MN (4 pins) + 2 2 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SPMP_2_1 (5 pins) + ------ ------ + Total Inst: 7 7 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 10 10 0 0 + + Instances: 3 3 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SPMP_2_1 + ------- ------- --------- --------- + Total Inst: 7 7 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 20 layout mos transistors were reduced to 8. 1 connecting net was deleted. + 10 mos transistors were deleted by parallel reduction. + 2 mos transistors and 1 connecting net were deleted by split-gate reduction. + 20 source mos transistors were reduced to 8. 1 connecting net was deleted. + 10 mos transistors were deleted by parallel reduction. + 2 mos transistors and 1 connecting net were deleted by split-gate reduction. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB B1_N A2 A1 VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.pex.spice b/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.pex.spice index 84da4dd..ef2ad4d 100644 --- a/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.pex.spice +++ b/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21bo_4.pex.spice -* Created: Thu Aug 27 18:52:16 2020 +* Created: Wed Sep 2 08:16:37 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.pxi.spice b/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.pxi.spice index 3a381c3..94c46a0 100644 --- a/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.pxi.spice +++ b/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21bo_4.pxi.spice -* Created: Thu Aug 27 18:52:16 2020 +* Created: Wed Sep 2 08:16:37 2020 * x_PM_SKY130_FD_SC_HDLL__A21BO_4%B1_N N_B1_N_c_85_n N_B1_N_M1003_g N_B1_N_c_86_n + N_B1_N_M1013_g B1_N B1_N PM_SKY130_FD_SC_HDLL__A21BO_4%B1_N
diff --git a/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice b/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice index 23339fc..ac3614a 100644 --- a/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice +++ b/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21bo_4.spice -* Created: Thu Aug 27 18:52:16 2020 +* Created: Wed Sep 2 08:16:37 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.lvs.report b/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.lvs.report new file mode 100644 index 0000000..a0a015a --- /dev/null +++ b/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.lvs.report
@@ -0,0 +1,481 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a21boi_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a21boi_1.sp ('sky130_fd_sc_hdll__a21boi_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.spice ('sky130_fd_sc_hdll__a21boi_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:16:41 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a21boi_1 sky130_fd_sc_hdll__a21boi_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a21boi_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__a21boi_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 11 11 + + Instances: 4 4 MN (4 pins) + 4 4 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 9 8 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 9 9 + + Instances: 2 2 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SPMP_2_1 (5 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 9 9 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SPMP_2_1 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB B1_N A1 A2 VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.pex.spice b/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.pex.spice index 32264ce..8a712c4 100644 --- a/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.pex.spice +++ b/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21boi_1.pex.spice -* Created: Thu Aug 27 18:52:23 2020 +* Created: Wed Sep 2 08:16:45 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.pxi.spice b/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.pxi.spice index 18a9ea8..9c638b8 100644 --- a/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.pxi.spice +++ b/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21boi_1.pxi.spice -* Created: Thu Aug 27 18:52:23 2020 +* Created: Wed Sep 2 08:16:45 2020 * x_PM_SKY130_FD_SC_HDLL__A21BOI_1%B1_N N_B1_N_c_51_n N_B1_N_c_52_n N_B1_N_c_55_n + N_B1_N_M1000_g N_B1_N_c_53_n N_B1_N_M1002_g N_B1_N_c_56_n B1_N B1_N
diff --git a/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.spice b/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.spice index fc134ef..7939c60 100644 --- a/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.spice +++ b/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21boi_1.spice -* Created: Thu Aug 27 18:52:23 2020 +* Created: Wed Sep 2 08:16:45 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.lvs.report b/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.lvs.report new file mode 100644 index 0000000..3225680 --- /dev/null +++ b/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.lvs.report
@@ -0,0 +1,497 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a21boi_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a21boi_2.sp ('sky130_fd_sc_hdll__a21boi_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.spice ('sky130_fd_sc_hdll__a21boi_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:16:48 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a21boi_2 sky130_fd_sc_hdll__a21boi_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a21boi_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__a21boi_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 15 12 * + + Instances: 7 7 MN (4 pins) + 7 7 MP (4 pins) + 1 0 * Dpar (2 pins) + 3 0 * Probe (2 pins) + ------ ------ + Total Inst: 18 14 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 9 9 + + Instances: 2 2 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SPMP_2_1 (5 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 9 9 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SPMP_2_1 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 4 layout instances were filtered and their pins removed from adjoining nets. + + 12 layout mos transistors were reduced to 6. 1 connecting net was deleted. + 4 mos transistors were deleted by parallel reduction. + 2 mos transistors and 1 connecting net were deleted by split-gate reduction. + 12 source mos transistors were reduced to 6. 1 connecting net was deleted. + 4 mos transistors were deleted by parallel reduction. + 2 mos transistors and 1 connecting net were deleted by split-gate reduction. + + 3 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB B1_N A2 A1 VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.pex.spice b/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.pex.spice index 4e262ee..a95dbdd 100644 --- a/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.pex.spice +++ b/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21boi_2.pex.spice -* Created: Thu Aug 27 18:52:30 2020 +* Created: Wed Sep 2 08:16:52 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.pxi.spice b/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.pxi.spice index 07bf688..2064d6e 100644 --- a/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.pxi.spice +++ b/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21boi_2.pxi.spice -* Created: Thu Aug 27 18:52:30 2020 +* Created: Wed Sep 2 08:16:52 2020 * x_PM_SKY130_FD_SC_HDLL__A21BOI_2%B1_N N_B1_N_c_74_n N_B1_N_c_75_n N_B1_N_M1007_g + N_B1_N_M1010_g N_B1_N_c_69_n N_B1_N_c_70_n N_B1_N_c_71_n B1_N N_B1_N_c_73_n
diff --git a/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.spice b/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.spice index f25040d..1b38718 100644 --- a/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.spice +++ b/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21boi_2.spice -* Created: Thu Aug 27 18:52:30 2020 +* Created: Wed Sep 2 08:16:52 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.lvs.report b/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.lvs.report new file mode 100644 index 0000000..1b5d4ee --- /dev/null +++ b/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.lvs.report
@@ -0,0 +1,507 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a21boi_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a21boi_4.sp ('sky130_fd_sc_hdll__a21boi_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice ('sky130_fd_sc_hdll__a21boi_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:16:55 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a21boi_4 sky130_fd_sc_hdll__a21boi_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a21boi_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__a21boi_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 12 11 * + + Instances: 13 13 MN (4 pins) + 13 13 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 28 26 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 9 9 + + Instances: 2 2 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SPMP_2_1 (5 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 9 9 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SPMP_2_1 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 24 layout mos transistors were reduced to 6. + 18 mos transistors were deleted by parallel reduction. + 24 source mos transistors were reduced to 6. + 18 mos transistors were deleted by parallel reduction. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB B1_N A2 A1 VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.pex.spice b/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.pex.spice index 5e43600..f8f7892 100644 --- a/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.pex.spice +++ b/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21boi_4.pex.spice -* Created: Thu Aug 27 18:52:36 2020 +* Created: Wed Sep 2 08:16:58 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.pxi.spice b/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.pxi.spice index 35bd2d8..b5a2877 100644 --- a/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.pxi.spice +++ b/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21boi_4.pxi.spice -* Created: Thu Aug 27 18:52:36 2020 +* Created: Wed Sep 2 08:16:58 2020 * x_PM_SKY130_FD_SC_HDLL__A21BOI_4%B1_N N_B1_N_c_91_n N_B1_N_M1010_g N_B1_N_c_92_n + N_B1_N_M1015_g B1_N PM_SKY130_FD_SC_HDLL__A21BOI_4%B1_N
diff --git a/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice b/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice index 5553c2b..36ab141 100644 --- a/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice +++ b/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21boi_4.spice -* Created: Thu Aug 27 18:52:36 2020 +* Created: Wed Sep 2 08:16:58 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_1.lvs.report b/cells/a21o/sky130_fd_sc_hdll__a21o_1.lvs.report new file mode 100644 index 0000000..6a2d381 --- /dev/null +++ b/cells/a21o/sky130_fd_sc_hdll__a21o_1.lvs.report
@@ -0,0 +1,481 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_1.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a21o_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a21o_1.sp ('sky130_fd_sc_hdll__a21o_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_1.spice ('sky130_fd_sc_hdll__a21o_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:17:03 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a21o_1 sky130_fd_sc_hdll__a21o_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a21o_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__a21o_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 11 11 + + Instances: 4 4 MN (4 pins) + 4 4 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 9 8 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 9 9 + + Instances: 2 2 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SPMP_2_1 (5 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 9 9 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SPMP_2_1 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB B1 A1 A2 X VPWR VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_1.pex.spice b/cells/a21o/sky130_fd_sc_hdll__a21o_1.pex.spice index 1652b29..aedad17 100644 --- a/cells/a21o/sky130_fd_sc_hdll__a21o_1.pex.spice +++ b/cells/a21o/sky130_fd_sc_hdll__a21o_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21o_1.pex.spice -* Created: Thu Aug 27 18:52:43 2020 +* Created: Wed Sep 2 08:17:06 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_1.pxi.spice b/cells/a21o/sky130_fd_sc_hdll__a21o_1.pxi.spice index af9d1ab..797eb87 100644 --- a/cells/a21o/sky130_fd_sc_hdll__a21o_1.pxi.spice +++ b/cells/a21o/sky130_fd_sc_hdll__a21o_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21o_1.pxi.spice -* Created: Thu Aug 27 18:52:43 2020 +* Created: Wed Sep 2 08:17:06 2020 * x_PM_SKY130_FD_SC_HDLL__A21O_1%A_81_21# N_A_81_21#_M1001_d N_A_81_21#_M1005_s + N_A_81_21#_c_43_n N_A_81_21#_M1000_g N_A_81_21#_c_46_n N_A_81_21#_M1003_g
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_1.spice b/cells/a21o/sky130_fd_sc_hdll__a21o_1.spice index 478e8ae..3d93e49 100644 --- a/cells/a21o/sky130_fd_sc_hdll__a21o_1.spice +++ b/cells/a21o/sky130_fd_sc_hdll__a21o_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21o_1.spice -* Created: Thu Aug 27 18:52:43 2020 +* Created: Wed Sep 2 08:17:06 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_2.lvs.report b/cells/a21o/sky130_fd_sc_hdll__a21o_2.lvs.report new file mode 100644 index 0000000..8ef50bd --- /dev/null +++ b/cells/a21o/sky130_fd_sc_hdll__a21o_2.lvs.report
@@ -0,0 +1,488 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_2.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a21o_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a21o_2.sp ('sky130_fd_sc_hdll__a21o_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_2.spice ('sky130_fd_sc_hdll__a21o_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:17:09 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a21o_2 sky130_fd_sc_hdll__a21o_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a21o_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__a21o_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 11 11 + + Instances: 5 5 MN (4 pins) + 5 5 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 11 10 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 9 9 + + Instances: 2 2 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SPMP_2_1 (5 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 9 9 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SPMP_2_1 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB B1 A1 A2 VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_2.pex.spice b/cells/a21o/sky130_fd_sc_hdll__a21o_2.pex.spice index 4ddd1c6..fccd411 100644 --- a/cells/a21o/sky130_fd_sc_hdll__a21o_2.pex.spice +++ b/cells/a21o/sky130_fd_sc_hdll__a21o_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21o_2.pex.spice -* Created: Thu Aug 27 18:52:50 2020 +* Created: Wed Sep 2 08:17:12 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_2.pxi.spice b/cells/a21o/sky130_fd_sc_hdll__a21o_2.pxi.spice index bf0eb6e..8910e97 100644 --- a/cells/a21o/sky130_fd_sc_hdll__a21o_2.pxi.spice +++ b/cells/a21o/sky130_fd_sc_hdll__a21o_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21o_2.pxi.spice -* Created: Thu Aug 27 18:52:50 2020 +* Created: Wed Sep 2 08:17:12 2020 * x_PM_SKY130_FD_SC_HDLL__A21O_2%A_80_21# N_A_80_21#_M1006_d N_A_80_21#_M1004_s + N_A_80_21#_c_49_n N_A_80_21#_M1003_g N_A_80_21#_c_50_n N_A_80_21#_c_56_n
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_2.spice b/cells/a21o/sky130_fd_sc_hdll__a21o_2.spice index 989666d..89698e1 100644 --- a/cells/a21o/sky130_fd_sc_hdll__a21o_2.spice +++ b/cells/a21o/sky130_fd_sc_hdll__a21o_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21o_2.spice -* Created: Thu Aug 27 18:52:50 2020 +* Created: Wed Sep 2 08:17:12 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_4.lvs.report b/cells/a21o/sky130_fd_sc_hdll__a21o_4.lvs.report new file mode 100644 index 0000000..eb17409 --- /dev/null +++ b/cells/a21o/sky130_fd_sc_hdll__a21o_4.lvs.report
@@ -0,0 +1,503 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a21o_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a21o_4.sp ('sky130_fd_sc_hdll__a21o_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice ('sky130_fd_sc_hdll__a21o_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:17:16 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a21o_4 sky130_fd_sc_hdll__a21o_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a21o_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__a21o_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 15 12 * + + Instances: 10 10 MN (4 pins) + 10 10 MP (4 pins) + 1 0 * Dpar (2 pins) + 3 0 * Probe (2 pins) + ------ ------ + Total Inst: 24 20 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 9 9 + + Instances: 2 2 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SPMP_2_1 (5 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 9 9 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SPMP_2_1 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 4 layout instances were filtered and their pins removed from adjoining nets. + + 20 layout mos transistors were reduced to 8. 1 connecting net was deleted. + 10 mos transistors were deleted by parallel reduction. + 2 mos transistors and 1 connecting net were deleted by split-gate reduction. + 20 source mos transistors were reduced to 8. 1 connecting net was deleted. + 10 mos transistors were deleted by parallel reduction. + 2 mos transistors and 1 connecting net were deleted by split-gate reduction. + + 3 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB B1 A2 A1 VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_4.pex.spice b/cells/a21o/sky130_fd_sc_hdll__a21o_4.pex.spice index 621a0bb..5db2971 100644 --- a/cells/a21o/sky130_fd_sc_hdll__a21o_4.pex.spice +++ b/cells/a21o/sky130_fd_sc_hdll__a21o_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21o_4.pex.spice -* Created: Thu Aug 27 18:52:56 2020 +* Created: Wed Sep 2 08:17:19 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_4.pxi.spice b/cells/a21o/sky130_fd_sc_hdll__a21o_4.pxi.spice index 0451954..253a573 100644 --- a/cells/a21o/sky130_fd_sc_hdll__a21o_4.pxi.spice +++ b/cells/a21o/sky130_fd_sc_hdll__a21o_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21o_4.pxi.spice -* Created: Thu Aug 27 18:52:56 2020 +* Created: Wed Sep 2 08:17:19 2020 * x_PM_SKY130_FD_SC_HDLL__A21O_4%A_84_21# N_A_84_21#_M1000_s N_A_84_21#_M1017_s + N_A_84_21#_M1011_s N_A_84_21#_c_76_n N_A_84_21#_M1002_g N_A_84_21#_c_84_n
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice b/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice index 1610e1c..efa10b3 100644 --- a/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice +++ b/cells/a21o/sky130_fd_sc_hdll__a21o_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21o_4.spice -* Created: Thu Aug 27 18:52:56 2020 +* Created: Wed Sep 2 08:17:19 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_6.lvs.report b/cells/a21o/sky130_fd_sc_hdll__a21o_6.lvs.report new file mode 100644 index 0000000..cacb980 --- /dev/null +++ b/cells/a21o/sky130_fd_sc_hdll__a21o_6.lvs.report
@@ -0,0 +1,504 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a21o_6.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a21o_6.sp ('sky130_fd_sc_hdll__a21o_6') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice ('sky130_fd_sc_hdll__a21o_6') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:17:23 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a21o_6 sky130_fd_sc_hdll__a21o_6 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a21o_6 +SOURCE CELL NAME: sky130_fd_sc_hdll__a21o_6 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 12 12 + + Instances: 12 12 MN (4 pins) + 12 12 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 25 24 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 9 9 + + Instances: 2 2 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SPMP_2_1 (5 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 9 9 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SPMP_2_1 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 24 layout mos transistors were reduced to 8. 1 connecting net was deleted. + 14 mos transistors were deleted by parallel reduction. + 2 mos transistors and 1 connecting net were deleted by split-gate reduction. + 24 source mos transistors were reduced to 8. 1 connecting net was deleted. + 14 mos transistors were deleted by parallel reduction. + 2 mos transistors and 1 connecting net were deleted by split-gate reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A2 A1 B1 VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_6.pex.spice b/cells/a21o/sky130_fd_sc_hdll__a21o_6.pex.spice index 768c80d..3909136 100644 --- a/cells/a21o/sky130_fd_sc_hdll__a21o_6.pex.spice +++ b/cells/a21o/sky130_fd_sc_hdll__a21o_6.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21o_6.pex.spice -* Created: Thu Aug 27 18:53:03 2020 +* Created: Wed Sep 2 08:17:26 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_6.pxi.spice b/cells/a21o/sky130_fd_sc_hdll__a21o_6.pxi.spice index 26be3f0..51950d5 100644 --- a/cells/a21o/sky130_fd_sc_hdll__a21o_6.pxi.spice +++ b/cells/a21o/sky130_fd_sc_hdll__a21o_6.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21o_6.pxi.spice -* Created: Thu Aug 27 18:53:03 2020 +* Created: Wed Sep 2 08:17:26 2020 * x_PM_SKY130_FD_SC_HDLL__A21O_6%A2 N_A2_c_100_n N_A2_M1010_g N_A2_c_101_n + N_A2_M1000_g N_A2_c_102_n N_A2_M1012_g N_A2_c_103_n N_A2_M1015_g N_A2_c_109_n
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice b/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice index 56c89a3..39b4146 100644 --- a/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice +++ b/cells/a21o/sky130_fd_sc_hdll__a21o_6.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21o_6.spice -* Created: Thu Aug 27 18:53:03 2020 +* Created: Wed Sep 2 08:17:26 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_8.lvs.report b/cells/a21o/sky130_fd_sc_hdll__a21o_8.lvs.report new file mode 100644 index 0000000..e60614a --- /dev/null +++ b/cells/a21o/sky130_fd_sc_hdll__a21o_8.lvs.report
@@ -0,0 +1,508 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a21o_8.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a21o_8.sp ('sky130_fd_sc_hdll__a21o_8') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice ('sky130_fd_sc_hdll__a21o_8') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:17:30 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a21o_8 sky130_fd_sc_hdll__a21o_8 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a21o_8 +SOURCE CELL NAME: sky130_fd_sc_hdll__a21o_8 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 12 12 + + Instances: 14 14 MN (4 pins) + 14 14 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 29 28 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 9 9 + + Instances: 2 2 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SPMP_2_1 (5 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 9 9 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SPMP_2_1 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 28 layout mos transistors were reduced to 8. 1 connecting net was deleted. + 18 mos transistors were deleted by parallel reduction. + 2 mos transistors and 1 connecting net were deleted by split-gate reduction. + 28 source mos transistors were reduced to 8. 1 connecting net was deleted. + 18 mos transistors were deleted by parallel reduction. + 2 mos transistors and 1 connecting net were deleted by split-gate reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A2 A1 B1 VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_8.pex.spice b/cells/a21o/sky130_fd_sc_hdll__a21o_8.pex.spice index 581f656..a5406e9 100644 --- a/cells/a21o/sky130_fd_sc_hdll__a21o_8.pex.spice +++ b/cells/a21o/sky130_fd_sc_hdll__a21o_8.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21o_8.pex.spice -* Created: Thu Aug 27 18:53:09 2020 +* Created: Wed Sep 2 08:17:33 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_8.pxi.spice b/cells/a21o/sky130_fd_sc_hdll__a21o_8.pxi.spice index 2e9f3b7..f12850d 100644 --- a/cells/a21o/sky130_fd_sc_hdll__a21o_8.pxi.spice +++ b/cells/a21o/sky130_fd_sc_hdll__a21o_8.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21o_8.pxi.spice -* Created: Thu Aug 27 18:53:09 2020 +* Created: Wed Sep 2 08:17:33 2020 * x_PM_SKY130_FD_SC_HDLL__A21O_8%A2 N_A2_c_112_n N_A2_M1011_g N_A2_c_113_n + N_A2_M1000_g N_A2_c_114_n N_A2_M1014_g N_A2_c_115_n N_A2_M1017_g N_A2_c_121_n
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice b/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice index 5c55676..9f0ed3c 100644 --- a/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice +++ b/cells/a21o/sky130_fd_sc_hdll__a21o_8.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21o_8.spice -* Created: Thu Aug 27 18:53:09 2020 +* Created: Wed Sep 2 08:17:33 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.lvs.report b/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.lvs.report new file mode 100644 index 0000000..f557ea5 --- /dev/null +++ b/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.lvs.report
@@ -0,0 +1,477 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a21oi_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a21oi_1.sp ('sky130_fd_sc_hdll__a21oi_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.spice ('sky130_fd_sc_hdll__a21oi_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:17:38 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a21oi_1 sky130_fd_sc_hdll__a21oi_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a21oi_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__a21oi_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 10 10 + + Instances: 3 3 MN (4 pins) + 3 3 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 7 6 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 8 8 + + Instances: 1 1 MN (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SPMP_2_1 (5 pins) + ------ ------ + Total Inst: 3 3 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 8 8 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 SMN2 + 1 1 0 0 SPMP_2_1 + ------- ------- --------- --------- + Total Inst: 3 3 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB B1 A1 A2 Y VPWR VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.pex.spice b/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.pex.spice index 981367f..b2f90e8 100644 --- a/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.pex.spice +++ b/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21oi_1.pex.spice -* Created: Thu Aug 27 18:53:16 2020 +* Created: Wed Sep 2 08:17:41 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.pxi.spice b/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.pxi.spice index 0a541c4..909b248 100644 --- a/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.pxi.spice +++ b/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21oi_1.pxi.spice -* Created: Thu Aug 27 18:53:16 2020 +* Created: Wed Sep 2 08:17:41 2020 * x_PM_SKY130_FD_SC_HDLL__A21OI_1%B1 N_B1_c_38_n N_B1_M1000_g N_B1_c_35_n + N_B1_M1001_g B1 B1 N_B1_c_37_n PM_SKY130_FD_SC_HDLL__A21OI_1%B1
diff --git a/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.spice b/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.spice index 29bfda5..f399824 100644 --- a/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.spice +++ b/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21oi_1.spice -* Created: Thu Aug 27 18:53:16 2020 +* Created: Wed Sep 2 08:17:41 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.lvs.report b/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.lvs.report new file mode 100644 index 0000000..5b5ffb1 --- /dev/null +++ b/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.lvs.report
@@ -0,0 +1,493 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a21oi_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a21oi_2.sp ('sky130_fd_sc_hdll__a21oi_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.spice ('sky130_fd_sc_hdll__a21oi_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:17:45 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a21oi_2 sky130_fd_sc_hdll__a21oi_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a21oi_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__a21oi_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 12 11 * + + Instances: 6 6 MN (4 pins) + 6 6 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 14 12 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 8 8 + + Instances: 1 1 MN (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SPMP_2_1 (5 pins) + ------ ------ + Total Inst: 3 3 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 8 8 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 SMN2 + 1 1 0 0 SPMP_2_1 + ------- ------- --------- --------- + Total Inst: 3 3 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 12 layout mos transistors were reduced to 6. 1 connecting net was deleted. + 4 mos transistors were deleted by parallel reduction. + 2 mos transistors and 1 connecting net were deleted by split-gate reduction. + 12 source mos transistors were reduced to 6. 1 connecting net was deleted. + 4 mos transistors were deleted by parallel reduction. + 2 mos transistors and 1 connecting net were deleted by split-gate reduction. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A2 A1 B1 VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.pex.spice b/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.pex.spice index a04c60f..70b5df0 100644 --- a/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.pex.spice +++ b/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21oi_2.pex.spice -* Created: Thu Aug 27 18:53:23 2020 +* Created: Wed Sep 2 08:17:48 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.pxi.spice b/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.pxi.spice index 0b2d819..286cfc3 100644 --- a/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.pxi.spice +++ b/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21oi_2.pxi.spice -* Created: Thu Aug 27 18:53:23 2020 +* Created: Wed Sep 2 08:17:48 2020 * x_PM_SKY130_FD_SC_HDLL__A21OI_2%A2 N_A2_c_50_n N_A2_M1000_g N_A2_M1003_g + N_A2_c_52_n N_A2_M1007_g N_A2_c_53_n N_A2_M1011_g N_A2_c_62_p N_A2_c_54_n A2
diff --git a/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.spice b/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.spice index 83aeb27..16b87f9 100644 --- a/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.spice +++ b/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21oi_2.spice -* Created: Thu Aug 27 18:53:23 2020 +* Created: Wed Sep 2 08:17:48 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.lvs.report b/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.lvs.report new file mode 100644 index 0000000..c872ac4 --- /dev/null +++ b/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.lvs.report
@@ -0,0 +1,503 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a21oi_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a21oi_4.sp ('sky130_fd_sc_hdll__a21oi_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice ('sky130_fd_sc_hdll__a21oi_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:17:52 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a21oi_4 sky130_fd_sc_hdll__a21oi_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a21oi_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__a21oi_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 11 10 * + + Instances: 12 12 MN (4 pins) + 12 12 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 26 24 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 8 8 + + Instances: 1 1 MN (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SPMP_2_1 (5 pins) + ------ ------ + Total Inst: 3 3 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 8 8 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 SMN2 + 1 1 0 0 SPMP_2_1 + ------- ------- --------- --------- + Total Inst: 3 3 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 24 layout mos transistors were reduced to 6. + 18 mos transistors were deleted by parallel reduction. + 24 source mos transistors were reduced to 6. + 18 mos transistors were deleted by parallel reduction. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB B1 A2 A1 Y VPWR VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.pex.spice b/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.pex.spice index 24a83a3..cc57297 100644 --- a/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.pex.spice +++ b/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21oi_4.pex.spice -* Created: Thu Aug 27 18:53:30 2020 +* Created: Wed Sep 2 08:17:55 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.pxi.spice b/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.pxi.spice index 7faf82e..e5819ae 100644 --- a/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.pxi.spice +++ b/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21oi_4.pxi.spice -* Created: Thu Aug 27 18:53:30 2020 +* Created: Wed Sep 2 08:17:55 2020 * x_PM_SKY130_FD_SC_HDLL__A21OI_4%B1 N_B1_c_80_n N_B1_M1001_g N_B1_c_86_n + N_B1_M1006_g N_B1_c_87_n N_B1_M1009_g N_B1_c_81_n N_B1_M1003_g N_B1_c_88_n
diff --git a/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice b/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice index 03615f2..9966cbb 100644 --- a/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice +++ b/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a21oi_4.spice -* Created: Thu Aug 27 18:53:30 2020 +* Created: Wed Sep 2 08:17:55 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.lvs.report b/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.lvs.report new file mode 100644 index 0000000..be397af --- /dev/null +++ b/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.lvs.report
@@ -0,0 +1,481 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a221oi_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a221oi_1.sp ('sky130_fd_sc_hdll__a221oi_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.spice ('sky130_fd_sc_hdll__a221oi_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:17:59 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a221oi_1 sky130_fd_sc_hdll__a221oi_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a221oi_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__a221oi_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 14 14 + + Instances: 5 5 MN (4 pins) + 5 5 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 11 10 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 10 10 + + Instances: 1 1 MN (4 pins) + 2 2 SMN2 (4 pins) + 1 1 SPMP_2_2_1 (7 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 10 10 0 0 + + Nets: 10 10 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 2 2 0 0 SMN2 + 1 1 0 0 SPMP_2_2_1 + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB C1 B2 B1 A1 A2 Y VPWR VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.pex.spice b/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.pex.spice index f3efe64..a35a969 100644 --- a/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.pex.spice +++ b/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a221oi_1.pex.spice -* Created: Thu Aug 27 18:53:36 2020 +* Created: Wed Sep 2 08:18:02 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.pxi.spice b/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.pxi.spice index 486a2df..5365ea0 100644 --- a/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.pxi.spice +++ b/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a221oi_1.pxi.spice -* Created: Thu Aug 27 18:53:36 2020 +* Created: Wed Sep 2 08:18:02 2020 * x_PM_SKY130_FD_SC_HDLL__A221OI_1%C1 N_C1_c_58_n N_C1_M1006_g N_C1_c_55_n + N_C1_M1008_g C1 N_C1_c_57_n PM_SKY130_FD_SC_HDLL__A221OI_1%C1
diff --git a/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.spice b/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.spice index c419eb7..4c6b07f 100644 --- a/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.spice +++ b/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a221oi_1.spice -* Created: Thu Aug 27 18:53:36 2020 +* Created: Wed Sep 2 08:18:02 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.lvs.report b/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.lvs.report new file mode 100644 index 0000000..fc89f28 --- /dev/null +++ b/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.lvs.report
@@ -0,0 +1,499 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a221oi_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a221oi_2.sp ('sky130_fd_sc_hdll__a221oi_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice ('sky130_fd_sc_hdll__a221oi_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:18:06 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a221oi_2 sky130_fd_sc_hdll__a221oi_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a221oi_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__a221oi_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 17 14 * + + Instances: 10 10 MN (4 pins) + 10 10 MP (4 pins) + 1 0 * Dpar (2 pins) + 3 0 * Probe (2 pins) + ------ ------ + Total Inst: 24 20 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 10 10 + + Instances: 1 1 MN (4 pins) + 2 2 SMN2 (4 pins) + 1 1 SPMP_2_2_1 (7 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 10 10 0 0 + + Nets: 10 10 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 2 2 0 0 SMN2 + 1 1 0 0 SPMP_2_2_1 + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 4 layout instances were filtered and their pins removed from adjoining nets. + + 20 layout mos transistors were reduced to 10. + 10 mos transistors were deleted by parallel reduction. + 20 source mos transistors were reduced to 10. + 10 mos transistors were deleted by parallel reduction. + + 3 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB C1 B2 B1 A2 A1 Y VPWR VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.pex.spice b/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.pex.spice index cf704d4..ff2b85a 100644 --- a/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.pex.spice +++ b/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a221oi_2.pex.spice -* Created: Thu Aug 27 18:53:43 2020 +* Created: Wed Sep 2 08:18:09 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.pxi.spice b/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.pxi.spice index 4476778..8b3f540 100644 --- a/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.pxi.spice +++ b/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a221oi_2.pxi.spice -* Created: Thu Aug 27 18:53:43 2020 +* Created: Wed Sep 2 08:18:09 2020 * x_PM_SKY130_FD_SC_HDLL__A221OI_2%C1 N_C1_c_90_n N_C1_M1004_g N_C1_c_86_n + N_C1_M1007_g N_C1_c_91_n N_C1_M1018_g N_C1_c_87_n N_C1_M1016_g C1 C1
diff --git a/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice b/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice index 487ef48..d25a0eb 100644 --- a/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice +++ b/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a221oi_2.spice -* Created: Thu Aug 27 18:53:43 2020 +* Created: Wed Sep 2 08:18:09 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.lvs.report b/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.lvs.report new file mode 100644 index 0000000..f542e37 --- /dev/null +++ b/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.lvs.report
@@ -0,0 +1,519 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 87 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 89 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 91 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 93 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 95 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 97 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a221oi_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a221oi_4.sp ('sky130_fd_sc_hdll__a221oi_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice ('sky130_fd_sc_hdll__a221oi_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:18:13 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a221oi_4 sky130_fd_sc_hdll__a221oi_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a221oi_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__a221oi_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 15 14 * + + Instances: 20 20 MN (4 pins) + 20 20 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 42 40 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 10 10 + + Instances: 1 1 MN (4 pins) + 2 2 SMN2 (4 pins) + 1 1 SPMP_2_2_1 (7 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 10 10 0 0 + + Nets: 10 10 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 2 2 0 0 SMN2 + 1 1 0 0 SPMP_2_2_1 + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 40 layout mos transistors were reduced to 10. + 30 mos transistors were deleted by parallel reduction. + 40 source mos transistors were reduced to 10. + 30 mos transistors were deleted by parallel reduction. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB C1 B2 B1 A2 A1 Y VPWR VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.pex.spice b/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.pex.spice index 333d793..c04f4f0 100644 --- a/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.pex.spice +++ b/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a221oi_4.pex.spice -* Created: Thu Aug 27 18:53:49 2020 +* Created: Wed Sep 2 08:18:16 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.pxi.spice b/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.pxi.spice index d6fe5b5..dbb19a8 100644 --- a/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.pxi.spice +++ b/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a221oi_4.pxi.spice -* Created: Thu Aug 27 18:53:49 2020 +* Created: Wed Sep 2 08:18:16 2020 * x_PM_SKY130_FD_SC_HDLL__A221OI_4%C1 N_C1_c_128_n N_C1_M1003_g N_C1_c_122_n + N_C1_M1007_g N_C1_c_129_n N_C1_M1010_g N_C1_c_123_n N_C1_M1020_g N_C1_c_130_n
diff --git a/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice b/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice index f53755f..51964f2 100644 --- a/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice +++ b/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a221oi_4.spice -* Created: Thu Aug 27 18:53:49 2020 +* Created: Wed Sep 2 08:18:16 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a222oi/sky130_fd_sc_hdll__a222oi_1.lvs.report b/cells/a222oi/sky130_fd_sc_hdll__a222oi_1.lvs.report new file mode 100644 index 0000000..d81ca14 --- /dev/null +++ b/cells/a222oi/sky130_fd_sc_hdll__a222oi_1.lvs.report
@@ -0,0 +1,481 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a222oi/sky130_fd_sc_hdll__a222oi_1.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a222oi/sky130_fd_sc_hdll__a222oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a222oi/sky130_fd_sc_hdll__a222oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a222oi/sky130_fd_sc_hdll__a222oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a222oi/sky130_fd_sc_hdll__a222oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a222oi/sky130_fd_sc_hdll__a222oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a222oi/sky130_fd_sc_hdll__a222oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a222oi/sky130_fd_sc_hdll__a222oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a222oi/sky130_fd_sc_hdll__a222oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a222oi/sky130_fd_sc_hdll__a222oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a222oi/sky130_fd_sc_hdll__a222oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a222oi/sky130_fd_sc_hdll__a222oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a222oi/sky130_fd_sc_hdll__a222oi_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a222oi_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a222oi_1.sp ('sky130_fd_sc_hdll__a222oi_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a222oi/sky130_fd_sc_hdll__a222oi_1.spice ('sky130_fd_sc_hdll__a222oi_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:18:20 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a222oi_1 sky130_fd_sc_hdll__a222oi_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a222oi_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__a222oi_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 11 11 + + Nets: 16 16 + + Instances: 6 6 MN (4 pins) + 6 6 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 13 12 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 11 11 + + Nets: 11 11 + + Instances: 3 3 SMN2 (4 pins) + 1 1 SPMP_2_2_2 (8 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 11 11 0 0 + + Nets: 11 11 0 0 + + Instances: 3 3 0 0 SMN2 + 1 1 0 0 SPMP_2_2_2 + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB C1 C2 B2 B1 A1 A2 Y VPWR VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a222oi/sky130_fd_sc_hdll__a222oi_1.pex.spice b/cells/a222oi/sky130_fd_sc_hdll__a222oi_1.pex.spice index 21d7d06..d9e16b0 100644 --- a/cells/a222oi/sky130_fd_sc_hdll__a222oi_1.pex.spice +++ b/cells/a222oi/sky130_fd_sc_hdll__a222oi_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a222oi_1.pex.spice -* Created: Thu Aug 27 18:53:56 2020 +* Created: Wed Sep 2 08:18:23 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a222oi/sky130_fd_sc_hdll__a222oi_1.pxi.spice b/cells/a222oi/sky130_fd_sc_hdll__a222oi_1.pxi.spice index 3aea408..1292d40 100644 --- a/cells/a222oi/sky130_fd_sc_hdll__a222oi_1.pxi.spice +++ b/cells/a222oi/sky130_fd_sc_hdll__a222oi_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a222oi_1.pxi.spice -* Created: Thu Aug 27 18:53:56 2020 +* Created: Wed Sep 2 08:18:23 2020 * x_PM_SKY130_FD_SC_HDLL__A222OI_1%C1 N_C1_c_51_n N_C1_M1006_g N_C1_c_52_n + N_C1_M1011_g C1 N_C1_c_53_n C1 PM_SKY130_FD_SC_HDLL__A222OI_1%C1
diff --git a/cells/a222oi/sky130_fd_sc_hdll__a222oi_1.spice b/cells/a222oi/sky130_fd_sc_hdll__a222oi_1.spice index 34ef6c6..56bec2f 100644 --- a/cells/a222oi/sky130_fd_sc_hdll__a222oi_1.spice +++ b/cells/a222oi/sky130_fd_sc_hdll__a222oi_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a222oi_1.spice -* Created: Thu Aug 27 18:53:56 2020 +* Created: Wed Sep 2 08:18:23 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a22o/sky130_fd_sc_hdll__a22o_1.lvs.report b/cells/a22o/sky130_fd_sc_hdll__a22o_1.lvs.report new file mode 100644 index 0000000..93ee41f --- /dev/null +++ b/cells/a22o/sky130_fd_sc_hdll__a22o_1.lvs.report
@@ -0,0 +1,483 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_1.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a22o_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a22o_1.sp ('sky130_fd_sc_hdll__a22o_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_1.spice ('sky130_fd_sc_hdll__a22o_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:18:27 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a22o_1 sky130_fd_sc_hdll__a22o_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a22o_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__a22o_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 13 13 + + Instances: 5 5 MN (4 pins) + 5 5 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 11 10 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 10 10 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + 2 2 SMN2 (4 pins) + 1 1 SPMP_2_2 (6 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 10 10 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 2 2 0 0 SMN2 + 1 1 0 0 SPMP_2_2 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB B2 B1 A1 A2 VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a22o/sky130_fd_sc_hdll__a22o_1.pex.spice b/cells/a22o/sky130_fd_sc_hdll__a22o_1.pex.spice index 6dbc13a..59d721a 100644 --- a/cells/a22o/sky130_fd_sc_hdll__a22o_1.pex.spice +++ b/cells/a22o/sky130_fd_sc_hdll__a22o_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a22o_1.pex.spice -* Created: Thu Aug 27 18:54:03 2020 +* Created: Wed Sep 2 08:18:30 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a22o/sky130_fd_sc_hdll__a22o_1.pxi.spice b/cells/a22o/sky130_fd_sc_hdll__a22o_1.pxi.spice index e50f8b2..f5b2741 100644 --- a/cells/a22o/sky130_fd_sc_hdll__a22o_1.pxi.spice +++ b/cells/a22o/sky130_fd_sc_hdll__a22o_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a22o_1.pxi.spice -* Created: Thu Aug 27 18:54:03 2020 +* Created: Wed Sep 2 08:18:30 2020 * x_PM_SKY130_FD_SC_HDLL__A22O_1%B2 N_B2_c_50_n N_B2_M1003_g N_B2_c_51_n + N_B2_M1009_g B2 N_B2_c_52_n PM_SKY130_FD_SC_HDLL__A22O_1%B2
diff --git a/cells/a22o/sky130_fd_sc_hdll__a22o_1.spice b/cells/a22o/sky130_fd_sc_hdll__a22o_1.spice index 9b40381..eb2afec 100644 --- a/cells/a22o/sky130_fd_sc_hdll__a22o_1.spice +++ b/cells/a22o/sky130_fd_sc_hdll__a22o_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a22o_1.spice -* Created: Thu Aug 27 18:54:03 2020 +* Created: Wed Sep 2 08:18:30 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a22o/sky130_fd_sc_hdll__a22o_2.lvs.report b/cells/a22o/sky130_fd_sc_hdll__a22o_2.lvs.report new file mode 100644 index 0000000..bad1d6a --- /dev/null +++ b/cells/a22o/sky130_fd_sc_hdll__a22o_2.lvs.report
@@ -0,0 +1,490 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_2.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a22o_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a22o_2.sp ('sky130_fd_sc_hdll__a22o_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_2.spice ('sky130_fd_sc_hdll__a22o_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:18:34 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a22o_2 sky130_fd_sc_hdll__a22o_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a22o_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__a22o_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 13 13 + + Instances: 6 6 MN (4 pins) + 6 6 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 13 12 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 10 10 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + 2 2 SMN2 (4 pins) + 1 1 SPMP_2_2 (6 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 10 10 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 2 2 0 0 SMN2 + 1 1 0 0 SPMP_2_2 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB B2 B1 A1 A2 VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a22o/sky130_fd_sc_hdll__a22o_2.pex.spice b/cells/a22o/sky130_fd_sc_hdll__a22o_2.pex.spice index 4b5d6ce..e99bcea 100644 --- a/cells/a22o/sky130_fd_sc_hdll__a22o_2.pex.spice +++ b/cells/a22o/sky130_fd_sc_hdll__a22o_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a22o_2.pex.spice -* Created: Thu Aug 27 18:54:09 2020 +* Created: Wed Sep 2 08:18:37 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a22o/sky130_fd_sc_hdll__a22o_2.pxi.spice b/cells/a22o/sky130_fd_sc_hdll__a22o_2.pxi.spice index 7bef262..64c0164 100644 --- a/cells/a22o/sky130_fd_sc_hdll__a22o_2.pxi.spice +++ b/cells/a22o/sky130_fd_sc_hdll__a22o_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a22o_2.pxi.spice -* Created: Thu Aug 27 18:54:09 2020 +* Created: Wed Sep 2 08:18:37 2020 * x_PM_SKY130_FD_SC_HDLL__A22O_2%B2 N_B2_c_58_n N_B2_M1005_g N_B2_c_59_n + N_B2_M1009_g B2 N_B2_c_60_n PM_SKY130_FD_SC_HDLL__A22O_2%B2
diff --git a/cells/a22o/sky130_fd_sc_hdll__a22o_2.spice b/cells/a22o/sky130_fd_sc_hdll__a22o_2.spice index 69f2726..ddbacef 100644 --- a/cells/a22o/sky130_fd_sc_hdll__a22o_2.spice +++ b/cells/a22o/sky130_fd_sc_hdll__a22o_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a22o_2.spice -* Created: Thu Aug 27 18:54:09 2020 +* Created: Wed Sep 2 08:18:37 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a22o/sky130_fd_sc_hdll__a22o_4.lvs.report b/cells/a22o/sky130_fd_sc_hdll__a22o_4.lvs.report new file mode 100644 index 0000000..bfac607 --- /dev/null +++ b/cells/a22o/sky130_fd_sc_hdll__a22o_4.lvs.report
@@ -0,0 +1,505 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_4.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a22o_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a22o_4.sp ('sky130_fd_sc_hdll__a22o_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22o/sky130_fd_sc_hdll__a22o_4.spice ('sky130_fd_sc_hdll__a22o_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:18:41 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a22o_4 sky130_fd_sc_hdll__a22o_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a22o_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__a22o_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 15 13 * + + Instances: 12 12 MN (4 pins) + 12 12 MP (4 pins) + 1 0 * Dpar (2 pins) + 2 0 * Probe (2 pins) + ------ ------ + Total Inst: 27 24 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 10 10 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + 2 2 SMN2 (4 pins) + 1 1 SPMP_2_2 (6 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 10 10 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 2 2 0 0 SMN2 + 1 1 0 0 SPMP_2_2 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 3 layout instances were filtered and their pins removed from adjoining nets. + + 24 layout mos transistors were reduced to 10. + 14 mos transistors were deleted by parallel reduction. + 24 source mos transistors were reduced to 10. + 14 mos transistors were deleted by parallel reduction. + + 2 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB B2 B1 A2 A1 VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a22o/sky130_fd_sc_hdll__a22o_4.pex.spice b/cells/a22o/sky130_fd_sc_hdll__a22o_4.pex.spice index b8178a6..acf3002 100644 --- a/cells/a22o/sky130_fd_sc_hdll__a22o_4.pex.spice +++ b/cells/a22o/sky130_fd_sc_hdll__a22o_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a22o_4.pex.spice -* Created: Thu Aug 27 18:54:16 2020 +* Created: Wed Sep 2 08:18:44 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a22o/sky130_fd_sc_hdll__a22o_4.pxi.spice b/cells/a22o/sky130_fd_sc_hdll__a22o_4.pxi.spice index cfac837..32d83cd 100644 --- a/cells/a22o/sky130_fd_sc_hdll__a22o_4.pxi.spice +++ b/cells/a22o/sky130_fd_sc_hdll__a22o_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a22o_4.pxi.spice -* Created: Thu Aug 27 18:54:16 2020 +* Created: Wed Sep 2 08:18:44 2020 * x_PM_SKY130_FD_SC_HDLL__A22O_4%A_96_21# N_A_96_21#_M1009_s N_A_96_21#_M1011_s + N_A_96_21#_M1012_d N_A_96_21#_M1006_d N_A_96_21#_c_106_n N_A_96_21#_M1007_g
diff --git a/cells/a22o/sky130_fd_sc_hdll__a22o_4.spice b/cells/a22o/sky130_fd_sc_hdll__a22o_4.spice index 557b58b..fd975bf 100644 --- a/cells/a22o/sky130_fd_sc_hdll__a22o_4.spice +++ b/cells/a22o/sky130_fd_sc_hdll__a22o_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a22o_4.spice -* Created: Thu Aug 27 18:54:16 2020 +* Created: Wed Sep 2 08:18:44 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a22oi/sky130_fd_sc_hdll__a22oi_1.lvs.report b/cells/a22oi/sky130_fd_sc_hdll__a22oi_1.lvs.report new file mode 100644 index 0000000..cd2f754 --- /dev/null +++ b/cells/a22oi/sky130_fd_sc_hdll__a22oi_1.lvs.report
@@ -0,0 +1,480 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_1.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a22oi_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a22oi_1.sp ('sky130_fd_sc_hdll__a22oi_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_1.spice ('sky130_fd_sc_hdll__a22oi_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:18:48 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a22oi_1 sky130_fd_sc_hdll__a22oi_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a22oi_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__a22oi_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 14 12 * + + Instances: 4 4 MN (4 pins) + 4 4 MP (4 pins) + 1 0 * Dpar (2 pins) + 2 0 * Probe (2 pins) + ------ ------ + Total Inst: 11 8 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 9 9 + + Instances: 2 2 SMN2 (4 pins) + 1 1 SPMP_2_2 (6 pins) + ------ ------ + Total Inst: 3 3 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 9 9 0 0 + + Instances: 2 2 0 0 SMN2 + 1 1 0 0 SPMP_2_2 + ------- ------- --------- --------- + Total Inst: 3 3 0 0 + + +o Statistics: + + 3 layout instances were filtered and their pins removed from adjoining nets. + + 2 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB B2 B1 A1 A2 Y VPWR VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a22oi/sky130_fd_sc_hdll__a22oi_1.pex.spice b/cells/a22oi/sky130_fd_sc_hdll__a22oi_1.pex.spice index 85be887..e525028 100644 --- a/cells/a22oi/sky130_fd_sc_hdll__a22oi_1.pex.spice +++ b/cells/a22oi/sky130_fd_sc_hdll__a22oi_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a22oi_1.pex.spice -* Created: Thu Aug 27 18:54:23 2020 +* Created: Wed Sep 2 08:18:51 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a22oi/sky130_fd_sc_hdll__a22oi_1.pxi.spice b/cells/a22oi/sky130_fd_sc_hdll__a22oi_1.pxi.spice index 880e8e1..09fd69d 100644 --- a/cells/a22oi/sky130_fd_sc_hdll__a22oi_1.pxi.spice +++ b/cells/a22oi/sky130_fd_sc_hdll__a22oi_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a22oi_1.pxi.spice -* Created: Thu Aug 27 18:54:23 2020 +* Created: Wed Sep 2 08:18:51 2020 * x_PM_SKY130_FD_SC_HDLL__A22OI_1%B2 N_B2_c_46_n N_B2_M1002_g N_B2_c_47_n + N_B2_M1007_g B2 B2 PM_SKY130_FD_SC_HDLL__A22OI_1%B2
diff --git a/cells/a22oi/sky130_fd_sc_hdll__a22oi_1.spice b/cells/a22oi/sky130_fd_sc_hdll__a22oi_1.spice index 1356fa3..43e62ec 100644 --- a/cells/a22oi/sky130_fd_sc_hdll__a22oi_1.spice +++ b/cells/a22oi/sky130_fd_sc_hdll__a22oi_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a22oi_1.spice -* Created: Thu Aug 27 18:54:23 2020 +* Created: Wed Sep 2 08:18:51 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a22oi/sky130_fd_sc_hdll__a22oi_2.lvs.report b/cells/a22oi/sky130_fd_sc_hdll__a22oi_2.lvs.report new file mode 100644 index 0000000..ab06066 --- /dev/null +++ b/cells/a22oi/sky130_fd_sc_hdll__a22oi_2.lvs.report
@@ -0,0 +1,490 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_2.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a22oi_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a22oi_2.sp ('sky130_fd_sc_hdll__a22oi_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_2.spice ('sky130_fd_sc_hdll__a22oi_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:18:54 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a22oi_2 sky130_fd_sc_hdll__a22oi_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a22oi_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__a22oi_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 12 12 + + Instances: 8 8 MN (4 pins) + 8 8 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 17 16 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 9 9 + + Instances: 2 2 SMN2 (4 pins) + 1 1 SPMP_2_2 (6 pins) + ------ ------ + Total Inst: 3 3 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 9 9 0 0 + + Instances: 2 2 0 0 SMN2 + 1 1 0 0 SPMP_2_2 + ------- ------- --------- --------- + Total Inst: 3 3 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 16 layout mos transistors were reduced to 8. + 8 mos transistors were deleted by parallel reduction. + 16 source mos transistors were reduced to 8. + 8 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB B2 B1 A1 A2 Y VPWR VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a22oi/sky130_fd_sc_hdll__a22oi_2.pex.spice b/cells/a22oi/sky130_fd_sc_hdll__a22oi_2.pex.spice index 3ec93cc..43e68a7 100644 --- a/cells/a22oi/sky130_fd_sc_hdll__a22oi_2.pex.spice +++ b/cells/a22oi/sky130_fd_sc_hdll__a22oi_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a22oi_2.pex.spice -* Created: Thu Aug 27 18:54:29 2020 +* Created: Wed Sep 2 08:18:57 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a22oi/sky130_fd_sc_hdll__a22oi_2.pxi.spice b/cells/a22oi/sky130_fd_sc_hdll__a22oi_2.pxi.spice index 7580fd8..d8d9c4e 100644 --- a/cells/a22oi/sky130_fd_sc_hdll__a22oi_2.pxi.spice +++ b/cells/a22oi/sky130_fd_sc_hdll__a22oi_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a22oi_2.pxi.spice -* Created: Thu Aug 27 18:54:29 2020 +* Created: Wed Sep 2 08:18:57 2020 * x_PM_SKY130_FD_SC_HDLL__A22OI_2%B2 N_B2_c_70_n N_B2_M1000_g N_B2_c_66_n + N_B2_M1001_g N_B2_c_71_n N_B2_M1008_g N_B2_c_67_n N_B2_M1011_g B2 B2
diff --git a/cells/a22oi/sky130_fd_sc_hdll__a22oi_2.spice b/cells/a22oi/sky130_fd_sc_hdll__a22oi_2.spice index 9954067..ff236aa 100644 --- a/cells/a22oi/sky130_fd_sc_hdll__a22oi_2.spice +++ b/cells/a22oi/sky130_fd_sc_hdll__a22oi_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a22oi_2.spice -* Created: Thu Aug 27 18:54:29 2020 +* Created: Wed Sep 2 08:18:57 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.lvs.report b/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.lvs.report new file mode 100644 index 0000000..c39764e --- /dev/null +++ b/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.lvs.report
@@ -0,0 +1,509 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a22oi_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a22oi_4.sp ('sky130_fd_sc_hdll__a22oi_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.spice ('sky130_fd_sc_hdll__a22oi_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:19:01 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a22oi_4 sky130_fd_sc_hdll__a22oi_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a22oi_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__a22oi_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 15 12 * + + Instances: 16 16 MN (4 pins) + 16 16 MP (4 pins) + 1 0 * Dpar (2 pins) + 3 0 * Probe (2 pins) + ------ ------ + Total Inst: 36 32 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 9 9 + + Instances: 2 2 SMN2 (4 pins) + 1 1 SPMP_2_2 (6 pins) + ------ ------ + Total Inst: 3 3 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 9 9 0 0 + + Instances: 2 2 0 0 SMN2 + 1 1 0 0 SPMP_2_2 + ------- ------- --------- --------- + Total Inst: 3 3 0 0 + + +o Statistics: + + 4 layout instances were filtered and their pins removed from adjoining nets. + + 32 layout mos transistors were reduced to 8. + 24 mos transistors were deleted by parallel reduction. + 32 source mos transistors were reduced to 8. + 24 mos transistors were deleted by parallel reduction. + + 3 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB B2 B1 A1 A2 Y VPWR VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.pex.spice b/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.pex.spice index 04b73f1..0978284 100644 --- a/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.pex.spice +++ b/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a22oi_4.pex.spice -* Created: Thu Aug 27 18:54:36 2020 +* Created: Wed Sep 2 08:19:04 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.pxi.spice b/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.pxi.spice index 3feab97..1268ff5 100644 --- a/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.pxi.spice +++ b/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a22oi_4.pxi.spice -* Created: Thu Aug 27 18:54:36 2020 +* Created: Wed Sep 2 08:19:04 2020 * x_PM_SKY130_FD_SC_HDLL__A22OI_4%B2 N_B2_c_107_n N_B2_M1008_g N_B2_c_113_n + N_B2_M1002_g N_B2_c_108_n N_B2_M1010_g N_B2_c_114_n N_B2_M1013_g N_B2_c_109_n
diff --git a/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.spice b/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.spice index 847e4ba..ab51a9d 100644 --- a/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.spice +++ b/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a22oi_4.spice -* Created: Thu Aug 27 18:54:36 2020 +* Created: Wed Sep 2 08:19:04 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_1.lvs.report b/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_1.lvs.report new file mode 100644 index 0000000..4b5ea7e --- /dev/null +++ b/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_1.lvs.report
@@ -0,0 +1,487 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_1.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a2bb2o_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a2bb2o_1.sp ('sky130_fd_sc_hdll__a2bb2o_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_1.spice ('sky130_fd_sc_hdll__a2bb2o_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:19:08 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a2bb2o_1 sky130_fd_sc_hdll__a2bb2o_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a2bb2o_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__a2bb2o_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 14 14 + + Instances: 6 6 MN (4 pins) + 6 6 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 13 12 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 11 11 + + Instances: 4 4 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SMP2 (4 pins) + 1 1 SPMP_2_1 (5 pins) + ------ ------ + Total Inst: 8 8 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 11 11 0 0 + + Instances: 4 4 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SMP2 + 1 1 0 0 SPMP_2_1 + ------- ------- --------- --------- + Total Inst: 8 8 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB A1_N A2_N B2 B1 X VPWR VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_1.pex.spice b/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_1.pex.spice index 64feaa6..6bad756 100644 --- a/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_1.pex.spice +++ b/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a2bb2o_1.pex.spice -* Created: Thu Aug 27 18:54:43 2020 +* Created: Wed Sep 2 08:19:11 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_1.pxi.spice b/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_1.pxi.spice index 28bd95c..c163aa4 100644 --- a/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_1.pxi.spice +++ b/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a2bb2o_1.pxi.spice -* Created: Thu Aug 27 18:54:43 2020 +* Created: Wed Sep 2 08:19:11 2020 * x_PM_SKY130_FD_SC_HDLL__A2BB2O_1%A_79_21# N_A_79_21#_M1002_d N_A_79_21#_M1000_s + N_A_79_21#_c_74_n N_A_79_21#_M1011_g N_A_79_21#_c_75_n N_A_79_21#_M1003_g
diff --git a/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_1.spice b/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_1.spice index f24e5f4..32c1766 100644 --- a/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_1.spice +++ b/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a2bb2o_1.spice -* Created: Thu Aug 27 18:54:43 2020 +* Created: Wed Sep 2 08:19:11 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_2.lvs.report b/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_2.lvs.report new file mode 100644 index 0000000..8f01fae --- /dev/null +++ b/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_2.lvs.report
@@ -0,0 +1,494 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_2.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a2bb2o_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a2bb2o_2.sp ('sky130_fd_sc_hdll__a2bb2o_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_2.spice ('sky130_fd_sc_hdll__a2bb2o_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:19:15 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a2bb2o_2 sky130_fd_sc_hdll__a2bb2o_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a2bb2o_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__a2bb2o_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 14 14 + + Instances: 7 7 MN (4 pins) + 7 7 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 15 14 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 11 11 + + Instances: 4 4 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SMP2 (4 pins) + 1 1 SPMP_2_1 (5 pins) + ------ ------ + Total Inst: 8 8 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 11 11 0 0 + + Instances: 4 4 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SMP2 + 1 1 0 0 SPMP_2_1 + ------- ------- --------- --------- + Total Inst: 8 8 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A1_N A2_N B2 B1 VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_2.pex.spice b/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_2.pex.spice index 331c6f1..197c05b 100644 --- a/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_2.pex.spice +++ b/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a2bb2o_2.pex.spice -* Created: Thu Aug 27 18:54:49 2020 +* Created: Wed Sep 2 08:19:18 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_2.pxi.spice b/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_2.pxi.spice index 7031ef3..c38d13a 100644 --- a/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_2.pxi.spice +++ b/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a2bb2o_2.pxi.spice -* Created: Thu Aug 27 18:54:49 2020 +* Created: Wed Sep 2 08:19:18 2020 * x_PM_SKY130_FD_SC_HDLL__A2BB2O_2%A_82_21# N_A_82_21#_M1013_d N_A_82_21#_M1007_s + N_A_82_21#_c_74_n N_A_82_21#_M1003_g N_A_82_21#_c_81_n N_A_82_21#_M1000_g
diff --git a/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_2.spice b/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_2.spice index 307e7c3..91198d2 100644 --- a/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_2.spice +++ b/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a2bb2o_2.spice -* Created: Thu Aug 27 18:54:49 2020 +* Created: Wed Sep 2 08:19:18 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.lvs.report b/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.lvs.report new file mode 100644 index 0000000..47f4779 --- /dev/null +++ b/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.lvs.report
@@ -0,0 +1,508 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a2bb2o_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a2bb2o_4.sp ('sky130_fd_sc_hdll__a2bb2o_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.spice ('sky130_fd_sc_hdll__a2bb2o_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:19:22 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a2bb2o_4 sky130_fd_sc_hdll__a2bb2o_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a2bb2o_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__a2bb2o_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 14 14 + + Instances: 14 14 MN (4 pins) + 14 14 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 29 28 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 11 11 + + Instances: 4 4 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SMP2 (4 pins) + 1 1 SPMP_2_1 (5 pins) + ------ ------ + Total Inst: 8 8 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 11 11 0 0 + + Instances: 4 4 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SMP2 + 1 1 0 0 SPMP_2_1 + ------- ------- --------- --------- + Total Inst: 8 8 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 28 layout mos transistors were reduced to 12. + 16 mos transistors were deleted by parallel reduction. + 28 source mos transistors were reduced to 12. + 16 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB B1 B2 A1_N A2_N VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.pex.spice b/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.pex.spice index a075dff..5b84a73 100644 --- a/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.pex.spice +++ b/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a2bb2o_4.pex.spice -* Created: Thu Aug 27 18:54:56 2020 +* Created: Wed Sep 2 08:19:25 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.pxi.spice b/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.pxi.spice index 58c5412..62333c6 100644 --- a/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.pxi.spice +++ b/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a2bb2o_4.pxi.spice -* Created: Thu Aug 27 18:54:56 2020 +* Created: Wed Sep 2 08:19:25 2020 * x_PM_SKY130_FD_SC_HDLL__A2BB2O_4%B1 N_B1_c_126_n N_B1_M1009_g N_B1_c_127_n + N_B1_M1018_g N_B1_c_128_n N_B1_M1015_g N_B1_c_129_n N_B1_M1019_g N_B1_c_135_n
diff --git a/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.spice b/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.spice index 2b402a3..1785930 100644 --- a/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.spice +++ b/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a2bb2o_4.spice -* Created: Thu Aug 27 18:54:56 2020 +* Created: Wed Sep 2 08:19:25 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_1.lvs.report b/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_1.lvs.report new file mode 100644 index 0000000..b1b4cf5 --- /dev/null +++ b/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_1.lvs.report
@@ -0,0 +1,486 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_1.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a2bb2oi_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a2bb2oi_1.sp ('sky130_fd_sc_hdll__a2bb2oi_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_1.spice ('sky130_fd_sc_hdll__a2bb2oi_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:19:29 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a2bb2oi_1 sky130_fd_sc_hdll__a2bb2oi_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a2bb2oi_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__a2bb2oi_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 17 13 * + + Instances: 5 5 MN (4 pins) + 5 5 MP (4 pins) + 1 0 * Dpar (2 pins) + 4 0 * Probe (2 pins) + ------ ------ + Total Inst: 15 10 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 10 10 + + Instances: 3 3 MN (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SMP2 (4 pins) + 1 1 SPMP_2_1 (5 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 10 10 0 0 + + Instances: 3 3 0 0 MN(NSHORT) + 1 1 0 0 SMN2 + 1 1 0 0 SMP2 + 1 1 0 0 SPMP_2_1 + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 5 layout instances were filtered and their pins removed from adjoining nets. + + 4 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A1_N A2_N B2 B1 VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_1.pex.spice b/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_1.pex.spice index 371fd1d..b0da504 100644 --- a/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_1.pex.spice +++ b/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a2bb2oi_1.pex.spice -* Created: Thu Aug 27 18:55:03 2020 +* Created: Wed Sep 2 08:19:32 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_1.pxi.spice b/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_1.pxi.spice index 0751da5..1a33fa5 100644 --- a/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_1.pxi.spice +++ b/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a2bb2oi_1.pxi.spice -* Created: Thu Aug 27 18:55:03 2020 +* Created: Wed Sep 2 08:19:32 2020 * x_PM_SKY130_FD_SC_HDLL__A2BB2OI_1%A1_N N_A1_N_c_53_n N_A1_N_M1002_g + N_A1_N_c_54_n N_A1_N_M1007_g A1_N A1_N N_A1_N_c_55_n
diff --git a/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_1.spice b/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_1.spice index 4856734..e6f89b5 100644 --- a/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_1.spice +++ b/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a2bb2oi_1.spice -* Created: Thu Aug 27 18:55:03 2020 +* Created: Wed Sep 2 08:19:32 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.lvs.report b/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.lvs.report new file mode 100644 index 0000000..74514e5 --- /dev/null +++ b/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.lvs.report
@@ -0,0 +1,501 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a2bb2oi_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a2bb2oi_2.sp ('sky130_fd_sc_hdll__a2bb2oi_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.spice ('sky130_fd_sc_hdll__a2bb2oi_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:19:36 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a2bb2oi_2 sky130_fd_sc_hdll__a2bb2oi_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a2bb2oi_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__a2bb2oi_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 14 13 * + + Instances: 10 10 MN (4 pins) + 10 10 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 22 20 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 10 10 + + Instances: 3 3 MN (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SMP2 (4 pins) + 1 1 SPMP_2_1 (5 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 10 10 0 0 + + Instances: 3 3 0 0 MN(NSHORT) + 1 1 0 0 SMN2 + 1 1 0 0 SMP2 + 1 1 0 0 SPMP_2_1 + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 20 layout mos transistors were reduced to 10. + 10 mos transistors were deleted by parallel reduction. + 20 source mos transistors were reduced to 10. + 10 mos transistors were deleted by parallel reduction. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB B1 B2 A1_N A2_N VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.pex.spice b/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.pex.spice index e61ed62..b923db2 100644 --- a/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.pex.spice +++ b/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a2bb2oi_2.pex.spice -* Created: Thu Aug 27 18:55:09 2020 +* Created: Wed Sep 2 08:19:39 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.pxi.spice b/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.pxi.spice index 832341a..0e1f3bf 100644 --- a/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.pxi.spice +++ b/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a2bb2oi_2.pxi.spice -* Created: Thu Aug 27 18:55:09 2020 +* Created: Wed Sep 2 08:19:39 2020 * x_PM_SKY130_FD_SC_HDLL__A2BB2OI_2%B1 N_B1_c_81_n N_B1_M1005_g N_B1_c_82_n + N_B1_M1010_g N_B1_c_83_n N_B1_M1009_g N_B1_c_84_n N_B1_M1011_g N_B1_c_89_n
diff --git a/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.spice b/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.spice index 5519aa5..5076c96 100644 --- a/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.spice +++ b/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a2bb2oi_2.spice -* Created: Thu Aug 27 18:55:09 2020 +* Created: Wed Sep 2 08:19:39 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.lvs.report b/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.lvs.report new file mode 100644 index 0000000..5cc9723 --- /dev/null +++ b/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.lvs.report
@@ -0,0 +1,521 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 87 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 89 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 91 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 93 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 95 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 97 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a2bb2oi_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a2bb2oi_4.sp ('sky130_fd_sc_hdll__a2bb2oi_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice ('sky130_fd_sc_hdll__a2bb2oi_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:19:42 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a2bb2oi_4 sky130_fd_sc_hdll__a2bb2oi_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a2bb2oi_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__a2bb2oi_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 17 13 * + + Instances: 20 20 MN (4 pins) + 20 20 MP (4 pins) + 1 0 * Dpar (2 pins) + 4 0 * Probe (2 pins) + ------ ------ + Total Inst: 45 40 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 10 10 + + Instances: 3 3 MN (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SMP2 (4 pins) + 1 1 SPMP_2_1 (5 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 10 10 0 0 + + Instances: 3 3 0 0 MN(NSHORT) + 1 1 0 0 SMN2 + 1 1 0 0 SMP2 + 1 1 0 0 SPMP_2_1 + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 5 layout instances were filtered and their pins removed from adjoining nets. + + 40 layout mos transistors were reduced to 10. + 30 mos transistors were deleted by parallel reduction. + 40 source mos transistors were reduced to 10. + 30 mos transistors were deleted by parallel reduction. + + 4 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB B1 B2 A1_N A2_N VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.pex.spice b/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.pex.spice index 6d9bf1a..3b4882a 100644 --- a/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.pex.spice +++ b/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a2bb2oi_4.pex.spice -* Created: Thu Aug 27 18:55:16 2020 +* Created: Wed Sep 2 08:19:46 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.pxi.spice b/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.pxi.spice index 897cdd5..ea4caed 100644 --- a/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.pxi.spice +++ b/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a2bb2oi_4.pxi.spice -* Created: Thu Aug 27 18:55:16 2020 +* Created: Wed Sep 2 08:19:46 2020 * x_PM_SKY130_FD_SC_HDLL__A2BB2OI_4%B1 N_B1_c_151_n N_B1_M1011_g N_B1_c_160_n + N_B1_M1000_g N_B1_c_152_n N_B1_M1012_g N_B1_c_161_n N_B1_M1002_g N_B1_c_162_n
diff --git a/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice b/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice index 64877f7..172f340 100644 --- a/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice +++ b/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a2bb2oi_4.spice -* Created: Thu Aug 27 18:55:16 2020 +* Created: Wed Sep 2 08:19:46 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a31o/sky130_fd_sc_hdll__a31o_1.lvs.report b/cells/a31o/sky130_fd_sc_hdll__a31o_1.lvs.report new file mode 100644 index 0000000..92b8f4c --- /dev/null +++ b/cells/a31o/sky130_fd_sc_hdll__a31o_1.lvs.report
@@ -0,0 +1,483 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_1.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a31o_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a31o_1.sp ('sky130_fd_sc_hdll__a31o_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_1.spice ('sky130_fd_sc_hdll__a31o_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:19:50 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a31o_1 sky130_fd_sc_hdll__a31o_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a31o_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__a31o_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 13 13 + + Instances: 5 5 MN (4 pins) + 5 5 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 11 10 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 10 10 + + Instances: 2 2 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMN3 (5 pins) + 1 1 SPMP_3_1 (6 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 10 10 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMN3 + 1 1 0 0 SPMP_3_1 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB A3 A2 A1 B1 X VPWR VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a31o/sky130_fd_sc_hdll__a31o_1.pex.spice b/cells/a31o/sky130_fd_sc_hdll__a31o_1.pex.spice index 1da79a0..936aef7 100644 --- a/cells/a31o/sky130_fd_sc_hdll__a31o_1.pex.spice +++ b/cells/a31o/sky130_fd_sc_hdll__a31o_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a31o_1.pex.spice -* Created: Thu Aug 27 18:55:23 2020 +* Created: Wed Sep 2 08:19:53 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a31o/sky130_fd_sc_hdll__a31o_1.pxi.spice b/cells/a31o/sky130_fd_sc_hdll__a31o_1.pxi.spice index a81a9f0..d1862b5 100644 --- a/cells/a31o/sky130_fd_sc_hdll__a31o_1.pxi.spice +++ b/cells/a31o/sky130_fd_sc_hdll__a31o_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a31o_1.pxi.spice -* Created: Thu Aug 27 18:55:23 2020 +* Created: Wed Sep 2 08:19:53 2020 * x_PM_SKY130_FD_SC_HDLL__A31O_1%A_80_21# N_A_80_21#_M1007_d N_A_80_21#_M1009_d + N_A_80_21#_c_53_n N_A_80_21#_M1004_g N_A_80_21#_c_54_n N_A_80_21#_M1003_g
diff --git a/cells/a31o/sky130_fd_sc_hdll__a31o_1.spice b/cells/a31o/sky130_fd_sc_hdll__a31o_1.spice index 4ad5c17..59ddfd8 100644 --- a/cells/a31o/sky130_fd_sc_hdll__a31o_1.spice +++ b/cells/a31o/sky130_fd_sc_hdll__a31o_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a31o_1.spice -* Created: Thu Aug 27 18:55:23 2020 +* Created: Wed Sep 2 08:19:53 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a31o/sky130_fd_sc_hdll__a31o_2.lvs.report b/cells/a31o/sky130_fd_sc_hdll__a31o_2.lvs.report new file mode 100644 index 0000000..5f4d382 --- /dev/null +++ b/cells/a31o/sky130_fd_sc_hdll__a31o_2.lvs.report
@@ -0,0 +1,490 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_2.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a31o_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a31o_2.sp ('sky130_fd_sc_hdll__a31o_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_2.spice ('sky130_fd_sc_hdll__a31o_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:19:56 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a31o_2 sky130_fd_sc_hdll__a31o_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a31o_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__a31o_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 13 13 + + Instances: 6 6 MN (4 pins) + 6 6 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 13 12 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 10 10 + + Instances: 2 2 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMN3 (5 pins) + 1 1 SPMP_3_1 (6 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 10 10 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMN3 + 1 1 0 0 SPMP_3_1 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A3 A2 A1 B1 VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a31o/sky130_fd_sc_hdll__a31o_2.pex.spice b/cells/a31o/sky130_fd_sc_hdll__a31o_2.pex.spice index adeecad..e84e997 100644 --- a/cells/a31o/sky130_fd_sc_hdll__a31o_2.pex.spice +++ b/cells/a31o/sky130_fd_sc_hdll__a31o_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a31o_2.pex.spice -* Created: Thu Aug 27 18:55:29 2020 +* Created: Wed Sep 2 08:19:59 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a31o/sky130_fd_sc_hdll__a31o_2.pxi.spice b/cells/a31o/sky130_fd_sc_hdll__a31o_2.pxi.spice index 8de31a9..d0a3e95 100644 --- a/cells/a31o/sky130_fd_sc_hdll__a31o_2.pxi.spice +++ b/cells/a31o/sky130_fd_sc_hdll__a31o_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a31o_2.pxi.spice -* Created: Thu Aug 27 18:55:29 2020 +* Created: Wed Sep 2 08:19:59 2020 * x_PM_SKY130_FD_SC_HDLL__A31O_2%A_79_21# N_A_79_21#_M1002_d N_A_79_21#_M1007_d + N_A_79_21#_c_55_n N_A_79_21#_M1001_g N_A_79_21#_c_59_n N_A_79_21#_M1000_g
diff --git a/cells/a31o/sky130_fd_sc_hdll__a31o_2.spice b/cells/a31o/sky130_fd_sc_hdll__a31o_2.spice index 0c300f0..d96a5c6 100644 --- a/cells/a31o/sky130_fd_sc_hdll__a31o_2.spice +++ b/cells/a31o/sky130_fd_sc_hdll__a31o_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a31o_2.spice -* Created: Thu Aug 27 18:55:29 2020 +* Created: Wed Sep 2 08:19:59 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a31o/sky130_fd_sc_hdll__a31o_4.lvs.report b/cells/a31o/sky130_fd_sc_hdll__a31o_4.lvs.report new file mode 100644 index 0000000..1205bb3 --- /dev/null +++ b/cells/a31o/sky130_fd_sc_hdll__a31o_4.lvs.report
@@ -0,0 +1,504 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_4.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a31o_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a31o_4.sp ('sky130_fd_sc_hdll__a31o_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31o/sky130_fd_sc_hdll__a31o_4.spice ('sky130_fd_sc_hdll__a31o_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:20:03 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a31o_4 sky130_fd_sc_hdll__a31o_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a31o_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__a31o_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 15 15 + + Instances: 12 12 MN (4 pins) + 12 12 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 25 24 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 10 10 + + Instances: 2 2 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMN3 (5 pins) + 1 1 SPMP_3_1 (6 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 10 10 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMN3 + 1 1 0 0 SPMP_3_1 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 24 layout mos transistors were reduced to 10. 2 connecting nets were deleted. + 11 mos transistors were deleted by parallel reduction. + 3 mos transistors and 2 connecting nets were deleted by split-gate reduction. + 24 source mos transistors were reduced to 10. 2 connecting nets were deleted. + 11 mos transistors were deleted by parallel reduction. + 3 mos transistors and 2 connecting nets were deleted by split-gate reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A3 A2 A1 B1 VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a31o/sky130_fd_sc_hdll__a31o_4.pex.spice b/cells/a31o/sky130_fd_sc_hdll__a31o_4.pex.spice index 06eb070..031e775 100644 --- a/cells/a31o/sky130_fd_sc_hdll__a31o_4.pex.spice +++ b/cells/a31o/sky130_fd_sc_hdll__a31o_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a31o_4.pex.spice -* Created: Thu Aug 27 18:55:36 2020 +* Created: Wed Sep 2 08:20:06 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a31o/sky130_fd_sc_hdll__a31o_4.pxi.spice b/cells/a31o/sky130_fd_sc_hdll__a31o_4.pxi.spice index 172e62a..2258031 100644 --- a/cells/a31o/sky130_fd_sc_hdll__a31o_4.pxi.spice +++ b/cells/a31o/sky130_fd_sc_hdll__a31o_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a31o_4.pxi.spice -* Created: Thu Aug 27 18:55:36 2020 +* Created: Wed Sep 2 08:20:06 2020 * x_PM_SKY130_FD_SC_HDLL__A31O_4%A3 N_A3_c_91_n N_A3_M1002_g N_A3_c_92_n + N_A3_M1016_g N_A3_c_93_n N_A3_M1019_g N_A3_c_94_n N_A3_M1007_g N_A3_c_99_n
diff --git a/cells/a31o/sky130_fd_sc_hdll__a31o_4.spice b/cells/a31o/sky130_fd_sc_hdll__a31o_4.spice index f77f490..459467e 100644 --- a/cells/a31o/sky130_fd_sc_hdll__a31o_4.spice +++ b/cells/a31o/sky130_fd_sc_hdll__a31o_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a31o_4.spice -* Created: Thu Aug 27 18:55:36 2020 +* Created: Wed Sep 2 08:20:06 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a31oi/sky130_fd_sc_hdll__a31oi_1.lvs.report b/cells/a31oi/sky130_fd_sc_hdll__a31oi_1.lvs.report new file mode 100644 index 0000000..7c05d16 --- /dev/null +++ b/cells/a31oi/sky130_fd_sc_hdll__a31oi_1.lvs.report
@@ -0,0 +1,482 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_1.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a31oi_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a31oi_1.sp ('sky130_fd_sc_hdll__a31oi_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_1.spice ('sky130_fd_sc_hdll__a31oi_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:20:10 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a31oi_1 sky130_fd_sc_hdll__a31oi_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a31oi_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__a31oi_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 13 12 * + + Instances: 4 4 MN (4 pins) + 4 4 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 10 8 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 9 9 + + Instances: 1 1 MN (4 pins) + 1 1 SMN3 (5 pins) + 1 1 SPMP_3_1 (6 pins) + ------ ------ + Total Inst: 3 3 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 9 9 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 SMN3 + 1 1 0 0 SPMP_3_1 + ------- ------- --------- --------- + Total Inst: 3 3 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A3 A2 A1 B1 VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a31oi/sky130_fd_sc_hdll__a31oi_1.pex.spice b/cells/a31oi/sky130_fd_sc_hdll__a31oi_1.pex.spice index 8dddf01..a6f22e8 100644 --- a/cells/a31oi/sky130_fd_sc_hdll__a31oi_1.pex.spice +++ b/cells/a31oi/sky130_fd_sc_hdll__a31oi_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a31oi_1.pex.spice -* Created: Thu Aug 27 18:55:43 2020 +* Created: Wed Sep 2 08:20:13 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a31oi/sky130_fd_sc_hdll__a31oi_1.pxi.spice b/cells/a31oi/sky130_fd_sc_hdll__a31oi_1.pxi.spice index 0a4905e..fb930e0 100644 --- a/cells/a31oi/sky130_fd_sc_hdll__a31oi_1.pxi.spice +++ b/cells/a31oi/sky130_fd_sc_hdll__a31oi_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a31oi_1.pxi.spice -* Created: Thu Aug 27 18:55:43 2020 +* Created: Wed Sep 2 08:20:13 2020 * x_PM_SKY130_FD_SC_HDLL__A31OI_1%A3 N_A3_c_42_n N_A3_M1004_g N_A3_c_43_n + N_A3_M1005_g A3 N_A3_c_44_n PM_SKY130_FD_SC_HDLL__A31OI_1%A3
diff --git a/cells/a31oi/sky130_fd_sc_hdll__a31oi_1.spice b/cells/a31oi/sky130_fd_sc_hdll__a31oi_1.spice index 83f6672..9da6e16 100644 --- a/cells/a31oi/sky130_fd_sc_hdll__a31oi_1.spice +++ b/cells/a31oi/sky130_fd_sc_hdll__a31oi_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a31oi_1.spice -* Created: Thu Aug 27 18:55:43 2020 +* Created: Wed Sep 2 08:20:13 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a31oi/sky130_fd_sc_hdll__a31oi_2.lvs.report b/cells/a31oi/sky130_fd_sc_hdll__a31oi_2.lvs.report new file mode 100644 index 0000000..b82bb12 --- /dev/null +++ b/cells/a31oi/sky130_fd_sc_hdll__a31oi_2.lvs.report
@@ -0,0 +1,492 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_2.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a31oi_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a31oi_2.sp ('sky130_fd_sc_hdll__a31oi_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_2.spice ('sky130_fd_sc_hdll__a31oi_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:20:17 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a31oi_2 sky130_fd_sc_hdll__a31oi_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a31oi_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__a31oi_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 12 12 + + Instances: 8 8 MN (4 pins) + 8 8 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 17 16 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 9 9 + + Instances: 1 1 MN (4 pins) + 1 1 SMN3 (5 pins) + 1 1 SPMP_3_1 (6 pins) + ------ ------ + Total Inst: 3 3 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 9 9 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 SMN3 + 1 1 0 0 SPMP_3_1 + ------- ------- --------- --------- + Total Inst: 3 3 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 16 layout mos transistors were reduced to 8. + 8 mos transistors were deleted by parallel reduction. + 16 source mos transistors were reduced to 8. + 8 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A3 A2 A1 B1 VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a31oi/sky130_fd_sc_hdll__a31oi_2.pex.spice b/cells/a31oi/sky130_fd_sc_hdll__a31oi_2.pex.spice index 13932fa..0c2c31a 100644 --- a/cells/a31oi/sky130_fd_sc_hdll__a31oi_2.pex.spice +++ b/cells/a31oi/sky130_fd_sc_hdll__a31oi_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a31oi_2.pex.spice -* Created: Thu Aug 27 18:55:49 2020 +* Created: Wed Sep 2 08:20:20 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a31oi/sky130_fd_sc_hdll__a31oi_2.pxi.spice b/cells/a31oi/sky130_fd_sc_hdll__a31oi_2.pxi.spice index 0296b46..cc8d162 100644 --- a/cells/a31oi/sky130_fd_sc_hdll__a31oi_2.pxi.spice +++ b/cells/a31oi/sky130_fd_sc_hdll__a31oi_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a31oi_2.pxi.spice -* Created: Thu Aug 27 18:55:49 2020 +* Created: Wed Sep 2 08:20:20 2020 * x_PM_SKY130_FD_SC_HDLL__A31OI_2%A3 N_A3_c_67_n N_A3_M1001_g N_A3_c_64_n + N_A3_M1002_g N_A3_c_68_n N_A3_M1006_g N_A3_c_65_n N_A3_M1012_g A3 A3
diff --git a/cells/a31oi/sky130_fd_sc_hdll__a31oi_2.spice b/cells/a31oi/sky130_fd_sc_hdll__a31oi_2.spice index fcd8a44..3c60f54 100644 --- a/cells/a31oi/sky130_fd_sc_hdll__a31oi_2.spice +++ b/cells/a31oi/sky130_fd_sc_hdll__a31oi_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a31oi_2.spice -* Created: Thu Aug 27 18:55:49 2020 +* Created: Wed Sep 2 08:20:20 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.lvs.report b/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.lvs.report new file mode 100644 index 0000000..a0d24ee --- /dev/null +++ b/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.lvs.report
@@ -0,0 +1,511 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a31oi_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a31oi_4.sp ('sky130_fd_sc_hdll__a31oi_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.spice ('sky130_fd_sc_hdll__a31oi_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:20:24 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a31oi_4 sky130_fd_sc_hdll__a31oi_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a31oi_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__a31oi_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 13 12 * + + Instances: 16 16 MN (4 pins) + 16 16 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 34 32 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 9 9 + + Instances: 1 1 MN (4 pins) + 1 1 SMN3 (5 pins) + 1 1 SPMP_3_1 (6 pins) + ------ ------ + Total Inst: 3 3 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 9 9 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 SMN3 + 1 1 0 0 SPMP_3_1 + ------- ------- --------- --------- + Total Inst: 3 3 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 32 layout mos transistors were reduced to 8. + 24 mos transistors were deleted by parallel reduction. + 32 source mos transistors were reduced to 8. + 24 mos transistors were deleted by parallel reduction. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A3 A2 A1 B1 VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.pex.spice b/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.pex.spice index e7ff210..cc2c9a2 100644 --- a/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.pex.spice +++ b/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a31oi_4.pex.spice -* Created: Thu Aug 27 18:55:56 2020 +* Created: Wed Sep 2 08:20:27 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.pxi.spice b/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.pxi.spice index 36717d7..1f70f1c 100644 --- a/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.pxi.spice +++ b/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a31oi_4.pxi.spice -* Created: Thu Aug 27 18:55:56 2020 +* Created: Wed Sep 2 08:20:27 2020 * x_PM_SKY130_FD_SC_HDLL__A31OI_4%A3 N_A3_c_88_n N_A3_M1001_g N_A3_c_83_n + N_A3_M1002_g N_A3_c_89_n N_A3_M1012_g N_A3_c_84_n N_A3_M1022_g N_A3_c_90_n
diff --git a/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.spice b/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.spice index d52cc43..3715217 100644 --- a/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.spice +++ b/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a31oi_4.spice -* Created: Thu Aug 27 18:55:56 2020 +* Created: Wed Sep 2 08:20:27 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a32o/sky130_fd_sc_hdll__a32o_1.lvs.report b/cells/a32o/sky130_fd_sc_hdll__a32o_1.lvs.report new file mode 100644 index 0000000..bbbc30c --- /dev/null +++ b/cells/a32o/sky130_fd_sc_hdll__a32o_1.lvs.report
@@ -0,0 +1,487 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_1.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_1.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a32o_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a32o_1.sp ('sky130_fd_sc_hdll__a32o_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_1.spice ('sky130_fd_sc_hdll__a32o_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:20:31 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a32o_1 sky130_fd_sc_hdll__a32o_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a32o_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__a32o_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 15 15 + + Instances: 6 6 MN (4 pins) + 6 6 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 13 12 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 11 11 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SMN3 (5 pins) + 1 1 SPMP_3_2 (7 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 10 10 0 0 + + Nets: 11 11 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SMN3 + 1 1 0 0 SPMP_3_2 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB A3 A2 A1 B1 B2 X VPWR VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a32o/sky130_fd_sc_hdll__a32o_1.pex.spice b/cells/a32o/sky130_fd_sc_hdll__a32o_1.pex.spice index bfb5322..4a681f2 100644 --- a/cells/a32o/sky130_fd_sc_hdll__a32o_1.pex.spice +++ b/cells/a32o/sky130_fd_sc_hdll__a32o_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a32o_1.pex.spice -* Created: Thu Aug 27 18:56:03 2020 +* Created: Wed Sep 2 08:20:34 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a32o/sky130_fd_sc_hdll__a32o_1.pxi.spice b/cells/a32o/sky130_fd_sc_hdll__a32o_1.pxi.spice index 0fc1f1a..fd72544 100644 --- a/cells/a32o/sky130_fd_sc_hdll__a32o_1.pxi.spice +++ b/cells/a32o/sky130_fd_sc_hdll__a32o_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a32o_1.pxi.spice -* Created: Thu Aug 27 18:56:03 2020 +* Created: Wed Sep 2 08:20:34 2020 * x_PM_SKY130_FD_SC_HDLL__A32O_1%A_93_21# N_A_93_21#_M1003_d N_A_93_21#_M1002_d + N_A_93_21#_c_60_n N_A_93_21#_M1005_g N_A_93_21#_c_61_n N_A_93_21#_M1001_g
diff --git a/cells/a32o/sky130_fd_sc_hdll__a32o_1.spice b/cells/a32o/sky130_fd_sc_hdll__a32o_1.spice index a65a618..b08a944 100644 --- a/cells/a32o/sky130_fd_sc_hdll__a32o_1.spice +++ b/cells/a32o/sky130_fd_sc_hdll__a32o_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a32o_1.spice -* Created: Thu Aug 27 18:56:03 2020 +* Created: Wed Sep 2 08:20:34 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a32o/sky130_fd_sc_hdll__a32o_2.lvs.report b/cells/a32o/sky130_fd_sc_hdll__a32o_2.lvs.report new file mode 100644 index 0000000..abd1fd6 --- /dev/null +++ b/cells/a32o/sky130_fd_sc_hdll__a32o_2.lvs.report
@@ -0,0 +1,497 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_2.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a32o_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a32o_2.sp ('sky130_fd_sc_hdll__a32o_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_2.spice ('sky130_fd_sc_hdll__a32o_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:20:38 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a32o_2 sky130_fd_sc_hdll__a32o_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a32o_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__a32o_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 19 15 * + + Instances: 7 7 MN (4 pins) + 7 7 MP (4 pins) + 1 0 * Dpar (2 pins) + 4 0 * Probe (2 pins) + ------ ------ + Total Inst: 19 14 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 11 11 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SMN3 (5 pins) + 1 1 SPMP_3_2 (7 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 10 10 0 0 + + Nets: 11 11 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SMN3 + 1 1 0 0 SPMP_3_2 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 5 layout instances were filtered and their pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + 4 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB B2 B1 A1 A2 A3 X VPWR VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a32o/sky130_fd_sc_hdll__a32o_2.pex.spice b/cells/a32o/sky130_fd_sc_hdll__a32o_2.pex.spice index cf96542..958238f 100644 --- a/cells/a32o/sky130_fd_sc_hdll__a32o_2.pex.spice +++ b/cells/a32o/sky130_fd_sc_hdll__a32o_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a32o_2.pex.spice -* Created: Thu Aug 27 18:56:09 2020 +* Created: Wed Sep 2 08:20:41 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a32o/sky130_fd_sc_hdll__a32o_2.pxi.spice b/cells/a32o/sky130_fd_sc_hdll__a32o_2.pxi.spice index 946c529..a7a4bf4 100644 --- a/cells/a32o/sky130_fd_sc_hdll__a32o_2.pxi.spice +++ b/cells/a32o/sky130_fd_sc_hdll__a32o_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a32o_2.pxi.spice -* Created: Thu Aug 27 18:56:09 2020 +* Created: Wed Sep 2 08:20:41 2020 * x_PM_SKY130_FD_SC_HDLL__A32O_2%A_21_199# N_A_21_199#_M1004_d N_A_21_199#_M1008_d + N_A_21_199#_c_69_n N_A_21_199#_M1000_g N_A_21_199#_c_64_n N_A_21_199#_M1001_g
diff --git a/cells/a32o/sky130_fd_sc_hdll__a32o_2.spice b/cells/a32o/sky130_fd_sc_hdll__a32o_2.spice index 7898ea3..c9145cc 100644 --- a/cells/a32o/sky130_fd_sc_hdll__a32o_2.spice +++ b/cells/a32o/sky130_fd_sc_hdll__a32o_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a32o_2.spice -* Created: Thu Aug 27 18:56:09 2020 +* Created: Wed Sep 2 08:20:41 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a32o/sky130_fd_sc_hdll__a32o_4.lvs.report b/cells/a32o/sky130_fd_sc_hdll__a32o_4.lvs.report new file mode 100644 index 0000000..a1d514c --- /dev/null +++ b/cells/a32o/sky130_fd_sc_hdll__a32o_4.lvs.report
@@ -0,0 +1,511 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_4.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_4.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a32o_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a32o_4.sp ('sky130_fd_sc_hdll__a32o_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32o/sky130_fd_sc_hdll__a32o_4.spice ('sky130_fd_sc_hdll__a32o_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:20:45 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a32o_4 sky130_fd_sc_hdll__a32o_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a32o_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__a32o_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 18 15 * + + Instances: 14 14 MN (4 pins) + 14 14 MP (4 pins) + 1 0 * Dpar (2 pins) + 3 0 * Probe (2 pins) + ------ ------ + Total Inst: 32 28 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 11 11 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SMN3 (5 pins) + 1 1 SPMP_3_2 (7 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 10 10 0 0 + + Nets: 11 11 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SMN3 + 1 1 0 0 SPMP_3_2 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 4 layout instances were filtered and their pins removed from adjoining nets. + + 28 layout mos transistors were reduced to 12. + 16 mos transistors were deleted by parallel reduction. + 28 source mos transistors were reduced to 12. + 16 mos transistors were deleted by parallel reduction. + + 3 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A3 A2 A1 B1 B2 VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a32o/sky130_fd_sc_hdll__a32o_4.pex.spice b/cells/a32o/sky130_fd_sc_hdll__a32o_4.pex.spice index e27675f..cb12a3e 100644 --- a/cells/a32o/sky130_fd_sc_hdll__a32o_4.pex.spice +++ b/cells/a32o/sky130_fd_sc_hdll__a32o_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a32o_4.pex.spice -* Created: Thu Aug 27 18:56:17 2020 +* Created: Wed Sep 2 08:20:48 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a32o/sky130_fd_sc_hdll__a32o_4.pxi.spice b/cells/a32o/sky130_fd_sc_hdll__a32o_4.pxi.spice index ff978d6..0af850f 100644 --- a/cells/a32o/sky130_fd_sc_hdll__a32o_4.pxi.spice +++ b/cells/a32o/sky130_fd_sc_hdll__a32o_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a32o_4.pxi.spice -* Created: Thu Aug 27 18:56:17 2020 +* Created: Wed Sep 2 08:20:48 2020 * x_PM_SKY130_FD_SC_HDLL__A32O_4%A_79_21# N_A_79_21#_M1016_s N_A_79_21#_M1007_s + N_A_79_21#_M1000_d N_A_79_21#_M1009_s N_A_79_21#_c_99_n N_A_79_21#_M1004_g
diff --git a/cells/a32o/sky130_fd_sc_hdll__a32o_4.spice b/cells/a32o/sky130_fd_sc_hdll__a32o_4.spice index a6a39fd..4e9cd2b 100644 --- a/cells/a32o/sky130_fd_sc_hdll__a32o_4.spice +++ b/cells/a32o/sky130_fd_sc_hdll__a32o_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a32o_4.spice -* Created: Thu Aug 27 18:56:17 2020 +* Created: Wed Sep 2 08:20:48 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a32oi/sky130_fd_sc_hdll__a32oi_1.lvs.report b/cells/a32oi/sky130_fd_sc_hdll__a32oi_1.lvs.report new file mode 100644 index 0000000..e3c7bc8 --- /dev/null +++ b/cells/a32oi/sky130_fd_sc_hdll__a32oi_1.lvs.report
@@ -0,0 +1,481 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_1.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a32oi_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a32oi_1.sp ('sky130_fd_sc_hdll__a32oi_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_1.spice ('sky130_fd_sc_hdll__a32oi_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:20:52 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a32oi_1 sky130_fd_sc_hdll__a32oi_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a32oi_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__a32oi_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 14 14 + + Instances: 5 5 MN (4 pins) + 5 5 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 11 10 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 10 10 + + Instances: 1 1 SMN2 (4 pins) + 1 1 SMN3 (5 pins) + 1 1 SPMP_3_2 (7 pins) + ------ ------ + Total Inst: 3 3 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 10 10 0 0 + + Nets: 10 10 0 0 + + Instances: 1 1 0 0 SMN2 + 1 1 0 0 SMN3 + 1 1 0 0 SPMP_3_2 + ------- ------- --------- --------- + Total Inst: 3 3 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB B2 B1 A1 A2 A3 Y VPWR VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a32oi/sky130_fd_sc_hdll__a32oi_1.pex.spice b/cells/a32oi/sky130_fd_sc_hdll__a32oi_1.pex.spice index 30ad9da..4425736 100644 --- a/cells/a32oi/sky130_fd_sc_hdll__a32oi_1.pex.spice +++ b/cells/a32oi/sky130_fd_sc_hdll__a32oi_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a32oi_1.pex.spice -* Created: Thu Aug 27 18:56:24 2020 +* Created: Wed Sep 2 08:20:55 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a32oi/sky130_fd_sc_hdll__a32oi_1.pxi.spice b/cells/a32oi/sky130_fd_sc_hdll__a32oi_1.pxi.spice index 3f1aed4..7fe2aa8 100644 --- a/cells/a32oi/sky130_fd_sc_hdll__a32oi_1.pxi.spice +++ b/cells/a32oi/sky130_fd_sc_hdll__a32oi_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a32oi_1.pxi.spice -* Created: Thu Aug 27 18:56:24 2020 +* Created: Wed Sep 2 08:20:55 2020 * x_PM_SKY130_FD_SC_HDLL__A32OI_1%B2 N_B2_c_52_n N_B2_M1002_g N_B2_c_49_n + N_B2_M1005_g B2 N_B2_c_51_n PM_SKY130_FD_SC_HDLL__A32OI_1%B2
diff --git a/cells/a32oi/sky130_fd_sc_hdll__a32oi_1.spice b/cells/a32oi/sky130_fd_sc_hdll__a32oi_1.spice index df979e8..a1a6664 100644 --- a/cells/a32oi/sky130_fd_sc_hdll__a32oi_1.spice +++ b/cells/a32oi/sky130_fd_sc_hdll__a32oi_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a32oi_1.spice -* Created: Thu Aug 27 18:56:24 2020 +* Created: Wed Sep 2 08:20:55 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.lvs.report b/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.lvs.report new file mode 100644 index 0000000..7ad8cec --- /dev/null +++ b/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.lvs.report
@@ -0,0 +1,496 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a32oi_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a32oi_2.sp ('sky130_fd_sc_hdll__a32oi_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.spice ('sky130_fd_sc_hdll__a32oi_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:20:59 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a32oi_2 sky130_fd_sc_hdll__a32oi_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a32oi_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__a32oi_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 14 14 + + Instances: 10 10 MN (4 pins) + 10 10 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 21 20 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 10 10 + + Instances: 1 1 SMN2 (4 pins) + 1 1 SMN3 (5 pins) + 1 1 SPMP_3_2 (7 pins) + ------ ------ + Total Inst: 3 3 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 10 10 0 0 + + Nets: 10 10 0 0 + + Instances: 1 1 0 0 SMN2 + 1 1 0 0 SMN3 + 1 1 0 0 SPMP_3_2 + ------- ------- --------- --------- + Total Inst: 3 3 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 20 layout mos transistors were reduced to 10. + 10 mos transistors were deleted by parallel reduction. + 20 source mos transistors were reduced to 10. + 10 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB B2 B1 A1 A2 A3 Y VPWR VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.pex.spice b/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.pex.spice index ae8d546..a4cec6a 100644 --- a/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.pex.spice +++ b/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a32oi_2.pex.spice -* Created: Thu Aug 27 18:56:31 2020 +* Created: Wed Sep 2 08:21:02 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.pxi.spice b/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.pxi.spice index df4272d..b5242ad 100644 --- a/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.pxi.spice +++ b/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a32oi_2.pxi.spice -* Created: Thu Aug 27 18:56:31 2020 +* Created: Wed Sep 2 08:21:02 2020 * x_PM_SKY130_FD_SC_HDLL__A32OI_2%B2 N_B2_c_78_n N_B2_M1001_g N_B2_c_73_n + N_B2_M1002_g N_B2_c_79_n N_B2_M1007_g N_B2_c_74_n N_B2_M1014_g B2 B2 B2
diff --git a/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.spice b/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.spice index 7386ea3..db34c95 100644 --- a/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.spice +++ b/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a32oi_2.spice -* Created: Thu Aug 27 18:56:31 2020 +* Created: Wed Sep 2 08:21:02 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.lvs.report b/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.lvs.report new file mode 100644 index 0000000..f9b90d3 --- /dev/null +++ b/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.lvs.report
@@ -0,0 +1,519 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 87 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 89 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 91 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 93 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 95 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" +Warning: Duplicate parameter definition "MULT" at line 97 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__a32oi_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__a32oi_4.sp ('sky130_fd_sc_hdll__a32oi_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice ('sky130_fd_sc_hdll__a32oi_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:21:06 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__a32oi_4 sky130_fd_sc_hdll__a32oi_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__a32oi_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__a32oi_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 17 14 * + + Instances: 20 20 MN (4 pins) + 20 20 MP (4 pins) + 1 0 * Dpar (2 pins) + 3 0 * Probe (2 pins) + ------ ------ + Total Inst: 44 40 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 10 10 + + Instances: 1 1 SMN2 (4 pins) + 1 1 SMN3 (5 pins) + 1 1 SPMP_3_2 (7 pins) + ------ ------ + Total Inst: 3 3 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 10 10 0 0 + + Nets: 10 10 0 0 + + Instances: 1 1 0 0 SMN2 + 1 1 0 0 SMN3 + 1 1 0 0 SPMP_3_2 + ------- ------- --------- --------- + Total Inst: 3 3 0 0 + + +o Statistics: + + 4 layout instances were filtered and their pins removed from adjoining nets. + + 40 layout mos transistors were reduced to 10. + 30 mos transistors were deleted by parallel reduction. + 40 source mos transistors were reduced to 10. + 30 mos transistors were deleted by parallel reduction. + + 3 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB B2 B1 A1 A2 A3 Y VPWR VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.pex.spice b/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.pex.spice index c5fd42e..78cc7a1 100644 --- a/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.pex.spice +++ b/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a32oi_4.pex.spice -* Created: Thu Aug 27 18:56:38 2020 +* Created: Wed Sep 2 08:21:09 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.pxi.spice b/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.pxi.spice index cebad50..9f8b9f4 100644 --- a/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.pxi.spice +++ b/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a32oi_4.pxi.spice -* Created: Thu Aug 27 18:56:38 2020 +* Created: Wed Sep 2 08:21:09 2020 * x_PM_SKY130_FD_SC_HDLL__A32OI_4%B2 N_B2_c_109_n N_B2_M1001_g N_B2_c_102_n + N_B2_M1002_g N_B2_c_110_n N_B2_M1012_g N_B2_c_103_n N_B2_M1024_g N_B2_c_111_n
diff --git a/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice b/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice index 8e21e7e..e44463d 100644 --- a/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice +++ b/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__a32oi_4.spice -* Created: Thu Aug 27 18:56:38 2020 +* Created: Wed Sep 2 08:21:09 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/and2/sky130_fd_sc_hdll__and2_1.lvs.report b/cells/and2/sky130_fd_sc_hdll__and2_1.lvs.report new file mode 100644 index 0000000..b7f4895 --- /dev/null +++ b/cells/and2/sky130_fd_sc_hdll__and2_1.lvs.report
@@ -0,0 +1,480 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_1.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__and2_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__and2_1.sp ('sky130_fd_sc_hdll__and2_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_1.spice ('sky130_fd_sc_hdll__and2_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:21:13 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__and2_1 sky130_fd_sc_hdll__and2_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__and2_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__and2_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 11 9 * + + Instances: 3 3 MN (4 pins) + 3 3 MP (4 pins) + 1 0 * Dpar (2 pins) + 2 0 * Probe (2 pins) + ------ ------ + Total Inst: 9 6 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 1 1 MN (4 pins) + 3 3 MP (4 pins) + 1 1 SMN2 (4 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 8 8 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 3 3 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 3 layout instances were filtered and their pins removed from adjoining nets. + + 2 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A B VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/and2/sky130_fd_sc_hdll__and2_1.pex.spice b/cells/and2/sky130_fd_sc_hdll__and2_1.pex.spice index 2454bc3..21ddf17 100644 --- a/cells/and2/sky130_fd_sc_hdll__and2_1.pex.spice +++ b/cells/and2/sky130_fd_sc_hdll__and2_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and2_1.pex.spice -* Created: Thu Aug 27 18:56:45 2020 +* Created: Wed Sep 2 08:21:16 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/and2/sky130_fd_sc_hdll__and2_1.pxi.spice b/cells/and2/sky130_fd_sc_hdll__and2_1.pxi.spice index e1947dc..fedface 100644 --- a/cells/and2/sky130_fd_sc_hdll__and2_1.pxi.spice +++ b/cells/and2/sky130_fd_sc_hdll__and2_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and2_1.pxi.spice -* Created: Thu Aug 27 18:56:45 2020 +* Created: Wed Sep 2 08:21:16 2020 * x_PM_SKY130_FD_SC_HDLL__AND2_1%A N_A_c_48_n N_A_c_49_n N_A_M1000_g N_A_M1005_g + N_A_c_50_n A N_A_c_47_n A A PM_SKY130_FD_SC_HDLL__AND2_1%A
diff --git a/cells/and2/sky130_fd_sc_hdll__and2_1.spice b/cells/and2/sky130_fd_sc_hdll__and2_1.spice index 6a1dcb3..fe19b43 100644 --- a/cells/and2/sky130_fd_sc_hdll__and2_1.spice +++ b/cells/and2/sky130_fd_sc_hdll__and2_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and2_1.spice -* Created: Thu Aug 27 18:56:45 2020 +* Created: Wed Sep 2 08:21:16 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/and2/sky130_fd_sc_hdll__and2_2.lvs.report b/cells/and2/sky130_fd_sc_hdll__and2_2.lvs.report new file mode 100644 index 0000000..f5521ed --- /dev/null +++ b/cells/and2/sky130_fd_sc_hdll__and2_2.lvs.report
@@ -0,0 +1,484 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_2.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__and2_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__and2_2.sp ('sky130_fd_sc_hdll__and2_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_2.spice ('sky130_fd_sc_hdll__and2_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:21:20 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__and2_2 sky130_fd_sc_hdll__and2_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__and2_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__and2_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 9 9 + + Instances: 4 4 MN (4 pins) + 4 4 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 9 8 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 1 1 MN (4 pins) + 3 3 MP (4 pins) + 1 1 SMN2 (4 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 8 8 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 3 3 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A B VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/and2/sky130_fd_sc_hdll__and2_2.pex.spice b/cells/and2/sky130_fd_sc_hdll__and2_2.pex.spice index 251277e..43de84e 100644 --- a/cells/and2/sky130_fd_sc_hdll__and2_2.pex.spice +++ b/cells/and2/sky130_fd_sc_hdll__and2_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and2_2.pex.spice -* Created: Thu Aug 27 18:56:52 2020 +* Created: Wed Sep 2 08:21:23 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/and2/sky130_fd_sc_hdll__and2_2.pxi.spice b/cells/and2/sky130_fd_sc_hdll__and2_2.pxi.spice index 7fbf7b1..ef96ca2 100644 --- a/cells/and2/sky130_fd_sc_hdll__and2_2.pxi.spice +++ b/cells/and2/sky130_fd_sc_hdll__and2_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and2_2.pxi.spice -* Created: Thu Aug 27 18:56:52 2020 +* Created: Wed Sep 2 08:21:23 2020 * x_PM_SKY130_FD_SC_HDLL__AND2_2%A N_A_c_60_n N_A_c_61_n N_A_M1002_g N_A_M1007_g + N_A_c_57_n N_A_c_58_n A A N_A_c_59_n A PM_SKY130_FD_SC_HDLL__AND2_2%A
diff --git a/cells/and2/sky130_fd_sc_hdll__and2_2.spice b/cells/and2/sky130_fd_sc_hdll__and2_2.spice index a5313a2..edd42a7 100644 --- a/cells/and2/sky130_fd_sc_hdll__and2_2.spice +++ b/cells/and2/sky130_fd_sc_hdll__and2_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and2_2.spice -* Created: Thu Aug 27 18:56:52 2020 +* Created: Wed Sep 2 08:21:23 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/and2/sky130_fd_sc_hdll__and2_4.lvs.report b/cells/and2/sky130_fd_sc_hdll__and2_4.lvs.report new file mode 100644 index 0000000..a992fee --- /dev/null +++ b/cells/and2/sky130_fd_sc_hdll__and2_4.lvs.report
@@ -0,0 +1,488 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_4.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__and2_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__and2_4.sp ('sky130_fd_sc_hdll__and2_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_4.spice ('sky130_fd_sc_hdll__and2_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:21:26 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__and2_4 sky130_fd_sc_hdll__and2_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__and2_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__and2_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 9 9 + + Instances: 6 6 MN (4 pins) + 6 6 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 13 12 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 1 1 MN (4 pins) + 3 3 MP (4 pins) + 1 1 SMN2 (4 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 8 8 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 3 3 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A B VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/and2/sky130_fd_sc_hdll__and2_4.pex.spice b/cells/and2/sky130_fd_sc_hdll__and2_4.pex.spice index 82aefc8..bcf59ed 100644 --- a/cells/and2/sky130_fd_sc_hdll__and2_4.pex.spice +++ b/cells/and2/sky130_fd_sc_hdll__and2_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and2_4.pex.spice -* Created: Thu Aug 27 18:56:59 2020 +* Created: Wed Sep 2 08:21:29 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/and2/sky130_fd_sc_hdll__and2_4.pxi.spice b/cells/and2/sky130_fd_sc_hdll__and2_4.pxi.spice index 7e8f7f1..8a19e42 100644 --- a/cells/and2/sky130_fd_sc_hdll__and2_4.pxi.spice +++ b/cells/and2/sky130_fd_sc_hdll__and2_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and2_4.pxi.spice -* Created: Thu Aug 27 18:56:59 2020 +* Created: Wed Sep 2 08:21:29 2020 * x_PM_SKY130_FD_SC_HDLL__AND2_4%A N_A_c_55_n N_A_M1004_g N_A_c_56_n N_A_M1002_g A + N_A_c_57_n PM_SKY130_FD_SC_HDLL__AND2_4%A
diff --git a/cells/and2/sky130_fd_sc_hdll__and2_4.spice b/cells/and2/sky130_fd_sc_hdll__and2_4.spice index b80e6e7..f1d60f2 100644 --- a/cells/and2/sky130_fd_sc_hdll__and2_4.spice +++ b/cells/and2/sky130_fd_sc_hdll__and2_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and2_4.spice -* Created: Thu Aug 27 18:56:59 2020 +* Created: Wed Sep 2 08:21:29 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/and2/sky130_fd_sc_hdll__and2_6.lvs.report b/cells/and2/sky130_fd_sc_hdll__and2_6.lvs.report new file mode 100644 index 0000000..c15281b --- /dev/null +++ b/cells/and2/sky130_fd_sc_hdll__and2_6.lvs.report
@@ -0,0 +1,498 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_6.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_6.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__and2_6.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__and2_6.sp ('sky130_fd_sc_hdll__and2_6') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_6.spice ('sky130_fd_sc_hdll__and2_6') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:21:33 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__and2_6 sky130_fd_sc_hdll__and2_6 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__and2_6 +SOURCE CELL NAME: sky130_fd_sc_hdll__and2_6 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 10 10 + + Instances: 10 10 MN (4 pins) + 10 10 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 21 20 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 1 1 MN (4 pins) + 3 3 MP (4 pins) + 1 1 SMN2 (4 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 8 8 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 3 3 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 20 layout mos transistors were reduced to 6. 1 connecting net was deleted. + 12 mos transistors were deleted by parallel reduction. + 2 mos transistors and 1 connecting net were deleted by split-gate reduction. + 20 source mos transistors were reduced to 6. 1 connecting net was deleted. + 12 mos transistors were deleted by parallel reduction. + 2 mos transistors and 1 connecting net were deleted by split-gate reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB B A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/and2/sky130_fd_sc_hdll__and2_6.pex.spice b/cells/and2/sky130_fd_sc_hdll__and2_6.pex.spice index 5d85f90..7c3d0d5 100644 --- a/cells/and2/sky130_fd_sc_hdll__and2_6.pex.spice +++ b/cells/and2/sky130_fd_sc_hdll__and2_6.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and2_6.pex.spice -* Created: Thu Aug 27 18:57:07 2020 +* Created: Wed Sep 2 08:21:36 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/and2/sky130_fd_sc_hdll__and2_6.pxi.spice b/cells/and2/sky130_fd_sc_hdll__and2_6.pxi.spice index 98160df..51c30a3 100644 --- a/cells/and2/sky130_fd_sc_hdll__and2_6.pxi.spice +++ b/cells/and2/sky130_fd_sc_hdll__and2_6.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and2_6.pxi.spice -* Created: Thu Aug 27 18:57:07 2020 +* Created: Wed Sep 2 08:21:36 2020 * x_PM_SKY130_FD_SC_HDLL__AND2_6%B N_B_c_86_n N_B_M1007_g N_B_c_87_n N_B_M1001_g + N_B_c_88_n N_B_M1012_g N_B_c_89_n N_B_M1015_g N_B_c_90_n N_B_c_95_n N_B_c_96_n
diff --git a/cells/and2/sky130_fd_sc_hdll__and2_6.spice b/cells/and2/sky130_fd_sc_hdll__and2_6.spice index 29c82b3..79169a7 100644 --- a/cells/and2/sky130_fd_sc_hdll__and2_6.spice +++ b/cells/and2/sky130_fd_sc_hdll__and2_6.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and2_6.spice -* Created: Thu Aug 27 18:57:07 2020 +* Created: Wed Sep 2 08:21:36 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/and2/sky130_fd_sc_hdll__and2_8.lvs.report b/cells/and2/sky130_fd_sc_hdll__and2_8.lvs.report new file mode 100644 index 0000000..117deec --- /dev/null +++ b/cells/and2/sky130_fd_sc_hdll__and2_8.lvs.report
@@ -0,0 +1,502 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_8.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_8.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__and2_8.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__and2_8.sp ('sky130_fd_sc_hdll__and2_8') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2/sky130_fd_sc_hdll__and2_8.spice ('sky130_fd_sc_hdll__and2_8') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:21:40 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__and2_8 sky130_fd_sc_hdll__and2_8 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__and2_8 +SOURCE CELL NAME: sky130_fd_sc_hdll__and2_8 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 10 10 + + Instances: 12 12 MN (4 pins) + 12 12 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 25 24 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 1 1 MN (4 pins) + 3 3 MP (4 pins) + 1 1 SMN2 (4 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 8 8 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 3 3 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 24 layout mos transistors were reduced to 6. 1 connecting net was deleted. + 16 mos transistors were deleted by parallel reduction. + 2 mos transistors and 1 connecting net were deleted by split-gate reduction. + 24 source mos transistors were reduced to 6. 1 connecting net was deleted. + 16 mos transistors were deleted by parallel reduction. + 2 mos transistors and 1 connecting net were deleted by split-gate reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB B A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/and2/sky130_fd_sc_hdll__and2_8.pex.spice b/cells/and2/sky130_fd_sc_hdll__and2_8.pex.spice index a584e5b..8005472 100644 --- a/cells/and2/sky130_fd_sc_hdll__and2_8.pex.spice +++ b/cells/and2/sky130_fd_sc_hdll__and2_8.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and2_8.pex.spice -* Created: Thu Aug 27 18:57:24 2020 +* Created: Wed Sep 2 08:21:43 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/and2/sky130_fd_sc_hdll__and2_8.pxi.spice b/cells/and2/sky130_fd_sc_hdll__and2_8.pxi.spice index 2076f6d..6de9b3a 100644 --- a/cells/and2/sky130_fd_sc_hdll__and2_8.pxi.spice +++ b/cells/and2/sky130_fd_sc_hdll__and2_8.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and2_8.pxi.spice -* Created: Thu Aug 27 18:57:24 2020 +* Created: Wed Sep 2 08:21:43 2020 * x_PM_SKY130_FD_SC_HDLL__AND2_8%B N_B_c_99_n N_B_M1009_g N_B_c_100_n N_B_M1001_g + N_B_c_101_n N_B_M1014_g N_B_c_102_n N_B_M1018_g N_B_c_103_n N_B_c_108_n
diff --git a/cells/and2/sky130_fd_sc_hdll__and2_8.spice b/cells/and2/sky130_fd_sc_hdll__and2_8.spice index 73734b8..38859b0 100644 --- a/cells/and2/sky130_fd_sc_hdll__and2_8.spice +++ b/cells/and2/sky130_fd_sc_hdll__and2_8.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and2_8.spice -* Created: Thu Aug 27 18:57:24 2020 +* Created: Wed Sep 2 08:21:43 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/and2b/sky130_fd_sc_hdll__and2b_1.lvs.report b/cells/and2b/sky130_fd_sc_hdll__and2b_1.lvs.report new file mode 100644 index 0000000..e45c8c2 --- /dev/null +++ b/cells/and2b/sky130_fd_sc_hdll__and2b_1.lvs.report
@@ -0,0 +1,482 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2b/sky130_fd_sc_hdll__and2b_1.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2b/sky130_fd_sc_hdll__and2b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2b/sky130_fd_sc_hdll__and2b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2b/sky130_fd_sc_hdll__and2b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2b/sky130_fd_sc_hdll__and2b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2b/sky130_fd_sc_hdll__and2b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2b/sky130_fd_sc_hdll__and2b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2b/sky130_fd_sc_hdll__and2b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2b/sky130_fd_sc_hdll__and2b_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__and2b_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__and2b_1.sp ('sky130_fd_sc_hdll__and2b_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2b/sky130_fd_sc_hdll__and2b_1.spice ('sky130_fd_sc_hdll__and2b_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:21:47 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__and2b_1 sky130_fd_sc_hdll__and2b_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__and2b_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__and2b_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 11 10 * + + Instances: 4 4 MN (4 pins) + 4 4 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 10 8 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 9 9 + + Instances: 2 2 MN (4 pins) + 4 4 MP (4 pins) + 1 1 SMN2 (4 pins) + ------ ------ + Total Inst: 7 7 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 9 9 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 4 4 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + ------- ------- --------- --------- + Total Inst: 7 7 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A_N B VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/and2b/sky130_fd_sc_hdll__and2b_1.pex.spice b/cells/and2b/sky130_fd_sc_hdll__and2b_1.pex.spice index feffce2..6d4b856 100644 --- a/cells/and2b/sky130_fd_sc_hdll__and2b_1.pex.spice +++ b/cells/and2b/sky130_fd_sc_hdll__and2b_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and2b_1.pex.spice -* Created: Thu Aug 27 18:57:32 2020 +* Created: Wed Sep 2 08:21:50 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/and2b/sky130_fd_sc_hdll__and2b_1.pxi.spice b/cells/and2b/sky130_fd_sc_hdll__and2b_1.pxi.spice index 204f584..0fcca20 100644 --- a/cells/and2b/sky130_fd_sc_hdll__and2b_1.pxi.spice +++ b/cells/and2b/sky130_fd_sc_hdll__and2b_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and2b_1.pxi.spice -* Created: Thu Aug 27 18:57:32 2020 +* Created: Wed Sep 2 08:21:50 2020 * x_PM_SKY130_FD_SC_HDLL__AND2B_1%A_N N_A_N_c_57_n N_A_N_c_58_n N_A_N_M1000_g + N_A_N_M1006_g A_N A_N A_N N_A_N_c_56_n PM_SKY130_FD_SC_HDLL__AND2B_1%A_N
diff --git a/cells/and2b/sky130_fd_sc_hdll__and2b_1.spice b/cells/and2b/sky130_fd_sc_hdll__and2b_1.spice index 63c4e8f..5038f8a 100644 --- a/cells/and2b/sky130_fd_sc_hdll__and2b_1.spice +++ b/cells/and2b/sky130_fd_sc_hdll__and2b_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and2b_1.spice -* Created: Thu Aug 27 18:57:32 2020 +* Created: Wed Sep 2 08:21:50 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/and2b/sky130_fd_sc_hdll__and2b_2.lvs.report b/cells/and2b/sky130_fd_sc_hdll__and2b_2.lvs.report new file mode 100644 index 0000000..b1d6b98 --- /dev/null +++ b/cells/and2b/sky130_fd_sc_hdll__and2b_2.lvs.report
@@ -0,0 +1,489 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2b/sky130_fd_sc_hdll__and2b_2.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2b/sky130_fd_sc_hdll__and2b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2b/sky130_fd_sc_hdll__and2b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2b/sky130_fd_sc_hdll__and2b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2b/sky130_fd_sc_hdll__and2b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2b/sky130_fd_sc_hdll__and2b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2b/sky130_fd_sc_hdll__and2b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2b/sky130_fd_sc_hdll__and2b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2b/sky130_fd_sc_hdll__and2b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2b/sky130_fd_sc_hdll__and2b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2b/sky130_fd_sc_hdll__and2b_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__and2b_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__and2b_2.sp ('sky130_fd_sc_hdll__and2b_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2b/sky130_fd_sc_hdll__and2b_2.spice ('sky130_fd_sc_hdll__and2b_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:21:54 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__and2b_2 sky130_fd_sc_hdll__and2b_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__and2b_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__and2b_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 12 10 * + + Instances: 5 5 MN (4 pins) + 5 5 MP (4 pins) + 1 0 * Dpar (2 pins) + 2 0 * Probe (2 pins) + ------ ------ + Total Inst: 13 10 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 9 9 + + Instances: 2 2 MN (4 pins) + 4 4 MP (4 pins) + 1 1 SMN2 (4 pins) + ------ ------ + Total Inst: 7 7 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 9 9 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 4 4 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + ------- ------- --------- --------- + Total Inst: 7 7 0 0 + + +o Statistics: + + 3 layout instances were filtered and their pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + 2 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A_N B VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/and2b/sky130_fd_sc_hdll__and2b_2.pex.spice b/cells/and2b/sky130_fd_sc_hdll__and2b_2.pex.spice index 1c349f4..f5bd3e2 100644 --- a/cells/and2b/sky130_fd_sc_hdll__and2b_2.pex.spice +++ b/cells/and2b/sky130_fd_sc_hdll__and2b_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and2b_2.pex.spice -* Created: Thu Aug 27 18:57:40 2020 +* Created: Wed Sep 2 08:21:57 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/and2b/sky130_fd_sc_hdll__and2b_2.pxi.spice b/cells/and2b/sky130_fd_sc_hdll__and2b_2.pxi.spice index c9533fb..9b087d5 100644 --- a/cells/and2b/sky130_fd_sc_hdll__and2b_2.pxi.spice +++ b/cells/and2b/sky130_fd_sc_hdll__and2b_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and2b_2.pxi.spice -* Created: Thu Aug 27 18:57:40 2020 +* Created: Wed Sep 2 08:21:57 2020 * x_PM_SKY130_FD_SC_HDLL__AND2B_2%A_N N_A_N_c_65_n N_A_N_c_66_n N_A_N_M1001_g + N_A_N_M1006_g A_N N_A_N_c_63_n A_N A_N PM_SKY130_FD_SC_HDLL__AND2B_2%A_N
diff --git a/cells/and2b/sky130_fd_sc_hdll__and2b_2.spice b/cells/and2b/sky130_fd_sc_hdll__and2b_2.spice index 29a6d40..ec9b0bf 100644 --- a/cells/and2b/sky130_fd_sc_hdll__and2b_2.spice +++ b/cells/and2b/sky130_fd_sc_hdll__and2b_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and2b_2.spice -* Created: Thu Aug 27 18:57:40 2020 +* Created: Wed Sep 2 08:21:57 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/and2b/sky130_fd_sc_hdll__and2b_4.lvs.report b/cells/and2b/sky130_fd_sc_hdll__and2b_4.lvs.report new file mode 100644 index 0000000..1e7e1d6 --- /dev/null +++ b/cells/and2b/sky130_fd_sc_hdll__and2b_4.lvs.report
@@ -0,0 +1,490 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2b/sky130_fd_sc_hdll__and2b_4.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2b/sky130_fd_sc_hdll__and2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2b/sky130_fd_sc_hdll__and2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2b/sky130_fd_sc_hdll__and2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2b/sky130_fd_sc_hdll__and2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2b/sky130_fd_sc_hdll__and2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2b/sky130_fd_sc_hdll__and2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2b/sky130_fd_sc_hdll__and2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2b/sky130_fd_sc_hdll__and2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2b/sky130_fd_sc_hdll__and2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2b/sky130_fd_sc_hdll__and2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2b/sky130_fd_sc_hdll__and2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2b/sky130_fd_sc_hdll__and2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2b/sky130_fd_sc_hdll__and2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2b/sky130_fd_sc_hdll__and2b_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__and2b_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__and2b_4.sp ('sky130_fd_sc_hdll__and2b_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and2b/sky130_fd_sc_hdll__and2b_4.spice ('sky130_fd_sc_hdll__and2b_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:22:01 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__and2b_4 sky130_fd_sc_hdll__and2b_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__and2b_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__and2b_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 10 10 + + Instances: 7 7 MN (4 pins) + 7 7 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 15 14 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 9 9 + + Instances: 2 2 MN (4 pins) + 4 4 MP (4 pins) + 1 1 SMN2 (4 pins) + ------ ------ + Total Inst: 7 7 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 9 9 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 4 4 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + ------- ------- --------- --------- + Total Inst: 7 7 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB B A_N VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/and2b/sky130_fd_sc_hdll__and2b_4.pex.spice b/cells/and2b/sky130_fd_sc_hdll__and2b_4.pex.spice index c4159a0..42cb4ec 100644 --- a/cells/and2b/sky130_fd_sc_hdll__and2b_4.pex.spice +++ b/cells/and2b/sky130_fd_sc_hdll__and2b_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and2b_4.pex.spice -* Created: Thu Aug 27 18:57:47 2020 +* Created: Wed Sep 2 08:22:04 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/and2b/sky130_fd_sc_hdll__and2b_4.pxi.spice b/cells/and2b/sky130_fd_sc_hdll__and2b_4.pxi.spice index 6d4a7e3..a15959a 100644 --- a/cells/and2b/sky130_fd_sc_hdll__and2b_4.pxi.spice +++ b/cells/and2b/sky130_fd_sc_hdll__and2b_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and2b_4.pxi.spice -* Created: Thu Aug 27 18:57:47 2020 +* Created: Wed Sep 2 08:22:04 2020 * x_PM_SKY130_FD_SC_HDLL__AND2B_4%A_33_199# N_A_33_199#_M1006_d + N_A_33_199#_M1010_d N_A_33_199#_c_57_n N_A_33_199#_M1005_g N_A_33_199#_c_58_n
diff --git a/cells/and2b/sky130_fd_sc_hdll__and2b_4.spice b/cells/and2b/sky130_fd_sc_hdll__and2b_4.spice index 8563bcc..d97ec4c 100644 --- a/cells/and2b/sky130_fd_sc_hdll__and2b_4.spice +++ b/cells/and2b/sky130_fd_sc_hdll__and2b_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and2b_4.spice -* Created: Thu Aug 27 18:57:47 2020 +* Created: Wed Sep 2 08:22:04 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/and3/sky130_fd_sc_hdll__and3_1.lvs.report b/cells/and3/sky130_fd_sc_hdll__and3_1.lvs.report new file mode 100644 index 0000000..ae70d44 --- /dev/null +++ b/cells/and3/sky130_fd_sc_hdll__and3_1.lvs.report
@@ -0,0 +1,479 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3/sky130_fd_sc_hdll__and3_1.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3/sky130_fd_sc_hdll__and3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3/sky130_fd_sc_hdll__and3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3/sky130_fd_sc_hdll__and3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3/sky130_fd_sc_hdll__and3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3/sky130_fd_sc_hdll__and3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3/sky130_fd_sc_hdll__and3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3/sky130_fd_sc_hdll__and3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3/sky130_fd_sc_hdll__and3_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__and3_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__and3_1.sp ('sky130_fd_sc_hdll__and3_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3/sky130_fd_sc_hdll__and3_1.spice ('sky130_fd_sc_hdll__and3_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:22:08 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__and3_1 sky130_fd_sc_hdll__and3_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__and3_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__and3_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 11 11 + + Instances: 4 4 MN (4 pins) + 4 4 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 9 8 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 9 9 + + Instances: 1 1 MN (4 pins) + 4 4 MP (4 pins) + 1 1 SMN3 (5 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 9 9 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 4 4 0 0 MP(PHIGHVT) + 1 1 0 0 SMN3 + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB A B C VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/and3/sky130_fd_sc_hdll__and3_1.pex.spice b/cells/and3/sky130_fd_sc_hdll__and3_1.pex.spice index b171120..0cfafd4 100644 --- a/cells/and3/sky130_fd_sc_hdll__and3_1.pex.spice +++ b/cells/and3/sky130_fd_sc_hdll__and3_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and3_1.pex.spice -* Created: Thu Aug 27 18:57:54 2020 +* Created: Wed Sep 2 08:22:11 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/and3/sky130_fd_sc_hdll__and3_1.pxi.spice b/cells/and3/sky130_fd_sc_hdll__and3_1.pxi.spice index aaf2ac3..edc7e9a 100644 --- a/cells/and3/sky130_fd_sc_hdll__and3_1.pxi.spice +++ b/cells/and3/sky130_fd_sc_hdll__and3_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and3_1.pxi.spice -* Created: Thu Aug 27 18:57:54 2020 +* Created: Wed Sep 2 08:22:11 2020 * x_PM_SKY130_FD_SC_HDLL__AND3_1%A N_A_c_48_n N_A_M1002_g N_A_c_49_n N_A_M1006_g A + PM_SKY130_FD_SC_HDLL__AND3_1%A
diff --git a/cells/and3/sky130_fd_sc_hdll__and3_1.spice b/cells/and3/sky130_fd_sc_hdll__and3_1.spice index 5a5df7e..f8dc7b9 100644 --- a/cells/and3/sky130_fd_sc_hdll__and3_1.spice +++ b/cells/and3/sky130_fd_sc_hdll__and3_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and3_1.spice -* Created: Thu Aug 27 18:57:54 2020 +* Created: Wed Sep 2 08:22:11 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/and3/sky130_fd_sc_hdll__and3_2.lvs.report b/cells/and3/sky130_fd_sc_hdll__and3_2.lvs.report new file mode 100644 index 0000000..7d241d4 --- /dev/null +++ b/cells/and3/sky130_fd_sc_hdll__and3_2.lvs.report
@@ -0,0 +1,489 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3/sky130_fd_sc_hdll__and3_2.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3/sky130_fd_sc_hdll__and3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3/sky130_fd_sc_hdll__and3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3/sky130_fd_sc_hdll__and3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3/sky130_fd_sc_hdll__and3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3/sky130_fd_sc_hdll__and3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3/sky130_fd_sc_hdll__and3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3/sky130_fd_sc_hdll__and3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3/sky130_fd_sc_hdll__and3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3/sky130_fd_sc_hdll__and3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3/sky130_fd_sc_hdll__and3_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__and3_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__and3_2.sp ('sky130_fd_sc_hdll__and3_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3/sky130_fd_sc_hdll__and3_2.spice ('sky130_fd_sc_hdll__and3_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:22:15 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__and3_2 sky130_fd_sc_hdll__and3_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__and3_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__and3_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 12 11 * + + Instances: 5 5 MN (4 pins) + 5 5 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 12 10 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 9 9 + + Instances: 1 1 MN (4 pins) + 4 4 MP (4 pins) + 1 1 SMN3 (5 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 9 9 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 4 4 0 0 MP(PHIGHVT) + 1 1 0 0 SMN3 + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A B C VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/and3/sky130_fd_sc_hdll__and3_2.pex.spice b/cells/and3/sky130_fd_sc_hdll__and3_2.pex.spice index 7e23704..6ef5251 100644 --- a/cells/and3/sky130_fd_sc_hdll__and3_2.pex.spice +++ b/cells/and3/sky130_fd_sc_hdll__and3_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and3_2.pex.spice -* Created: Thu Aug 27 18:58:02 2020 +* Created: Wed Sep 2 08:22:18 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/and3/sky130_fd_sc_hdll__and3_2.pxi.spice b/cells/and3/sky130_fd_sc_hdll__and3_2.pxi.spice index 3f95fc5..8056ce7 100644 --- a/cells/and3/sky130_fd_sc_hdll__and3_2.pxi.spice +++ b/cells/and3/sky130_fd_sc_hdll__and3_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and3_2.pxi.spice -* Created: Thu Aug 27 18:58:02 2020 +* Created: Wed Sep 2 08:22:18 2020 * x_PM_SKY130_FD_SC_HDLL__AND3_2%A N_A_c_54_n N_A_M1009_g N_A_M1008_g A + PM_SKY130_FD_SC_HDLL__AND3_2%A
diff --git a/cells/and3/sky130_fd_sc_hdll__and3_2.spice b/cells/and3/sky130_fd_sc_hdll__and3_2.spice index 063d3d5..654df64 100644 --- a/cells/and3/sky130_fd_sc_hdll__and3_2.spice +++ b/cells/and3/sky130_fd_sc_hdll__and3_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and3_2.spice -* Created: Thu Aug 27 18:58:02 2020 +* Created: Wed Sep 2 08:22:18 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/and3/sky130_fd_sc_hdll__and3_4.lvs.report b/cells/and3/sky130_fd_sc_hdll__and3_4.lvs.report new file mode 100644 index 0000000..ba37bf5 --- /dev/null +++ b/cells/and3/sky130_fd_sc_hdll__and3_4.lvs.report
@@ -0,0 +1,493 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3/sky130_fd_sc_hdll__and3_4.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3/sky130_fd_sc_hdll__and3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3/sky130_fd_sc_hdll__and3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3/sky130_fd_sc_hdll__and3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3/sky130_fd_sc_hdll__and3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3/sky130_fd_sc_hdll__and3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3/sky130_fd_sc_hdll__and3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3/sky130_fd_sc_hdll__and3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3/sky130_fd_sc_hdll__and3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3/sky130_fd_sc_hdll__and3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3/sky130_fd_sc_hdll__and3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3/sky130_fd_sc_hdll__and3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3/sky130_fd_sc_hdll__and3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3/sky130_fd_sc_hdll__and3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3/sky130_fd_sc_hdll__and3_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__and3_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__and3_4.sp ('sky130_fd_sc_hdll__and3_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3/sky130_fd_sc_hdll__and3_4.spice ('sky130_fd_sc_hdll__and3_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:22:22 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__and3_4 sky130_fd_sc_hdll__and3_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__and3_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__and3_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 12 11 * + + Instances: 7 7 MN (4 pins) + 7 7 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 16 14 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 9 9 + + Instances: 1 1 MN (4 pins) + 4 4 MP (4 pins) + 1 1 SMN3 (5 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 9 9 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 4 4 0 0 MP(PHIGHVT) + 1 1 0 0 SMN3 + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A B C VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/and3/sky130_fd_sc_hdll__and3_4.pex.spice b/cells/and3/sky130_fd_sc_hdll__and3_4.pex.spice index 9e973d8..55083bc 100644 --- a/cells/and3/sky130_fd_sc_hdll__and3_4.pex.spice +++ b/cells/and3/sky130_fd_sc_hdll__and3_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and3_4.pex.spice -* Created: Thu Aug 27 18:58:10 2020 +* Created: Wed Sep 2 08:22:25 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/and3/sky130_fd_sc_hdll__and3_4.pxi.spice b/cells/and3/sky130_fd_sc_hdll__and3_4.pxi.spice index f6e03c3..165eb7c 100644 --- a/cells/and3/sky130_fd_sc_hdll__and3_4.pxi.spice +++ b/cells/and3/sky130_fd_sc_hdll__and3_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and3_4.pxi.spice -* Created: Thu Aug 27 18:58:10 2020 +* Created: Wed Sep 2 08:22:25 2020 * x_PM_SKY130_FD_SC_HDLL__AND3_4%A N_A_c_61_n N_A_M1013_g N_A_c_62_n N_A_M1002_g A + A A A A N_A_c_63_n N_A_c_64_n PM_SKY130_FD_SC_HDLL__AND3_4%A
diff --git a/cells/and3/sky130_fd_sc_hdll__and3_4.spice b/cells/and3/sky130_fd_sc_hdll__and3_4.spice index 59f8cc9..880587b 100644 --- a/cells/and3/sky130_fd_sc_hdll__and3_4.spice +++ b/cells/and3/sky130_fd_sc_hdll__and3_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and3_4.spice -* Created: Thu Aug 27 18:58:10 2020 +* Created: Wed Sep 2 08:22:25 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/and3b/sky130_fd_sc_hdll__and3b_1.lvs.report b/cells/and3b/sky130_fd_sc_hdll__and3b_1.lvs.report new file mode 100644 index 0000000..77e8035 --- /dev/null +++ b/cells/and3b/sky130_fd_sc_hdll__and3b_1.lvs.report
@@ -0,0 +1,484 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_1.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__and3b_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__and3b_1.sp ('sky130_fd_sc_hdll__and3b_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_1.spice ('sky130_fd_sc_hdll__and3b_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:22:29 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__and3b_1 sky130_fd_sc_hdll__and3b_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__and3b_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__and3b_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 13 12 * + + Instances: 5 5 MN (4 pins) + 5 5 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 12 10 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 10 10 + + Instances: 2 2 MN (4 pins) + 5 5 MP (4 pins) + 1 1 SMN3 (5 pins) + ------ ------ + Total Inst: 8 8 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 10 10 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 5 5 0 0 MP(PHIGHVT) + 1 1 0 0 SMN3 + ------- ------- --------- --------- + Total Inst: 8 8 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A_N B C VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/and3b/sky130_fd_sc_hdll__and3b_1.pex.spice b/cells/and3b/sky130_fd_sc_hdll__and3b_1.pex.spice index 7200888..684c9c1 100644 --- a/cells/and3b/sky130_fd_sc_hdll__and3b_1.pex.spice +++ b/cells/and3b/sky130_fd_sc_hdll__and3b_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and3b_1.pex.spice -* Created: Thu Aug 27 18:58:17 2020 +* Created: Wed Sep 2 08:22:32 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/and3b/sky130_fd_sc_hdll__and3b_1.pxi.spice b/cells/and3b/sky130_fd_sc_hdll__and3b_1.pxi.spice index 69af34b..7a14fd6 100644 --- a/cells/and3b/sky130_fd_sc_hdll__and3b_1.pxi.spice +++ b/cells/and3b/sky130_fd_sc_hdll__and3b_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and3b_1.pxi.spice -* Created: Thu Aug 27 18:58:17 2020 +* Created: Wed Sep 2 08:22:32 2020 * x_PM_SKY130_FD_SC_HDLL__AND3B_1%A_N N_A_N_c_65_n N_A_N_c_66_n N_A_N_M1002_g + N_A_N_M1006_g A_N A_N A_N N_A_N_c_63_n N_A_N_c_64_n
diff --git a/cells/and3b/sky130_fd_sc_hdll__and3b_1.spice b/cells/and3b/sky130_fd_sc_hdll__and3b_1.spice index ac4660d..6e92dd9 100644 --- a/cells/and3b/sky130_fd_sc_hdll__and3b_1.spice +++ b/cells/and3b/sky130_fd_sc_hdll__and3b_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and3b_1.spice -* Created: Thu Aug 27 18:58:17 2020 +* Created: Wed Sep 2 08:22:32 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/and3b/sky130_fd_sc_hdll__and3b_2.lvs.report b/cells/and3b/sky130_fd_sc_hdll__and3b_2.lvs.report new file mode 100644 index 0000000..6d0c293 --- /dev/null +++ b/cells/and3b/sky130_fd_sc_hdll__and3b_2.lvs.report
@@ -0,0 +1,491 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_2.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__and3b_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__and3b_2.sp ('sky130_fd_sc_hdll__and3b_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_2.spice ('sky130_fd_sc_hdll__and3b_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:22:36 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__and3b_2 sky130_fd_sc_hdll__and3b_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__and3b_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__and3b_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 13 12 * + + Instances: 6 6 MN (4 pins) + 6 6 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 14 12 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 10 10 + + Instances: 2 2 MN (4 pins) + 5 5 MP (4 pins) + 1 1 SMN3 (5 pins) + ------ ------ + Total Inst: 8 8 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 10 10 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 5 5 0 0 MP(PHIGHVT) + 1 1 0 0 SMN3 + ------- ------- --------- --------- + Total Inst: 8 8 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A_N B C VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/and3b/sky130_fd_sc_hdll__and3b_2.pex.spice b/cells/and3b/sky130_fd_sc_hdll__and3b_2.pex.spice index 53910b0..4f820e2 100644 --- a/cells/and3b/sky130_fd_sc_hdll__and3b_2.pex.spice +++ b/cells/and3b/sky130_fd_sc_hdll__and3b_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and3b_2.pex.spice -* Created: Thu Aug 27 18:58:25 2020 +* Created: Wed Sep 2 08:22:39 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/and3b/sky130_fd_sc_hdll__and3b_2.pxi.spice b/cells/and3b/sky130_fd_sc_hdll__and3b_2.pxi.spice index 53b699e..10e84d3 100644 --- a/cells/and3b/sky130_fd_sc_hdll__and3b_2.pxi.spice +++ b/cells/and3b/sky130_fd_sc_hdll__and3b_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and3b_2.pxi.spice -* Created: Thu Aug 27 18:58:25 2020 +* Created: Wed Sep 2 08:22:39 2020 * x_PM_SKY130_FD_SC_HDLL__AND3B_2%A_N N_A_N_c_67_n N_A_N_M1002_g N_A_N_M1000_g A_N + A_N PM_SKY130_FD_SC_HDLL__AND3B_2%A_N
diff --git a/cells/and3b/sky130_fd_sc_hdll__and3b_2.spice b/cells/and3b/sky130_fd_sc_hdll__and3b_2.spice index e627883..f4f3677 100644 --- a/cells/and3b/sky130_fd_sc_hdll__and3b_2.spice +++ b/cells/and3b/sky130_fd_sc_hdll__and3b_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and3b_2.spice -* Created: Thu Aug 27 18:58:25 2020 +* Created: Wed Sep 2 08:22:39 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/and3b/sky130_fd_sc_hdll__and3b_4.lvs.report b/cells/and3b/sky130_fd_sc_hdll__and3b_4.lvs.report new file mode 100644 index 0000000..2f85cb8 --- /dev/null +++ b/cells/and3b/sky130_fd_sc_hdll__and3b_4.lvs.report
@@ -0,0 +1,495 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_4.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__and3b_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__and3b_4.sp ('sky130_fd_sc_hdll__and3b_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and3b/sky130_fd_sc_hdll__and3b_4.spice ('sky130_fd_sc_hdll__and3b_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:22:43 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__and3b_4 sky130_fd_sc_hdll__and3b_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__and3b_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__and3b_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 13 12 * + + Instances: 8 8 MN (4 pins) + 8 8 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 18 16 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 10 10 + + Instances: 2 2 MN (4 pins) + 5 5 MP (4 pins) + 1 1 SMN3 (5 pins) + ------ ------ + Total Inst: 8 8 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 10 10 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 5 5 0 0 MP(PHIGHVT) + 1 1 0 0 SMN3 + ------- ------- --------- --------- + Total Inst: 8 8 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB B C A_N VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/and3b/sky130_fd_sc_hdll__and3b_4.pex.spice b/cells/and3b/sky130_fd_sc_hdll__and3b_4.pex.spice index 8cbe9c9..66564ef 100644 --- a/cells/and3b/sky130_fd_sc_hdll__and3b_4.pex.spice +++ b/cells/and3b/sky130_fd_sc_hdll__and3b_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and3b_4.pex.spice -* Created: Thu Aug 27 18:58:32 2020 +* Created: Wed Sep 2 08:22:46 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/and3b/sky130_fd_sc_hdll__and3b_4.pxi.spice b/cells/and3b/sky130_fd_sc_hdll__and3b_4.pxi.spice index 512ccde..0e90048 100644 --- a/cells/and3b/sky130_fd_sc_hdll__and3b_4.pxi.spice +++ b/cells/and3b/sky130_fd_sc_hdll__and3b_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and3b_4.pxi.spice -* Created: Thu Aug 27 18:58:32 2020 +* Created: Wed Sep 2 08:22:46 2020 * x_PM_SKY130_FD_SC_HDLL__AND3B_4%A_98_199# N_A_98_199#_M1013_d + N_A_98_199#_M1011_d N_A_98_199#_c_71_n N_A_98_199#_M1005_g N_A_98_199#_c_72_n
diff --git a/cells/and3b/sky130_fd_sc_hdll__and3b_4.spice b/cells/and3b/sky130_fd_sc_hdll__and3b_4.spice index 6e0c87f..2229cf1 100644 --- a/cells/and3b/sky130_fd_sc_hdll__and3b_4.spice +++ b/cells/and3b/sky130_fd_sc_hdll__and3b_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and3b_4.spice -* Created: Thu Aug 27 18:58:32 2020 +* Created: Wed Sep 2 08:22:46 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/and4/sky130_fd_sc_hdll__and4_1.lvs.report b/cells/and4/sky130_fd_sc_hdll__and4_1.lvs.report new file mode 100644 index 0000000..754923a --- /dev/null +++ b/cells/and4/sky130_fd_sc_hdll__and4_1.lvs.report
@@ -0,0 +1,484 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_1.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__and4_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__and4_1.sp ('sky130_fd_sc_hdll__and4_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_1.spice ('sky130_fd_sc_hdll__and4_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:22:50 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__and4_1 sky130_fd_sc_hdll__and4_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__and4_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__and4_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 19 13 * + + Instances: 5 5 MN (4 pins) + 5 5 MP (4 pins) + 1 0 * Dpar (2 pins) + 6 0 * Probe (2 pins) + ------ ------ + Total Inst: 17 10 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 10 10 + + Instances: 1 1 MN (4 pins) + 5 5 MP (4 pins) + 1 1 SMN4 (6 pins) + ------ ------ + Total Inst: 7 7 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 10 10 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 5 5 0 0 MP(PHIGHVT) + 1 1 0 0 SMN4 + ------- ------- --------- --------- + Total Inst: 7 7 0 0 + + +o Statistics: + + 7 layout instances were filtered and their pins removed from adjoining nets. + + 6 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A B C D VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/and4/sky130_fd_sc_hdll__and4_1.pex.spice b/cells/and4/sky130_fd_sc_hdll__and4_1.pex.spice index c5ee662..6e4673f 100644 --- a/cells/and4/sky130_fd_sc_hdll__and4_1.pex.spice +++ b/cells/and4/sky130_fd_sc_hdll__and4_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and4_1.pex.spice -* Created: Thu Aug 27 18:58:39 2020 +* Created: Wed Sep 2 08:22:53 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/and4/sky130_fd_sc_hdll__and4_1.pxi.spice b/cells/and4/sky130_fd_sc_hdll__and4_1.pxi.spice index b7bd394..3933bd3 100644 --- a/cells/and4/sky130_fd_sc_hdll__and4_1.pxi.spice +++ b/cells/and4/sky130_fd_sc_hdll__and4_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and4_1.pxi.spice -* Created: Thu Aug 27 18:58:39 2020 +* Created: Wed Sep 2 08:22:53 2020 * x_PM_SKY130_FD_SC_HDLL__AND4_1%A N_A_c_65_n N_A_c_66_n N_A_M1001_g N_A_M1007_g A + N_A_c_64_n PM_SKY130_FD_SC_HDLL__AND4_1%A
diff --git a/cells/and4/sky130_fd_sc_hdll__and4_1.spice b/cells/and4/sky130_fd_sc_hdll__and4_1.spice index 3ad7914..a42669a 100644 --- a/cells/and4/sky130_fd_sc_hdll__and4_1.spice +++ b/cells/and4/sky130_fd_sc_hdll__and4_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and4_1.spice -* Created: Thu Aug 27 18:58:39 2020 +* Created: Wed Sep 2 08:22:53 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/and4/sky130_fd_sc_hdll__and4_2.lvs.report b/cells/and4/sky130_fd_sc_hdll__and4_2.lvs.report new file mode 100644 index 0000000..165eb25 --- /dev/null +++ b/cells/and4/sky130_fd_sc_hdll__and4_2.lvs.report
@@ -0,0 +1,491 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_2.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__and4_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__and4_2.sp ('sky130_fd_sc_hdll__and4_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_2.spice ('sky130_fd_sc_hdll__and4_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:22:57 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__and4_2 sky130_fd_sc_hdll__and4_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__and4_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__and4_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 19 13 * + + Instances: 6 6 MN (4 pins) + 6 6 MP (4 pins) + 1 0 * Dpar (2 pins) + 6 0 * Probe (2 pins) + ------ ------ + Total Inst: 19 12 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 10 10 + + Instances: 1 1 MN (4 pins) + 5 5 MP (4 pins) + 1 1 SMN4 (6 pins) + ------ ------ + Total Inst: 7 7 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 10 10 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 5 5 0 0 MP(PHIGHVT) + 1 1 0 0 SMN4 + ------- ------- --------- --------- + Total Inst: 7 7 0 0 + + +o Statistics: + + 7 layout instances were filtered and their pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + 6 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A B C D VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/and4/sky130_fd_sc_hdll__and4_2.pex.spice b/cells/and4/sky130_fd_sc_hdll__and4_2.pex.spice index b0932e5..ad6e379 100644 --- a/cells/and4/sky130_fd_sc_hdll__and4_2.pex.spice +++ b/cells/and4/sky130_fd_sc_hdll__and4_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and4_2.pex.spice -* Created: Thu Aug 27 18:58:46 2020 +* Created: Wed Sep 2 08:23:00 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/and4/sky130_fd_sc_hdll__and4_2.pxi.spice b/cells/and4/sky130_fd_sc_hdll__and4_2.pxi.spice index 23a17ab..3f2937d 100644 --- a/cells/and4/sky130_fd_sc_hdll__and4_2.pxi.spice +++ b/cells/and4/sky130_fd_sc_hdll__and4_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and4_2.pxi.spice -* Created: Thu Aug 27 18:58:46 2020 +* Created: Wed Sep 2 08:23:00 2020 * x_PM_SKY130_FD_SC_HDLL__AND4_2%A N_A_c_70_n N_A_c_71_n N_A_M1002_g N_A_M1007_g A + A A A N_A_c_69_n PM_SKY130_FD_SC_HDLL__AND4_2%A
diff --git a/cells/and4/sky130_fd_sc_hdll__and4_2.spice b/cells/and4/sky130_fd_sc_hdll__and4_2.spice index 397c828..a3f8bce 100644 --- a/cells/and4/sky130_fd_sc_hdll__and4_2.spice +++ b/cells/and4/sky130_fd_sc_hdll__and4_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and4_2.spice -* Created: Thu Aug 27 18:58:46 2020 +* Created: Wed Sep 2 08:23:00 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/and4/sky130_fd_sc_hdll__and4_4.lvs.report b/cells/and4/sky130_fd_sc_hdll__and4_4.lvs.report new file mode 100644 index 0000000..9622d77 --- /dev/null +++ b/cells/and4/sky130_fd_sc_hdll__and4_4.lvs.report
@@ -0,0 +1,492 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_4.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__and4_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__and4_4.sp ('sky130_fd_sc_hdll__and4_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4/sky130_fd_sc_hdll__and4_4.spice ('sky130_fd_sc_hdll__and4_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:23:04 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__and4_4 sky130_fd_sc_hdll__and4_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__and4_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__and4_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 13 13 + + Instances: 8 8 MN (4 pins) + 8 8 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 17 16 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 10 10 + + Instances: 1 1 MN (4 pins) + 5 5 MP (4 pins) + 1 1 SMN4 (6 pins) + ------ ------ + Total Inst: 7 7 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 10 10 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 5 5 0 0 MP(PHIGHVT) + 1 1 0 0 SMN4 + ------- ------- --------- --------- + Total Inst: 7 7 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A B C D VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/and4/sky130_fd_sc_hdll__and4_4.pex.spice b/cells/and4/sky130_fd_sc_hdll__and4_4.pex.spice index cc631f1..1885d00 100644 --- a/cells/and4/sky130_fd_sc_hdll__and4_4.pex.spice +++ b/cells/and4/sky130_fd_sc_hdll__and4_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and4_4.pex.spice -* Created: Thu Aug 27 18:58:53 2020 +* Created: Wed Sep 2 08:23:07 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/and4/sky130_fd_sc_hdll__and4_4.pxi.spice b/cells/and4/sky130_fd_sc_hdll__and4_4.pxi.spice index f3c938d..318cb92 100644 --- a/cells/and4/sky130_fd_sc_hdll__and4_4.pxi.spice +++ b/cells/and4/sky130_fd_sc_hdll__and4_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and4_4.pxi.spice -* Created: Thu Aug 27 18:58:53 2020 +* Created: Wed Sep 2 08:23:07 2020 * x_PM_SKY130_FD_SC_HDLL__AND4_4%A N_A_c_71_n N_A_M1006_g N_A_c_68_n N_A_M1012_g A + A N_A_c_70_n PM_SKY130_FD_SC_HDLL__AND4_4%A
diff --git a/cells/and4/sky130_fd_sc_hdll__and4_4.spice b/cells/and4/sky130_fd_sc_hdll__and4_4.spice index a1ae83f..131c721 100644 --- a/cells/and4/sky130_fd_sc_hdll__and4_4.spice +++ b/cells/and4/sky130_fd_sc_hdll__and4_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and4_4.spice -* Created: Thu Aug 27 18:58:53 2020 +* Created: Wed Sep 2 08:23:07 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/and4b/sky130_fd_sc_hdll__and4b_1.lvs.report b/cells/and4b/sky130_fd_sc_hdll__and4b_1.lvs.report new file mode 100644 index 0000000..8c681df --- /dev/null +++ b/cells/and4b/sky130_fd_sc_hdll__and4b_1.lvs.report
@@ -0,0 +1,483 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_1.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__and4b_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__and4b_1.sp ('sky130_fd_sc_hdll__and4b_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_1.spice ('sky130_fd_sc_hdll__and4b_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:23:11 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__and4b_1 sky130_fd_sc_hdll__and4b_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__and4b_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__and4b_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 14 14 + + Instances: 6 6 MN (4 pins) + 6 6 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 13 12 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 11 11 + + Instances: 2 2 MN (4 pins) + 6 6 MP (4 pins) + 1 1 SMN4 (6 pins) + ------ ------ + Total Inst: 9 9 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 11 11 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 6 6 0 0 MP(PHIGHVT) + 1 1 0 0 SMN4 + ------- ------- --------- --------- + Total Inst: 9 9 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB A_N B C D VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/and4b/sky130_fd_sc_hdll__and4b_1.pex.spice b/cells/and4b/sky130_fd_sc_hdll__and4b_1.pex.spice index 5952df0..b34ccd9 100644 --- a/cells/and4b/sky130_fd_sc_hdll__and4b_1.pex.spice +++ b/cells/and4b/sky130_fd_sc_hdll__and4b_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and4b_1.pex.spice -* Created: Thu Aug 27 18:58:59 2020 +* Created: Wed Sep 2 08:23:14 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/and4b/sky130_fd_sc_hdll__and4b_1.pxi.spice b/cells/and4b/sky130_fd_sc_hdll__and4b_1.pxi.spice index 2a4e9b4..dd553d8 100644 --- a/cells/and4b/sky130_fd_sc_hdll__and4b_1.pxi.spice +++ b/cells/and4b/sky130_fd_sc_hdll__and4b_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and4b_1.pxi.spice -* Created: Thu Aug 27 18:58:59 2020 +* Created: Wed Sep 2 08:23:14 2020 * x_PM_SKY130_FD_SC_HDLL__AND4B_1%A_N N_A_N_c_82_n N_A_N_c_83_n N_A_N_M1001_g + N_A_N_M1008_g A_N A_N N_A_N_c_81_n PM_SKY130_FD_SC_HDLL__AND4B_1%A_N
diff --git a/cells/and4b/sky130_fd_sc_hdll__and4b_1.spice b/cells/and4b/sky130_fd_sc_hdll__and4b_1.spice index b42cbd0..38e2908 100644 --- a/cells/and4b/sky130_fd_sc_hdll__and4b_1.spice +++ b/cells/and4b/sky130_fd_sc_hdll__and4b_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and4b_1.spice -* Created: Thu Aug 27 18:58:59 2020 +* Created: Wed Sep 2 08:23:14 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/and4b/sky130_fd_sc_hdll__and4b_2.lvs.report b/cells/and4b/sky130_fd_sc_hdll__and4b_2.lvs.report new file mode 100644 index 0000000..b4fb9b8 --- /dev/null +++ b/cells/and4b/sky130_fd_sc_hdll__and4b_2.lvs.report
@@ -0,0 +1,493 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_2.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__and4b_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__and4b_2.sp ('sky130_fd_sc_hdll__and4b_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_2.spice ('sky130_fd_sc_hdll__and4b_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:23:18 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__and4b_2 sky130_fd_sc_hdll__and4b_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__and4b_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__and4b_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 19 14 * + + Instances: 7 7 MN (4 pins) + 7 7 MP (4 pins) + 1 0 * Dpar (2 pins) + 5 0 * Probe (2 pins) + ------ ------ + Total Inst: 20 14 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 11 11 + + Instances: 2 2 MN (4 pins) + 6 6 MP (4 pins) + 1 1 SMN4 (6 pins) + ------ ------ + Total Inst: 9 9 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 11 11 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 6 6 0 0 MP(PHIGHVT) + 1 1 0 0 SMN4 + ------- ------- --------- --------- + Total Inst: 9 9 0 0 + + +o Statistics: + + 6 layout instances were filtered and their pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + 5 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A_N B C D VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/and4b/sky130_fd_sc_hdll__and4b_2.pex.spice b/cells/and4b/sky130_fd_sc_hdll__and4b_2.pex.spice index e341d2a..9479fd8 100644 --- a/cells/and4b/sky130_fd_sc_hdll__and4b_2.pex.spice +++ b/cells/and4b/sky130_fd_sc_hdll__and4b_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and4b_2.pex.spice -* Created: Thu Aug 27 18:59:06 2020 +* Created: Wed Sep 2 08:23:21 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/and4b/sky130_fd_sc_hdll__and4b_2.pxi.spice b/cells/and4b/sky130_fd_sc_hdll__and4b_2.pxi.spice index 898cfc5..c9b46f1 100644 --- a/cells/and4b/sky130_fd_sc_hdll__and4b_2.pxi.spice +++ b/cells/and4b/sky130_fd_sc_hdll__and4b_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and4b_2.pxi.spice -* Created: Thu Aug 27 18:59:06 2020 +* Created: Wed Sep 2 08:23:21 2020 * x_PM_SKY130_FD_SC_HDLL__AND4B_2%A_N N_A_N_c_86_n N_A_N_c_87_n N_A_N_M1001_g + N_A_N_M1008_g A_N A_N A_N N_A_N_c_85_n PM_SKY130_FD_SC_HDLL__AND4B_2%A_N
diff --git a/cells/and4b/sky130_fd_sc_hdll__and4b_2.spice b/cells/and4b/sky130_fd_sc_hdll__and4b_2.spice index 9580a7b..4440218 100644 --- a/cells/and4b/sky130_fd_sc_hdll__and4b_2.spice +++ b/cells/and4b/sky130_fd_sc_hdll__and4b_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and4b_2.spice -* Created: Thu Aug 27 18:59:06 2020 +* Created: Wed Sep 2 08:23:21 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/and4b/sky130_fd_sc_hdll__and4b_4.lvs.report b/cells/and4b/sky130_fd_sc_hdll__and4b_4.lvs.report new file mode 100644 index 0000000..d41277c --- /dev/null +++ b/cells/and4b/sky130_fd_sc_hdll__and4b_4.lvs.report
@@ -0,0 +1,497 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_4.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__and4b_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__and4b_4.sp ('sky130_fd_sc_hdll__and4b_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4b/sky130_fd_sc_hdll__and4b_4.spice ('sky130_fd_sc_hdll__and4b_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:23:24 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__and4b_4 sky130_fd_sc_hdll__and4b_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__and4b_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__and4b_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 17 14 * + + Instances: 9 9 MN (4 pins) + 9 9 MP (4 pins) + 1 0 * Dpar (2 pins) + 3 0 * Probe (2 pins) + ------ ------ + Total Inst: 22 18 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 11 11 + + Instances: 2 2 MN (4 pins) + 6 6 MP (4 pins) + 1 1 SMN4 (6 pins) + ------ ------ + Total Inst: 9 9 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 11 11 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 6 6 0 0 MP(PHIGHVT) + 1 1 0 0 SMN4 + ------- ------- --------- --------- + Total Inst: 9 9 0 0 + + +o Statistics: + + 4 layout instances were filtered and their pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + + 3 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A_N D C B VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/and4b/sky130_fd_sc_hdll__and4b_4.pex.spice b/cells/and4b/sky130_fd_sc_hdll__and4b_4.pex.spice index 49dbda7..ee72a2b 100644 --- a/cells/and4b/sky130_fd_sc_hdll__and4b_4.pex.spice +++ b/cells/and4b/sky130_fd_sc_hdll__and4b_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and4b_4.pex.spice -* Created: Thu Aug 27 18:59:13 2020 +* Created: Wed Sep 2 08:23:27 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/and4b/sky130_fd_sc_hdll__and4b_4.pxi.spice b/cells/and4b/sky130_fd_sc_hdll__and4b_4.pxi.spice index d34a68b..e1d3965 100644 --- a/cells/and4b/sky130_fd_sc_hdll__and4b_4.pxi.spice +++ b/cells/and4b/sky130_fd_sc_hdll__and4b_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and4b_4.pxi.spice -* Created: Thu Aug 27 18:59:13 2020 +* Created: Wed Sep 2 08:23:27 2020 * x_PM_SKY130_FD_SC_HDLL__AND4B_4%A_N N_A_N_c_79_n N_A_N_c_80_n N_A_N_M1003_g + N_A_N_M1013_g A_N A_N A_N N_A_N_c_78_n PM_SKY130_FD_SC_HDLL__AND4B_4%A_N
diff --git a/cells/and4b/sky130_fd_sc_hdll__and4b_4.spice b/cells/and4b/sky130_fd_sc_hdll__and4b_4.spice index 3cbf080..fe0a666 100644 --- a/cells/and4b/sky130_fd_sc_hdll__and4b_4.spice +++ b/cells/and4b/sky130_fd_sc_hdll__and4b_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and4b_4.spice -* Created: Thu Aug 27 18:59:13 2020 +* Created: Wed Sep 2 08:23:27 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/and4bb/sky130_fd_sc_hdll__and4bb_1.lvs.report b/cells/and4bb/sky130_fd_sc_hdll__and4bb_1.lvs.report new file mode 100644 index 0000000..8c89ac6 --- /dev/null +++ b/cells/and4bb/sky130_fd_sc_hdll__and4bb_1.lvs.report
@@ -0,0 +1,485 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_1.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__and4bb_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__and4bb_1.sp ('sky130_fd_sc_hdll__and4bb_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_1.spice ('sky130_fd_sc_hdll__and4bb_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:23:31 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__and4bb_1 sky130_fd_sc_hdll__and4bb_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__and4bb_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__and4bb_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 15 15 + + Instances: 7 7 MN (4 pins) + 7 7 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 15 14 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 12 12 + + Instances: 3 3 MN (4 pins) + 7 7 MP (4 pins) + 1 1 SMN4 (6 pins) + ------ ------ + Total Inst: 11 11 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 12 12 0 0 + + Instances: 3 3 0 0 MN(NSHORT) + 7 7 0 0 MP(PHIGHVT) + 1 1 0 0 SMN4 + ------- ------- --------- --------- + Total Inst: 11 11 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB A_N B_N C D VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/and4bb/sky130_fd_sc_hdll__and4bb_1.pex.spice b/cells/and4bb/sky130_fd_sc_hdll__and4bb_1.pex.spice index ff4ef63..608a2ae 100644 --- a/cells/and4bb/sky130_fd_sc_hdll__and4bb_1.pex.spice +++ b/cells/and4bb/sky130_fd_sc_hdll__and4bb_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and4bb_1.pex.spice -* Created: Thu Aug 27 18:59:21 2020 +* Created: Wed Sep 2 08:23:34 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/and4bb/sky130_fd_sc_hdll__and4bb_1.pxi.spice b/cells/and4bb/sky130_fd_sc_hdll__and4bb_1.pxi.spice index f79078a..2c6f2ac 100644 --- a/cells/and4bb/sky130_fd_sc_hdll__and4bb_1.pxi.spice +++ b/cells/and4bb/sky130_fd_sc_hdll__and4bb_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and4bb_1.pxi.spice -* Created: Thu Aug 27 18:59:21 2020 +* Created: Wed Sep 2 08:23:34 2020 * x_PM_SKY130_FD_SC_HDLL__AND4BB_1%A_N N_A_N_M1008_g N_A_N_c_99_n N_A_N_M1011_g + A_N N_A_N_c_100_n PM_SKY130_FD_SC_HDLL__AND4BB_1%A_N
diff --git a/cells/and4bb/sky130_fd_sc_hdll__and4bb_1.spice b/cells/and4bb/sky130_fd_sc_hdll__and4bb_1.spice index 91a1930..e5be944 100644 --- a/cells/and4bb/sky130_fd_sc_hdll__and4bb_1.spice +++ b/cells/and4bb/sky130_fd_sc_hdll__and4bb_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and4bb_1.spice -* Created: Thu Aug 27 18:59:21 2020 +* Created: Wed Sep 2 08:23:34 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/and4bb/sky130_fd_sc_hdll__and4bb_2.lvs.report b/cells/and4bb/sky130_fd_sc_hdll__and4bb_2.lvs.report new file mode 100644 index 0000000..9035528 --- /dev/null +++ b/cells/and4bb/sky130_fd_sc_hdll__and4bb_2.lvs.report
@@ -0,0 +1,495 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_2.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__and4bb_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__and4bb_2.sp ('sky130_fd_sc_hdll__and4bb_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_2.spice ('sky130_fd_sc_hdll__and4bb_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:23:38 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__and4bb_2 sky130_fd_sc_hdll__and4bb_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__and4bb_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__and4bb_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 18 15 * + + Instances: 8 8 MN (4 pins) + 8 8 MP (4 pins) + 1 0 * Dpar (2 pins) + 3 0 * Probe (2 pins) + ------ ------ + Total Inst: 20 16 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 12 12 + + Instances: 3 3 MN (4 pins) + 7 7 MP (4 pins) + 1 1 SMN4 (6 pins) + ------ ------ + Total Inst: 11 11 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 12 12 0 0 + + Instances: 3 3 0 0 MN(NSHORT) + 7 7 0 0 MP(PHIGHVT) + 1 1 0 0 SMN4 + ------- ------- --------- --------- + Total Inst: 11 11 0 0 + + +o Statistics: + + 4 layout instances were filtered and their pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + 3 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A_N C D B_N VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/and4bb/sky130_fd_sc_hdll__and4bb_2.pex.spice b/cells/and4bb/sky130_fd_sc_hdll__and4bb_2.pex.spice index 826913e..6c750ca 100644 --- a/cells/and4bb/sky130_fd_sc_hdll__and4bb_2.pex.spice +++ b/cells/and4bb/sky130_fd_sc_hdll__and4bb_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and4bb_2.pex.spice -* Created: Thu Aug 27 18:59:28 2020 +* Created: Wed Sep 2 08:23:41 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/and4bb/sky130_fd_sc_hdll__and4bb_2.pxi.spice b/cells/and4bb/sky130_fd_sc_hdll__and4bb_2.pxi.spice index cf0951b..b7fcb14 100644 --- a/cells/and4bb/sky130_fd_sc_hdll__and4bb_2.pxi.spice +++ b/cells/and4bb/sky130_fd_sc_hdll__and4bb_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and4bb_2.pxi.spice -* Created: Thu Aug 27 18:59:28 2020 +* Created: Wed Sep 2 08:23:41 2020 * x_PM_SKY130_FD_SC_HDLL__AND4BB_2%A_N N_A_N_c_95_n N_A_N_c_96_n N_A_N_M1002_g + N_A_N_M1011_g A_N A_N N_A_N_c_94_n PM_SKY130_FD_SC_HDLL__AND4BB_2%A_N
diff --git a/cells/and4bb/sky130_fd_sc_hdll__and4bb_2.spice b/cells/and4bb/sky130_fd_sc_hdll__and4bb_2.spice index c6a8338..460c6b9 100644 --- a/cells/and4bb/sky130_fd_sc_hdll__and4bb_2.spice +++ b/cells/and4bb/sky130_fd_sc_hdll__and4bb_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and4bb_2.spice -* Created: Thu Aug 27 18:59:28 2020 +* Created: Wed Sep 2 08:23:41 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.lvs.report b/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.lvs.report new file mode 100644 index 0000000..be0bf9a --- /dev/null +++ b/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.lvs.report
@@ -0,0 +1,499 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__and4bb_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__and4bb_4.sp ('sky130_fd_sc_hdll__and4bb_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.spice ('sky130_fd_sc_hdll__and4bb_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:23:45 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__and4bb_4 sky130_fd_sc_hdll__and4bb_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__and4bb_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__and4bb_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 17 15 * + + Instances: 10 10 MN (4 pins) + 10 10 MP (4 pins) + 1 0 * Dpar (2 pins) + 2 0 * Probe (2 pins) + ------ ------ + Total Inst: 23 20 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 12 12 + + Instances: 3 3 MN (4 pins) + 7 7 MP (4 pins) + 1 1 SMN4 (6 pins) + ------ ------ + Total Inst: 11 11 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 12 12 0 0 + + Instances: 3 3 0 0 MN(NSHORT) + 7 7 0 0 MP(PHIGHVT) + 1 1 0 0 SMN4 + ------- ------- --------- --------- + Total Inst: 11 11 0 0 + + +o Statistics: + + 3 layout instances were filtered and their pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + + 2 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB B_N D C A_N VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.pex.spice b/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.pex.spice index 48ea0c9..c98512c 100644 --- a/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.pex.spice +++ b/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and4bb_4.pex.spice -* Created: Thu Aug 27 18:59:36 2020 +* Created: Wed Sep 2 08:23:48 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.pxi.spice b/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.pxi.spice index aa8a65f..ff67473 100644 --- a/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.pxi.spice +++ b/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and4bb_4.pxi.spice -* Created: Thu Aug 27 18:59:36 2020 +* Created: Wed Sep 2 08:23:48 2020 * x_PM_SKY130_FD_SC_HDLL__AND4BB_4%B_N N_B_N_c_101_n N_B_N_c_102_n N_B_N_M1002_g + N_B_N_M1014_g B_N B_N B_N N_B_N_c_100_n PM_SKY130_FD_SC_HDLL__AND4BB_4%B_N
diff --git a/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.spice b/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.spice index a3a5f93..7d4dd08 100644 --- a/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.spice +++ b/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__and4bb_4.spice -* Created: Thu Aug 27 18:59:36 2020 +* Created: Wed Sep 2 08:23:48 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/buf/sky130_fd_sc_hdll__buf_1.lvs.report b/cells/buf/sky130_fd_sc_hdll__buf_1.lvs.report new file mode 100644 index 0000000..715a22e --- /dev/null +++ b/cells/buf/sky130_fd_sc_hdll__buf_1.lvs.report
@@ -0,0 +1,476 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_1.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__buf_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__buf_1.sp ('sky130_fd_sc_hdll__buf_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_1.spice ('sky130_fd_sc_hdll__buf_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:24:06 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__buf_1 sky130_fd_sc_hdll__buf_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__buf_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__buf_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 10 7 * + + Instances: 2 2 MN (4 pins) + 2 2 MP (4 pins) + 1 0 * Dpar (2 pins) + 3 0 * Probe (2 pins) + ------ ------ + Total Inst: 8 4 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 7 7 + + Instances: 2 2 MN (4 pins) + 2 2 MP (4 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 6 6 0 0 + + Nets: 7 7 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 4 layout instances were filtered and their pins removed from adjoining nets. + + 3 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/buf/sky130_fd_sc_hdll__buf_1.pex.spice b/cells/buf/sky130_fd_sc_hdll__buf_1.pex.spice index 3ea0bca..d92701f 100644 --- a/cells/buf/sky130_fd_sc_hdll__buf_1.pex.spice +++ b/cells/buf/sky130_fd_sc_hdll__buf_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__buf_1.pex.spice -* Created: Thu Aug 27 19:00:11 2020 +* Created: Wed Sep 2 08:24:09 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/buf/sky130_fd_sc_hdll__buf_1.pxi.spice b/cells/buf/sky130_fd_sc_hdll__buf_1.pxi.spice index 4b81c1d..d4153cb 100644 --- a/cells/buf/sky130_fd_sc_hdll__buf_1.pxi.spice +++ b/cells/buf/sky130_fd_sc_hdll__buf_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__buf_1.pxi.spice -* Created: Thu Aug 27 19:00:11 2020 +* Created: Wed Sep 2 08:24:09 2020 * x_PM_SKY130_FD_SC_HDLL__BUF_1%A N_A_c_39_n N_A_c_40_n N_A_M1000_g N_A_M1002_g A + N_A_c_38_n PM_SKY130_FD_SC_HDLL__BUF_1%A
diff --git a/cells/buf/sky130_fd_sc_hdll__buf_1.spice b/cells/buf/sky130_fd_sc_hdll__buf_1.spice index 9c486fc..ac6d678 100644 --- a/cells/buf/sky130_fd_sc_hdll__buf_1.spice +++ b/cells/buf/sky130_fd_sc_hdll__buf_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__buf_1.spice -* Created: Thu Aug 27 19:00:11 2020 +* Created: Wed Sep 2 08:24:09 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/buf/sky130_fd_sc_hdll__buf_12.lvs.report b/cells/buf/sky130_fd_sc_hdll__buf_12.lvs.report new file mode 100644 index 0000000..04294c8 --- /dev/null +++ b/cells/buf/sky130_fd_sc_hdll__buf_12.lvs.report
@@ -0,0 +1,506 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_12.spice" +-------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_12.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__buf_12.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__buf_12.sp ('sky130_fd_sc_hdll__buf_12') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_12.spice ('sky130_fd_sc_hdll__buf_12') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:23:52 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__buf_12 sky130_fd_sc_hdll__buf_12 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__buf_12 +SOURCE CELL NAME: sky130_fd_sc_hdll__buf_12 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 7 7 + + Instances: 16 16 MN (4 pins) + 16 16 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 33 32 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 7 7 + + Instances: 2 2 MN (4 pins) + 2 2 MP (4 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 6 6 0 0 + + Nets: 7 7 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 32 layout mos transistors were reduced to 4. + 28 mos transistors were deleted by parallel reduction. + 32 source mos transistors were reduced to 4. + 28 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/buf/sky130_fd_sc_hdll__buf_12.pex.spice b/cells/buf/sky130_fd_sc_hdll__buf_12.pex.spice index ca4bbc0..6b8525c 100644 --- a/cells/buf/sky130_fd_sc_hdll__buf_12.pex.spice +++ b/cells/buf/sky130_fd_sc_hdll__buf_12.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__buf_12.pex.spice -* Created: Thu Aug 27 18:59:54 2020 +* Created: Wed Sep 2 08:23:55 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/buf/sky130_fd_sc_hdll__buf_12.pxi.spice b/cells/buf/sky130_fd_sc_hdll__buf_12.pxi.spice index aff03c7..8209549 100644 --- a/cells/buf/sky130_fd_sc_hdll__buf_12.pxi.spice +++ b/cells/buf/sky130_fd_sc_hdll__buf_12.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__buf_12.pxi.spice -* Created: Thu Aug 27 18:59:54 2020 +* Created: Wed Sep 2 08:23:55 2020 * x_PM_SKY130_FD_SC_HDLL__BUF_12%A N_A_c_128_n N_A_M1001_g N_A_M1002_g N_A_c_129_n + N_A_M1011_g N_A_M1021_g N_A_c_130_n N_A_M1019_g N_A_M1022_g N_A_c_131_n
diff --git a/cells/buf/sky130_fd_sc_hdll__buf_12.spice b/cells/buf/sky130_fd_sc_hdll__buf_12.spice index ad10724..05ba62b 100644 --- a/cells/buf/sky130_fd_sc_hdll__buf_12.spice +++ b/cells/buf/sky130_fd_sc_hdll__buf_12.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__buf_12.spice -* Created: Thu Aug 27 18:59:54 2020 +* Created: Wed Sep 2 08:23:55 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/buf/sky130_fd_sc_hdll__buf_16.lvs.report b/cells/buf/sky130_fd_sc_hdll__buf_16.lvs.report new file mode 100644 index 0000000..b53997d --- /dev/null +++ b/cells/buf/sky130_fd_sc_hdll__buf_16.lvs.report
@@ -0,0 +1,521 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +-------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 87 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 89 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 91 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 93 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 95 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 97 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 99 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 101 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 103 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 105 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__buf_16.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__buf_16.sp ('sky130_fd_sc_hdll__buf_16') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_16.spice ('sky130_fd_sc_hdll__buf_16') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:23:59 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__buf_16 sky130_fd_sc_hdll__buf_16 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__buf_16 +SOURCE CELL NAME: sky130_fd_sc_hdll__buf_16 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 9 7 * + + Instances: 22 22 MN (4 pins) + 22 22 MP (4 pins) + 1 0 * Dpar (2 pins) + 2 0 * Probe (2 pins) + ------ ------ + Total Inst: 47 44 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 7 7 + + Instances: 2 2 MN (4 pins) + 2 2 MP (4 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 6 6 0 0 + + Nets: 7 7 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 3 layout instances were filtered and their pins removed from adjoining nets. + + 44 layout mos transistors were reduced to 4. + 40 mos transistors were deleted by parallel reduction. + 44 source mos transistors were reduced to 4. + 40 mos transistors were deleted by parallel reduction. + + 2 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/buf/sky130_fd_sc_hdll__buf_16.pex.spice b/cells/buf/sky130_fd_sc_hdll__buf_16.pex.spice index 4b72750..3c335ce 100644 --- a/cells/buf/sky130_fd_sc_hdll__buf_16.pex.spice +++ b/cells/buf/sky130_fd_sc_hdll__buf_16.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__buf_16.pex.spice -* Created: Thu Aug 27 19:00:01 2020 +* Created: Wed Sep 2 08:24:02 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/buf/sky130_fd_sc_hdll__buf_16.pxi.spice b/cells/buf/sky130_fd_sc_hdll__buf_16.pxi.spice index 33cc170..b0f4f3b 100644 --- a/cells/buf/sky130_fd_sc_hdll__buf_16.pxi.spice +++ b/cells/buf/sky130_fd_sc_hdll__buf_16.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__buf_16.pxi.spice -* Created: Thu Aug 27 19:00:01 2020 +* Created: Wed Sep 2 08:24:02 2020 * x_PM_SKY130_FD_SC_HDLL__BUF_16%A N_A_M1011_g N_A_c_186_n N_A_M1001_g N_A_M1014_g + N_A_c_187_n N_A_M1013_g N_A_M1028_g N_A_c_188_n N_A_M1017_g N_A_M1036_g
diff --git a/cells/buf/sky130_fd_sc_hdll__buf_16.spice b/cells/buf/sky130_fd_sc_hdll__buf_16.spice index c919ac2..a02531b 100644 --- a/cells/buf/sky130_fd_sc_hdll__buf_16.spice +++ b/cells/buf/sky130_fd_sc_hdll__buf_16.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__buf_16.spice -* Created: Thu Aug 27 19:00:01 2020 +* Created: Wed Sep 2 08:24:02 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/buf/sky130_fd_sc_hdll__buf_2.lvs.report b/cells/buf/sky130_fd_sc_hdll__buf_2.lvs.report new file mode 100644 index 0000000..d269ac0 --- /dev/null +++ b/cells/buf/sky130_fd_sc_hdll__buf_2.lvs.report
@@ -0,0 +1,480 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_2.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__buf_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__buf_2.sp ('sky130_fd_sc_hdll__buf_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_2.spice ('sky130_fd_sc_hdll__buf_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:24:13 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__buf_2 sky130_fd_sc_hdll__buf_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__buf_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__buf_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 7 7 + + Instances: 3 3 MN (4 pins) + 3 3 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 7 6 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 7 7 + + Instances: 2 2 MN (4 pins) + 2 2 MP (4 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 6 6 0 0 + + Nets: 7 7 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/buf/sky130_fd_sc_hdll__buf_2.pex.spice b/cells/buf/sky130_fd_sc_hdll__buf_2.pex.spice index 8508e5d..fe3b835 100644 --- a/cells/buf/sky130_fd_sc_hdll__buf_2.pex.spice +++ b/cells/buf/sky130_fd_sc_hdll__buf_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__buf_2.pex.spice -* Created: Thu Aug 27 19:00:19 2020 +* Created: Wed Sep 2 08:24:16 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/buf/sky130_fd_sc_hdll__buf_2.pxi.spice b/cells/buf/sky130_fd_sc_hdll__buf_2.pxi.spice index 76e7c3a..0b51f5c 100644 --- a/cells/buf/sky130_fd_sc_hdll__buf_2.pxi.spice +++ b/cells/buf/sky130_fd_sc_hdll__buf_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__buf_2.pxi.spice -* Created: Thu Aug 27 19:00:19 2020 +* Created: Wed Sep 2 08:24:16 2020 * x_PM_SKY130_FD_SC_HDLL__BUF_2%A N_A_c_47_n N_A_c_48_n N_A_M1002_g N_A_M1000_g A + N_A_c_46_n PM_SKY130_FD_SC_HDLL__BUF_2%A
diff --git a/cells/buf/sky130_fd_sc_hdll__buf_2.spice b/cells/buf/sky130_fd_sc_hdll__buf_2.spice index d7956cb..e3f7843 100644 --- a/cells/buf/sky130_fd_sc_hdll__buf_2.spice +++ b/cells/buf/sky130_fd_sc_hdll__buf_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__buf_2.spice -* Created: Thu Aug 27 19:00:19 2020 +* Created: Wed Sep 2 08:24:16 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/buf/sky130_fd_sc_hdll__buf_4.lvs.report b/cells/buf/sky130_fd_sc_hdll__buf_4.lvs.report new file mode 100644 index 0000000..dc8bbad --- /dev/null +++ b/cells/buf/sky130_fd_sc_hdll__buf_4.lvs.report
@@ -0,0 +1,484 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_4.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__buf_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__buf_4.sp ('sky130_fd_sc_hdll__buf_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_4.spice ('sky130_fd_sc_hdll__buf_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:24:20 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__buf_4 sky130_fd_sc_hdll__buf_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__buf_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__buf_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 7 7 + + Instances: 5 5 MN (4 pins) + 5 5 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 11 10 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 7 7 + + Instances: 2 2 MN (4 pins) + 2 2 MP (4 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 6 6 0 0 + + Nets: 7 7 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/buf/sky130_fd_sc_hdll__buf_4.pex.spice b/cells/buf/sky130_fd_sc_hdll__buf_4.pex.spice index b9a4e98..04f23ef 100644 --- a/cells/buf/sky130_fd_sc_hdll__buf_4.pex.spice +++ b/cells/buf/sky130_fd_sc_hdll__buf_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__buf_4.pex.spice -* Created: Thu Aug 27 19:00:26 2020 +* Created: Wed Sep 2 08:24:23 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/buf/sky130_fd_sc_hdll__buf_4.pxi.spice b/cells/buf/sky130_fd_sc_hdll__buf_4.pxi.spice index 59719a5..7c55873 100644 --- a/cells/buf/sky130_fd_sc_hdll__buf_4.pxi.spice +++ b/cells/buf/sky130_fd_sc_hdll__buf_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__buf_4.pxi.spice -* Created: Thu Aug 27 19:00:26 2020 +* Created: Wed Sep 2 08:24:23 2020 * x_PM_SKY130_FD_SC_HDLL__BUF_4%A N_A_c_54_n N_A_M1002_g N_A_M1006_g A + PM_SKY130_FD_SC_HDLL__BUF_4%A
diff --git a/cells/buf/sky130_fd_sc_hdll__buf_4.spice b/cells/buf/sky130_fd_sc_hdll__buf_4.spice index 3c7e70b..ad30e34 100644 --- a/cells/buf/sky130_fd_sc_hdll__buf_4.spice +++ b/cells/buf/sky130_fd_sc_hdll__buf_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__buf_4.spice -* Created: Thu Aug 27 19:00:26 2020 +* Created: Wed Sep 2 08:24:23 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/buf/sky130_fd_sc_hdll__buf_6.lvs.report b/cells/buf/sky130_fd_sc_hdll__buf_6.lvs.report new file mode 100644 index 0000000..d9673be --- /dev/null +++ b/cells/buf/sky130_fd_sc_hdll__buf_6.lvs.report
@@ -0,0 +1,490 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_6.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_6.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_6.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_6.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_6.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_6.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_6.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_6.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_6.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_6.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_6.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_6.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_6.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_6.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_6.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_6.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_6.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__buf_6.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__buf_6.sp ('sky130_fd_sc_hdll__buf_6') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_6.spice ('sky130_fd_sc_hdll__buf_6') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:24:27 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__buf_6 sky130_fd_sc_hdll__buf_6 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__buf_6 +SOURCE CELL NAME: sky130_fd_sc_hdll__buf_6 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 7 7 + + Instances: 8 8 MN (4 pins) + 8 8 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 17 16 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 7 7 + + Instances: 2 2 MN (4 pins) + 2 2 MP (4 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 6 6 0 0 + + Nets: 7 7 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 16 layout mos transistors were reduced to 4. + 12 mos transistors were deleted by parallel reduction. + 16 source mos transistors were reduced to 4. + 12 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/buf/sky130_fd_sc_hdll__buf_6.pex.spice b/cells/buf/sky130_fd_sc_hdll__buf_6.pex.spice index ae381c5..259aaae 100644 --- a/cells/buf/sky130_fd_sc_hdll__buf_6.pex.spice +++ b/cells/buf/sky130_fd_sc_hdll__buf_6.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__buf_6.pex.spice -* Created: Thu Aug 27 19:00:34 2020 +* Created: Wed Sep 2 08:24:30 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/buf/sky130_fd_sc_hdll__buf_6.pxi.spice b/cells/buf/sky130_fd_sc_hdll__buf_6.pxi.spice index 834e5b2..0c83281 100644 --- a/cells/buf/sky130_fd_sc_hdll__buf_6.pxi.spice +++ b/cells/buf/sky130_fd_sc_hdll__buf_6.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__buf_6.pxi.spice -* Created: Thu Aug 27 19:00:34 2020 +* Created: Wed Sep 2 08:24:30 2020 * x_PM_SKY130_FD_SC_HDLL__BUF_6%A N_A_c_75_n N_A_M1001_g N_A_M1007_g N_A_c_76_n + N_A_M1002_g N_A_M1009_g A A N_A_c_73_n N_A_c_74_n A
diff --git a/cells/buf/sky130_fd_sc_hdll__buf_6.spice b/cells/buf/sky130_fd_sc_hdll__buf_6.spice index 8558691..1b01394 100644 --- a/cells/buf/sky130_fd_sc_hdll__buf_6.spice +++ b/cells/buf/sky130_fd_sc_hdll__buf_6.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__buf_6.spice -* Created: Thu Aug 27 19:00:34 2020 +* Created: Wed Sep 2 08:24:30 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/buf/sky130_fd_sc_hdll__buf_8.lvs.report b/cells/buf/sky130_fd_sc_hdll__buf_8.lvs.report new file mode 100644 index 0000000..5d504d4 --- /dev/null +++ b/cells/buf/sky130_fd_sc_hdll__buf_8.lvs.report
@@ -0,0 +1,499 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_8.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_8.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__buf_8.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__buf_8.sp ('sky130_fd_sc_hdll__buf_8') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/buf/sky130_fd_sc_hdll__buf_8.spice ('sky130_fd_sc_hdll__buf_8') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:24:34 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__buf_8 sky130_fd_sc_hdll__buf_8 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__buf_8 +SOURCE CELL NAME: sky130_fd_sc_hdll__buf_8 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 8 7 * + + Instances: 11 11 MN (4 pins) + 11 11 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 24 22 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 7 7 + + Instances: 2 2 MN (4 pins) + 2 2 MP (4 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 6 6 0 0 + + Nets: 7 7 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 22 layout mos transistors were reduced to 4. + 18 mos transistors were deleted by parallel reduction. + 22 source mos transistors were reduced to 4. + 18 mos transistors were deleted by parallel reduction. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/buf/sky130_fd_sc_hdll__buf_8.pex.spice b/cells/buf/sky130_fd_sc_hdll__buf_8.pex.spice index a0bf644..bb2d45f 100644 --- a/cells/buf/sky130_fd_sc_hdll__buf_8.pex.spice +++ b/cells/buf/sky130_fd_sc_hdll__buf_8.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__buf_8.pex.spice -* Created: Thu Aug 27 19:00:43 2020 +* Created: Wed Sep 2 08:24:37 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/buf/sky130_fd_sc_hdll__buf_8.pxi.spice b/cells/buf/sky130_fd_sc_hdll__buf_8.pxi.spice index 4f55796..a5251bc 100644 --- a/cells/buf/sky130_fd_sc_hdll__buf_8.pxi.spice +++ b/cells/buf/sky130_fd_sc_hdll__buf_8.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__buf_8.pxi.spice -* Created: Thu Aug 27 19:00:43 2020 +* Created: Wed Sep 2 08:24:37 2020 * x_PM_SKY130_FD_SC_HDLL__BUF_8%A N_A_c_103_n N_A_M1001_g N_A_M1002_g N_A_c_104_n + N_A_M1008_g N_A_M1015_g N_A_c_105_n N_A_M1019_g N_A_M1021_g A A A N_A_c_102_n
diff --git a/cells/buf/sky130_fd_sc_hdll__buf_8.spice b/cells/buf/sky130_fd_sc_hdll__buf_8.spice index 7b5ec79..b071d58 100644 --- a/cells/buf/sky130_fd_sc_hdll__buf_8.spice +++ b/cells/buf/sky130_fd_sc_hdll__buf_8.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__buf_8.spice -* Created: Thu Aug 27 19:00:43 2020 +* Created: Wed Sep 2 08:24:37 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.lvs.report b/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.lvs.report new file mode 100644 index 0000000..3934c29 --- /dev/null +++ b/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.lvs.report
@@ -0,0 +1,526 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 87 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 89 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 91 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 93 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 95 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 97 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 99 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 101 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 103 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 105 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 107 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 109 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 111 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 113 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 115 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 117 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 119 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 121 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__bufbuf_16.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__bufbuf_16.sp ('sky130_fd_sc_hdll__bufbuf_16') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice ('sky130_fd_sc_hdll__bufbuf_16') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:24:41 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__bufbuf_16 sky130_fd_sc_hdll__bufbuf_16 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__bufbuf_16 +SOURCE CELL NAME: sky130_fd_sc_hdll__bufbuf_16 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 9 9 + + Instances: 26 26 MN (4 pins) + 26 26 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 53 52 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 9 9 + + Instances: 4 4 MN (4 pins) + 4 4 MP (4 pins) + ------ ------ + Total Inst: 8 8 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 6 6 0 0 + + Nets: 9 9 0 0 + + Instances: 4 4 0 0 MN(NSHORT) + 4 4 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 8 8 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 50 layout mos transistors were reduced to 6. + 44 mos transistors were deleted by parallel reduction. + 50 source mos transistors were reduced to 6. + 44 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.pex.spice b/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.pex.spice index a0f294d..e551519 100644 --- a/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.pex.spice +++ b/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__bufbuf_16.pex.spice -* Created: Thu Aug 27 19:00:50 2020 +* Created: Wed Sep 2 08:24:44 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.pxi.spice b/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.pxi.spice index 6256100..54129f0 100644 --- a/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.pxi.spice +++ b/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__bufbuf_16.pxi.spice -* Created: Thu Aug 27 19:00:50 2020 +* Created: Wed Sep 2 08:24:44 2020 * x_PM_SKY130_FD_SC_HDLL__BUFBUF_16%A N_A_c_222_n N_A_M1022_g N_A_c_223_n + N_A_M1037_g A PM_SKY130_FD_SC_HDLL__BUFBUF_16%A
diff --git a/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice b/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice index 2f3e958..7cfbb7e 100644 --- a/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice +++ b/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__bufbuf_16.spice -* Created: Thu Aug 27 19:00:50 2020 +* Created: Wed Sep 2 08:24:44 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.lvs.report b/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.lvs.report new file mode 100644 index 0000000..25477d8 --- /dev/null +++ b/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.lvs.report
@@ -0,0 +1,503 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__bufbuf_8.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__bufbuf_8.sp ('sky130_fd_sc_hdll__bufbuf_8') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.spice ('sky130_fd_sc_hdll__bufbuf_8') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:24:48 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__bufbuf_8 sky130_fd_sc_hdll__bufbuf_8 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__bufbuf_8 +SOURCE CELL NAME: sky130_fd_sc_hdll__bufbuf_8 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 11 9 * + + Instances: 13 13 MN (4 pins) + 13 13 MP (4 pins) + 1 0 * Dpar (2 pins) + 2 0 * Probe (2 pins) + ------ ------ + Total Inst: 29 26 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 9 9 + + Instances: 4 4 MN (4 pins) + 4 4 MP (4 pins) + ------ ------ + Total Inst: 8 8 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 6 6 0 0 + + Nets: 9 9 0 0 + + Instances: 4 4 0 0 MN(NSHORT) + 4 4 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 8 8 0 0 + + +o Statistics: + + 3 layout instances were filtered and their pins removed from adjoining nets. + + 22 layout mos transistors were reduced to 4. + 18 mos transistors were deleted by parallel reduction. + 22 source mos transistors were reduced to 4. + 18 mos transistors were deleted by parallel reduction. + + 2 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.pex.spice b/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.pex.spice index c9fff41..13e3986 100644 --- a/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.pex.spice +++ b/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__bufbuf_8.pex.spice -* Created: Thu Aug 27 19:00:58 2020 +* Created: Wed Sep 2 08:24:51 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.pxi.spice b/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.pxi.spice index 72ef642..f683629 100644 --- a/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.pxi.spice +++ b/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__bufbuf_8.pxi.spice -* Created: Thu Aug 27 19:00:58 2020 +* Created: Wed Sep 2 08:24:51 2020 * x_PM_SKY130_FD_SC_HDLL__BUFBUF_8%A N_A_c_129_n N_A_M1010_g N_A_M1018_g A + PM_SKY130_FD_SC_HDLL__BUFBUF_8%A
diff --git a/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.spice b/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.spice index e8bc48e..7a08106 100644 --- a/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.spice +++ b/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__bufbuf_8.spice -* Created: Thu Aug 27 19:00:58 2020 +* Created: Wed Sep 2 08:24:51 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.lvs.report b/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.lvs.report new file mode 100644 index 0000000..ed97781 --- /dev/null +++ b/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.lvs.report
@@ -0,0 +1,527 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 87 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 89 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 91 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 93 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 95 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 97 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 99 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 101 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 103 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 105 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 107 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 109 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 111 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 113 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 115 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 117 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__bufinv_16.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__bufinv_16.sp ('sky130_fd_sc_hdll__bufinv_16') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice ('sky130_fd_sc_hdll__bufinv_16') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:24:55 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__bufinv_16 sky130_fd_sc_hdll__bufinv_16 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__bufinv_16 +SOURCE CELL NAME: sky130_fd_sc_hdll__bufinv_16 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 10 8 * + + Instances: 25 25 MN (4 pins) + 25 25 MP (4 pins) + 1 0 * Dpar (2 pins) + 2 0 * Probe (2 pins) + ------ ------ + Total Inst: 53 50 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 8 8 + + Instances: 3 3 MN (4 pins) + 3 3 MP (4 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 6 6 0 0 + + Nets: 8 8 0 0 + + Instances: 3 3 0 0 MN(NSHORT) + 3 3 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 3 layout instances were filtered and their pins removed from adjoining nets. + + 50 layout mos transistors were reduced to 6. + 44 mos transistors were deleted by parallel reduction. + 50 source mos transistors were reduced to 6. + 44 mos transistors were deleted by parallel reduction. + + 2 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.pex.spice b/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.pex.spice index 265c552..8038062 100644 --- a/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.pex.spice +++ b/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__bufinv_16.pex.spice -* Created: Thu Aug 27 19:01:07 2020 +* Created: Wed Sep 2 08:24:58 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.pxi.spice b/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.pxi.spice index d00c433..2409229 100644 --- a/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.pxi.spice +++ b/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__bufinv_16.pxi.spice -* Created: Thu Aug 27 19:01:07 2020 +* Created: Wed Sep 2 08:24:58 2020 * x_PM_SKY130_FD_SC_HDLL__BUFINV_16%A N_A_M1014_g N_A_c_211_n N_A_M1001_g + N_A_M1042_g N_A_c_212_n N_A_M1019_g N_A_c_213_n N_A_M1041_g N_A_M1049_g A
diff --git a/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice b/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice index b511ef2..3858857 100644 --- a/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice +++ b/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__bufinv_16.spice -* Created: Thu Aug 27 19:01:07 2020 +* Created: Wed Sep 2 08:24:58 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.lvs.report b/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.lvs.report new file mode 100644 index 0000000..3f07968 --- /dev/null +++ b/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.lvs.report
@@ -0,0 +1,498 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__bufinv_8.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__bufinv_8.sp ('sky130_fd_sc_hdll__bufinv_8') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.spice ('sky130_fd_sc_hdll__bufinv_8') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:25:02 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__bufinv_8 sky130_fd_sc_hdll__bufinv_8 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__bufinv_8 +SOURCE CELL NAME: sky130_fd_sc_hdll__bufinv_8 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 8 8 + + Instances: 12 12 MN (4 pins) + 12 12 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 25 24 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 8 8 + + Instances: 3 3 MN (4 pins) + 3 3 MP (4 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 6 6 0 0 + + Nets: 8 8 0 0 + + Instances: 3 3 0 0 MN(NSHORT) + 3 3 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 22 layout mos transistors were reduced to 4. + 18 mos transistors were deleted by parallel reduction. + 22 source mos transistors were reduced to 4. + 18 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.pex.spice b/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.pex.spice index 136d62a..72bd766 100644 --- a/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.pex.spice +++ b/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__bufinv_8.pex.spice -* Created: Thu Aug 27 19:01:14 2020 +* Created: Wed Sep 2 08:25:05 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.pxi.spice b/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.pxi.spice index 630075e..3db7b25 100644 --- a/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.pxi.spice +++ b/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__bufinv_8.pxi.spice -* Created: Thu Aug 27 19:01:14 2020 +* Created: Wed Sep 2 08:25:05 2020 * x_PM_SKY130_FD_SC_HDLL__BUFINV_8%A N_A_c_119_n N_A_M1009_g N_A_c_120_n + N_A_M1015_g A PM_SKY130_FD_SC_HDLL__BUFINV_8%A
diff --git a/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.spice b/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.spice index 3cade15..d9d9063 100644 --- a/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.spice +++ b/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__bufinv_8.spice -* Created: Thu Aug 27 19:01:14 2020 +* Created: Wed Sep 2 08:25:05 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_1.lvs.report b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_1.lvs.report new file mode 100644 index 0000000..567adaa --- /dev/null +++ b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_1.lvs.report
@@ -0,0 +1,506 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_1.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__clkbuf_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__clkbuf_1.sp ('sky130_fd_sc_hdll__clkbuf_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_1.spice ('sky130_fd_sc_hdll__clkbuf_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:25:23 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # # ##################### + # # # # + # # INCORRECT # + # # # # + # # ##################### + + + Error: Different numbers of nets. + Error: Connectivity errors. + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + INCORRECT sky130_fd_sc_hdll__clkbuf_1 sky130_fd_sc_hdll__clkbuf_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # # ##################### + # # # # + # # INCORRECT # + # # # # + # # ##################### + + + Error: Different numbers of nets (see below). + Error: Connectivity errors. + +LAYOUT CELL NAME: sky130_fd_sc_hdll__clkbuf_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__clkbuf_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 9 8 * + + Instances: 2 2 MN (4 pins) + 2 2 MP (4 pins) + 1 0 * Dpar (2 pins) + 2 0 * Probe (2 pins) + ------ ------ + Total Inst: 7 4 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 7 8 * + + Instances: 2 2 MN (4 pins) + 2 2 MP (4 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INCORRECT OBJECTS +************************************************************************************************************** + + +LEGEND: +------- + + ne = Naming Error (same layout name found in source + circuit, but object was matched otherwise). + + +************************************************************************************************************** + INCORRECT NETS + +DISC# LAYOUT NAME SOURCE NAME +************************************************************************************************************** + + 1 Net VNB VNB + w_233_n17# + --- 3 Connections On This Net --- --- 3 Connections On This Net --- + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 6 6 0 0 + + Nets: 7 8 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 1 passthrough source net was found. + + 3 layout instances were filtered and their pins removed from adjoining nets. + + 2 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A X VPWR VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_1.pex.spice b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_1.pex.spice index aaa7b04..ee75655 100644 --- a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_1.pex.spice +++ b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkbuf_1.pex.spice -* Created: Thu Aug 27 19:01:35 2020 +* Created: Wed Sep 2 08:25:26 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_1.pxi.spice b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_1.pxi.spice index 7599379..dd8c817 100644 --- a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_1.pxi.spice +++ b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkbuf_1.pxi.spice -* Created: Thu Aug 27 19:01:35 2020 +* Created: Wed Sep 2 08:25:26 2020 * x_PM_SKY130_FD_SC_HDLL__CLKBUF_1%A_75_212# N_A_75_212#_M1001_d + N_A_75_212#_M1002_d N_A_75_212#_c_33_n N_A_75_212#_M1000_g N_A_75_212#_M1003_g
diff --git a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_1.spice b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_1.spice index 1e76945..50c4c58 100644 --- a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_1.spice +++ b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkbuf_1.spice -* Created: Thu Aug 27 19:01:35 2020 +* Created: Wed Sep 2 08:25:26 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.lvs.report b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.lvs.report new file mode 100644 index 0000000..1f95c4d --- /dev/null +++ b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.lvs.report
@@ -0,0 +1,506 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.spice" +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__clkbuf_12.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__clkbuf_12.sp ('sky130_fd_sc_hdll__clkbuf_12') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.spice ('sky130_fd_sc_hdll__clkbuf_12') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:25:09 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__clkbuf_12 sky130_fd_sc_hdll__clkbuf_12 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__clkbuf_12 +SOURCE CELL NAME: sky130_fd_sc_hdll__clkbuf_12 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 7 7 + + Instances: 16 16 MN (4 pins) + 16 16 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 33 32 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 7 7 + + Instances: 2 2 MN (4 pins) + 2 2 MP (4 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 6 6 0 0 + + Nets: 7 7 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 32 layout mos transistors were reduced to 4. + 28 mos transistors were deleted by parallel reduction. + 32 source mos transistors were reduced to 4. + 28 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.pex.spice b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.pex.spice index e4cc33f..122aa63 100644 --- a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.pex.spice +++ b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkbuf_12.pex.spice -* Created: Thu Aug 27 19:01:21 2020 +* Created: Wed Sep 2 08:25:12 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.pxi.spice b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.pxi.spice index 3c86b4a..0932a98 100644 --- a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.pxi.spice +++ b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkbuf_12.pxi.spice -* Created: Thu Aug 27 19:01:21 2020 +* Created: Wed Sep 2 08:25:12 2020 * x_PM_SKY130_FD_SC_HDLL__CLKBUF_12%A N_A_c_137_n N_A_M1002_g N_A_M1009_g + N_A_M1022_g N_A_c_138_n N_A_M1013_g N_A_c_139_n N_A_M1019_g N_A_M1028_g
diff --git a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.spice b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.spice index 5aebfb4..0028e92 100644 --- a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.spice +++ b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkbuf_12.spice -* Created: Thu Aug 27 19:01:21 2020 +* Created: Wed Sep 2 08:25:12 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.lvs.report b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.lvs.report new file mode 100644 index 0000000..d94a59e --- /dev/null +++ b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.lvs.report
@@ -0,0 +1,514 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 87 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 89 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 91 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 93 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 95 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" +Warning: Duplicate parameter definition "MULT" at line 97 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__clkbuf_16.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__clkbuf_16.sp ('sky130_fd_sc_hdll__clkbuf_16') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice ('sky130_fd_sc_hdll__clkbuf_16') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:25:16 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__clkbuf_16 sky130_fd_sc_hdll__clkbuf_16 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__clkbuf_16 +SOURCE CELL NAME: sky130_fd_sc_hdll__clkbuf_16 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 7 7 + + Instances: 20 20 MN (4 pins) + 20 20 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 41 40 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 7 7 + + Instances: 2 2 MN (4 pins) + 2 2 MP (4 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 6 6 0 0 + + Nets: 7 7 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 40 layout mos transistors were reduced to 4. + 36 mos transistors were deleted by parallel reduction. + 40 source mos transistors were reduced to 4. + 36 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.pex.spice b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.pex.spice index 0610972..9c17749 100644 --- a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.pex.spice +++ b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkbuf_16.pex.spice -* Created: Thu Aug 27 19:01:28 2020 +* Created: Wed Sep 2 08:25:19 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.pxi.spice b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.pxi.spice index bd34b90..265d6bc 100644 --- a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.pxi.spice +++ b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkbuf_16.pxi.spice -* Created: Thu Aug 27 19:01:28 2020 +* Created: Wed Sep 2 08:25:19 2020 * x_PM_SKY130_FD_SC_HDLL__CLKBUF_16%A N_A_c_150_n N_A_M1013_g N_A_M1006_g + N_A_c_151_n N_A_M1014_g N_A_M1007_g N_A_c_152_n N_A_M1030_g N_A_M1011_g
diff --git a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice index 87ff486..8967c33 100644 --- a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice +++ b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkbuf_16.spice -* Created: Thu Aug 27 19:01:28 2020 +* Created: Wed Sep 2 08:25:19 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_2.lvs.report b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_2.lvs.report new file mode 100644 index 0000000..6e9b561 --- /dev/null +++ b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_2.lvs.report
@@ -0,0 +1,483 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_2.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__clkbuf_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__clkbuf_2.sp ('sky130_fd_sc_hdll__clkbuf_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_2.spice ('sky130_fd_sc_hdll__clkbuf_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:25:30 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__clkbuf_2 sky130_fd_sc_hdll__clkbuf_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__clkbuf_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__clkbuf_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 11 7 * + + Instances: 3 3 MN (4 pins) + 3 3 MP (4 pins) + 1 0 * Dpar (2 pins) + 4 0 * Probe (2 pins) + ------ ------ + Total Inst: 11 6 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 7 7 + + Instances: 2 2 MN (4 pins) + 2 2 MP (4 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 6 6 0 0 + + Nets: 7 7 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 5 layout instances were filtered and their pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + 4 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_2.pex.spice b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_2.pex.spice index f0e43db..500d2ca 100644 --- a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_2.pex.spice +++ b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkbuf_2.pex.spice -* Created: Thu Aug 27 19:01:42 2020 +* Created: Wed Sep 2 08:25:33 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_2.pxi.spice b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_2.pxi.spice index a027e22..61c7f60 100644 --- a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_2.pxi.spice +++ b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkbuf_2.pxi.spice -* Created: Thu Aug 27 19:01:42 2020 +* Created: Wed Sep 2 08:25:33 2020 * x_PM_SKY130_FD_SC_HDLL__CLKBUF_2%A N_A_c_40_n N_A_M1002_g N_A_M1000_g A A + PM_SKY130_FD_SC_HDLL__CLKBUF_2%A
diff --git a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_2.spice b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_2.spice index 3729798..6bc63d3 100644 --- a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_2.spice +++ b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkbuf_2.spice -* Created: Thu Aug 27 19:01:42 2020 +* Created: Wed Sep 2 08:25:33 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_4.lvs.report b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_4.lvs.report new file mode 100644 index 0000000..ad57818 --- /dev/null +++ b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_4.lvs.report
@@ -0,0 +1,484 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_4.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__clkbuf_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__clkbuf_4.sp ('sky130_fd_sc_hdll__clkbuf_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_4.spice ('sky130_fd_sc_hdll__clkbuf_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:25:37 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__clkbuf_4 sky130_fd_sc_hdll__clkbuf_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__clkbuf_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__clkbuf_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 7 7 + + Instances: 5 5 MN (4 pins) + 5 5 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 11 10 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 7 7 + + Instances: 2 2 MN (4 pins) + 2 2 MP (4 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 6 6 0 0 + + Nets: 7 7 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_4.pex.spice b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_4.pex.spice index 0147739..7c661b6 100644 --- a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_4.pex.spice +++ b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkbuf_4.pex.spice -* Created: Thu Aug 27 19:01:49 2020 +* Created: Wed Sep 2 08:25:40 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_4.pxi.spice b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_4.pxi.spice index e24e6cc..18795ad 100644 --- a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_4.pxi.spice +++ b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkbuf_4.pxi.spice -* Created: Thu Aug 27 19:01:49 2020 +* Created: Wed Sep 2 08:25:40 2020 * x_PM_SKY130_FD_SC_HDLL__CLKBUF_4%A N_A_c_61_n N_A_M1003_g N_A_M1000_g A A + PM_SKY130_FD_SC_HDLL__CLKBUF_4%A
diff --git a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_4.spice b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_4.spice index 655b505..e5af52a 100644 --- a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_4.spice +++ b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkbuf_4.spice -* Created: Thu Aug 27 19:01:49 2020 +* Created: Wed Sep 2 08:25:40 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_6.lvs.report b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_6.lvs.report new file mode 100644 index 0000000..f00af62 --- /dev/null +++ b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_6.lvs.report
@@ -0,0 +1,490 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_6.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_6.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_6.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_6.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_6.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_6.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_6.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_6.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_6.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_6.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_6.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_6.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_6.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_6.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_6.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_6.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_6.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__clkbuf_6.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__clkbuf_6.sp ('sky130_fd_sc_hdll__clkbuf_6') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_6.spice ('sky130_fd_sc_hdll__clkbuf_6') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:25:44 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__clkbuf_6 sky130_fd_sc_hdll__clkbuf_6 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__clkbuf_6 +SOURCE CELL NAME: sky130_fd_sc_hdll__clkbuf_6 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 7 7 + + Instances: 8 8 MN (4 pins) + 8 8 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 17 16 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 7 7 + + Instances: 2 2 MN (4 pins) + 2 2 MP (4 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 6 6 0 0 + + Nets: 7 7 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 16 layout mos transistors were reduced to 4. + 12 mos transistors were deleted by parallel reduction. + 16 source mos transistors were reduced to 4. + 12 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_6.pex.spice b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_6.pex.spice index d25d926..b1dabb3 100644 --- a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_6.pex.spice +++ b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_6.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkbuf_6.pex.spice -* Created: Thu Aug 27 19:01:57 2020 +* Created: Wed Sep 2 08:25:47 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_6.pxi.spice b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_6.pxi.spice index 0f17d79..a38d79f 100644 --- a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_6.pxi.spice +++ b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_6.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkbuf_6.pxi.spice -* Created: Thu Aug 27 19:01:57 2020 +* Created: Wed Sep 2 08:25:47 2020 * x_PM_SKY130_FD_SC_HDLL__CLKBUF_6%A N_A_c_70_n N_A_M1001_g N_A_M1004_g + N_A_M1010_g N_A_c_71_n N_A_M1006_g A A N_A_c_69_n
diff --git a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_6.spice b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_6.spice index b9a81b2..4f92b0d 100644 --- a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_6.spice +++ b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_6.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkbuf_6.spice -* Created: Thu Aug 27 19:01:57 2020 +* Created: Wed Sep 2 08:25:47 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.lvs.report b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.lvs.report new file mode 100644 index 0000000..a115dd0 --- /dev/null +++ b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.lvs.report
@@ -0,0 +1,494 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__clkbuf_8.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__clkbuf_8.sp ('sky130_fd_sc_hdll__clkbuf_8') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.spice ('sky130_fd_sc_hdll__clkbuf_8') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:25:51 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__clkbuf_8 sky130_fd_sc_hdll__clkbuf_8 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__clkbuf_8 +SOURCE CELL NAME: sky130_fd_sc_hdll__clkbuf_8 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 7 7 + + Instances: 10 10 MN (4 pins) + 10 10 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 21 20 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 7 7 + + Instances: 2 2 MN (4 pins) + 2 2 MP (4 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 6 6 0 0 + + Nets: 7 7 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 20 layout mos transistors were reduced to 4. + 16 mos transistors were deleted by parallel reduction. + 20 source mos transistors were reduced to 4. + 16 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.pex.spice b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.pex.spice index c5007ac..b4ae297 100644 --- a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.pex.spice +++ b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkbuf_8.pex.spice -* Created: Thu Aug 27 19:02:15 2020 +* Created: Wed Sep 2 08:25:54 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.pxi.spice b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.pxi.spice index 31f9174..ab8a729 100644 --- a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.pxi.spice +++ b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkbuf_8.pxi.spice -* Created: Thu Aug 27 19:02:15 2020 +* Created: Wed Sep 2 08:25:54 2020 * x_PM_SKY130_FD_SC_HDLL__CLKBUF_8%A N_A_c_87_n N_A_M1004_g N_A_M1001_g N_A_c_88_n + N_A_M1013_g N_A_M1002_g A A N_A_c_86_n PM_SKY130_FD_SC_HDLL__CLKBUF_8%A
diff --git a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.spice b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.spice index 6e0431e..1e6f940 100644 --- a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.spice +++ b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkbuf_8.spice -* Created: Thu Aug 27 19:02:15 2020 +* Created: Wed Sep 2 08:25:54 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/clkinv/sky130_fd_sc_hdll__clkinv_1.lvs.report b/cells/clkinv/sky130_fd_sc_hdll__clkinv_1.lvs.report new file mode 100644 index 0000000..8518611 --- /dev/null +++ b/cells/clkinv/sky130_fd_sc_hdll__clkinv_1.lvs.report
@@ -0,0 +1,480 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_1.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__clkinv_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__clkinv_1.sp ('sky130_fd_sc_hdll__clkinv_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_1.spice ('sky130_fd_sc_hdll__clkinv_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:26:12 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__clkinv_1 sky130_fd_sc_hdll__clkinv_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__clkinv_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__clkinv_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 8 6 * + + Instances: 1 1 MN (4 pins) + 2 2 MP (4 pins) + 1 0 * Dpar (2 pins) + 2 0 * Probe (2 pins) + ------ ------ + Total Inst: 6 3 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 6 6 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + ------ ------ + Total Inst: 2 2 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 6 6 0 0 + + Nets: 6 6 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 2 2 0 0 + + +o Statistics: + + 3 layout instances were filtered and their pins removed from adjoining nets. + + 2 layout mos transistors were reduced to 1. + 1 mos transistor was deleted by parallel reduction. + 2 source mos transistors were reduced to 1. + 1 mos transistor was deleted by parallel reduction. + + 2 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/clkinv/sky130_fd_sc_hdll__clkinv_1.pex.spice b/cells/clkinv/sky130_fd_sc_hdll__clkinv_1.pex.spice index 9129bb2..2bdbafa 100644 --- a/cells/clkinv/sky130_fd_sc_hdll__clkinv_1.pex.spice +++ b/cells/clkinv/sky130_fd_sc_hdll__clkinv_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkinv_1.pex.spice -* Created: Thu Aug 27 19:02:38 2020 +* Created: Wed Sep 2 08:26:15 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/clkinv/sky130_fd_sc_hdll__clkinv_1.pxi.spice b/cells/clkinv/sky130_fd_sc_hdll__clkinv_1.pxi.spice index 6fbd1e1..4480bb2 100644 --- a/cells/clkinv/sky130_fd_sc_hdll__clkinv_1.pxi.spice +++ b/cells/clkinv/sky130_fd_sc_hdll__clkinv_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkinv_1.pxi.spice -* Created: Thu Aug 27 19:02:38 2020 +* Created: Wed Sep 2 08:26:15 2020 * x_PM_SKY130_FD_SC_HDLL__CLKINV_1%A N_A_c_26_n N_A_M1001_g N_A_c_27_n N_A_M1002_g + N_A_M1000_g A A A N_A_c_25_n PM_SKY130_FD_SC_HDLL__CLKINV_1%A
diff --git a/cells/clkinv/sky130_fd_sc_hdll__clkinv_1.spice b/cells/clkinv/sky130_fd_sc_hdll__clkinv_1.spice index 4cfa273..3d1c78f 100644 --- a/cells/clkinv/sky130_fd_sc_hdll__clkinv_1.spice +++ b/cells/clkinv/sky130_fd_sc_hdll__clkinv_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkinv_1.spice -* Created: Thu Aug 27 19:02:38 2020 +* Created: Wed Sep 2 08:26:15 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.lvs.report b/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.lvs.report new file mode 100644 index 0000000..335e25f --- /dev/null +++ b/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.lvs.report
@@ -0,0 +1,504 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.spice" +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__clkinv_12.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__clkinv_12.sp ('sky130_fd_sc_hdll__clkinv_12') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.spice ('sky130_fd_sc_hdll__clkinv_12') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:25:58 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__clkinv_12 sky130_fd_sc_hdll__clkinv_12 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__clkinv_12 +SOURCE CELL NAME: sky130_fd_sc_hdll__clkinv_12 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 6 6 + + Instances: 12 12 MN (4 pins) + 18 18 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 31 30 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 6 6 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + ------ ------ + Total Inst: 2 2 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 6 6 0 0 + + Nets: 6 6 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 2 2 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 30 layout mos transistors were reduced to 2. + 28 mos transistors were deleted by parallel reduction. + 30 source mos transistors were reduced to 2. + 28 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.pex.spice b/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.pex.spice index f7bacd3..1999b4c 100644 --- a/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.pex.spice +++ b/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkinv_12.pex.spice -* Created: Thu Aug 27 19:02:23 2020 +* Created: Wed Sep 2 08:26:01 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.pxi.spice b/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.pxi.spice index 6780c47..66b1fe3 100644 --- a/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.pxi.spice +++ b/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkinv_12.pxi.spice -* Created: Thu Aug 27 19:02:23 2020 +* Created: Wed Sep 2 08:26:01 2020 * x_PM_SKY130_FD_SC_HDLL__CLKINV_12%A N_A_c_142_n N_A_M1000_g N_A_c_143_n + N_A_M1001_g N_A_c_144_n N_A_M1003_g N_A_c_145_n N_A_M1004_g N_A_M1002_g
diff --git a/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.spice b/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.spice index 40e49fe..f63cb41 100644 --- a/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.spice +++ b/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkinv_12.spice -* Created: Thu Aug 27 19:02:23 2020 +* Created: Wed Sep 2 08:26:01 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.lvs.report b/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.lvs.report new file mode 100644 index 0000000..fbac337 --- /dev/null +++ b/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.lvs.report
@@ -0,0 +1,517 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 87 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 89 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 91 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 93 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 95 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 97 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__clkinv_16.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__clkinv_16.sp ('sky130_fd_sc_hdll__clkinv_16') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice ('sky130_fd_sc_hdll__clkinv_16') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:26:05 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__clkinv_16 sky130_fd_sc_hdll__clkinv_16 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__clkinv_16 +SOURCE CELL NAME: sky130_fd_sc_hdll__clkinv_16 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 7 6 * + + Instances: 16 16 MN (4 pins) + 24 24 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 42 40 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 6 6 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + ------ ------ + Total Inst: 2 2 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 6 6 0 0 + + Nets: 6 6 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 2 2 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 40 layout mos transistors were reduced to 2. + 38 mos transistors were deleted by parallel reduction. + 40 source mos transistors were reduced to 2. + 38 mos transistors were deleted by parallel reduction. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.pex.spice b/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.pex.spice index c72afd1..bd7024d 100644 --- a/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.pex.spice +++ b/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkinv_16.pex.spice -* Created: Thu Aug 27 19:02:31 2020 +* Created: Wed Sep 2 08:26:08 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.pxi.spice b/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.pxi.spice index 4c8d848..4f3d23e 100644 --- a/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.pxi.spice +++ b/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkinv_16.pxi.spice -* Created: Thu Aug 27 19:02:31 2020 +* Created: Wed Sep 2 08:26:08 2020 * x_PM_SKY130_FD_SC_HDLL__CLKINV_16%A N_A_c_174_n N_A_M1001_g N_A_c_175_n + N_A_M1002_g N_A_c_176_n N_A_M1003_g N_A_c_177_n N_A_M1004_g N_A_M1000_g
diff --git a/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice b/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice index 876bda4..99fdd76 100644 --- a/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice +++ b/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkinv_16.spice -* Created: Thu Aug 27 19:02:31 2020 +* Created: Wed Sep 2 08:26:08 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/clkinv/sky130_fd_sc_hdll__clkinv_2.lvs.report b/cells/clkinv/sky130_fd_sc_hdll__clkinv_2.lvs.report new file mode 100644 index 0000000..e32e881 --- /dev/null +++ b/cells/clkinv/sky130_fd_sc_hdll__clkinv_2.lvs.report
@@ -0,0 +1,479 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_2.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__clkinv_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__clkinv_2.sp ('sky130_fd_sc_hdll__clkinv_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_2.spice ('sky130_fd_sc_hdll__clkinv_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:26:19 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__clkinv_2 sky130_fd_sc_hdll__clkinv_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__clkinv_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__clkinv_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 6 6 + + Instances: 2 2 MN (4 pins) + 3 3 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 6 5 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 6 6 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + ------ ------ + Total Inst: 2 2 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 6 6 0 0 + + Nets: 6 6 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 2 2 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 5 layout mos transistors were reduced to 2. + 3 mos transistors were deleted by parallel reduction. + 5 source mos transistors were reduced to 2. + 3 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A Y VPWR VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/clkinv/sky130_fd_sc_hdll__clkinv_2.pex.spice b/cells/clkinv/sky130_fd_sc_hdll__clkinv_2.pex.spice index cb5647e..fc0ef19 100644 --- a/cells/clkinv/sky130_fd_sc_hdll__clkinv_2.pex.spice +++ b/cells/clkinv/sky130_fd_sc_hdll__clkinv_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkinv_2.pex.spice -* Created: Thu Aug 27 19:02:46 2020 +* Created: Wed Sep 2 08:26:22 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/clkinv/sky130_fd_sc_hdll__clkinv_2.pxi.spice b/cells/clkinv/sky130_fd_sc_hdll__clkinv_2.pxi.spice index 7035a21..4a58c07 100644 --- a/cells/clkinv/sky130_fd_sc_hdll__clkinv_2.pxi.spice +++ b/cells/clkinv/sky130_fd_sc_hdll__clkinv_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkinv_2.pxi.spice -* Created: Thu Aug 27 19:02:46 2020 +* Created: Wed Sep 2 08:26:22 2020 * x_PM_SKY130_FD_SC_HDLL__CLKINV_2%A N_A_c_41_n N_A_M1001_g N_A_c_42_n N_A_M1002_g + N_A_M1000_g N_A_c_36_n N_A_c_37_n N_A_c_44_n N_A_M1004_g N_A_M1003_g
diff --git a/cells/clkinv/sky130_fd_sc_hdll__clkinv_2.spice b/cells/clkinv/sky130_fd_sc_hdll__clkinv_2.spice index 53fb764..d5a1bc7 100644 --- a/cells/clkinv/sky130_fd_sc_hdll__clkinv_2.spice +++ b/cells/clkinv/sky130_fd_sc_hdll__clkinv_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkinv_2.spice -* Created: Thu Aug 27 19:02:46 2020 +* Created: Wed Sep 2 08:26:22 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/clkinv/sky130_fd_sc_hdll__clkinv_4.lvs.report b/cells/clkinv/sky130_fd_sc_hdll__clkinv_4.lvs.report new file mode 100644 index 0000000..be96a05 --- /dev/null +++ b/cells/clkinv/sky130_fd_sc_hdll__clkinv_4.lvs.report
@@ -0,0 +1,487 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_4.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__clkinv_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__clkinv_4.sp ('sky130_fd_sc_hdll__clkinv_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_4.spice ('sky130_fd_sc_hdll__clkinv_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:26:26 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__clkinv_4 sky130_fd_sc_hdll__clkinv_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__clkinv_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__clkinv_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 10 6 * + + Instances: 4 4 MN (4 pins) + 6 6 MP (4 pins) + 1 0 * Dpar (2 pins) + 4 0 * Probe (2 pins) + ------ ------ + Total Inst: 15 10 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 6 6 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + ------ ------ + Total Inst: 2 2 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 6 6 0 0 + + Nets: 6 6 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 2 2 0 0 + + +o Statistics: + + 5 layout instances were filtered and their pins removed from adjoining nets. + + 10 layout mos transistors were reduced to 2. + 8 mos transistors were deleted by parallel reduction. + 10 source mos transistors were reduced to 2. + 8 mos transistors were deleted by parallel reduction. + + 4 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/clkinv/sky130_fd_sc_hdll__clkinv_4.pex.spice b/cells/clkinv/sky130_fd_sc_hdll__clkinv_4.pex.spice index 6cab2e6..ca9f9ee 100644 --- a/cells/clkinv/sky130_fd_sc_hdll__clkinv_4.pex.spice +++ b/cells/clkinv/sky130_fd_sc_hdll__clkinv_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkinv_4.pex.spice -* Created: Thu Aug 27 19:02:54 2020 +* Created: Wed Sep 2 08:26:29 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/clkinv/sky130_fd_sc_hdll__clkinv_4.pxi.spice b/cells/clkinv/sky130_fd_sc_hdll__clkinv_4.pxi.spice index b4cacf4..8b6a816 100644 --- a/cells/clkinv/sky130_fd_sc_hdll__clkinv_4.pxi.spice +++ b/cells/clkinv/sky130_fd_sc_hdll__clkinv_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkinv_4.pxi.spice -* Created: Thu Aug 27 19:02:54 2020 +* Created: Wed Sep 2 08:26:29 2020 * x_PM_SKY130_FD_SC_HDLL__CLKINV_4%A N_A_c_87_n N_A_M1000_g N_A_M1001_g N_A_c_88_n + N_A_M1003_g N_A_c_74_n N_A_M1002_g N_A_c_89_n N_A_M1004_g N_A_c_76_n
diff --git a/cells/clkinv/sky130_fd_sc_hdll__clkinv_4.spice b/cells/clkinv/sky130_fd_sc_hdll__clkinv_4.spice index 042120b..ce399b5 100644 --- a/cells/clkinv/sky130_fd_sc_hdll__clkinv_4.spice +++ b/cells/clkinv/sky130_fd_sc_hdll__clkinv_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkinv_4.spice -* Created: Thu Aug 27 19:02:54 2020 +* Created: Wed Sep 2 08:26:29 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.lvs.report b/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.lvs.report new file mode 100644 index 0000000..7ea2fe3 --- /dev/null +++ b/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.lvs.report
@@ -0,0 +1,497 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__clkinv_8.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__clkinv_8.sp ('sky130_fd_sc_hdll__clkinv_8') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.spice ('sky130_fd_sc_hdll__clkinv_8') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:26:33 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__clkinv_8 sky130_fd_sc_hdll__clkinv_8 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__clkinv_8 +SOURCE CELL NAME: sky130_fd_sc_hdll__clkinv_8 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 11 6 * + + Instances: 8 8 MN (4 pins) + 12 12 MP (4 pins) + 1 0 * Dpar (2 pins) + 5 0 * Probe (2 pins) + ------ ------ + Total Inst: 26 20 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 6 6 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + ------ ------ + Total Inst: 2 2 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 6 6 0 0 + + Nets: 6 6 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 2 2 0 0 + + +o Statistics: + + 6 layout instances were filtered and their pins removed from adjoining nets. + + 20 layout mos transistors were reduced to 2. + 18 mos transistors were deleted by parallel reduction. + 20 source mos transistors were reduced to 2. + 18 mos transistors were deleted by parallel reduction. + + 5 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.pex.spice b/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.pex.spice index ce4a9bf..7a3b643 100644 --- a/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.pex.spice +++ b/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkinv_8.pex.spice -* Created: Thu Aug 27 19:03:02 2020 +* Created: Wed Sep 2 08:26:36 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.pxi.spice b/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.pxi.spice index 91bc8e4..07ca806 100644 --- a/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.pxi.spice +++ b/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkinv_8.pxi.spice -* Created: Thu Aug 27 19:03:02 2020 +* Created: Wed Sep 2 08:26:36 2020 * x_PM_SKY130_FD_SC_HDLL__CLKINV_8%A N_A_c_101_n N_A_M1001_g N_A_c_102_n + N_A_M1002_g N_A_c_103_n N_A_M1003_g N_A_M1000_g N_A_c_104_n N_A_M1006_g
diff --git a/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.spice b/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.spice index 7c6b1d6..750536f 100644 --- a/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.spice +++ b/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkinv_8.spice -* Created: Thu Aug 27 19:03:02 2020 +* Created: Wed Sep 2 08:26:36 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_2.lvs.report b/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_2.lvs.report new file mode 100644 index 0000000..5680418 --- /dev/null +++ b/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_2.lvs.report
@@ -0,0 +1,478 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_2.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__clkinvlp_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__clkinvlp_2.sp ('sky130_fd_sc_hdll__clkinvlp_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_2.spice ('sky130_fd_sc_hdll__clkinvlp_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:26:40 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__clkinvlp_2 sky130_fd_sc_hdll__clkinvlp_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__clkinvlp_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__clkinvlp_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 7 7 + + Instances: 2 2 MN (4 pins) + 2 2 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 5 4 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 6 6 + + Instances: 1 1 MP (4 pins) + 1 1 SMN2 (4 pins) + ------ ------ + Total Inst: 2 2 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 6 6 0 0 + + Nets: 6 6 0 0 + + Instances: 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + ------- ------- --------- --------- + Total Inst: 2 2 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 2 layout mos transistors were reduced to 1. + 1 mos transistor was deleted by parallel reduction. + 2 source mos transistors were reduced to 1. + 1 mos transistor was deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_2.pex.spice b/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_2.pex.spice index 73b31c1..96541c1 100644 --- a/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_2.pex.spice +++ b/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkinvlp_2.pex.spice -* Created: Thu Aug 27 19:03:10 2020 +* Created: Wed Sep 2 08:26:43 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_2.pxi.spice b/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_2.pxi.spice index be17bc8..5e3dbe3 100644 --- a/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_2.pxi.spice +++ b/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkinvlp_2.pxi.spice -* Created: Thu Aug 27 19:03:10 2020 +* Created: Wed Sep 2 08:26:43 2020 * x_PM_SKY130_FD_SC_HDLL__CLKINVLP_2%A N_A_M1001_g N_A_c_27_n N_A_M1002_g + N_A_c_28_n N_A_M1003_g N_A_c_30_n N_A_M1000_g N_A_c_31_n A A N_A_c_32_n
diff --git a/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_2.spice b/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_2.spice index 86544b5..9319173 100644 --- a/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_2.spice +++ b/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkinvlp_2.spice -* Created: Thu Aug 27 19:03:10 2020 +* Created: Wed Sep 2 08:26:43 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_4.lvs.report b/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_4.lvs.report new file mode 100644 index 0000000..57538de --- /dev/null +++ b/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_4.lvs.report
@@ -0,0 +1,484 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_4.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__clkinvlp_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__clkinvlp_4.sp ('sky130_fd_sc_hdll__clkinvlp_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_4.spice ('sky130_fd_sc_hdll__clkinvlp_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:26:47 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__clkinvlp_4 sky130_fd_sc_hdll__clkinvlp_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__clkinvlp_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__clkinvlp_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 8 8 + + Instances: 4 4 MN (4 pins) + 4 4 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 9 8 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 6 6 + + Instances: 1 1 MP (4 pins) + 1 1 SMN2 (4 pins) + ------ ------ + Total Inst: 2 2 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 6 6 0 0 + + Nets: 6 6 0 0 + + Instances: 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + ------- ------- --------- --------- + Total Inst: 2 2 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 3. 1 connecting net was deleted. + 3 mos transistors were deleted by parallel reduction. + 2 mos transistors and 1 connecting net were deleted by split-gate reduction. + 8 source mos transistors were reduced to 3. 1 connecting net was deleted. + 3 mos transistors were deleted by parallel reduction. + 2 mos transistors and 1 connecting net were deleted by split-gate reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_4.pex.spice b/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_4.pex.spice index 867e5b7..46c867a 100644 --- a/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_4.pex.spice +++ b/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkinvlp_4.pex.spice -* Created: Thu Aug 27 19:03:16 2020 +* Created: Wed Sep 2 08:26:50 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_4.pxi.spice b/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_4.pxi.spice index 8e8979a..baab22f 100644 --- a/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_4.pxi.spice +++ b/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkinvlp_4.pxi.spice -* Created: Thu Aug 27 19:03:16 2020 +* Created: Wed Sep 2 08:26:50 2020 * x_PM_SKY130_FD_SC_HDLL__CLKINVLP_4%A N_A_M1000_g N_A_M1003_g N_A_M1001_g + N_A_M1002_g N_A_M1005_g N_A_M1006_g N_A_M1004_g N_A_M1007_g A A N_A_c_36_n
diff --git a/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_4.spice b/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_4.spice index 592760f..1aefb0c 100644 --- a/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_4.spice +++ b/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkinvlp_4.spice -* Created: Thu Aug 27 19:03:16 2020 +* Created: Wed Sep 2 08:26:50 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_1.lvs.report b/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_1.lvs.report new file mode 100644 index 0000000..d145e11 --- /dev/null +++ b/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_1.lvs.report
@@ -0,0 +1,485 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_1.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__clkmux2_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__clkmux2_1.sp ('sky130_fd_sc_hdll__clkmux2_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_1.spice ('sky130_fd_sc_hdll__clkmux2_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:26:54 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__clkmux2_1 sky130_fd_sc_hdll__clkmux2_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__clkmux2_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__clkmux2_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 14 14 + + Instances: 6 6 MN (4 pins) + 6 6 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 13 12 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 10 10 + + Instances: 2 2 MN (4 pins) + 2 2 MP (4 pins) + 2 2 SMN2 (4 pins) + 2 2 SMP2 (4 pins) + ------ ------ + Total Inst: 8 8 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 10 10 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + 2 2 0 0 SMN2 + 2 2 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 8 8 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB S A1 A0 X VPWR VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_1.pex.spice b/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_1.pex.spice index eba89da..8984f1f 100644 --- a/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_1.pex.spice +++ b/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkmux2_1.pex.spice -* Created: Thu Aug 27 19:03:23 2020 +* Created: Wed Sep 2 08:26:57 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_1.pxi.spice b/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_1.pxi.spice index a2bf4e3..db8cad0 100644 --- a/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_1.pxi.spice +++ b/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkmux2_1.pxi.spice -* Created: Thu Aug 27 19:03:23 2020 +* Created: Wed Sep 2 08:26:57 2020 * x_PM_SKY130_FD_SC_HDLL__CLKMUX2_1%A_79_21# N_A_79_21#_M1002_d N_A_79_21#_M1009_d + N_A_79_21#_M1011_g N_A_79_21#_c_72_n N_A_79_21#_M1003_g N_A_79_21#_c_73_n
diff --git a/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_1.spice b/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_1.spice index 436fdc5..cd7555e 100644 --- a/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_1.spice +++ b/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkmux2_1.spice -* Created: Thu Aug 27 19:03:23 2020 +* Created: Wed Sep 2 08:26:57 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_2.lvs.report b/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_2.lvs.report new file mode 100644 index 0000000..bb9729d --- /dev/null +++ b/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_2.lvs.report
@@ -0,0 +1,492 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_2.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__clkmux2_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__clkmux2_2.sp ('sky130_fd_sc_hdll__clkmux2_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_2.spice ('sky130_fd_sc_hdll__clkmux2_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:27:01 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__clkmux2_2 sky130_fd_sc_hdll__clkmux2_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__clkmux2_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__clkmux2_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 14 14 + + Instances: 7 7 MN (4 pins) + 7 7 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 15 14 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 10 10 + + Instances: 2 2 MN (4 pins) + 2 2 MP (4 pins) + 2 2 SMN2 (4 pins) + 2 2 SMP2 (4 pins) + ------ ------ + Total Inst: 8 8 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 10 10 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + 2 2 0 0 SMN2 + 2 2 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 8 8 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB S A1 A0 VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_2.pex.spice b/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_2.pex.spice index db2ed82..cc0ce3b 100644 --- a/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_2.pex.spice +++ b/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkmux2_2.pex.spice -* Created: Thu Aug 27 19:03:30 2020 +* Created: Wed Sep 2 08:27:04 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_2.pxi.spice b/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_2.pxi.spice index e1ee5d3..58c61c4 100644 --- a/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_2.pxi.spice +++ b/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkmux2_2.pxi.spice -* Created: Thu Aug 27 19:03:30 2020 +* Created: Wed Sep 2 08:27:04 2020 * x_PM_SKY130_FD_SC_HDLL__CLKMUX2_2%A_79_199# N_A_79_199#_M1013_d + N_A_79_199#_M1011_d N_A_79_199#_c_83_n N_A_79_199#_M1000_g N_A_79_199#_M1003_g
diff --git a/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_2.spice b/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_2.spice index 14380c1..23a0578 100644 --- a/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_2.spice +++ b/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkmux2_2.spice -* Created: Thu Aug 27 19:03:30 2020 +* Created: Wed Sep 2 08:27:04 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_4.lvs.report b/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_4.lvs.report new file mode 100644 index 0000000..3528daa --- /dev/null +++ b/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_4.lvs.report
@@ -0,0 +1,496 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_4.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__clkmux2_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__clkmux2_4.sp ('sky130_fd_sc_hdll__clkmux2_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_4.spice ('sky130_fd_sc_hdll__clkmux2_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:27:08 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__clkmux2_4 sky130_fd_sc_hdll__clkmux2_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__clkmux2_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__clkmux2_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 14 14 + + Instances: 9 9 MN (4 pins) + 9 9 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 19 18 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 10 10 + + Instances: 2 2 MN (4 pins) + 2 2 MP (4 pins) + 2 2 SMN2 (4 pins) + 2 2 SMP2 (4 pins) + ------ ------ + Total Inst: 8 8 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 10 10 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + 2 2 0 0 SMN2 + 2 2 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 8 8 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB S A1 A0 VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_4.pex.spice b/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_4.pex.spice index 9d7e3c2..529bc14 100644 --- a/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_4.pex.spice +++ b/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkmux2_4.pex.spice -* Created: Thu Aug 27 19:03:37 2020 +* Created: Wed Sep 2 08:27:11 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_4.pxi.spice b/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_4.pxi.spice index a35a591..58312ea 100644 --- a/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_4.pxi.spice +++ b/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkmux2_4.pxi.spice -* Created: Thu Aug 27 19:03:37 2020 +* Created: Wed Sep 2 08:27:11 2020 * x_PM_SKY130_FD_SC_HDLL__CLKMUX2_4%A_79_199# N_A_79_199#_M1005_d + N_A_79_199#_M1013_d N_A_79_199#_c_97_n N_A_79_199#_M1000_g N_A_79_199#_M1003_g
diff --git a/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_4.spice b/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_4.spice index 7c59064..5c97a5e 100644 --- a/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_4.spice +++ b/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__clkmux2_4.spice -* Created: Thu Aug 27 19:03:37 2020 +* Created: Wed Sep 2 08:27:11 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/conb/sky130_fd_sc_hdll__conb_1.lvs.report b/cells/conb/sky130_fd_sc_hdll__conb_1.lvs.report new file mode 100644 index 0000000..6f989af --- /dev/null +++ b/cells/conb/sky130_fd_sc_hdll__conb_1.lvs.report
@@ -0,0 +1,478 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/conb/sky130_fd_sc_hdll__conb_1.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/conb/sky130_fd_sc_hdll__conb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 20 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/conb/sky130_fd_sc_hdll__conb_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__conb_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__conb_1.sp ('sky130_fd_sc_hdll__conb_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/conb/sky130_fd_sc_hdll__conb_1.spice ('sky130_fd_sc_hdll__conb_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:27:15 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__conb_1 sky130_fd_sc_hdll__conb_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__conb_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__conb_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 6 6 + + Instances: 2 2 R (2 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 3 2 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 6 6 + + Instances: 2 2 R (2 pins) + ------ ------ + Total Inst: 2 2 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 6 6 0 0 + + Nets: 6 6 0 0 + + Instances: 2 2 0 0 R(SHORT) + ------- ------- --------- --------- + Total Inst: 2 2 0 0 + + +o Statistics: + + 2 passthrough layout nets were found. + 2 passthrough source nets were found. + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Passthrough Layout Nets And Their Ports: + + (Layout nets which are connected only to ports). + + VPB (port: VPB), VNB (port: VNB), + + +o Initial Correspondence Points: + + Ports: VNB VPB HI VPWR VGND LO + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/conb/sky130_fd_sc_hdll__conb_1.pex.spice b/cells/conb/sky130_fd_sc_hdll__conb_1.pex.spice index 47fbf6a..70bb47d 100644 --- a/cells/conb/sky130_fd_sc_hdll__conb_1.pex.spice +++ b/cells/conb/sky130_fd_sc_hdll__conb_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__conb_1.pex.spice -* Created: Thu Aug 27 19:03:43 2020 +* Created: Wed Sep 2 08:27:18 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/conb/sky130_fd_sc_hdll__conb_1.pxi.spice b/cells/conb/sky130_fd_sc_hdll__conb_1.pxi.spice index cef2c84..9d164c5 100644 --- a/cells/conb/sky130_fd_sc_hdll__conb_1.pxi.spice +++ b/cells/conb/sky130_fd_sc_hdll__conb_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__conb_1.pxi.spice -* Created: Thu Aug 27 19:03:43 2020 +* Created: Wed Sep 2 08:27:18 2020 * x_PM_SKY130_FD_SC_HDLL__CONB_1%HI HI N_HI_R1_pos N_HI_c_21_n N_HI_c_22_n + PM_SKY130_FD_SC_HDLL__CONB_1%HI
diff --git a/cells/conb/sky130_fd_sc_hdll__conb_1.spice b/cells/conb/sky130_fd_sc_hdll__conb_1.spice index a2b722f..adf4ee8 100644 --- a/cells/conb/sky130_fd_sc_hdll__conb_1.spice +++ b/cells/conb/sky130_fd_sc_hdll__conb_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__conb_1.spice -* Created: Thu Aug 27 19:03:43 2020 +* Created: Wed Sep 2 08:27:18 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/decap/sky130_fd_sc_hdll__decap_12.lvs.report b/cells/decap/sky130_fd_sc_hdll__decap_12.lvs.report new file mode 100644 index 0000000..f7815ed --- /dev/null +++ b/cells/decap/sky130_fd_sc_hdll__decap_12.lvs.report
@@ -0,0 +1,471 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/decap/sky130_fd_sc_hdll__decap_12.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------ + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/decap/sky130_fd_sc_hdll__decap_12.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/decap/sky130_fd_sc_hdll__decap_12.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__decap_12.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__decap_12.sp ('sky130_fd_sc_hdll__decap_12') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/decap/sky130_fd_sc_hdll__decap_12.spice ('sky130_fd_sc_hdll__decap_12') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:27:22 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__decap_12 sky130_fd_sc_hdll__decap_12 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__decap_12 +SOURCE CELL NAME: sky130_fd_sc_hdll__decap_12 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 4 4 + + Nets: 4 4 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 3 2 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 4 4 + + Nets: 4 4 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + ------ ------ + Total Inst: 2 2 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 4 4 0 0 + + Nets: 4 4 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 2 2 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB VGND VPWR + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/decap/sky130_fd_sc_hdll__decap_12.pex.spice b/cells/decap/sky130_fd_sc_hdll__decap_12.pex.spice index 5026d3f..f43f5a8 100644 --- a/cells/decap/sky130_fd_sc_hdll__decap_12.pex.spice +++ b/cells/decap/sky130_fd_sc_hdll__decap_12.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__decap_12.pex.spice -* Created: Thu Aug 27 19:03:50 2020 +* Created: Wed Sep 2 08:27:25 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/decap/sky130_fd_sc_hdll__decap_12.pxi.spice b/cells/decap/sky130_fd_sc_hdll__decap_12.pxi.spice index 5062f03..413b02f 100644 --- a/cells/decap/sky130_fd_sc_hdll__decap_12.pxi.spice +++ b/cells/decap/sky130_fd_sc_hdll__decap_12.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__decap_12.pxi.spice -* Created: Thu Aug 27 19:03:50 2020 +* Created: Wed Sep 2 08:27:25 2020 * x_PM_SKY130_FD_SC_HDLL__DECAP_12%VGND N_VGND_M1001_s N_VGND_M1000_g + N_VGND_c_18_n N_VGND_c_19_n VGND N_VGND_c_20_n N_VGND_c_21_n N_VGND_c_22_n
diff --git a/cells/decap/sky130_fd_sc_hdll__decap_12.spice b/cells/decap/sky130_fd_sc_hdll__decap_12.spice index 074bae1..1dea2ea 100644 --- a/cells/decap/sky130_fd_sc_hdll__decap_12.spice +++ b/cells/decap/sky130_fd_sc_hdll__decap_12.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__decap_12.spice -* Created: Thu Aug 27 19:03:50 2020 +* Created: Wed Sep 2 08:27:25 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/decap/sky130_fd_sc_hdll__decap_3.lvs.report b/cells/decap/sky130_fd_sc_hdll__decap_3.lvs.report new file mode 100644 index 0000000..9b785a2 --- /dev/null +++ b/cells/decap/sky130_fd_sc_hdll__decap_3.lvs.report
@@ -0,0 +1,471 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/decap/sky130_fd_sc_hdll__decap_3.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/decap/sky130_fd_sc_hdll__decap_3.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/decap/sky130_fd_sc_hdll__decap_3.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__decap_3.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__decap_3.sp ('sky130_fd_sc_hdll__decap_3') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/decap/sky130_fd_sc_hdll__decap_3.spice ('sky130_fd_sc_hdll__decap_3') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:27:29 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__decap_3 sky130_fd_sc_hdll__decap_3 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__decap_3 +SOURCE CELL NAME: sky130_fd_sc_hdll__decap_3 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 4 4 + + Nets: 4 4 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 3 2 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 4 4 + + Nets: 4 4 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + ------ ------ + Total Inst: 2 2 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 4 4 0 0 + + Nets: 4 4 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 2 2 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB VGND VPWR + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/decap/sky130_fd_sc_hdll__decap_3.pex.spice b/cells/decap/sky130_fd_sc_hdll__decap_3.pex.spice index 4a75fd3..dc3526b 100644 --- a/cells/decap/sky130_fd_sc_hdll__decap_3.pex.spice +++ b/cells/decap/sky130_fd_sc_hdll__decap_3.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__decap_3.pex.spice -* Created: Thu Aug 27 19:03:57 2020 +* Created: Wed Sep 2 08:27:32 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/decap/sky130_fd_sc_hdll__decap_3.pxi.spice b/cells/decap/sky130_fd_sc_hdll__decap_3.pxi.spice index 80a5f2d..348302a 100644 --- a/cells/decap/sky130_fd_sc_hdll__decap_3.pxi.spice +++ b/cells/decap/sky130_fd_sc_hdll__decap_3.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__decap_3.pxi.spice -* Created: Thu Aug 27 19:03:57 2020 +* Created: Wed Sep 2 08:27:32 2020 * x_PM_SKY130_FD_SC_HDLL__DECAP_3%VGND N_VGND_M1001_s N_VGND_c_13_n N_VGND_M1000_g + N_VGND_c_14_n VGND N_VGND_c_15_n N_VGND_c_16_n
diff --git a/cells/decap/sky130_fd_sc_hdll__decap_3.spice b/cells/decap/sky130_fd_sc_hdll__decap_3.spice index 837f67f..c91a6d0 100644 --- a/cells/decap/sky130_fd_sc_hdll__decap_3.spice +++ b/cells/decap/sky130_fd_sc_hdll__decap_3.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__decap_3.spice -* Created: Thu Aug 27 19:03:57 2020 +* Created: Wed Sep 2 08:27:32 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/decap/sky130_fd_sc_hdll__decap_4.lvs.report b/cells/decap/sky130_fd_sc_hdll__decap_4.lvs.report new file mode 100644 index 0000000..cc62fcd --- /dev/null +++ b/cells/decap/sky130_fd_sc_hdll__decap_4.lvs.report
@@ -0,0 +1,471 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/decap/sky130_fd_sc_hdll__decap_4.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/decap/sky130_fd_sc_hdll__decap_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/decap/sky130_fd_sc_hdll__decap_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__decap_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__decap_4.sp ('sky130_fd_sc_hdll__decap_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/decap/sky130_fd_sc_hdll__decap_4.spice ('sky130_fd_sc_hdll__decap_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:27:36 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__decap_4 sky130_fd_sc_hdll__decap_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__decap_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__decap_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 4 4 + + Nets: 4 4 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 3 2 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 4 4 + + Nets: 4 4 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + ------ ------ + Total Inst: 2 2 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 4 4 0 0 + + Nets: 4 4 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 2 2 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB VGND VPWR + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/decap/sky130_fd_sc_hdll__decap_4.pex.spice b/cells/decap/sky130_fd_sc_hdll__decap_4.pex.spice index 0690704..2a1f91b 100644 --- a/cells/decap/sky130_fd_sc_hdll__decap_4.pex.spice +++ b/cells/decap/sky130_fd_sc_hdll__decap_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__decap_4.pex.spice -* Created: Thu Aug 27 19:04:04 2020 +* Created: Wed Sep 2 08:27:39 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/decap/sky130_fd_sc_hdll__decap_4.pxi.spice b/cells/decap/sky130_fd_sc_hdll__decap_4.pxi.spice index d1fafeb..b1f7f06 100644 --- a/cells/decap/sky130_fd_sc_hdll__decap_4.pxi.spice +++ b/cells/decap/sky130_fd_sc_hdll__decap_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__decap_4.pxi.spice -* Created: Thu Aug 27 19:04:04 2020 +* Created: Wed Sep 2 08:27:39 2020 * x_PM_SKY130_FD_SC_HDLL__DECAP_4%VGND N_VGND_M1001_s VGND N_VGND_c_11_n + N_VGND_M1000_g N_VGND_c_12_n N_VGND_c_13_n PM_SKY130_FD_SC_HDLL__DECAP_4%VGND
diff --git a/cells/decap/sky130_fd_sc_hdll__decap_4.spice b/cells/decap/sky130_fd_sc_hdll__decap_4.spice index 7ce3ad5..bf01c64 100644 --- a/cells/decap/sky130_fd_sc_hdll__decap_4.spice +++ b/cells/decap/sky130_fd_sc_hdll__decap_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__decap_4.spice -* Created: Thu Aug 27 19:04:04 2020 +* Created: Wed Sep 2 08:27:39 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/decap/sky130_fd_sc_hdll__decap_6.lvs.report b/cells/decap/sky130_fd_sc_hdll__decap_6.lvs.report new file mode 100644 index 0000000..72166dc --- /dev/null +++ b/cells/decap/sky130_fd_sc_hdll__decap_6.lvs.report
@@ -0,0 +1,471 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/decap/sky130_fd_sc_hdll__decap_6.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/decap/sky130_fd_sc_hdll__decap_6.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/decap/sky130_fd_sc_hdll__decap_6.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__decap_6.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__decap_6.sp ('sky130_fd_sc_hdll__decap_6') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/decap/sky130_fd_sc_hdll__decap_6.spice ('sky130_fd_sc_hdll__decap_6') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:27:43 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__decap_6 sky130_fd_sc_hdll__decap_6 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__decap_6 +SOURCE CELL NAME: sky130_fd_sc_hdll__decap_6 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 4 4 + + Nets: 4 4 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 3 2 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 4 4 + + Nets: 4 4 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + ------ ------ + Total Inst: 2 2 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 4 4 0 0 + + Nets: 4 4 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 2 2 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB VGND VPWR + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/decap/sky130_fd_sc_hdll__decap_6.pex.spice b/cells/decap/sky130_fd_sc_hdll__decap_6.pex.spice index 6967bea..ef12379 100644 --- a/cells/decap/sky130_fd_sc_hdll__decap_6.pex.spice +++ b/cells/decap/sky130_fd_sc_hdll__decap_6.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__decap_6.pex.spice -* Created: Thu Aug 27 19:04:10 2020 +* Created: Wed Sep 2 08:27:46 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/decap/sky130_fd_sc_hdll__decap_6.pxi.spice b/cells/decap/sky130_fd_sc_hdll__decap_6.pxi.spice index d122fda..3345681 100644 --- a/cells/decap/sky130_fd_sc_hdll__decap_6.pxi.spice +++ b/cells/decap/sky130_fd_sc_hdll__decap_6.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__decap_6.pxi.spice -* Created: Thu Aug 27 19:04:10 2020 +* Created: Wed Sep 2 08:27:46 2020 * x_PM_SKY130_FD_SC_HDLL__DECAP_6%VGND N_VGND_M1001_s N_VGND_c_16_n VGND + N_VGND_c_17_n N_VGND_M1000_g N_VGND_c_18_n N_VGND_c_19_n N_VGND_c_20_n
diff --git a/cells/decap/sky130_fd_sc_hdll__decap_6.spice b/cells/decap/sky130_fd_sc_hdll__decap_6.spice index 05ce6e7..75a7bb9 100644 --- a/cells/decap/sky130_fd_sc_hdll__decap_6.spice +++ b/cells/decap/sky130_fd_sc_hdll__decap_6.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__decap_6.spice -* Created: Thu Aug 27 19:04:10 2020 +* Created: Wed Sep 2 08:27:46 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/decap/sky130_fd_sc_hdll__decap_8.lvs.report b/cells/decap/sky130_fd_sc_hdll__decap_8.lvs.report new file mode 100644 index 0000000..3686e65 --- /dev/null +++ b/cells/decap/sky130_fd_sc_hdll__decap_8.lvs.report
@@ -0,0 +1,471 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/decap/sky130_fd_sc_hdll__decap_8.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/decap/sky130_fd_sc_hdll__decap_8.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/decap/sky130_fd_sc_hdll__decap_8.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__decap_8.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__decap_8.sp ('sky130_fd_sc_hdll__decap_8') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/decap/sky130_fd_sc_hdll__decap_8.spice ('sky130_fd_sc_hdll__decap_8') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:27:50 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__decap_8 sky130_fd_sc_hdll__decap_8 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__decap_8 +SOURCE CELL NAME: sky130_fd_sc_hdll__decap_8 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 4 4 + + Nets: 4 4 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 3 2 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 4 4 + + Nets: 4 4 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + ------ ------ + Total Inst: 2 2 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 4 4 0 0 + + Nets: 4 4 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 2 2 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB VGND VPWR + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/decap/sky130_fd_sc_hdll__decap_8.pex.spice b/cells/decap/sky130_fd_sc_hdll__decap_8.pex.spice index ffcbb62..2c5cb65 100644 --- a/cells/decap/sky130_fd_sc_hdll__decap_8.pex.spice +++ b/cells/decap/sky130_fd_sc_hdll__decap_8.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__decap_8.pex.spice -* Created: Thu Aug 27 19:04:17 2020 +* Created: Wed Sep 2 08:27:53 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/decap/sky130_fd_sc_hdll__decap_8.pxi.spice b/cells/decap/sky130_fd_sc_hdll__decap_8.pxi.spice index 9cccb6e..f07fad9 100644 --- a/cells/decap/sky130_fd_sc_hdll__decap_8.pxi.spice +++ b/cells/decap/sky130_fd_sc_hdll__decap_8.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__decap_8.pxi.spice -* Created: Thu Aug 27 19:04:17 2020 +* Created: Wed Sep 2 08:27:53 2020 * x_PM_SKY130_FD_SC_HDLL__DECAP_8%VGND N_VGND_M1001_s N_VGND_M1000_g N_VGND_c_16_n + N_VGND_c_17_n VGND N_VGND_c_18_n N_VGND_c_19_n N_VGND_c_20_n
diff --git a/cells/decap/sky130_fd_sc_hdll__decap_8.spice b/cells/decap/sky130_fd_sc_hdll__decap_8.spice index fca0aac..d10c907 100644 --- a/cells/decap/sky130_fd_sc_hdll__decap_8.spice +++ b/cells/decap/sky130_fd_sc_hdll__decap_8.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__decap_8.spice -* Created: Thu Aug 27 19:04:17 2020 +* Created: Wed Sep 2 08:27:53 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.lvs.report b/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.lvs.report new file mode 100644 index 0000000..0d9ffdc --- /dev/null +++ b/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.lvs.report
@@ -0,0 +1,505 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__dfrtp_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__dfrtp_1.sp ('sky130_fd_sc_hdll__dfrtp_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.spice ('sky130_fd_sc_hdll__dfrtp_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:27:57 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__dfrtp_1 sky130_fd_sc_hdll__dfrtp_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__dfrtp_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__dfrtp_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 21 21 + + Instances: 14 14 MN (4 pins) + 14 14 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 29 28 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 15 15 + + Instances: 7 7 MN (4 pins) + 9 9 MP (4 pins) + 2 2 SMN2 (4 pins) + 1 1 SMN3 (5 pins) + 1 1 SMP2 (4 pins) + 1 1 SPMP_2_1 (5 pins) + ------ ------ + Total Inst: 21 21 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 15 15 0 0 + + Instances: 7 7 0 0 MN(NSHORT) + 9 9 0 0 MP(PHIGHVT) + 2 2 0 0 SMN2 + 1 1 0 0 SMN3 + 1 1 0 0 SMP2 + 1 1 0 0 SPMP_2_1 + ------- ------- --------- --------- + Total Inst: 21 21 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB CLK D RESET_B VPWR Q VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.pex.spice b/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.pex.spice index 93ee169..fb46072 100644 --- a/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.pex.spice +++ b/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dfrtp_1.pex.spice -* Created: Thu Aug 27 19:04:24 2020 +* Created: Wed Sep 2 08:28:00 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.pxi.spice b/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.pxi.spice index 6c9cc07..c810710 100644 --- a/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.pxi.spice +++ b/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dfrtp_1.pxi.spice -* Created: Thu Aug 27 19:04:24 2020 +* Created: Wed Sep 2 08:28:00 2020 * x_PM_SKY130_FD_SC_HDLL__DFRTP_1%CLK N_CLK_c_187_n N_CLK_c_191_n N_CLK_c_192_n + N_CLK_M1006_g N_CLK_c_188_n N_CLK_M1023_g CLK CLK
diff --git a/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.spice b/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.spice index 8ff8041..79045b6 100644 --- a/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.spice +++ b/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dfrtp_1.spice -* Created: Thu Aug 27 19:04:24 2020 +* Created: Wed Sep 2 08:28:00 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.lvs.report b/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.lvs.report new file mode 100644 index 0000000..147dc47 --- /dev/null +++ b/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.lvs.report
@@ -0,0 +1,512 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__dfrtp_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__dfrtp_2.sp ('sky130_fd_sc_hdll__dfrtp_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.spice ('sky130_fd_sc_hdll__dfrtp_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:28:04 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__dfrtp_2 sky130_fd_sc_hdll__dfrtp_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__dfrtp_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__dfrtp_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 21 21 + + Instances: 15 15 MN (4 pins) + 15 15 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 31 30 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 15 15 + + Instances: 7 7 MN (4 pins) + 9 9 MP (4 pins) + 2 2 SMN2 (4 pins) + 1 1 SMN3 (5 pins) + 1 1 SMP2 (4 pins) + 1 1 SPMP_2_1 (5 pins) + ------ ------ + Total Inst: 21 21 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 15 15 0 0 + + Instances: 7 7 0 0 MN(NSHORT) + 9 9 0 0 MP(PHIGHVT) + 2 2 0 0 SMN2 + 1 1 0 0 SMN3 + 1 1 0 0 SMP2 + 1 1 0 0 SPMP_2_1 + ------- ------- --------- --------- + Total Inst: 21 21 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB CLK D RESET_B VPWR Q VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.pex.spice b/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.pex.spice index 3625da8..6f06a5f 100644 --- a/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.pex.spice +++ b/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dfrtp_2.pex.spice -* Created: Thu Aug 27 19:04:31 2020 +* Created: Wed Sep 2 08:28:07 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.pxi.spice b/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.pxi.spice index 2f7e40b..f8dc8d9 100644 --- a/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.pxi.spice +++ b/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dfrtp_2.pxi.spice -* Created: Thu Aug 27 19:04:31 2020 +* Created: Wed Sep 2 08:28:07 2020 * x_PM_SKY130_FD_SC_HDLL__DFRTP_2%CLK N_CLK_c_195_n N_CLK_c_199_n N_CLK_c_200_n + N_CLK_M1006_g N_CLK_c_196_n N_CLK_M1024_g CLK CLK
diff --git a/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.spice b/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.spice index 80fb9df..fab62d1 100644 --- a/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.spice +++ b/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dfrtp_2.spice -* Created: Thu Aug 27 19:04:31 2020 +* Created: Wed Sep 2 08:28:07 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.lvs.report b/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.lvs.report new file mode 100644 index 0000000..862a0da --- /dev/null +++ b/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.lvs.report
@@ -0,0 +1,516 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__dfrtp_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__dfrtp_4.sp ('sky130_fd_sc_hdll__dfrtp_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.spice ('sky130_fd_sc_hdll__dfrtp_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:28:11 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__dfrtp_4 sky130_fd_sc_hdll__dfrtp_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__dfrtp_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__dfrtp_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 21 21 + + Instances: 17 17 MN (4 pins) + 17 17 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 35 34 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 15 15 + + Instances: 7 7 MN (4 pins) + 9 9 MP (4 pins) + 2 2 SMN2 (4 pins) + 1 1 SMN3 (5 pins) + 1 1 SMP2 (4 pins) + 1 1 SPMP_2_1 (5 pins) + ------ ------ + Total Inst: 21 21 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 15 15 0 0 + + Instances: 7 7 0 0 MN(NSHORT) + 9 9 0 0 MP(PHIGHVT) + 2 2 0 0 SMN2 + 1 1 0 0 SMN3 + 1 1 0 0 SMP2 + 1 1 0 0 SPMP_2_1 + ------- ------- --------- --------- + Total Inst: 21 21 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB CLK D RESET_B VPWR Q VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.pex.spice b/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.pex.spice index 4b7c671..b7aaa32 100644 --- a/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.pex.spice +++ b/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dfrtp_4.pex.spice -* Created: Thu Aug 27 19:04:38 2020 +* Created: Wed Sep 2 08:28:14 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.pxi.spice b/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.pxi.spice index 9364a28..602411f 100644 --- a/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.pxi.spice +++ b/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dfrtp_4.pxi.spice -* Created: Thu Aug 27 19:04:38 2020 +* Created: Wed Sep 2 08:28:14 2020 * x_PM_SKY130_FD_SC_HDLL__DFRTP_4%CLK N_CLK_c_218_n N_CLK_c_222_n N_CLK_c_223_n + N_CLK_M1004_g N_CLK_c_219_n N_CLK_M1021_g CLK CLK
diff --git a/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.spice b/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.spice index cf7c486..b0cf208 100644 --- a/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.spice +++ b/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dfrtp_4.spice -* Created: Thu Aug 27 19:04:38 2020 +* Created: Wed Sep 2 08:28:14 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.lvs.report b/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.lvs.report new file mode 100644 index 0000000..406f73d --- /dev/null +++ b/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.lvs.report
@@ -0,0 +1,507 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__dfstp_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__dfstp_1.sp ('sky130_fd_sc_hdll__dfstp_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.spice ('sky130_fd_sc_hdll__dfstp_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:28:18 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__dfstp_1 sky130_fd_sc_hdll__dfstp_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__dfstp_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__dfstp_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 24 24 + + Instances: 16 16 MN (4 pins) + 16 16 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 33 32 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 16 16 + + Instances: 7 7 MN (4 pins) + 10 10 MP (4 pins) + 3 3 SMN2 (4 pins) + 1 1 SMN3 (5 pins) + 3 3 SMP2 (4 pins) + ------ ------ + Total Inst: 24 24 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 16 16 0 0 + + Instances: 7 7 0 0 MN(NSHORT) + 10 10 0 0 MP(PHIGHVT) + 3 3 0 0 SMN2 + 1 1 0 0 SMN3 + 3 3 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 24 24 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB CLK D SET_B VPWR Q VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.pex.spice b/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.pex.spice index e9d7e19..3236a75 100644 --- a/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.pex.spice +++ b/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dfstp_1.pex.spice -* Created: Thu Aug 27 19:04:44 2020 +* Created: Wed Sep 2 08:28:22 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.pxi.spice b/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.pxi.spice index 0ea1b37..5645b3d 100644 --- a/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.pxi.spice +++ b/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dfstp_1.pxi.spice -* Created: Thu Aug 27 19:04:44 2020 +* Created: Wed Sep 2 08:28:22 2020 * x_PM_SKY130_FD_SC_HDLL__DFSTP_1%CLK N_CLK_c_213_n N_CLK_c_214_n N_CLK_M1006_g + N_CLK_c_208_n N_CLK_M1020_g N_CLK_c_209_n CLK CLK N_CLK_c_211_n N_CLK_c_212_n
diff --git a/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.spice b/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.spice index ca820c5..6e54d33 100644 --- a/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.spice +++ b/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dfstp_1.spice -* Created: Thu Aug 27 19:04:44 2020 +* Created: Wed Sep 2 08:28:22 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.lvs.report b/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.lvs.report new file mode 100644 index 0000000..216ff0c --- /dev/null +++ b/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.lvs.report
@@ -0,0 +1,514 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__dfstp_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__dfstp_2.sp ('sky130_fd_sc_hdll__dfstp_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.spice ('sky130_fd_sc_hdll__dfstp_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:28:25 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__dfstp_2 sky130_fd_sc_hdll__dfstp_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__dfstp_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__dfstp_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 24 24 + + Instances: 17 17 MN (4 pins) + 17 17 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 35 34 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 16 16 + + Instances: 7 7 MN (4 pins) + 10 10 MP (4 pins) + 3 3 SMN2 (4 pins) + 1 1 SMN3 (5 pins) + 3 3 SMP2 (4 pins) + ------ ------ + Total Inst: 24 24 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 16 16 0 0 + + Instances: 7 7 0 0 MN(NSHORT) + 10 10 0 0 MP(PHIGHVT) + 3 3 0 0 SMN2 + 1 1 0 0 SMN3 + 3 3 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 24 24 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB CLK D SET_B VPWR Q VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.pex.spice b/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.pex.spice index 2e187c1..633215f 100644 --- a/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.pex.spice +++ b/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dfstp_2.pex.spice -* Created: Thu Aug 27 19:04:51 2020 +* Created: Wed Sep 2 08:28:29 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.pxi.spice b/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.pxi.spice index a7bb06f..3ffc060 100644 --- a/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.pxi.spice +++ b/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dfstp_2.pxi.spice -* Created: Thu Aug 27 19:04:51 2020 +* Created: Wed Sep 2 08:28:29 2020 * x_PM_SKY130_FD_SC_HDLL__DFSTP_2%CLK N_CLK_c_217_n N_CLK_c_218_n N_CLK_M1006_g + N_CLK_c_212_n N_CLK_M1020_g N_CLK_c_213_n CLK CLK N_CLK_c_215_n N_CLK_c_216_n
diff --git a/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.spice b/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.spice index 7df0505..b451fa0 100644 --- a/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.spice +++ b/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dfstp_2.spice -* Created: Thu Aug 27 19:04:51 2020 +* Created: Wed Sep 2 08:28:29 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.lvs.report b/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.lvs.report new file mode 100644 index 0000000..a1e59a1 --- /dev/null +++ b/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.lvs.report
@@ -0,0 +1,520 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 87 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 89 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 91 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 93 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 95 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 97 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__dfstp_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__dfstp_4.sp ('sky130_fd_sc_hdll__dfstp_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice ('sky130_fd_sc_hdll__dfstp_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:28:32 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__dfstp_4 sky130_fd_sc_hdll__dfstp_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__dfstp_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__dfstp_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 24 24 + + Instances: 20 20 MN (4 pins) + 20 20 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 41 40 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 16 16 + + Instances: 7 7 MN (4 pins) + 10 10 MP (4 pins) + 3 3 SMN2 (4 pins) + 1 1 SMN3 (5 pins) + 3 3 SMP2 (4 pins) + ------ ------ + Total Inst: 24 24 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 16 16 0 0 + + Instances: 7 7 0 0 MN(NSHORT) + 10 10 0 0 MP(PHIGHVT) + 3 3 0 0 SMN2 + 1 1 0 0 SMN3 + 3 3 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 24 24 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 10 layout mos transistors were reduced to 2. + 8 mos transistors were deleted by parallel reduction. + 10 source mos transistors were reduced to 2. + 8 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB CLK D SET_B VPWR Q VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.pex.spice b/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.pex.spice index 85a2e62..df1575f 100644 --- a/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.pex.spice +++ b/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dfstp_4.pex.spice -* Created: Thu Aug 27 19:04:58 2020 +* Created: Wed Sep 2 08:28:36 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.pxi.spice b/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.pxi.spice index 2dea5cd..4b78850 100644 --- a/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.pxi.spice +++ b/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dfstp_4.pxi.spice -* Created: Thu Aug 27 19:04:58 2020 +* Created: Wed Sep 2 08:28:36 2020 * x_PM_SKY130_FD_SC_HDLL__DFSTP_4%CLK N_CLK_c_239_n N_CLK_c_240_n N_CLK_M1007_g + N_CLK_c_234_n N_CLK_M1025_g N_CLK_c_235_n CLK CLK N_CLK_c_237_n N_CLK_c_238_n
diff --git a/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice b/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice index 8213507..6ae5c91 100644 --- a/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice +++ b/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dfstp_4.spice -* Created: Thu Aug 27 19:04:58 2020 +* Created: Wed Sep 2 08:28:36 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/diode/sky130_fd_sc_hdll__diode_2.lvs.report b/cells/diode/sky130_fd_sc_hdll__diode_2.lvs.report new file mode 100644 index 0000000..52b17b9 --- /dev/null +++ b/cells/diode/sky130_fd_sc_hdll__diode_2.lvs.report
@@ -0,0 +1,497 @@ + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__diode_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__diode_2.sp ('sky130_fd_sc_hdll__diode_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/diode/sky130_fd_sc_hdll__diode_2.spice ('sky130_fd_sc_hdll__diode_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:28:40 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # # ##################### + # # # # + # # INCORRECT # + # # # # + # # ##################### + + + Error: Different numbers of instances. + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + INCORRECT sky130_fd_sc_hdll__diode_2 sky130_fd_sc_hdll__diode_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # # ##################### + # # # # + # # INCORRECT # + # # # # + # # ##################### + + + Error: Different numbers of instances (see below). + +LAYOUT CELL NAME: sky130_fd_sc_hdll__diode_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__diode_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 5 5 + + Nets: 5 5 + + Instances: 0 1 * D (2 pins): p n + 1 0 * D (2 pins): p n + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 2 1 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 5 5 + + Nets: 5 5 + + Instances: 1 0 * D (2 pins): p n + ------ ------ + Total Inst: 1 0 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INCORRECT OBJECTS +************************************************************************************************************** + + +LEGEND: +------- + + ne = Naming Error (same layout name found in source + circuit, but object was matched otherwise). + + +************************************************************************************************************** + INCORRECT INSTANCES + +DISC# LAYOUT NAME SOURCE NAME +************************************************************************************************************** + + 1 D0(0.155,0.195) D(NDIODE) ** missing instance ** + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 5 5 0 0 + + Nets: 5 5 0 0 + + Instances: 0 0 1 0 D(NDIODE) + ------- ------- --------- --------- + Total Inst: 0 0 1 0 + + +o Statistics: + + 3 passthrough layout nets were found. + 5 passthrough source nets were found. + + 1 layout instance was filtered and its pins removed from adjoining nets. + 1 source instance was filtered and its pins removed from adjoining nets. + + +o Passthrough Layout Nets And Their Ports: + + (Layout nets which are connected only to ports). + + VPWR (port: VPWR), VGND (port: VGND), VPB (port: VPB), + + +o Initial Correspondence Points: + + Ports: VNB VPB DIODE VGND VPWR + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/diode/sky130_fd_sc_hdll__diode_2.pex.spice b/cells/diode/sky130_fd_sc_hdll__diode_2.pex.spice index a3bbbec..33ea994 100644 --- a/cells/diode/sky130_fd_sc_hdll__diode_2.pex.spice +++ b/cells/diode/sky130_fd_sc_hdll__diode_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__diode_2.pex.spice -* Created: Thu Aug 27 19:05:05 2020 +* Created: Wed Sep 2 08:28:43 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/diode/sky130_fd_sc_hdll__diode_2.pxi.spice b/cells/diode/sky130_fd_sc_hdll__diode_2.pxi.spice index b9e8421..1354745 100644 --- a/cells/diode/sky130_fd_sc_hdll__diode_2.pxi.spice +++ b/cells/diode/sky130_fd_sc_hdll__diode_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__diode_2.pxi.spice -* Created: Thu Aug 27 19:05:05 2020 +* Created: Wed Sep 2 08:28:43 2020 * x_PM_SKY130_FD_SC_HDLL__DIODE_2%DIODE N_DIODE_D0_noxref_neg DIODE DIODE DIODE + DIODE DIODE DIODE N_DIODE_c_6_n PM_SKY130_FD_SC_HDLL__DIODE_2%DIODE
diff --git a/cells/diode/sky130_fd_sc_hdll__diode_2.spice b/cells/diode/sky130_fd_sc_hdll__diode_2.spice index 238f027..ef10174 100644 --- a/cells/diode/sky130_fd_sc_hdll__diode_2.spice +++ b/cells/diode/sky130_fd_sc_hdll__diode_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__diode_2.spice -* Created: Thu Aug 27 19:05:05 2020 +* Created: Wed Sep 2 08:28:43 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/diode/sky130_fd_sc_hdll__diode_4.lvs.report b/cells/diode/sky130_fd_sc_hdll__diode_4.lvs.report new file mode 100644 index 0000000..4c4e574 --- /dev/null +++ b/cells/diode/sky130_fd_sc_hdll__diode_4.lvs.report
@@ -0,0 +1,497 @@ + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__diode_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__diode_4.sp ('sky130_fd_sc_hdll__diode_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/diode/sky130_fd_sc_hdll__diode_4.spice ('sky130_fd_sc_hdll__diode_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:28:47 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # # ##################### + # # # # + # # INCORRECT # + # # # # + # # ##################### + + + Error: Different numbers of instances. + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + INCORRECT sky130_fd_sc_hdll__diode_4 sky130_fd_sc_hdll__diode_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # # ##################### + # # # # + # # INCORRECT # + # # # # + # # ##################### + + + Error: Different numbers of instances (see below). + +LAYOUT CELL NAME: sky130_fd_sc_hdll__diode_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__diode_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 5 5 + + Nets: 5 5 + + Instances: 0 1 * D (2 pins): p n + 1 0 * D (2 pins): p n + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 2 1 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 5 5 + + Nets: 5 5 + + Instances: 1 0 * D (2 pins): p n + ------ ------ + Total Inst: 1 0 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INCORRECT OBJECTS +************************************************************************************************************** + + +LEGEND: +------- + + ne = Naming Error (same layout name found in source + circuit, but object was matched otherwise). + + +************************************************************************************************************** + INCORRECT INSTANCES + +DISC# LAYOUT NAME SOURCE NAME +************************************************************************************************************** + + 1 D0(0.155,0.195) D(NDIODE) ** missing instance ** + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 5 5 0 0 + + Nets: 5 5 0 0 + + Instances: 0 0 1 0 D(NDIODE) + ------- ------- --------- --------- + Total Inst: 0 0 1 0 + + +o Statistics: + + 3 passthrough layout nets were found. + 5 passthrough source nets were found. + + 1 layout instance was filtered and its pins removed from adjoining nets. + 1 source instance was filtered and its pins removed from adjoining nets. + + +o Passthrough Layout Nets And Their Ports: + + (Layout nets which are connected only to ports). + + VPWR (port: VPWR), VGND (port: VGND), VPB (port: VPB), + + +o Initial Correspondence Points: + + Ports: VNB VPB DIODE VGND VPWR + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/diode/sky130_fd_sc_hdll__diode_4.pex.spice b/cells/diode/sky130_fd_sc_hdll__diode_4.pex.spice index b06ec28..d68e865 100644 --- a/cells/diode/sky130_fd_sc_hdll__diode_4.pex.spice +++ b/cells/diode/sky130_fd_sc_hdll__diode_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__diode_4.pex.spice -* Created: Thu Aug 27 19:05:12 2020 +* Created: Wed Sep 2 08:28:50 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/diode/sky130_fd_sc_hdll__diode_4.pxi.spice b/cells/diode/sky130_fd_sc_hdll__diode_4.pxi.spice index 3ccd83a..67642a1 100644 --- a/cells/diode/sky130_fd_sc_hdll__diode_4.pxi.spice +++ b/cells/diode/sky130_fd_sc_hdll__diode_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__diode_4.pxi.spice -* Created: Thu Aug 27 19:05:12 2020 +* Created: Wed Sep 2 08:28:50 2020 * x_PM_SKY130_FD_SC_HDLL__DIODE_4%DIODE N_DIODE_D0_noxref_neg DIODE DIODE DIODE + DIODE DIODE DIODE N_DIODE_c_8_n PM_SKY130_FD_SC_HDLL__DIODE_4%DIODE
diff --git a/cells/diode/sky130_fd_sc_hdll__diode_4.spice b/cells/diode/sky130_fd_sc_hdll__diode_4.spice index bc1b313..a6b599c 100644 --- a/cells/diode/sky130_fd_sc_hdll__diode_4.spice +++ b/cells/diode/sky130_fd_sc_hdll__diode_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__diode_4.spice -* Created: Thu Aug 27 19:05:12 2020 +* Created: Wed Sep 2 08:28:50 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/diode/sky130_fd_sc_hdll__diode_6.lvs.report b/cells/diode/sky130_fd_sc_hdll__diode_6.lvs.report new file mode 100644 index 0000000..b8fa6da --- /dev/null +++ b/cells/diode/sky130_fd_sc_hdll__diode_6.lvs.report
@@ -0,0 +1,497 @@ + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__diode_6.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__diode_6.sp ('sky130_fd_sc_hdll__diode_6') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/diode/sky130_fd_sc_hdll__diode_6.spice ('sky130_fd_sc_hdll__diode_6') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:28:54 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # # ##################### + # # # # + # # INCORRECT # + # # # # + # # ##################### + + + Error: Different numbers of instances. + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + INCORRECT sky130_fd_sc_hdll__diode_6 sky130_fd_sc_hdll__diode_6 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # # ##################### + # # # # + # # INCORRECT # + # # # # + # # ##################### + + + Error: Different numbers of instances (see below). + +LAYOUT CELL NAME: sky130_fd_sc_hdll__diode_6 +SOURCE CELL NAME: sky130_fd_sc_hdll__diode_6 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 5 5 + + Nets: 5 5 + + Instances: 0 1 * D (2 pins): p n + 1 0 * D (2 pins): p n + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 2 1 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 5 5 + + Nets: 5 5 + + Instances: 1 0 * D (2 pins): p n + ------ ------ + Total Inst: 1 0 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INCORRECT OBJECTS +************************************************************************************************************** + + +LEGEND: +------- + + ne = Naming Error (same layout name found in source + circuit, but object was matched otherwise). + + +************************************************************************************************************** + INCORRECT INSTANCES + +DISC# LAYOUT NAME SOURCE NAME +************************************************************************************************************** + + 1 D0(0.135,0.195) D(NDIODE) ** missing instance ** + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 5 5 0 0 + + Nets: 5 5 0 0 + + Instances: 0 0 1 0 D(NDIODE) + ------- ------- --------- --------- + Total Inst: 0 0 1 0 + + +o Statistics: + + 3 passthrough layout nets were found. + 5 passthrough source nets were found. + + 1 layout instance was filtered and its pins removed from adjoining nets. + 1 source instance was filtered and its pins removed from adjoining nets. + + +o Passthrough Layout Nets And Their Ports: + + (Layout nets which are connected only to ports). + + VPWR (port: VPWR), VGND (port: VGND), VPB (port: VPB), + + +o Initial Correspondence Points: + + Ports: VNB VPB DIODE VGND VPWR + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/diode/sky130_fd_sc_hdll__diode_6.pex.spice b/cells/diode/sky130_fd_sc_hdll__diode_6.pex.spice index 5d062b1..94fe535 100644 --- a/cells/diode/sky130_fd_sc_hdll__diode_6.pex.spice +++ b/cells/diode/sky130_fd_sc_hdll__diode_6.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__diode_6.pex.spice -* Created: Thu Aug 27 19:05:18 2020 +* Created: Wed Sep 2 08:28:57 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/diode/sky130_fd_sc_hdll__diode_6.pxi.spice b/cells/diode/sky130_fd_sc_hdll__diode_6.pxi.spice index 22d0bf2..f94a484 100644 --- a/cells/diode/sky130_fd_sc_hdll__diode_6.pxi.spice +++ b/cells/diode/sky130_fd_sc_hdll__diode_6.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__diode_6.pxi.spice -* Created: Thu Aug 27 19:05:18 2020 +* Created: Wed Sep 2 08:28:57 2020 * x_PM_SKY130_FD_SC_HDLL__DIODE_6%DIODE N_DIODE_D0_noxref_neg DIODE DIODE + N_DIODE_c_8_n PM_SKY130_FD_SC_HDLL__DIODE_6%DIODE
diff --git a/cells/diode/sky130_fd_sc_hdll__diode_6.spice b/cells/diode/sky130_fd_sc_hdll__diode_6.spice index 9732f54..821929b 100644 --- a/cells/diode/sky130_fd_sc_hdll__diode_6.spice +++ b/cells/diode/sky130_fd_sc_hdll__diode_6.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__diode_6.spice -* Created: Thu Aug 27 19:05:18 2020 +* Created: Wed Sep 2 08:28:57 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/diode/sky130_fd_sc_hdll__diode_8.lvs.report b/cells/diode/sky130_fd_sc_hdll__diode_8.lvs.report new file mode 100644 index 0000000..c0dfece --- /dev/null +++ b/cells/diode/sky130_fd_sc_hdll__diode_8.lvs.report
@@ -0,0 +1,497 @@ + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__diode_8.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__diode_8.sp ('sky130_fd_sc_hdll__diode_8') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/diode/sky130_fd_sc_hdll__diode_8.spice ('sky130_fd_sc_hdll__diode_8') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:29:00 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # # ##################### + # # # # + # # INCORRECT # + # # # # + # # ##################### + + + Error: Different numbers of instances. + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + INCORRECT sky130_fd_sc_hdll__diode_8 sky130_fd_sc_hdll__diode_8 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # # ##################### + # # # # + # # INCORRECT # + # # # # + # # ##################### + + + Error: Different numbers of instances (see below). + +LAYOUT CELL NAME: sky130_fd_sc_hdll__diode_8 +SOURCE CELL NAME: sky130_fd_sc_hdll__diode_8 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 5 5 + + Nets: 5 5 + + Instances: 0 1 * D (2 pins): p n + 1 0 * D (2 pins): p n + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 2 1 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 5 5 + + Nets: 5 5 + + Instances: 1 0 * D (2 pins): p n + ------ ------ + Total Inst: 1 0 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INCORRECT OBJECTS +************************************************************************************************************** + + +LEGEND: +------- + + ne = Naming Error (same layout name found in source + circuit, but object was matched otherwise). + + +************************************************************************************************************** + INCORRECT INSTANCES + +DISC# LAYOUT NAME SOURCE NAME +************************************************************************************************************** + + 1 D0(0.135,0.195) D(NDIODE) ** missing instance ** + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 5 5 0 0 + + Nets: 5 5 0 0 + + Instances: 0 0 1 0 D(NDIODE) + ------- ------- --------- --------- + Total Inst: 0 0 1 0 + + +o Statistics: + + 3 passthrough layout nets were found. + 5 passthrough source nets were found. + + 1 layout instance was filtered and its pins removed from adjoining nets. + 1 source instance was filtered and its pins removed from adjoining nets. + + +o Passthrough Layout Nets And Their Ports: + + (Layout nets which are connected only to ports). + + VPWR (port: VPWR), VGND (port: VGND), VPB (port: VPB), + + +o Initial Correspondence Points: + + Ports: VNB VPB DIODE VGND VPWR + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/diode/sky130_fd_sc_hdll__diode_8.pex.spice b/cells/diode/sky130_fd_sc_hdll__diode_8.pex.spice index 7fc5d11..0e2dca9 100644 --- a/cells/diode/sky130_fd_sc_hdll__diode_8.pex.spice +++ b/cells/diode/sky130_fd_sc_hdll__diode_8.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__diode_8.pex.spice -* Created: Thu Aug 27 19:05:25 2020 +* Created: Wed Sep 2 08:29:04 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/diode/sky130_fd_sc_hdll__diode_8.pxi.spice b/cells/diode/sky130_fd_sc_hdll__diode_8.pxi.spice index c4d4913..35c59ad 100644 --- a/cells/diode/sky130_fd_sc_hdll__diode_8.pxi.spice +++ b/cells/diode/sky130_fd_sc_hdll__diode_8.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__diode_8.pxi.spice -* Created: Thu Aug 27 19:05:25 2020 +* Created: Wed Sep 2 08:29:04 2020 * x_PM_SKY130_FD_SC_HDLL__DIODE_8%DIODE N_DIODE_D0_noxref_neg DIODE DIODE + N_DIODE_c_8_n PM_SKY130_FD_SC_HDLL__DIODE_8%DIODE
diff --git a/cells/diode/sky130_fd_sc_hdll__diode_8.spice b/cells/diode/sky130_fd_sc_hdll__diode_8.spice index 0dbae19..ffceb26 100644 --- a/cells/diode/sky130_fd_sc_hdll__diode_8.spice +++ b/cells/diode/sky130_fd_sc_hdll__diode_8.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__diode_8.spice -* Created: Thu Aug 27 19:05:25 2020 +* Created: Wed Sep 2 08:29:04 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.lvs.report b/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.lvs.report new file mode 100644 index 0000000..6943030 --- /dev/null +++ b/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.lvs.report
@@ -0,0 +1,493 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__dlrtn_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__dlrtn_1.sp ('sky130_fd_sc_hdll__dlrtn_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.spice ('sky130_fd_sc_hdll__dlrtn_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:29:08 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__dlrtn_1 sky130_fd_sc_hdll__dlrtn_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__dlrtn_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__dlrtn_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 18 18 + + Instances: 10 10 MN (4 pins) + 10 10 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 21 20 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 13 13 + + Instances: 4 4 MN (4 pins) + 6 6 MP (4 pins) + 3 3 SMN2 (4 pins) + 2 2 SMP2 (4 pins) + ------ ------ + Total Inst: 15 15 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 13 13 0 0 + + Instances: 4 4 0 0 MN(NSHORT) + 6 6 0 0 MP(PHIGHVT) + 3 3 0 0 SMN2 + 2 2 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 15 15 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB GATE_N D RESET_B VPWR Q VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.pex.spice b/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.pex.spice index 346806a..04ae1df 100644 --- a/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.pex.spice +++ b/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dlrtn_1.pex.spice -* Created: Thu Aug 27 19:05:32 2020 +* Created: Wed Sep 2 08:29:11 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.pxi.spice b/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.pxi.spice index ecf92ed..a3b2bc6 100644 --- a/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.pxi.spice +++ b/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dlrtn_1.pxi.spice -* Created: Thu Aug 27 19:05:32 2020 +* Created: Wed Sep 2 08:29:11 2020 * x_PM_SKY130_FD_SC_HDLL__DLRTN_1%GATE_N N_GATE_N_c_137_n N_GATE_N_c_138_n + N_GATE_N_M1001_g N_GATE_N_c_132_n N_GATE_N_M1014_g N_GATE_N_c_133_n GATE_N
diff --git a/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.spice b/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.spice index d877682..4a79762 100644 --- a/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.spice +++ b/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dlrtn_1.spice -* Created: Thu Aug 27 19:05:32 2020 +* Created: Wed Sep 2 08:29:11 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.lvs.report b/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.lvs.report new file mode 100644 index 0000000..efc1d59 --- /dev/null +++ b/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.lvs.report
@@ -0,0 +1,500 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__dlrtn_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__dlrtn_2.sp ('sky130_fd_sc_hdll__dlrtn_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.spice ('sky130_fd_sc_hdll__dlrtn_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:29:15 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__dlrtn_2 sky130_fd_sc_hdll__dlrtn_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__dlrtn_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__dlrtn_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 18 18 + + Instances: 11 11 MN (4 pins) + 11 11 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 23 22 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 13 13 + + Instances: 4 4 MN (4 pins) + 6 6 MP (4 pins) + 3 3 SMN2 (4 pins) + 2 2 SMP2 (4 pins) + ------ ------ + Total Inst: 15 15 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 13 13 0 0 + + Instances: 4 4 0 0 MN(NSHORT) + 6 6 0 0 MP(PHIGHVT) + 3 3 0 0 SMN2 + 2 2 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 15 15 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB GATE_N D RESET_B VPWR Q VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.pex.spice b/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.pex.spice index 738d7c1..2c1c5e4 100644 --- a/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.pex.spice +++ b/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dlrtn_2.pex.spice -* Created: Thu Aug 27 19:05:39 2020 +* Created: Wed Sep 2 08:29:18 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.pxi.spice b/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.pxi.spice index 707905a..556962b 100644 --- a/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.pxi.spice +++ b/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dlrtn_2.pxi.spice -* Created: Thu Aug 27 19:05:39 2020 +* Created: Wed Sep 2 08:29:18 2020 * x_PM_SKY130_FD_SC_HDLL__DLRTN_2%GATE_N N_GATE_N_c_144_n N_GATE_N_c_145_n + N_GATE_N_M1001_g N_GATE_N_c_139_n N_GATE_N_M1016_g N_GATE_N_c_140_n GATE_N
diff --git a/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.spice b/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.spice index 79a009d..333ecfa 100644 --- a/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.spice +++ b/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dlrtn_2.spice -* Created: Thu Aug 27 19:05:39 2020 +* Created: Wed Sep 2 08:29:18 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.lvs.report b/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.lvs.report new file mode 100644 index 0000000..5901a9c --- /dev/null +++ b/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.lvs.report
@@ -0,0 +1,504 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__dlrtn_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__dlrtn_4.sp ('sky130_fd_sc_hdll__dlrtn_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.spice ('sky130_fd_sc_hdll__dlrtn_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:29:22 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__dlrtn_4 sky130_fd_sc_hdll__dlrtn_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__dlrtn_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__dlrtn_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 18 18 + + Instances: 13 13 MN (4 pins) + 13 13 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 27 26 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 13 13 + + Instances: 4 4 MN (4 pins) + 6 6 MP (4 pins) + 3 3 SMN2 (4 pins) + 2 2 SMP2 (4 pins) + ------ ------ + Total Inst: 15 15 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 13 13 0 0 + + Instances: 4 4 0 0 MN(NSHORT) + 6 6 0 0 MP(PHIGHVT) + 3 3 0 0 SMN2 + 2 2 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 15 15 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB GATE_N D RESET_B VPWR Q VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.pex.spice b/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.pex.spice index a102bca..f4490d1 100644 --- a/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.pex.spice +++ b/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dlrtn_4.pex.spice -* Created: Thu Aug 27 19:05:46 2020 +* Created: Wed Sep 2 08:29:25 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.pxi.spice b/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.pxi.spice index 5d3a74b..4a1ace8 100644 --- a/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.pxi.spice +++ b/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dlrtn_4.pxi.spice -* Created: Thu Aug 27 19:05:46 2020 +* Created: Wed Sep 2 08:29:25 2020 * x_PM_SKY130_FD_SC_HDLL__DLRTN_4%GATE_N N_GATE_N_c_153_n N_GATE_N_c_154_n + N_GATE_N_M1003_g N_GATE_N_c_148_n N_GATE_N_M1018_g N_GATE_N_c_149_n GATE_N
diff --git a/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.spice b/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.spice index 61aa2d0..39643f6 100644 --- a/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.spice +++ b/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dlrtn_4.spice -* Created: Thu Aug 27 19:05:46 2020 +* Created: Wed Sep 2 08:29:25 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.lvs.report b/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.lvs.report new file mode 100644 index 0000000..5a5d1f8 --- /dev/null +++ b/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.lvs.report
@@ -0,0 +1,493 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__dlrtp_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__dlrtp_1.sp ('sky130_fd_sc_hdll__dlrtp_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.spice ('sky130_fd_sc_hdll__dlrtp_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:29:29 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__dlrtp_1 sky130_fd_sc_hdll__dlrtp_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__dlrtp_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__dlrtp_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 18 18 + + Instances: 10 10 MN (4 pins) + 10 10 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 21 20 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 13 13 + + Instances: 4 4 MN (4 pins) + 6 6 MP (4 pins) + 3 3 SMN2 (4 pins) + 2 2 SMP2 (4 pins) + ------ ------ + Total Inst: 15 15 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 13 13 0 0 + + Instances: 4 4 0 0 MN(NSHORT) + 6 6 0 0 MP(PHIGHVT) + 3 3 0 0 SMN2 + 2 2 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 15 15 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB GATE D RESET_B VPWR Q VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.pex.spice b/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.pex.spice index e5753c5..4c35b5f 100644 --- a/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.pex.spice +++ b/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dlrtp_1.pex.spice -* Created: Thu Aug 27 19:05:52 2020 +* Created: Wed Sep 2 08:29:32 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.pxi.spice b/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.pxi.spice index 2f40881..91f4b73 100644 --- a/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.pxi.spice +++ b/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dlrtp_1.pxi.spice -* Created: Thu Aug 27 19:05:52 2020 +* Created: Wed Sep 2 08:29:32 2020 * x_PM_SKY130_FD_SC_HDLL__DLRTP_1%GATE N_GATE_c_138_n N_GATE_c_139_n + N_GATE_M1001_g N_GATE_c_133_n N_GATE_M1014_g N_GATE_c_134_n GATE GATE
diff --git a/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.spice b/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.spice index 99c8cd3..c18bd18 100644 --- a/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.spice +++ b/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dlrtp_1.spice -* Created: Thu Aug 27 19:05:52 2020 +* Created: Wed Sep 2 08:29:32 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.lvs.report b/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.lvs.report new file mode 100644 index 0000000..f1323c7 --- /dev/null +++ b/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.lvs.report
@@ -0,0 +1,500 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__dlrtp_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__dlrtp_2.sp ('sky130_fd_sc_hdll__dlrtp_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.spice ('sky130_fd_sc_hdll__dlrtp_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:29:36 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__dlrtp_2 sky130_fd_sc_hdll__dlrtp_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__dlrtp_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__dlrtp_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 18 18 + + Instances: 11 11 MN (4 pins) + 11 11 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 23 22 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 13 13 + + Instances: 4 4 MN (4 pins) + 6 6 MP (4 pins) + 3 3 SMN2 (4 pins) + 2 2 SMP2 (4 pins) + ------ ------ + Total Inst: 15 15 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 13 13 0 0 + + Instances: 4 4 0 0 MN(NSHORT) + 6 6 0 0 MP(PHIGHVT) + 3 3 0 0 SMN2 + 2 2 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 15 15 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB GATE D RESET_B VPWR Q VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.pex.spice b/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.pex.spice index c04b178..5594f53 100644 --- a/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.pex.spice +++ b/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dlrtp_2.pex.spice -* Created: Thu Aug 27 19:05:59 2020 +* Created: Wed Sep 2 08:29:39 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.pxi.spice b/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.pxi.spice index eaa9aa0..27d9f7a 100644 --- a/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.pxi.spice +++ b/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dlrtp_2.pxi.spice -* Created: Thu Aug 27 19:05:59 2020 +* Created: Wed Sep 2 08:29:39 2020 * x_PM_SKY130_FD_SC_HDLL__DLRTP_2%GATE N_GATE_c_145_n N_GATE_c_146_n + N_GATE_M1001_g N_GATE_c_140_n N_GATE_M1016_g N_GATE_c_141_n GATE GATE
diff --git a/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.spice b/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.spice index 4f5c46a..1eef9dd 100644 --- a/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.spice +++ b/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dlrtp_2.spice -* Created: Thu Aug 27 19:05:59 2020 +* Created: Wed Sep 2 08:29:39 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.lvs.report b/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.lvs.report new file mode 100644 index 0000000..a5339bf --- /dev/null +++ b/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.lvs.report
@@ -0,0 +1,504 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__dlrtp_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__dlrtp_4.sp ('sky130_fd_sc_hdll__dlrtp_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.spice ('sky130_fd_sc_hdll__dlrtp_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:29:43 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__dlrtp_4 sky130_fd_sc_hdll__dlrtp_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__dlrtp_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__dlrtp_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 18 18 + + Instances: 13 13 MN (4 pins) + 13 13 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 27 26 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 13 13 + + Instances: 4 4 MN (4 pins) + 6 6 MP (4 pins) + 3 3 SMN2 (4 pins) + 2 2 SMP2 (4 pins) + ------ ------ + Total Inst: 15 15 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 13 13 0 0 + + Instances: 4 4 0 0 MN(NSHORT) + 6 6 0 0 MP(PHIGHVT) + 3 3 0 0 SMN2 + 2 2 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 15 15 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB GATE D RESET_B VPWR Q VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.pex.spice b/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.pex.spice index a37281c..ca6fa1c 100644 --- a/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.pex.spice +++ b/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dlrtp_4.pex.spice -* Created: Thu Aug 27 19:06:06 2020 +* Created: Wed Sep 2 08:29:46 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.pxi.spice b/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.pxi.spice index cbe6073..74f0194 100644 --- a/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.pxi.spice +++ b/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dlrtp_4.pxi.spice -* Created: Thu Aug 27 19:06:06 2020 +* Created: Wed Sep 2 08:29:46 2020 * x_PM_SKY130_FD_SC_HDLL__DLRTP_4%GATE N_GATE_c_154_n N_GATE_c_155_n + N_GATE_M1003_g N_GATE_c_149_n N_GATE_M1018_g N_GATE_c_150_n GATE GATE
diff --git a/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.spice b/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.spice index 2c7918d..198c3bb 100644 --- a/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.spice +++ b/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dlrtp_4.spice -* Created: Thu Aug 27 19:06:06 2020 +* Created: Wed Sep 2 08:29:46 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_1.lvs.report b/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_1.lvs.report new file mode 100644 index 0000000..aa9db2d --- /dev/null +++ b/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_1.lvs.report
@@ -0,0 +1,491 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_1.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__dlxtn_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__dlxtn_1.sp ('sky130_fd_sc_hdll__dlxtn_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_1.spice ('sky130_fd_sc_hdll__dlxtn_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:29:50 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__dlxtn_1 sky130_fd_sc_hdll__dlxtn_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__dlxtn_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__dlxtn_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 16 16 + + Instances: 9 9 MN (4 pins) + 9 9 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 19 18 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 12 12 + + Instances: 5 5 MN (4 pins) + 5 5 MP (4 pins) + 2 2 SMN2 (4 pins) + 2 2 SMP2 (4 pins) + ------ ------ + Total Inst: 14 14 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 12 12 0 0 + + Instances: 5 5 0 0 MN(NSHORT) + 5 5 0 0 MP(PHIGHVT) + 2 2 0 0 SMN2 + 2 2 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 14 14 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB GATE_N D VPWR Q VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_1.pex.spice b/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_1.pex.spice index a7105f7..9d7ce1b 100644 --- a/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_1.pex.spice +++ b/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dlxtn_1.pex.spice -* Created: Thu Aug 27 19:06:13 2020 +* Created: Wed Sep 2 08:29:53 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_1.pxi.spice b/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_1.pxi.spice index e359063..9ee4920 100644 --- a/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_1.pxi.spice +++ b/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dlxtn_1.pxi.spice -* Created: Thu Aug 27 19:06:13 2020 +* Created: Wed Sep 2 08:29:53 2020 * x_PM_SKY130_FD_SC_HDLL__DLXTN_1%GATE_N N_GATE_N_c_126_n N_GATE_N_c_127_n + N_GATE_N_M1001_g N_GATE_N_c_121_n N_GATE_N_M1012_g N_GATE_N_c_122_n GATE_N
diff --git a/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_1.spice b/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_1.spice index de0de4f..8133199 100644 --- a/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_1.spice +++ b/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dlxtn_1.spice -* Created: Thu Aug 27 19:06:13 2020 +* Created: Wed Sep 2 08:29:53 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.lvs.report b/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.lvs.report new file mode 100644 index 0000000..4cbab2c --- /dev/null +++ b/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.lvs.report
@@ -0,0 +1,498 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__dlxtn_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__dlxtn_2.sp ('sky130_fd_sc_hdll__dlxtn_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.spice ('sky130_fd_sc_hdll__dlxtn_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:29:57 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__dlxtn_2 sky130_fd_sc_hdll__dlxtn_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__dlxtn_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__dlxtn_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 16 16 + + Instances: 10 10 MN (4 pins) + 10 10 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 21 20 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 12 12 + + Instances: 5 5 MN (4 pins) + 5 5 MP (4 pins) + 2 2 SMN2 (4 pins) + 2 2 SMP2 (4 pins) + ------ ------ + Total Inst: 14 14 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 12 12 0 0 + + Instances: 5 5 0 0 MN(NSHORT) + 5 5 0 0 MP(PHIGHVT) + 2 2 0 0 SMN2 + 2 2 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 14 14 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB GATE_N D VPWR Q VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.pex.spice b/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.pex.spice index db96956..7309b86 100644 --- a/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.pex.spice +++ b/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dlxtn_2.pex.spice -* Created: Thu Aug 27 19:06:20 2020 +* Created: Wed Sep 2 08:30:00 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.pxi.spice b/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.pxi.spice index d09224e..90bf636 100644 --- a/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.pxi.spice +++ b/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dlxtn_2.pxi.spice -* Created: Thu Aug 27 19:06:20 2020 +* Created: Wed Sep 2 08:30:00 2020 * x_PM_SKY130_FD_SC_HDLL__DLXTN_2%GATE_N N_GATE_N_c_136_n N_GATE_N_c_137_n + N_GATE_N_M1002_g N_GATE_N_c_131_n N_GATE_N_M1015_g N_GATE_N_c_132_n GATE_N
diff --git a/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.spice b/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.spice index b0c4022..5118d2d 100644 --- a/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.spice +++ b/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dlxtn_2.spice -* Created: Thu Aug 27 19:06:20 2020 +* Created: Wed Sep 2 08:30:00 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.lvs.report b/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.lvs.report new file mode 100644 index 0000000..59e8677 --- /dev/null +++ b/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.lvs.report
@@ -0,0 +1,502 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__dlxtn_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__dlxtn_4.sp ('sky130_fd_sc_hdll__dlxtn_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.spice ('sky130_fd_sc_hdll__dlxtn_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:30:04 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__dlxtn_4 sky130_fd_sc_hdll__dlxtn_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__dlxtn_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__dlxtn_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 16 16 + + Instances: 12 12 MN (4 pins) + 12 12 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 25 24 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 12 12 + + Instances: 5 5 MN (4 pins) + 5 5 MP (4 pins) + 2 2 SMN2 (4 pins) + 2 2 SMP2 (4 pins) + ------ ------ + Total Inst: 14 14 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 12 12 0 0 + + Instances: 5 5 0 0 MN(NSHORT) + 5 5 0 0 MP(PHIGHVT) + 2 2 0 0 SMN2 + 2 2 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 14 14 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB GATE_N D VPWR Q VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.pex.spice b/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.pex.spice index 42a696e..cce9b35 100644 --- a/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.pex.spice +++ b/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dlxtn_4.pex.spice -* Created: Thu Aug 27 19:06:27 2020 +* Created: Wed Sep 2 08:30:08 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.pxi.spice b/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.pxi.spice index 4068763..74b7298 100644 --- a/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.pxi.spice +++ b/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dlxtn_4.pxi.spice -* Created: Thu Aug 27 19:06:27 2020 +* Created: Wed Sep 2 08:30:08 2020 * x_PM_SKY130_FD_SC_HDLL__DLXTN_4%GATE_N N_GATE_N_c_142_n N_GATE_N_c_143_n + N_GATE_N_M1004_g N_GATE_N_c_137_n N_GATE_N_M1016_g N_GATE_N_c_138_n GATE_N
diff --git a/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.spice b/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.spice index cabd65e..a453e83 100644 --- a/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.spice +++ b/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dlxtn_4.spice -* Created: Thu Aug 27 19:06:27 2020 +* Created: Wed Sep 2 08:30:08 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/dlygate4sd1/sky130_fd_sc_hdll__dlygate4sd1_1.lvs.report b/cells/dlygate4sd1/sky130_fd_sc_hdll__dlygate4sd1_1.lvs.report new file mode 100644 index 0000000..0f4bf75 --- /dev/null +++ b/cells/dlygate4sd1/sky130_fd_sc_hdll__dlygate4sd1_1.lvs.report
@@ -0,0 +1,477 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlygate4sd1/sky130_fd_sc_hdll__dlygate4sd1_1.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlygate4sd1/sky130_fd_sc_hdll__dlygate4sd1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlygate4sd1/sky130_fd_sc_hdll__dlygate4sd1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlygate4sd1/sky130_fd_sc_hdll__dlygate4sd1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlygate4sd1/sky130_fd_sc_hdll__dlygate4sd1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlygate4sd1/sky130_fd_sc_hdll__dlygate4sd1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlygate4sd1/sky130_fd_sc_hdll__dlygate4sd1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlygate4sd1/sky130_fd_sc_hdll__dlygate4sd1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlygate4sd1/sky130_fd_sc_hdll__dlygate4sd1_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__dlygate4sd1_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__dlygate4sd1_1.sp ('sky130_fd_sc_hdll__dlygate4sd1_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlygate4sd1/sky130_fd_sc_hdll__dlygate4sd1_1.spice ('sky130_fd_sc_hdll__dlygate4sd1_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:30:11 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__dlygate4sd1_1 sky130_fd_sc_hdll__dlygate4sd1_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__dlygate4sd1_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__dlygate4sd1_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 9 9 + + Instances: 4 4 MN (4 pins) + 4 4 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 9 8 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 9 9 + + Instances: 4 4 MN (4 pins) + 4 4 MP (4 pins) + ------ ------ + Total Inst: 8 8 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 6 6 0 0 + + Nets: 9 9 0 0 + + Instances: 4 4 0 0 MN(NSHORT) + 4 4 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 8 8 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/dlygate4sd1/sky130_fd_sc_hdll__dlygate4sd1_1.pex.spice b/cells/dlygate4sd1/sky130_fd_sc_hdll__dlygate4sd1_1.pex.spice index 7a52a51..b860f0d 100644 --- a/cells/dlygate4sd1/sky130_fd_sc_hdll__dlygate4sd1_1.pex.spice +++ b/cells/dlygate4sd1/sky130_fd_sc_hdll__dlygate4sd1_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dlygate4sd1_1.pex.spice -* Created: Thu Aug 27 19:06:34 2020 +* Created: Wed Sep 2 08:30:15 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/dlygate4sd1/sky130_fd_sc_hdll__dlygate4sd1_1.pxi.spice b/cells/dlygate4sd1/sky130_fd_sc_hdll__dlygate4sd1_1.pxi.spice index faaf23a..cda16d8 100644 --- a/cells/dlygate4sd1/sky130_fd_sc_hdll__dlygate4sd1_1.pxi.spice +++ b/cells/dlygate4sd1/sky130_fd_sc_hdll__dlygate4sd1_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dlygate4sd1_1.pxi.spice -* Created: Thu Aug 27 19:06:34 2020 +* Created: Wed Sep 2 08:30:15 2020 * x_PM_SKY130_FD_SC_HDLL__DLYGATE4SD1_1%A N_A_M1007_g N_A_M1005_g A A N_A_c_68_n + PM_SKY130_FD_SC_HDLL__DLYGATE4SD1_1%A
diff --git a/cells/dlygate4sd1/sky130_fd_sc_hdll__dlygate4sd1_1.spice b/cells/dlygate4sd1/sky130_fd_sc_hdll__dlygate4sd1_1.spice index 5064599..9fdfcd6 100644 --- a/cells/dlygate4sd1/sky130_fd_sc_hdll__dlygate4sd1_1.spice +++ b/cells/dlygate4sd1/sky130_fd_sc_hdll__dlygate4sd1_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dlygate4sd1_1.spice -* Created: Thu Aug 27 19:06:34 2020 +* Created: Wed Sep 2 08:30:15 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/dlygate4sd2/sky130_fd_sc_hdll__dlygate4sd2_1.lvs.report b/cells/dlygate4sd2/sky130_fd_sc_hdll__dlygate4sd2_1.lvs.report new file mode 100644 index 0000000..c64f1e0 --- /dev/null +++ b/cells/dlygate4sd2/sky130_fd_sc_hdll__dlygate4sd2_1.lvs.report
@@ -0,0 +1,477 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlygate4sd2/sky130_fd_sc_hdll__dlygate4sd2_1.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlygate4sd2/sky130_fd_sc_hdll__dlygate4sd2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlygate4sd2/sky130_fd_sc_hdll__dlygate4sd2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlygate4sd2/sky130_fd_sc_hdll__dlygate4sd2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlygate4sd2/sky130_fd_sc_hdll__dlygate4sd2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlygate4sd2/sky130_fd_sc_hdll__dlygate4sd2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlygate4sd2/sky130_fd_sc_hdll__dlygate4sd2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlygate4sd2/sky130_fd_sc_hdll__dlygate4sd2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlygate4sd2/sky130_fd_sc_hdll__dlygate4sd2_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__dlygate4sd2_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__dlygate4sd2_1.sp ('sky130_fd_sc_hdll__dlygate4sd2_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlygate4sd2/sky130_fd_sc_hdll__dlygate4sd2_1.spice ('sky130_fd_sc_hdll__dlygate4sd2_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:30:19 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__dlygate4sd2_1 sky130_fd_sc_hdll__dlygate4sd2_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__dlygate4sd2_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__dlygate4sd2_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 9 9 + + Instances: 4 4 MN (4 pins) + 4 4 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 9 8 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 9 9 + + Instances: 4 4 MN (4 pins) + 4 4 MP (4 pins) + ------ ------ + Total Inst: 8 8 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 6 6 0 0 + + Nets: 9 9 0 0 + + Instances: 4 4 0 0 MN(NSHORT) + 4 4 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 8 8 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/dlygate4sd2/sky130_fd_sc_hdll__dlygate4sd2_1.pex.spice b/cells/dlygate4sd2/sky130_fd_sc_hdll__dlygate4sd2_1.pex.spice index 1b004ca..ca3e45e 100644 --- a/cells/dlygate4sd2/sky130_fd_sc_hdll__dlygate4sd2_1.pex.spice +++ b/cells/dlygate4sd2/sky130_fd_sc_hdll__dlygate4sd2_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dlygate4sd2_1.pex.spice -* Created: Thu Aug 27 19:06:40 2020 +* Created: Wed Sep 2 08:30:22 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/dlygate4sd2/sky130_fd_sc_hdll__dlygate4sd2_1.pxi.spice b/cells/dlygate4sd2/sky130_fd_sc_hdll__dlygate4sd2_1.pxi.spice index ba0f454..c3412f7 100644 --- a/cells/dlygate4sd2/sky130_fd_sc_hdll__dlygate4sd2_1.pxi.spice +++ b/cells/dlygate4sd2/sky130_fd_sc_hdll__dlygate4sd2_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dlygate4sd2_1.pxi.spice -* Created: Thu Aug 27 19:06:40 2020 +* Created: Wed Sep 2 08:30:22 2020 * x_PM_SKY130_FD_SC_HDLL__DLYGATE4SD2_1%A N_A_M1007_g N_A_M1005_g A A N_A_c_67_n + PM_SKY130_FD_SC_HDLL__DLYGATE4SD2_1%A
diff --git a/cells/dlygate4sd2/sky130_fd_sc_hdll__dlygate4sd2_1.spice b/cells/dlygate4sd2/sky130_fd_sc_hdll__dlygate4sd2_1.spice index f354ec4..0a759a0 100644 --- a/cells/dlygate4sd2/sky130_fd_sc_hdll__dlygate4sd2_1.spice +++ b/cells/dlygate4sd2/sky130_fd_sc_hdll__dlygate4sd2_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dlygate4sd2_1.spice -* Created: Thu Aug 27 19:06:40 2020 +* Created: Wed Sep 2 08:30:22 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/dlygate4sd3/sky130_fd_sc_hdll__dlygate4sd3_1.lvs.report b/cells/dlygate4sd3/sky130_fd_sc_hdll__dlygate4sd3_1.lvs.report new file mode 100644 index 0000000..aaef6e4 --- /dev/null +++ b/cells/dlygate4sd3/sky130_fd_sc_hdll__dlygate4sd3_1.lvs.report
@@ -0,0 +1,477 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlygate4sd3/sky130_fd_sc_hdll__dlygate4sd3_1.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlygate4sd3/sky130_fd_sc_hdll__dlygate4sd3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlygate4sd3/sky130_fd_sc_hdll__dlygate4sd3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlygate4sd3/sky130_fd_sc_hdll__dlygate4sd3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlygate4sd3/sky130_fd_sc_hdll__dlygate4sd3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlygate4sd3/sky130_fd_sc_hdll__dlygate4sd3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlygate4sd3/sky130_fd_sc_hdll__dlygate4sd3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlygate4sd3/sky130_fd_sc_hdll__dlygate4sd3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlygate4sd3/sky130_fd_sc_hdll__dlygate4sd3_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__dlygate4sd3_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__dlygate4sd3_1.sp ('sky130_fd_sc_hdll__dlygate4sd3_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/dlygate4sd3/sky130_fd_sc_hdll__dlygate4sd3_1.spice ('sky130_fd_sc_hdll__dlygate4sd3_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:30:26 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__dlygate4sd3_1 sky130_fd_sc_hdll__dlygate4sd3_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__dlygate4sd3_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__dlygate4sd3_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 9 9 + + Instances: 4 4 MN (4 pins) + 4 4 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 9 8 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 9 9 + + Instances: 4 4 MN (4 pins) + 4 4 MP (4 pins) + ------ ------ + Total Inst: 8 8 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 6 6 0 0 + + Nets: 9 9 0 0 + + Instances: 4 4 0 0 MN(NSHORT) + 4 4 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 8 8 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/dlygate4sd3/sky130_fd_sc_hdll__dlygate4sd3_1.pex.spice b/cells/dlygate4sd3/sky130_fd_sc_hdll__dlygate4sd3_1.pex.spice index e27ba72..881c36b 100644 --- a/cells/dlygate4sd3/sky130_fd_sc_hdll__dlygate4sd3_1.pex.spice +++ b/cells/dlygate4sd3/sky130_fd_sc_hdll__dlygate4sd3_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dlygate4sd3_1.pex.spice -* Created: Thu Aug 27 19:06:47 2020 +* Created: Wed Sep 2 08:30:29 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/dlygate4sd3/sky130_fd_sc_hdll__dlygate4sd3_1.pxi.spice b/cells/dlygate4sd3/sky130_fd_sc_hdll__dlygate4sd3_1.pxi.spice index 7850e13..37284f4 100644 --- a/cells/dlygate4sd3/sky130_fd_sc_hdll__dlygate4sd3_1.pxi.spice +++ b/cells/dlygate4sd3/sky130_fd_sc_hdll__dlygate4sd3_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dlygate4sd3_1.pxi.spice -* Created: Thu Aug 27 19:06:47 2020 +* Created: Wed Sep 2 08:30:29 2020 * x_PM_SKY130_FD_SC_HDLL__DLYGATE4SD3_1%A N_A_M1002_g N_A_M1004_g A A N_A_c_64_n + PM_SKY130_FD_SC_HDLL__DLYGATE4SD3_1%A
diff --git a/cells/dlygate4sd3/sky130_fd_sc_hdll__dlygate4sd3_1.spice b/cells/dlygate4sd3/sky130_fd_sc_hdll__dlygate4sd3_1.spice index ecdb18c..ce77dcd 100644 --- a/cells/dlygate4sd3/sky130_fd_sc_hdll__dlygate4sd3_1.spice +++ b/cells/dlygate4sd3/sky130_fd_sc_hdll__dlygate4sd3_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__dlygate4sd3_1.spice -* Created: Thu Aug 27 19:06:47 2020 +* Created: Wed Sep 2 08:30:29 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/ebufn/sky130_fd_sc_hdll__ebufn_1.lvs.report b/cells/ebufn/sky130_fd_sc_hdll__ebufn_1.lvs.report new file mode 100644 index 0000000..51f5020 --- /dev/null +++ b/cells/ebufn/sky130_fd_sc_hdll__ebufn_1.lvs.report
@@ -0,0 +1,481 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_1.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__ebufn_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__ebufn_1.sp ('sky130_fd_sc_hdll__ebufn_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_1.spice ('sky130_fd_sc_hdll__ebufn_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:30:33 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__ebufn_1 sky130_fd_sc_hdll__ebufn_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__ebufn_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__ebufn_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 11 11 + + Instances: 4 4 MN (4 pins) + 4 4 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 9 8 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 9 9 + + Instances: 2 2 MN (4 pins) + 2 2 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SMP2 (4 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 9 9 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB A TE_B VPWR Z VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/ebufn/sky130_fd_sc_hdll__ebufn_1.pex.spice b/cells/ebufn/sky130_fd_sc_hdll__ebufn_1.pex.spice index d1c4af1..b6042a2 100644 --- a/cells/ebufn/sky130_fd_sc_hdll__ebufn_1.pex.spice +++ b/cells/ebufn/sky130_fd_sc_hdll__ebufn_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__ebufn_1.pex.spice -* Created: Thu Aug 27 19:06:54 2020 +* Created: Wed Sep 2 08:30:36 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/ebufn/sky130_fd_sc_hdll__ebufn_1.pxi.spice b/cells/ebufn/sky130_fd_sc_hdll__ebufn_1.pxi.spice index e4eded2..7785ff6 100644 --- a/cells/ebufn/sky130_fd_sc_hdll__ebufn_1.pxi.spice +++ b/cells/ebufn/sky130_fd_sc_hdll__ebufn_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__ebufn_1.pxi.spice -* Created: Thu Aug 27 19:06:54 2020 +* Created: Wed Sep 2 08:30:36 2020 * x_PM_SKY130_FD_SC_HDLL__EBUFN_1%A N_A_c_63_n N_A_c_64_n N_A_M1001_g N_A_M1005_g + A A N_A_c_62_n PM_SKY130_FD_SC_HDLL__EBUFN_1%A
diff --git a/cells/ebufn/sky130_fd_sc_hdll__ebufn_1.spice b/cells/ebufn/sky130_fd_sc_hdll__ebufn_1.spice index 4161f17..a964182 100644 --- a/cells/ebufn/sky130_fd_sc_hdll__ebufn_1.spice +++ b/cells/ebufn/sky130_fd_sc_hdll__ebufn_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__ebufn_1.spice -* Created: Thu Aug 27 19:06:54 2020 +* Created: Wed Sep 2 08:30:36 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/ebufn/sky130_fd_sc_hdll__ebufn_2.lvs.report b/cells/ebufn/sky130_fd_sc_hdll__ebufn_2.lvs.report new file mode 100644 index 0000000..67587a1 --- /dev/null +++ b/cells/ebufn/sky130_fd_sc_hdll__ebufn_2.lvs.report
@@ -0,0 +1,493 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_2.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__ebufn_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__ebufn_2.sp ('sky130_fd_sc_hdll__ebufn_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_2.spice ('sky130_fd_sc_hdll__ebufn_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:30:40 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__ebufn_2 sky130_fd_sc_hdll__ebufn_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__ebufn_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__ebufn_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 15 11 * + + Instances: 6 6 MN (4 pins) + 6 6 MP (4 pins) + 1 0 * Dpar (2 pins) + 4 0 * Probe (2 pins) + ------ ------ + Total Inst: 17 12 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 9 9 + + Instances: 2 2 MN (4 pins) + 2 2 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SMP2 (4 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 9 9 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 5 layout instances were filtered and their pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 4. + 4 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 4. + 4 mos transistors were deleted by parallel reduction. + + 4 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A TE_B VPWR Z VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/ebufn/sky130_fd_sc_hdll__ebufn_2.pex.spice b/cells/ebufn/sky130_fd_sc_hdll__ebufn_2.pex.spice index 2fbf377..42cea59 100644 --- a/cells/ebufn/sky130_fd_sc_hdll__ebufn_2.pex.spice +++ b/cells/ebufn/sky130_fd_sc_hdll__ebufn_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__ebufn_2.pex.spice -* Created: Thu Aug 27 19:07:01 2020 +* Created: Wed Sep 2 08:30:43 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/ebufn/sky130_fd_sc_hdll__ebufn_2.pxi.spice b/cells/ebufn/sky130_fd_sc_hdll__ebufn_2.pxi.spice index 0c5e890..03f9df0 100644 --- a/cells/ebufn/sky130_fd_sc_hdll__ebufn_2.pxi.spice +++ b/cells/ebufn/sky130_fd_sc_hdll__ebufn_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__ebufn_2.pxi.spice -* Created: Thu Aug 27 19:07:01 2020 +* Created: Wed Sep 2 08:30:43 2020 * x_PM_SKY130_FD_SC_HDLL__EBUFN_2%A N_A_M1010_g N_A_c_75_n N_A_c_76_n N_A_M1000_g + A A N_A_c_74_n PM_SKY130_FD_SC_HDLL__EBUFN_2%A
diff --git a/cells/ebufn/sky130_fd_sc_hdll__ebufn_2.spice b/cells/ebufn/sky130_fd_sc_hdll__ebufn_2.spice index 60f807c..ceb6dec 100644 --- a/cells/ebufn/sky130_fd_sc_hdll__ebufn_2.spice +++ b/cells/ebufn/sky130_fd_sc_hdll__ebufn_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__ebufn_2.spice -* Created: Thu Aug 27 19:07:01 2020 +* Created: Wed Sep 2 08:30:43 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.lvs.report b/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.lvs.report new file mode 100644 index 0000000..d31676b --- /dev/null +++ b/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.lvs.report
@@ -0,0 +1,498 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__ebufn_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__ebufn_4.sp ('sky130_fd_sc_hdll__ebufn_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.spice ('sky130_fd_sc_hdll__ebufn_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:30:47 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__ebufn_4 sky130_fd_sc_hdll__ebufn_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__ebufn_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__ebufn_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 11 11 + + Instances: 10 10 MN (4 pins) + 10 10 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 21 20 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 9 9 + + Instances: 2 2 MN (4 pins) + 2 2 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SMP2 (4 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 9 9 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 16 layout mos transistors were reduced to 4. + 12 mos transistors were deleted by parallel reduction. + 16 source mos transistors were reduced to 4. + 12 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A TE_B VPWR Z VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.pex.spice b/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.pex.spice index 58652ff..6917cf9 100644 --- a/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.pex.spice +++ b/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__ebufn_4.pex.spice -* Created: Thu Aug 27 19:07:08 2020 +* Created: Wed Sep 2 08:30:50 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.pxi.spice b/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.pxi.spice index e2b89ae..5157671 100644 --- a/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.pxi.spice +++ b/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__ebufn_4.pxi.spice -* Created: Thu Aug 27 19:07:08 2020 +* Created: Wed Sep 2 08:30:50 2020 * x_PM_SKY130_FD_SC_HDLL__EBUFN_4%A N_A_c_95_n N_A_M1018_g N_A_c_96_n N_A_M1007_g + A A PM_SKY130_FD_SC_HDLL__EBUFN_4%A
diff --git a/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.spice b/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.spice index 83ac1dd..0573582 100644 --- a/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.spice +++ b/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__ebufn_4.spice -* Created: Thu Aug 27 19:07:08 2020 +* Created: Wed Sep 2 08:30:50 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.lvs.report b/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.lvs.report new file mode 100644 index 0000000..dadd50a --- /dev/null +++ b/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.lvs.report
@@ -0,0 +1,519 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 87 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 89 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 91 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 93 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__ebufn_8.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__ebufn_8.sp ('sky130_fd_sc_hdll__ebufn_8') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice ('sky130_fd_sc_hdll__ebufn_8') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:30:54 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__ebufn_8 sky130_fd_sc_hdll__ebufn_8 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__ebufn_8 +SOURCE CELL NAME: sky130_fd_sc_hdll__ebufn_8 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 13 11 * + + Instances: 19 19 MN (4 pins) + 19 19 MP (4 pins) + 1 0 * Dpar (2 pins) + 2 0 * Probe (2 pins) + ------ ------ + Total Inst: 41 38 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 9 9 + + Instances: 2 2 MN (4 pins) + 2 2 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SMP2 (4 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 9 9 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 3 layout instances were filtered and their pins removed from adjoining nets. + + 36 layout mos transistors were reduced to 6. + 30 mos transistors were deleted by parallel reduction. + 36 source mos transistors were reduced to 6. + 30 mos transistors were deleted by parallel reduction. + + 2 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A TE_B VPWR Z VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.pex.spice b/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.pex.spice index 3baa003..699da50 100644 --- a/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.pex.spice +++ b/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__ebufn_8.pex.spice -* Created: Thu Aug 27 19:07:15 2020 +* Created: Wed Sep 2 08:30:57 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.pxi.spice b/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.pxi.spice index b24717b..9b044fe 100644 --- a/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.pxi.spice +++ b/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__ebufn_8.pxi.spice -* Created: Thu Aug 27 19:07:15 2020 +* Created: Wed Sep 2 08:30:57 2020 * x_PM_SKY130_FD_SC_HDLL__EBUFN_8%A N_A_c_137_n N_A_M1005_g N_A_c_133_n + N_A_M1013_g N_A_c_138_n N_A_M1033_g N_A_M1026_g A A N_A_c_136_n
diff --git a/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice b/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice index 7542ad8..deecf96 100644 --- a/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice +++ b/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__ebufn_8.spice -* Created: Thu Aug 27 19:07:15 2020 +* Created: Wed Sep 2 08:30:57 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/einvn/sky130_fd_sc_hdll__einvn_1.lvs.report b/cells/einvn/sky130_fd_sc_hdll__einvn_1.lvs.report new file mode 100644 index 0000000..d121461 --- /dev/null +++ b/cells/einvn/sky130_fd_sc_hdll__einvn_1.lvs.report
@@ -0,0 +1,482 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_1.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__einvn_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__einvn_1.sp ('sky130_fd_sc_hdll__einvn_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_1.spice ('sky130_fd_sc_hdll__einvn_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:31:01 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__einvn_1 sky130_fd_sc_hdll__einvn_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__einvn_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__einvn_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 12 10 * + + Instances: 3 3 MN (4 pins) + 3 3 MP (4 pins) + 1 0 * Dpar (2 pins) + 2 0 * Probe (2 pins) + ------ ------ + Total Inst: 9 6 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SMP2 (4 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 8 8 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 3 layout instances were filtered and their pins removed from adjoining nets. + + 2 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB TE_B A VPWR Z VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/einvn/sky130_fd_sc_hdll__einvn_1.pex.spice b/cells/einvn/sky130_fd_sc_hdll__einvn_1.pex.spice index badc031..18dc53f 100644 --- a/cells/einvn/sky130_fd_sc_hdll__einvn_1.pex.spice +++ b/cells/einvn/sky130_fd_sc_hdll__einvn_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__einvn_1.pex.spice -* Created: Thu Aug 27 19:07:22 2020 +* Created: Wed Sep 2 08:31:04 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/einvn/sky130_fd_sc_hdll__einvn_1.pxi.spice b/cells/einvn/sky130_fd_sc_hdll__einvn_1.pxi.spice index bbaa446..05d7f02 100644 --- a/cells/einvn/sky130_fd_sc_hdll__einvn_1.pxi.spice +++ b/cells/einvn/sky130_fd_sc_hdll__einvn_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__einvn_1.pxi.spice -* Created: Thu Aug 27 19:07:22 2020 +* Created: Wed Sep 2 08:31:04 2020 * x_PM_SKY130_FD_SC_HDLL__EINVN_1%TE_B N_TE_B_c_43_n N_TE_B_c_48_n N_TE_B_c_49_n + N_TE_B_M1001_g N_TE_B_M1002_g N_TE_B_c_45_n N_TE_B_c_51_n N_TE_B_M1004_g TE_B
diff --git a/cells/einvn/sky130_fd_sc_hdll__einvn_1.spice b/cells/einvn/sky130_fd_sc_hdll__einvn_1.spice index 6038542..09fc5ce 100644 --- a/cells/einvn/sky130_fd_sc_hdll__einvn_1.spice +++ b/cells/einvn/sky130_fd_sc_hdll__einvn_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__einvn_1.spice -* Created: Thu Aug 27 19:07:22 2020 +* Created: Wed Sep 2 08:31:04 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/einvn/sky130_fd_sc_hdll__einvn_2.lvs.report b/cells/einvn/sky130_fd_sc_hdll__einvn_2.lvs.report new file mode 100644 index 0000000..fa6565a --- /dev/null +++ b/cells/einvn/sky130_fd_sc_hdll__einvn_2.lvs.report
@@ -0,0 +1,488 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_2.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__einvn_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__einvn_2.sp ('sky130_fd_sc_hdll__einvn_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_2.spice ('sky130_fd_sc_hdll__einvn_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:31:08 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__einvn_2 sky130_fd_sc_hdll__einvn_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__einvn_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__einvn_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 10 10 + + Instances: 5 5 MN (4 pins) + 5 5 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 11 10 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SMP2 (4 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 8 8 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 4. + 4 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 4. + 4 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB TE_B A VPWR Z VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/einvn/sky130_fd_sc_hdll__einvn_2.pex.spice b/cells/einvn/sky130_fd_sc_hdll__einvn_2.pex.spice index 69fc8bd..b84706a 100644 --- a/cells/einvn/sky130_fd_sc_hdll__einvn_2.pex.spice +++ b/cells/einvn/sky130_fd_sc_hdll__einvn_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__einvn_2.pex.spice -* Created: Thu Aug 27 19:07:28 2020 +* Created: Wed Sep 2 08:31:11 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/einvn/sky130_fd_sc_hdll__einvn_2.pxi.spice b/cells/einvn/sky130_fd_sc_hdll__einvn_2.pxi.spice index dbfb8be..5def3d1 100644 --- a/cells/einvn/sky130_fd_sc_hdll__einvn_2.pxi.spice +++ b/cells/einvn/sky130_fd_sc_hdll__einvn_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__einvn_2.pxi.spice -* Created: Thu Aug 27 19:07:28 2020 +* Created: Wed Sep 2 08:31:11 2020 * x_PM_SKY130_FD_SC_HDLL__EINVN_2%TE_B N_TE_B_c_60_n N_TE_B_c_64_n N_TE_B_c_65_n + N_TE_B_M1001_g N_TE_B_M1004_g N_TE_B_c_66_n N_TE_B_c_67_n N_TE_B_M1000_g
diff --git a/cells/einvn/sky130_fd_sc_hdll__einvn_2.spice b/cells/einvn/sky130_fd_sc_hdll__einvn_2.spice index b593727..750527f 100644 --- a/cells/einvn/sky130_fd_sc_hdll__einvn_2.spice +++ b/cells/einvn/sky130_fd_sc_hdll__einvn_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__einvn_2.spice -* Created: Thu Aug 27 19:07:28 2020 +* Created: Wed Sep 2 08:31:11 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/einvn/sky130_fd_sc_hdll__einvn_4.lvs.report b/cells/einvn/sky130_fd_sc_hdll__einvn_4.lvs.report new file mode 100644 index 0000000..966f2ac --- /dev/null +++ b/cells/einvn/sky130_fd_sc_hdll__einvn_4.lvs.report
@@ -0,0 +1,496 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_4.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__einvn_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__einvn_4.sp ('sky130_fd_sc_hdll__einvn_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_4.spice ('sky130_fd_sc_hdll__einvn_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:31:15 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__einvn_4 sky130_fd_sc_hdll__einvn_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__einvn_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__einvn_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 10 10 + + Instances: 9 9 MN (4 pins) + 9 9 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 19 18 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SMP2 (4 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 8 8 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 16 layout mos transistors were reduced to 4. + 12 mos transistors were deleted by parallel reduction. + 16 source mos transistors were reduced to 4. + 12 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB TE_B A VPWR Z VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/einvn/sky130_fd_sc_hdll__einvn_4.pex.spice b/cells/einvn/sky130_fd_sc_hdll__einvn_4.pex.spice index 9eff960..d003e38 100644 --- a/cells/einvn/sky130_fd_sc_hdll__einvn_4.pex.spice +++ b/cells/einvn/sky130_fd_sc_hdll__einvn_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__einvn_4.pex.spice -* Created: Thu Aug 27 19:07:35 2020 +* Created: Wed Sep 2 08:31:19 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/einvn/sky130_fd_sc_hdll__einvn_4.pxi.spice b/cells/einvn/sky130_fd_sc_hdll__einvn_4.pxi.spice index 58a232d..a71f359 100644 --- a/cells/einvn/sky130_fd_sc_hdll__einvn_4.pxi.spice +++ b/cells/einvn/sky130_fd_sc_hdll__einvn_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__einvn_4.pxi.spice -* Created: Thu Aug 27 19:07:35 2020 +* Created: Wed Sep 2 08:31:19 2020 * x_PM_SKY130_FD_SC_HDLL__EINVN_4%TE_B N_TE_B_c_84_n N_TE_B_M1016_g N_TE_B_c_89_n + N_TE_B_M1006_g N_TE_B_c_85_n N_TE_B_c_86_n N_TE_B_c_92_n N_TE_B_M1000_g
diff --git a/cells/einvn/sky130_fd_sc_hdll__einvn_4.spice b/cells/einvn/sky130_fd_sc_hdll__einvn_4.spice index c2cd101..622d945 100644 --- a/cells/einvn/sky130_fd_sc_hdll__einvn_4.spice +++ b/cells/einvn/sky130_fd_sc_hdll__einvn_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__einvn_4.spice -* Created: Thu Aug 27 19:07:35 2020 +* Created: Wed Sep 2 08:31:19 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/einvn/sky130_fd_sc_hdll__einvn_8.lvs.report b/cells/einvn/sky130_fd_sc_hdll__einvn_8.lvs.report new file mode 100644 index 0000000..b2ee423 --- /dev/null +++ b/cells/einvn/sky130_fd_sc_hdll__einvn_8.lvs.report
@@ -0,0 +1,512 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_8.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_8.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_8.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__einvn_8.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__einvn_8.sp ('sky130_fd_sc_hdll__einvn_8') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvn/sky130_fd_sc_hdll__einvn_8.spice ('sky130_fd_sc_hdll__einvn_8') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:31:22 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__einvn_8 sky130_fd_sc_hdll__einvn_8 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__einvn_8 +SOURCE CELL NAME: sky130_fd_sc_hdll__einvn_8 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 10 10 + + Instances: 17 17 MN (4 pins) + 17 17 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 35 34 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SMP2 (4 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 8 8 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 32 layout mos transistors were reduced to 4. + 28 mos transistors were deleted by parallel reduction. + 32 source mos transistors were reduced to 4. + 28 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB TE_B A VPWR Z VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/einvn/sky130_fd_sc_hdll__einvn_8.pex.spice b/cells/einvn/sky130_fd_sc_hdll__einvn_8.pex.spice index 34335cc..ae11b0e 100644 --- a/cells/einvn/sky130_fd_sc_hdll__einvn_8.pex.spice +++ b/cells/einvn/sky130_fd_sc_hdll__einvn_8.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__einvn_8.pex.spice -* Created: Thu Aug 27 19:07:42 2020 +* Created: Wed Sep 2 08:31:26 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/einvn/sky130_fd_sc_hdll__einvn_8.pxi.spice b/cells/einvn/sky130_fd_sc_hdll__einvn_8.pxi.spice index a169fee..3720330 100644 --- a/cells/einvn/sky130_fd_sc_hdll__einvn_8.pxi.spice +++ b/cells/einvn/sky130_fd_sc_hdll__einvn_8.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__einvn_8.pxi.spice -* Created: Thu Aug 27 19:07:42 2020 +* Created: Wed Sep 2 08:31:26 2020 * x_PM_SKY130_FD_SC_HDLL__EINVN_8%TE_B N_TE_B_c_146_n N_TE_B_M1014_g + N_TE_B_c_141_n N_TE_B_M1024_g N_TE_B_c_142_n N_TE_B_c_143_n N_TE_B_c_149_n
diff --git a/cells/einvn/sky130_fd_sc_hdll__einvn_8.spice b/cells/einvn/sky130_fd_sc_hdll__einvn_8.spice index 5abe26f..32d4f51 100644 --- a/cells/einvn/sky130_fd_sc_hdll__einvn_8.spice +++ b/cells/einvn/sky130_fd_sc_hdll__einvn_8.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__einvn_8.spice -* Created: Thu Aug 27 19:07:42 2020 +* Created: Wed Sep 2 08:31:26 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/einvp/sky130_fd_sc_hdll__einvp_1.lvs.report b/cells/einvp/sky130_fd_sc_hdll__einvp_1.lvs.report new file mode 100644 index 0000000..73b668c --- /dev/null +++ b/cells/einvp/sky130_fd_sc_hdll__einvp_1.lvs.report
@@ -0,0 +1,482 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_1.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__einvp_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__einvp_1.sp ('sky130_fd_sc_hdll__einvp_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_1.spice ('sky130_fd_sc_hdll__einvp_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:31:30 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__einvp_1 sky130_fd_sc_hdll__einvp_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__einvp_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__einvp_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 12 10 * + + Instances: 3 3 MN (4 pins) + 3 3 MP (4 pins) + 1 0 * Dpar (2 pins) + 2 0 * Probe (2 pins) + ------ ------ + Total Inst: 9 6 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SMP2 (4 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 8 8 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 3 layout instances were filtered and their pins removed from adjoining nets. + + 2 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB TE A VPWR Z VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/einvp/sky130_fd_sc_hdll__einvp_1.pex.spice b/cells/einvp/sky130_fd_sc_hdll__einvp_1.pex.spice index ad47162..41d15e5 100644 --- a/cells/einvp/sky130_fd_sc_hdll__einvp_1.pex.spice +++ b/cells/einvp/sky130_fd_sc_hdll__einvp_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__einvp_1.pex.spice -* Created: Thu Aug 27 19:07:49 2020 +* Created: Wed Sep 2 08:31:33 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/einvp/sky130_fd_sc_hdll__einvp_1.pxi.spice b/cells/einvp/sky130_fd_sc_hdll__einvp_1.pxi.spice index 6aceb80..b0f58fa 100644 --- a/cells/einvp/sky130_fd_sc_hdll__einvp_1.pxi.spice +++ b/cells/einvp/sky130_fd_sc_hdll__einvp_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__einvp_1.pxi.spice -* Created: Thu Aug 27 19:07:49 2020 +* Created: Wed Sep 2 08:31:33 2020 * x_PM_SKY130_FD_SC_HDLL__EINVP_1%TE N_TE_M1003_g N_TE_c_42_n N_TE_c_47_n + N_TE_c_48_n N_TE_M1001_g N_TE_c_43_n N_TE_c_44_n N_TE_M1005_g TE TE
diff --git a/cells/einvp/sky130_fd_sc_hdll__einvp_1.spice b/cells/einvp/sky130_fd_sc_hdll__einvp_1.spice index 39d0d07..ec7e23c 100644 --- a/cells/einvp/sky130_fd_sc_hdll__einvp_1.spice +++ b/cells/einvp/sky130_fd_sc_hdll__einvp_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__einvp_1.spice -* Created: Thu Aug 27 19:07:49 2020 +* Created: Wed Sep 2 08:31:33 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/einvp/sky130_fd_sc_hdll__einvp_2.lvs.report b/cells/einvp/sky130_fd_sc_hdll__einvp_2.lvs.report new file mode 100644 index 0000000..e37ed80 --- /dev/null +++ b/cells/einvp/sky130_fd_sc_hdll__einvp_2.lvs.report
@@ -0,0 +1,488 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_2.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__einvp_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__einvp_2.sp ('sky130_fd_sc_hdll__einvp_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_2.spice ('sky130_fd_sc_hdll__einvp_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:31:37 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__einvp_2 sky130_fd_sc_hdll__einvp_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__einvp_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__einvp_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 10 10 + + Instances: 5 5 MN (4 pins) + 5 5 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 11 10 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SMP2 (4 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 8 8 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 4. + 4 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 4. + 4 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB TE A VPWR Z VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/einvp/sky130_fd_sc_hdll__einvp_2.pex.spice b/cells/einvp/sky130_fd_sc_hdll__einvp_2.pex.spice index 6869651..ea795cc 100644 --- a/cells/einvp/sky130_fd_sc_hdll__einvp_2.pex.spice +++ b/cells/einvp/sky130_fd_sc_hdll__einvp_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__einvp_2.pex.spice -* Created: Thu Aug 27 19:07:56 2020 +* Created: Wed Sep 2 08:31:40 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/einvp/sky130_fd_sc_hdll__einvp_2.pxi.spice b/cells/einvp/sky130_fd_sc_hdll__einvp_2.pxi.spice index 34477e8..581a050 100644 --- a/cells/einvp/sky130_fd_sc_hdll__einvp_2.pxi.spice +++ b/cells/einvp/sky130_fd_sc_hdll__einvp_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__einvp_2.pxi.spice -* Created: Thu Aug 27 19:07:56 2020 +* Created: Wed Sep 2 08:31:40 2020 * x_PM_SKY130_FD_SC_HDLL__EINVP_2%TE N_TE_M1008_g N_TE_c_67_n N_TE_c_68_n + N_TE_M1002_g N_TE_c_60_n N_TE_c_61_n N_TE_c_62_n N_TE_M1004_g N_TE_c_63_n
diff --git a/cells/einvp/sky130_fd_sc_hdll__einvp_2.spice b/cells/einvp/sky130_fd_sc_hdll__einvp_2.spice index cda89ea..8b3cbd7 100644 --- a/cells/einvp/sky130_fd_sc_hdll__einvp_2.spice +++ b/cells/einvp/sky130_fd_sc_hdll__einvp_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__einvp_2.spice -* Created: Thu Aug 27 19:07:56 2020 +* Created: Wed Sep 2 08:31:40 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/einvp/sky130_fd_sc_hdll__einvp_4.lvs.report b/cells/einvp/sky130_fd_sc_hdll__einvp_4.lvs.report new file mode 100644 index 0000000..2ab865c --- /dev/null +++ b/cells/einvp/sky130_fd_sc_hdll__einvp_4.lvs.report
@@ -0,0 +1,496 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_4.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__einvp_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__einvp_4.sp ('sky130_fd_sc_hdll__einvp_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_4.spice ('sky130_fd_sc_hdll__einvp_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:31:43 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__einvp_4 sky130_fd_sc_hdll__einvp_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__einvp_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__einvp_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 10 10 + + Instances: 9 9 MN (4 pins) + 9 9 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 19 18 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SMP2 (4 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 8 8 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 16 layout mos transistors were reduced to 4. + 12 mos transistors were deleted by parallel reduction. + 16 source mos transistors were reduced to 4. + 12 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB TE A VPWR Z VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/einvp/sky130_fd_sc_hdll__einvp_4.pex.spice b/cells/einvp/sky130_fd_sc_hdll__einvp_4.pex.spice index c37f7fb..552e4a1 100644 --- a/cells/einvp/sky130_fd_sc_hdll__einvp_4.pex.spice +++ b/cells/einvp/sky130_fd_sc_hdll__einvp_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__einvp_4.pex.spice -* Created: Thu Aug 27 19:08:03 2020 +* Created: Wed Sep 2 08:31:47 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/einvp/sky130_fd_sc_hdll__einvp_4.pxi.spice b/cells/einvp/sky130_fd_sc_hdll__einvp_4.pxi.spice index 3e1a595..2fb9767 100644 --- a/cells/einvp/sky130_fd_sc_hdll__einvp_4.pxi.spice +++ b/cells/einvp/sky130_fd_sc_hdll__einvp_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__einvp_4.pxi.spice -* Created: Thu Aug 27 19:08:03 2020 +* Created: Wed Sep 2 08:31:47 2020 * x_PM_SKY130_FD_SC_HDLL__EINVP_4%TE N_TE_c_84_n N_TE_M1004_g N_TE_c_85_n + N_TE_M1013_g N_TE_c_86_n N_TE_c_87_n N_TE_M1000_g N_TE_c_88_n N_TE_c_89_n
diff --git a/cells/einvp/sky130_fd_sc_hdll__einvp_4.spice b/cells/einvp/sky130_fd_sc_hdll__einvp_4.spice index ec5265c..264b6bc 100644 --- a/cells/einvp/sky130_fd_sc_hdll__einvp_4.spice +++ b/cells/einvp/sky130_fd_sc_hdll__einvp_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__einvp_4.spice -* Created: Thu Aug 27 19:08:03 2020 +* Created: Wed Sep 2 08:31:47 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/einvp/sky130_fd_sc_hdll__einvp_8.lvs.report b/cells/einvp/sky130_fd_sc_hdll__einvp_8.lvs.report new file mode 100644 index 0000000..8ff7f2c --- /dev/null +++ b/cells/einvp/sky130_fd_sc_hdll__einvp_8.lvs.report
@@ -0,0 +1,515 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_8.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_8.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_8.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_8.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_8.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_8.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_8.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_8.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_8.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_8.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_8.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_8.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_8.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_8.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_8.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_8.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_8.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_8.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_8.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_8.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_8.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_8.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_8.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_8.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_8.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_8.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_8.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_8.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_8.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_8.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_8.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_8.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_8.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_8.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_8.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__einvp_8.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__einvp_8.sp ('sky130_fd_sc_hdll__einvp_8') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/einvp/sky130_fd_sc_hdll__einvp_8.spice ('sky130_fd_sc_hdll__einvp_8') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:31:51 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__einvp_8 sky130_fd_sc_hdll__einvp_8 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__einvp_8 +SOURCE CELL NAME: sky130_fd_sc_hdll__einvp_8 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 11 10 * + + Instances: 17 17 MN (4 pins) + 17 17 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 36 34 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SMP2 (4 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 8 8 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 32 layout mos transistors were reduced to 4. + 28 mos transistors were deleted by parallel reduction. + 32 source mos transistors were reduced to 4. + 28 mos transistors were deleted by parallel reduction. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB TE A VPWR Z VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/einvp/sky130_fd_sc_hdll__einvp_8.pex.spice b/cells/einvp/sky130_fd_sc_hdll__einvp_8.pex.spice index f5a707d..d097665 100644 --- a/cells/einvp/sky130_fd_sc_hdll__einvp_8.pex.spice +++ b/cells/einvp/sky130_fd_sc_hdll__einvp_8.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__einvp_8.pex.spice -* Created: Thu Aug 27 19:08:10 2020 +* Created: Wed Sep 2 08:31:54 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/einvp/sky130_fd_sc_hdll__einvp_8.pxi.spice b/cells/einvp/sky130_fd_sc_hdll__einvp_8.pxi.spice index 6d21150..70af7a5 100644 --- a/cells/einvp/sky130_fd_sc_hdll__einvp_8.pxi.spice +++ b/cells/einvp/sky130_fd_sc_hdll__einvp_8.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__einvp_8.pxi.spice -* Created: Thu Aug 27 19:08:10 2020 +* Created: Wed Sep 2 08:31:54 2020 * x_PM_SKY130_FD_SC_HDLL__EINVP_8%TE N_TE_c_131_n N_TE_M1031_g N_TE_c_132_n + N_TE_M1013_g N_TE_c_133_n N_TE_c_134_n N_TE_M1001_g N_TE_c_135_n N_TE_c_136_n
diff --git a/cells/einvp/sky130_fd_sc_hdll__einvp_8.spice b/cells/einvp/sky130_fd_sc_hdll__einvp_8.spice index ee126c8..3da91b2 100644 --- a/cells/einvp/sky130_fd_sc_hdll__einvp_8.spice +++ b/cells/einvp/sky130_fd_sc_hdll__einvp_8.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__einvp_8.spice -* Created: Thu Aug 27 19:08:10 2020 +* Created: Wed Sep 2 08:31:54 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/fill/sky130_fd_sc_hdll__fill_1.lvs.report b/cells/fill/sky130_fd_sc_hdll__fill_1.lvs.report new file mode 100644 index 0000000..56b5f6a --- /dev/null +++ b/cells/fill/sky130_fd_sc_hdll__fill_1.lvs.report
@@ -0,0 +1,375 @@ + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__fill_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__fill_1.sp ('sky130_fd_sc_hdll__fill_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/fill/sky130_fd_sc_hdll__fill_1.spice ('sky130_fd_sc_hdll__fill_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:31:58 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # # ######################## + # # # # + # # NOT COMPARED # + # # # # + # # ######################## + + + Error: Nothing in source. + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/fill/sky130_fd_sc_hdll__fill_2.lvs.report b/cells/fill/sky130_fd_sc_hdll__fill_2.lvs.report new file mode 100644 index 0000000..2b759cf --- /dev/null +++ b/cells/fill/sky130_fd_sc_hdll__fill_2.lvs.report
@@ -0,0 +1,375 @@ + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__fill_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__fill_2.sp ('sky130_fd_sc_hdll__fill_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/fill/sky130_fd_sc_hdll__fill_2.spice ('sky130_fd_sc_hdll__fill_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:32:01 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # # ######################## + # # # # + # # NOT COMPARED # + # # # # + # # ######################## + + + Error: Nothing in source. + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/fill/sky130_fd_sc_hdll__fill_4.lvs.report b/cells/fill/sky130_fd_sc_hdll__fill_4.lvs.report new file mode 100644 index 0000000..5dfc0a9 --- /dev/null +++ b/cells/fill/sky130_fd_sc_hdll__fill_4.lvs.report
@@ -0,0 +1,375 @@ + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__fill_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__fill_4.sp ('sky130_fd_sc_hdll__fill_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/fill/sky130_fd_sc_hdll__fill_4.spice ('sky130_fd_sc_hdll__fill_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:32:04 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # # ######################## + # # # # + # # NOT COMPARED # + # # # # + # # ######################## + + + Error: Nothing in source. + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/fill/sky130_fd_sc_hdll__fill_8.lvs.report b/cells/fill/sky130_fd_sc_hdll__fill_8.lvs.report new file mode 100644 index 0000000..f4c7f0d --- /dev/null +++ b/cells/fill/sky130_fd_sc_hdll__fill_8.lvs.report
@@ -0,0 +1,375 @@ + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__fill_8.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__fill_8.sp ('sky130_fd_sc_hdll__fill_8') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/fill/sky130_fd_sc_hdll__fill_8.spice ('sky130_fd_sc_hdll__fill_8') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:32:08 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # # ######################## + # # # # + # # NOT COMPARED # + # # # # + # # ######################## + + + Error: Nothing in source. + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/inputiso0n/sky130_fd_sc_hdll__inputiso0n_1.lvs.report b/cells/inputiso0n/sky130_fd_sc_hdll__inputiso0n_1.lvs.report new file mode 100644 index 0000000..802170c --- /dev/null +++ b/cells/inputiso0n/sky130_fd_sc_hdll__inputiso0n_1.lvs.report
@@ -0,0 +1,477 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inputiso0n/sky130_fd_sc_hdll__inputiso0n_1.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inputiso0n/sky130_fd_sc_hdll__inputiso0n_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inputiso0n/sky130_fd_sc_hdll__inputiso0n_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inputiso0n/sky130_fd_sc_hdll__inputiso0n_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inputiso0n/sky130_fd_sc_hdll__inputiso0n_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inputiso0n/sky130_fd_sc_hdll__inputiso0n_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inputiso0n/sky130_fd_sc_hdll__inputiso0n_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__inputiso0n_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__inputiso0n_1.sp ('sky130_fd_sc_hdll__inputiso0n_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inputiso0n/sky130_fd_sc_hdll__inputiso0n_1.spice ('sky130_fd_sc_hdll__inputiso0n_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:32:11 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__inputiso0n_1 sky130_fd_sc_hdll__inputiso0n_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__inputiso0n_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__inputiso0n_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 9 9 + + Instances: 3 3 MN (4 pins) + 3 3 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 7 6 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 1 1 MN (4 pins) + 3 3 MP (4 pins) + 1 1 SMN2 (4 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 8 8 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 3 3 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB A SLEEP_B VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/inputiso0n/sky130_fd_sc_hdll__inputiso0n_1.pex.spice b/cells/inputiso0n/sky130_fd_sc_hdll__inputiso0n_1.pex.spice index 1bcc9a5..2849838 100644 --- a/cells/inputiso0n/sky130_fd_sc_hdll__inputiso0n_1.pex.spice +++ b/cells/inputiso0n/sky130_fd_sc_hdll__inputiso0n_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__inputiso0n_1.pex.spice -* Created: Thu Aug 27 19:08:30 2020 +* Created: Wed Sep 2 08:32:14 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/inputiso0n/sky130_fd_sc_hdll__inputiso0n_1.pxi.spice b/cells/inputiso0n/sky130_fd_sc_hdll__inputiso0n_1.pxi.spice index 073161f..e8bce5f 100644 --- a/cells/inputiso0n/sky130_fd_sc_hdll__inputiso0n_1.pxi.spice +++ b/cells/inputiso0n/sky130_fd_sc_hdll__inputiso0n_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__inputiso0n_1.pxi.spice -* Created: Thu Aug 27 19:08:30 2020 +* Created: Wed Sep 2 08:32:14 2020 * x_PM_SKY130_FD_SC_HDLL__INPUTISO0N_1%A N_A_c_48_n N_A_c_49_n N_A_M1002_g + N_A_M1005_g A A N_A_c_46_n N_A_c_47_n PM_SKY130_FD_SC_HDLL__INPUTISO0N_1%A
diff --git a/cells/inputiso0n/sky130_fd_sc_hdll__inputiso0n_1.spice b/cells/inputiso0n/sky130_fd_sc_hdll__inputiso0n_1.spice index ce7546d..02f1726 100644 --- a/cells/inputiso0n/sky130_fd_sc_hdll__inputiso0n_1.spice +++ b/cells/inputiso0n/sky130_fd_sc_hdll__inputiso0n_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__inputiso0n_1.spice -* Created: Thu Aug 27 19:08:30 2020 +* Created: Wed Sep 2 08:32:14 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/inputiso0p/sky130_fd_sc_hdll__inputiso0p_1.lvs.report b/cells/inputiso0p/sky130_fd_sc_hdll__inputiso0p_1.lvs.report new file mode 100644 index 0000000..445921a --- /dev/null +++ b/cells/inputiso0p/sky130_fd_sc_hdll__inputiso0p_1.lvs.report
@@ -0,0 +1,482 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inputiso0p/sky130_fd_sc_hdll__inputiso0p_1.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inputiso0p/sky130_fd_sc_hdll__inputiso0p_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inputiso0p/sky130_fd_sc_hdll__inputiso0p_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inputiso0p/sky130_fd_sc_hdll__inputiso0p_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inputiso0p/sky130_fd_sc_hdll__inputiso0p_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inputiso0p/sky130_fd_sc_hdll__inputiso0p_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inputiso0p/sky130_fd_sc_hdll__inputiso0p_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inputiso0p/sky130_fd_sc_hdll__inputiso0p_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inputiso0p/sky130_fd_sc_hdll__inputiso0p_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__inputiso0p_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__inputiso0p_1.sp ('sky130_fd_sc_hdll__inputiso0p_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inputiso0p/sky130_fd_sc_hdll__inputiso0p_1.spice ('sky130_fd_sc_hdll__inputiso0p_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:32:18 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__inputiso0p_1 sky130_fd_sc_hdll__inputiso0p_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__inputiso0p_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__inputiso0p_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 11 10 * + + Instances: 4 4 MN (4 pins) + 4 4 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 10 8 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 9 9 + + Instances: 2 2 MN (4 pins) + 4 4 MP (4 pins) + 1 1 SMN2 (4 pins) + ------ ------ + Total Inst: 7 7 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 9 9 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 4 4 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + ------- ------- --------- --------- + Total Inst: 7 7 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB SLEEP A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/inputiso0p/sky130_fd_sc_hdll__inputiso0p_1.pex.spice b/cells/inputiso0p/sky130_fd_sc_hdll__inputiso0p_1.pex.spice index e7f4e64..ed9e656 100644 --- a/cells/inputiso0p/sky130_fd_sc_hdll__inputiso0p_1.pex.spice +++ b/cells/inputiso0p/sky130_fd_sc_hdll__inputiso0p_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__inputiso0p_1.pex.spice -* Created: Thu Aug 27 19:08:36 2020 +* Created: Wed Sep 2 08:32:22 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/inputiso0p/sky130_fd_sc_hdll__inputiso0p_1.pxi.spice b/cells/inputiso0p/sky130_fd_sc_hdll__inputiso0p_1.pxi.spice index d320108..ad77cf0 100644 --- a/cells/inputiso0p/sky130_fd_sc_hdll__inputiso0p_1.pxi.spice +++ b/cells/inputiso0p/sky130_fd_sc_hdll__inputiso0p_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__inputiso0p_1.pxi.spice -* Created: Thu Aug 27 19:08:36 2020 +* Created: Wed Sep 2 08:32:22 2020 * x_PM_SKY130_FD_SC_HDLL__INPUTISO0P_1%SLEEP N_SLEEP_c_57_n N_SLEEP_c_58_n + N_SLEEP_M1001_g N_SLEEP_M1005_g SLEEP SLEEP SLEEP N_SLEEP_c_56_n
diff --git a/cells/inputiso0p/sky130_fd_sc_hdll__inputiso0p_1.spice b/cells/inputiso0p/sky130_fd_sc_hdll__inputiso0p_1.spice index 3c62469..88b4ffc 100644 --- a/cells/inputiso0p/sky130_fd_sc_hdll__inputiso0p_1.spice +++ b/cells/inputiso0p/sky130_fd_sc_hdll__inputiso0p_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__inputiso0p_1.spice -* Created: Thu Aug 27 19:08:36 2020 +* Created: Wed Sep 2 08:32:22 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/inputiso1n/sky130_fd_sc_hdll__inputiso1n_1.lvs.report b/cells/inputiso1n/sky130_fd_sc_hdll__inputiso1n_1.lvs.report new file mode 100644 index 0000000..1efbd63 --- /dev/null +++ b/cells/inputiso1n/sky130_fd_sc_hdll__inputiso1n_1.lvs.report
@@ -0,0 +1,479 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inputiso1n/sky130_fd_sc_hdll__inputiso1n_1.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inputiso1n/sky130_fd_sc_hdll__inputiso1n_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inputiso1n/sky130_fd_sc_hdll__inputiso1n_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inputiso1n/sky130_fd_sc_hdll__inputiso1n_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inputiso1n/sky130_fd_sc_hdll__inputiso1n_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inputiso1n/sky130_fd_sc_hdll__inputiso1n_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inputiso1n/sky130_fd_sc_hdll__inputiso1n_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inputiso1n/sky130_fd_sc_hdll__inputiso1n_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inputiso1n/sky130_fd_sc_hdll__inputiso1n_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__inputiso1n_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__inputiso1n_1.sp ('sky130_fd_sc_hdll__inputiso1n_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inputiso1n/sky130_fd_sc_hdll__inputiso1n_1.spice ('sky130_fd_sc_hdll__inputiso1n_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:32:26 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__inputiso1n_1 sky130_fd_sc_hdll__inputiso1n_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__inputiso1n_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__inputiso1n_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 10 10 + + Instances: 4 4 MN (4 pins) + 4 4 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 9 8 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 9 9 + + Instances: 4 4 MN (4 pins) + 2 2 MP (4 pins) + 1 1 SMP2 (4 pins) + ------ ------ + Total Inst: 7 7 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 9 9 0 0 + + Instances: 4 4 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + 1 1 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 7 7 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB SLEEP_B A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/inputiso1n/sky130_fd_sc_hdll__inputiso1n_1.pex.spice b/cells/inputiso1n/sky130_fd_sc_hdll__inputiso1n_1.pex.spice index 9f78181..1a51587 100644 --- a/cells/inputiso1n/sky130_fd_sc_hdll__inputiso1n_1.pex.spice +++ b/cells/inputiso1n/sky130_fd_sc_hdll__inputiso1n_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__inputiso1n_1.pex.spice -* Created: Thu Aug 27 19:08:43 2020 +* Created: Wed Sep 2 08:32:29 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/inputiso1n/sky130_fd_sc_hdll__inputiso1n_1.pxi.spice b/cells/inputiso1n/sky130_fd_sc_hdll__inputiso1n_1.pxi.spice index f920c7b..c4ba793 100644 --- a/cells/inputiso1n/sky130_fd_sc_hdll__inputiso1n_1.pxi.spice +++ b/cells/inputiso1n/sky130_fd_sc_hdll__inputiso1n_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__inputiso1n_1.pxi.spice -* Created: Thu Aug 27 19:08:43 2020 +* Created: Wed Sep 2 08:32:29 2020 * x_PM_SKY130_FD_SC_HDLL__INPUTISO1N_1%SLEEP_B N_SLEEP_B_c_59_n N_SLEEP_B_M1002_g + N_SLEEP_B_M1000_g SLEEP_B N_SLEEP_B_c_58_n SLEEP_B
diff --git a/cells/inputiso1n/sky130_fd_sc_hdll__inputiso1n_1.spice b/cells/inputiso1n/sky130_fd_sc_hdll__inputiso1n_1.spice index 1e72df9..4d2cba5 100644 --- a/cells/inputiso1n/sky130_fd_sc_hdll__inputiso1n_1.spice +++ b/cells/inputiso1n/sky130_fd_sc_hdll__inputiso1n_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__inputiso1n_1.spice -* Created: Thu Aug 27 19:08:43 2020 +* Created: Wed Sep 2 08:32:29 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/inputiso1p/sky130_fd_sc_hdll__inputiso1p_1.lvs.report b/cells/inputiso1p/sky130_fd_sc_hdll__inputiso1p_1.lvs.report new file mode 100644 index 0000000..6bdf757 --- /dev/null +++ b/cells/inputiso1p/sky130_fd_sc_hdll__inputiso1p_1.lvs.report
@@ -0,0 +1,477 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inputiso1p/sky130_fd_sc_hdll__inputiso1p_1.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inputiso1p/sky130_fd_sc_hdll__inputiso1p_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inputiso1p/sky130_fd_sc_hdll__inputiso1p_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inputiso1p/sky130_fd_sc_hdll__inputiso1p_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inputiso1p/sky130_fd_sc_hdll__inputiso1p_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inputiso1p/sky130_fd_sc_hdll__inputiso1p_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inputiso1p/sky130_fd_sc_hdll__inputiso1p_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__inputiso1p_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__inputiso1p_1.sp ('sky130_fd_sc_hdll__inputiso1p_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inputiso1p/sky130_fd_sc_hdll__inputiso1p_1.spice ('sky130_fd_sc_hdll__inputiso1p_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:32:33 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__inputiso1p_1 sky130_fd_sc_hdll__inputiso1p_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__inputiso1p_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__inputiso1p_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 9 9 + + Instances: 3 3 MN (4 pins) + 3 3 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 7 6 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 3 3 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMP2 (4 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 8 8 0 0 + + Instances: 3 3 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB A SLEEP VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/inputiso1p/sky130_fd_sc_hdll__inputiso1p_1.pex.spice b/cells/inputiso1p/sky130_fd_sc_hdll__inputiso1p_1.pex.spice index c284970..1082d48 100644 --- a/cells/inputiso1p/sky130_fd_sc_hdll__inputiso1p_1.pex.spice +++ b/cells/inputiso1p/sky130_fd_sc_hdll__inputiso1p_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__inputiso1p_1.pex.spice -* Created: Thu Aug 27 19:08:50 2020 +* Created: Wed Sep 2 08:32:36 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/inputiso1p/sky130_fd_sc_hdll__inputiso1p_1.pxi.spice b/cells/inputiso1p/sky130_fd_sc_hdll__inputiso1p_1.pxi.spice index 0f6635b..44dc2dc 100644 --- a/cells/inputiso1p/sky130_fd_sc_hdll__inputiso1p_1.pxi.spice +++ b/cells/inputiso1p/sky130_fd_sc_hdll__inputiso1p_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__inputiso1p_1.pxi.spice -* Created: Thu Aug 27 19:08:50 2020 +* Created: Wed Sep 2 08:32:36 2020 * x_PM_SKY130_FD_SC_HDLL__INPUTISO1P_1%A N_A_c_36_n N_A_M1004_g N_A_M1000_g A A + PM_SKY130_FD_SC_HDLL__INPUTISO1P_1%A
diff --git a/cells/inputiso1p/sky130_fd_sc_hdll__inputiso1p_1.spice b/cells/inputiso1p/sky130_fd_sc_hdll__inputiso1p_1.spice index 2d5b1d0..86d97f9 100644 --- a/cells/inputiso1p/sky130_fd_sc_hdll__inputiso1p_1.spice +++ b/cells/inputiso1p/sky130_fd_sc_hdll__inputiso1p_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__inputiso1p_1.spice -* Created: Thu Aug 27 19:08:50 2020 +* Created: Wed Sep 2 08:32:36 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/inv/sky130_fd_sc_hdll__inv_1.lvs.report b/cells/inv/sky130_fd_sc_hdll__inv_1.lvs.report new file mode 100644 index 0000000..3b0de20 --- /dev/null +++ b/cells/inv/sky130_fd_sc_hdll__inv_1.lvs.report
@@ -0,0 +1,471 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_1.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__inv_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__inv_1.sp ('sky130_fd_sc_hdll__inv_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_1.spice ('sky130_fd_sc_hdll__inv_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:32:54 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__inv_1 sky130_fd_sc_hdll__inv_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__inv_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__inv_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 6 6 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 3 2 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 6 6 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + ------ ------ + Total Inst: 2 2 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 6 6 0 0 + + Nets: 6 6 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 2 2 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB A VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/inv/sky130_fd_sc_hdll__inv_1.pex.spice b/cells/inv/sky130_fd_sc_hdll__inv_1.pex.spice index e4a6b25..8a4144c 100644 --- a/cells/inv/sky130_fd_sc_hdll__inv_1.pex.spice +++ b/cells/inv/sky130_fd_sc_hdll__inv_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__inv_1.pex.spice -* Created: Thu Aug 27 19:09:11 2020 +* Created: Wed Sep 2 08:32:57 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/inv/sky130_fd_sc_hdll__inv_1.pxi.spice b/cells/inv/sky130_fd_sc_hdll__inv_1.pxi.spice index da672b2..9f7288d 100644 --- a/cells/inv/sky130_fd_sc_hdll__inv_1.pxi.spice +++ b/cells/inv/sky130_fd_sc_hdll__inv_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__inv_1.pxi.spice -* Created: Thu Aug 27 19:09:11 2020 +* Created: Wed Sep 2 08:32:57 2020 * x_PM_SKY130_FD_SC_HDLL__INV_1%A N_A_c_22_n N_A_M1001_g N_A_c_23_n N_A_M1000_g A + N_A_c_24_n A PM_SKY130_FD_SC_HDLL__INV_1%A
diff --git a/cells/inv/sky130_fd_sc_hdll__inv_1.spice b/cells/inv/sky130_fd_sc_hdll__inv_1.spice index 24cd694..21c9ae4 100644 --- a/cells/inv/sky130_fd_sc_hdll__inv_1.spice +++ b/cells/inv/sky130_fd_sc_hdll__inv_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__inv_1.spice -* Created: Thu Aug 27 19:09:11 2020 +* Created: Wed Sep 2 08:32:57 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/inv/sky130_fd_sc_hdll__inv_12.lvs.report b/cells/inv/sky130_fd_sc_hdll__inv_12.lvs.report new file mode 100644 index 0000000..05435a0 --- /dev/null +++ b/cells/inv/sky130_fd_sc_hdll__inv_12.lvs.report
@@ -0,0 +1,498 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_12.spice" +-------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_12.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_12.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__inv_12.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__inv_12.sp ('sky130_fd_sc_hdll__inv_12') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_12.spice ('sky130_fd_sc_hdll__inv_12') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:32:40 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__inv_12 sky130_fd_sc_hdll__inv_12 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__inv_12 +SOURCE CELL NAME: sky130_fd_sc_hdll__inv_12 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 6 6 + + Instances: 12 12 MN (4 pins) + 12 12 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 25 24 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 6 6 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + ------ ------ + Total Inst: 2 2 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 6 6 0 0 + + Nets: 6 6 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 2 2 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 24 layout mos transistors were reduced to 2. + 22 mos transistors were deleted by parallel reduction. + 24 source mos transistors were reduced to 2. + 22 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/inv/sky130_fd_sc_hdll__inv_12.pex.spice b/cells/inv/sky130_fd_sc_hdll__inv_12.pex.spice index 2344f91..5a5152f 100644 --- a/cells/inv/sky130_fd_sc_hdll__inv_12.pex.spice +++ b/cells/inv/sky130_fd_sc_hdll__inv_12.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__inv_12.pex.spice -* Created: Thu Aug 27 19:08:57 2020 +* Created: Wed Sep 2 08:32:43 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/inv/sky130_fd_sc_hdll__inv_12.pxi.spice b/cells/inv/sky130_fd_sc_hdll__inv_12.pxi.spice index 39fa649..2cbc7b0 100644 --- a/cells/inv/sky130_fd_sc_hdll__inv_12.pxi.spice +++ b/cells/inv/sky130_fd_sc_hdll__inv_12.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__inv_12.pxi.spice -* Created: Thu Aug 27 19:08:57 2020 +* Created: Wed Sep 2 08:32:43 2020 * x_PM_SKY130_FD_SC_HDLL__INV_12%A N_A_c_88_n N_A_M1000_g N_A_c_101_n N_A_M1002_g + N_A_c_89_n N_A_M1001_g N_A_c_102_n N_A_M1003_g N_A_c_90_n N_A_M1005_g
diff --git a/cells/inv/sky130_fd_sc_hdll__inv_12.spice b/cells/inv/sky130_fd_sc_hdll__inv_12.spice index de88134..b69ad67 100644 --- a/cells/inv/sky130_fd_sc_hdll__inv_12.spice +++ b/cells/inv/sky130_fd_sc_hdll__inv_12.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__inv_12.spice -* Created: Thu Aug 27 19:08:57 2020 +* Created: Wed Sep 2 08:32:43 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/inv/sky130_fd_sc_hdll__inv_16.lvs.report b/cells/inv/sky130_fd_sc_hdll__inv_16.lvs.report new file mode 100644 index 0000000..87ad683 --- /dev/null +++ b/cells/inv/sky130_fd_sc_hdll__inv_16.lvs.report
@@ -0,0 +1,506 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_16.spice" +-------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_16.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_16.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__inv_16.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__inv_16.sp ('sky130_fd_sc_hdll__inv_16') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_16.spice ('sky130_fd_sc_hdll__inv_16') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:32:47 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__inv_16 sky130_fd_sc_hdll__inv_16 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__inv_16 +SOURCE CELL NAME: sky130_fd_sc_hdll__inv_16 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 6 6 + + Instances: 16 16 MN (4 pins) + 16 16 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 33 32 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 6 6 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + ------ ------ + Total Inst: 2 2 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 6 6 0 0 + + Nets: 6 6 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 2 2 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 32 layout mos transistors were reduced to 2. + 30 mos transistors were deleted by parallel reduction. + 32 source mos transistors were reduced to 2. + 30 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/inv/sky130_fd_sc_hdll__inv_16.pex.spice b/cells/inv/sky130_fd_sc_hdll__inv_16.pex.spice index 12d377a..08dbeed 100644 --- a/cells/inv/sky130_fd_sc_hdll__inv_16.pex.spice +++ b/cells/inv/sky130_fd_sc_hdll__inv_16.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__inv_16.pex.spice -* Created: Thu Aug 27 19:09:04 2020 +* Created: Wed Sep 2 08:32:50 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/inv/sky130_fd_sc_hdll__inv_16.pxi.spice b/cells/inv/sky130_fd_sc_hdll__inv_16.pxi.spice index 86b2e3e..2c047b8 100644 --- a/cells/inv/sky130_fd_sc_hdll__inv_16.pxi.spice +++ b/cells/inv/sky130_fd_sc_hdll__inv_16.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__inv_16.pxi.spice -* Created: Thu Aug 27 19:09:04 2020 +* Created: Wed Sep 2 08:32:50 2020 * x_PM_SKY130_FD_SC_HDLL__INV_16%A N_A_c_128_n N_A_M1000_g N_A_c_110_n N_A_M1004_g + N_A_c_129_n N_A_M1001_g N_A_c_111_n N_A_M1006_g N_A_c_130_n N_A_M1002_g
diff --git a/cells/inv/sky130_fd_sc_hdll__inv_16.spice b/cells/inv/sky130_fd_sc_hdll__inv_16.spice index 3da653b..7159ffa 100644 --- a/cells/inv/sky130_fd_sc_hdll__inv_16.spice +++ b/cells/inv/sky130_fd_sc_hdll__inv_16.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__inv_16.spice -* Created: Thu Aug 27 19:09:04 2020 +* Created: Wed Sep 2 08:32:50 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/inv/sky130_fd_sc_hdll__inv_2.lvs.report b/cells/inv/sky130_fd_sc_hdll__inv_2.lvs.report new file mode 100644 index 0000000..b1d162b --- /dev/null +++ b/cells/inv/sky130_fd_sc_hdll__inv_2.lvs.report
@@ -0,0 +1,478 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_2.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__inv_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__inv_2.sp ('sky130_fd_sc_hdll__inv_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_2.spice ('sky130_fd_sc_hdll__inv_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:33:01 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__inv_2 sky130_fd_sc_hdll__inv_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__inv_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__inv_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 6 6 + + Instances: 2 2 MN (4 pins) + 2 2 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 5 4 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 6 6 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + ------ ------ + Total Inst: 2 2 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 6 6 0 0 + + Nets: 6 6 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 2 2 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/inv/sky130_fd_sc_hdll__inv_2.pex.spice b/cells/inv/sky130_fd_sc_hdll__inv_2.pex.spice index a65a336..759b3dc 100644 --- a/cells/inv/sky130_fd_sc_hdll__inv_2.pex.spice +++ b/cells/inv/sky130_fd_sc_hdll__inv_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__inv_2.pex.spice -* Created: Thu Aug 27 19:09:18 2020 +* Created: Wed Sep 2 08:33:04 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/inv/sky130_fd_sc_hdll__inv_2.pxi.spice b/cells/inv/sky130_fd_sc_hdll__inv_2.pxi.spice index 6c55791..b9a5d24 100644 --- a/cells/inv/sky130_fd_sc_hdll__inv_2.pxi.spice +++ b/cells/inv/sky130_fd_sc_hdll__inv_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__inv_2.pxi.spice -* Created: Thu Aug 27 19:09:18 2020 +* Created: Wed Sep 2 08:33:04 2020 * x_PM_SKY130_FD_SC_HDLL__INV_2%A N_A_c_30_n N_A_M1000_g N_A_c_26_n N_A_M1001_g + N_A_c_31_n N_A_M1003_g N_A_c_27_n N_A_M1002_g A N_A_c_29_n
diff --git a/cells/inv/sky130_fd_sc_hdll__inv_2.spice b/cells/inv/sky130_fd_sc_hdll__inv_2.spice index f04b98b..1656228 100644 --- a/cells/inv/sky130_fd_sc_hdll__inv_2.spice +++ b/cells/inv/sky130_fd_sc_hdll__inv_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__inv_2.spice -* Created: Thu Aug 27 19:09:18 2020 +* Created: Wed Sep 2 08:33:04 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/inv/sky130_fd_sc_hdll__inv_4.lvs.report b/cells/inv/sky130_fd_sc_hdll__inv_4.lvs.report new file mode 100644 index 0000000..6029449 --- /dev/null +++ b/cells/inv/sky130_fd_sc_hdll__inv_4.lvs.report
@@ -0,0 +1,482 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_4.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__inv_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__inv_4.sp ('sky130_fd_sc_hdll__inv_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_4.spice ('sky130_fd_sc_hdll__inv_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:33:08 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__inv_4 sky130_fd_sc_hdll__inv_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__inv_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__inv_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 6 6 + + Instances: 4 4 MN (4 pins) + 4 4 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 9 8 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 6 6 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + ------ ------ + Total Inst: 2 2 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 6 6 0 0 + + Nets: 6 6 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 2 2 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/inv/sky130_fd_sc_hdll__inv_4.pex.spice b/cells/inv/sky130_fd_sc_hdll__inv_4.pex.spice index 4010033..74b4a62 100644 --- a/cells/inv/sky130_fd_sc_hdll__inv_4.pex.spice +++ b/cells/inv/sky130_fd_sc_hdll__inv_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__inv_4.pex.spice -* Created: Thu Aug 27 19:09:25 2020 +* Created: Wed Sep 2 08:33:11 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/inv/sky130_fd_sc_hdll__inv_4.pxi.spice b/cells/inv/sky130_fd_sc_hdll__inv_4.pxi.spice index 6ef8fb3..86fe355 100644 --- a/cells/inv/sky130_fd_sc_hdll__inv_4.pxi.spice +++ b/cells/inv/sky130_fd_sc_hdll__inv_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__inv_4.pxi.spice -* Created: Thu Aug 27 19:09:25 2020 +* Created: Wed Sep 2 08:33:11 2020 * x_PM_SKY130_FD_SC_HDLL__INV_4%A N_A_c_51_n N_A_M1000_g N_A_c_44_n N_A_M1002_g + N_A_c_52_n N_A_M1001_g N_A_c_45_n N_A_M1003_g N_A_c_53_n N_A_M1004_g
diff --git a/cells/inv/sky130_fd_sc_hdll__inv_4.spice b/cells/inv/sky130_fd_sc_hdll__inv_4.spice index b958cef..364fe65 100644 --- a/cells/inv/sky130_fd_sc_hdll__inv_4.spice +++ b/cells/inv/sky130_fd_sc_hdll__inv_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__inv_4.spice -* Created: Thu Aug 27 19:09:25 2020 +* Created: Wed Sep 2 08:33:11 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/inv/sky130_fd_sc_hdll__inv_6.lvs.report b/cells/inv/sky130_fd_sc_hdll__inv_6.lvs.report new file mode 100644 index 0000000..dfcb42e --- /dev/null +++ b/cells/inv/sky130_fd_sc_hdll__inv_6.lvs.report
@@ -0,0 +1,489 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_6.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_6.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_6.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_6.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_6.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_6.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_6.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_6.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_6.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_6.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_6.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_6.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_6.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__inv_6.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__inv_6.sp ('sky130_fd_sc_hdll__inv_6') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_6.spice ('sky130_fd_sc_hdll__inv_6') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:33:15 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__inv_6 sky130_fd_sc_hdll__inv_6 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__inv_6 +SOURCE CELL NAME: sky130_fd_sc_hdll__inv_6 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 9 6 * + + Instances: 6 6 MN (4 pins) + 6 6 MP (4 pins) + 1 0 * Dpar (2 pins) + 3 0 * Probe (2 pins) + ------ ------ + Total Inst: 16 12 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 6 6 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + ------ ------ + Total Inst: 2 2 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 6 6 0 0 + + Nets: 6 6 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 2 2 0 0 + + +o Statistics: + + 4 layout instances were filtered and their pins removed from adjoining nets. + + 12 layout mos transistors were reduced to 2. + 10 mos transistors were deleted by parallel reduction. + 12 source mos transistors were reduced to 2. + 10 mos transistors were deleted by parallel reduction. + + 3 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 1 sec
diff --git a/cells/inv/sky130_fd_sc_hdll__inv_6.pex.spice b/cells/inv/sky130_fd_sc_hdll__inv_6.pex.spice index 8b1afb7..c557f47 100644 --- a/cells/inv/sky130_fd_sc_hdll__inv_6.pex.spice +++ b/cells/inv/sky130_fd_sc_hdll__inv_6.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__inv_6.pex.spice -* Created: Thu Aug 27 19:09:31 2020 +* Created: Wed Sep 2 08:33:18 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/inv/sky130_fd_sc_hdll__inv_6.pxi.spice b/cells/inv/sky130_fd_sc_hdll__inv_6.pxi.spice index f0e35c2..cdaa090 100644 --- a/cells/inv/sky130_fd_sc_hdll__inv_6.pxi.spice +++ b/cells/inv/sky130_fd_sc_hdll__inv_6.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__inv_6.pxi.spice -* Created: Thu Aug 27 19:09:31 2020 +* Created: Wed Sep 2 08:33:18 2020 * x_PM_SKY130_FD_SC_HDLL__INV_6%A N_A_c_60_n N_A_M1000_g N_A_c_52_n N_A_M1001_g + N_A_c_61_n N_A_M1002_g N_A_c_53_n N_A_M1005_g N_A_c_62_n N_A_M1003_g
diff --git a/cells/inv/sky130_fd_sc_hdll__inv_6.spice b/cells/inv/sky130_fd_sc_hdll__inv_6.spice index f6a1b8c..f5731e0 100644 --- a/cells/inv/sky130_fd_sc_hdll__inv_6.spice +++ b/cells/inv/sky130_fd_sc_hdll__inv_6.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__inv_6.spice -* Created: Thu Aug 27 19:09:31 2020 +* Created: Wed Sep 2 08:33:18 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/inv/sky130_fd_sc_hdll__inv_8.lvs.report b/cells/inv/sky130_fd_sc_hdll__inv_8.lvs.report new file mode 100644 index 0000000..2705e68 --- /dev/null +++ b/cells/inv/sky130_fd_sc_hdll__inv_8.lvs.report
@@ -0,0 +1,490 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_8.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_8.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_8.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__inv_8.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__inv_8.sp ('sky130_fd_sc_hdll__inv_8') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/inv/sky130_fd_sc_hdll__inv_8.spice ('sky130_fd_sc_hdll__inv_8') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:33:22 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__inv_8 sky130_fd_sc_hdll__inv_8 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__inv_8 +SOURCE CELL NAME: sky130_fd_sc_hdll__inv_8 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 6 6 + + Instances: 8 8 MN (4 pins) + 8 8 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 17 16 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 6 6 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + ------ ------ + Total Inst: 2 2 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 6 6 0 0 + + Nets: 6 6 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 2 2 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 16 layout mos transistors were reduced to 2. + 14 mos transistors were deleted by parallel reduction. + 16 source mos transistors were reduced to 2. + 14 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/inv/sky130_fd_sc_hdll__inv_8.pex.spice b/cells/inv/sky130_fd_sc_hdll__inv_8.pex.spice index c81c2f2..4d708e9 100644 --- a/cells/inv/sky130_fd_sc_hdll__inv_8.pex.spice +++ b/cells/inv/sky130_fd_sc_hdll__inv_8.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__inv_8.pex.spice -* Created: Thu Aug 27 19:09:38 2020 +* Created: Wed Sep 2 08:33:26 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/inv/sky130_fd_sc_hdll__inv_8.pxi.spice b/cells/inv/sky130_fd_sc_hdll__inv_8.pxi.spice index 1a0127c..dacc9c9 100644 --- a/cells/inv/sky130_fd_sc_hdll__inv_8.pxi.spice +++ b/cells/inv/sky130_fd_sc_hdll__inv_8.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__inv_8.pxi.spice -* Created: Thu Aug 27 19:09:38 2020 +* Created: Wed Sep 2 08:33:26 2020 * x_PM_SKY130_FD_SC_HDLL__INV_8%A N_A_c_66_n N_A_M1000_g N_A_c_75_n N_A_M1001_g + N_A_c_67_n N_A_M1003_g N_A_c_76_n N_A_M1002_g N_A_c_68_n N_A_M1005_g
diff --git a/cells/inv/sky130_fd_sc_hdll__inv_8.spice b/cells/inv/sky130_fd_sc_hdll__inv_8.spice index 50d956a..8bea8ba 100644 --- a/cells/inv/sky130_fd_sc_hdll__inv_8.spice +++ b/cells/inv/sky130_fd_sc_hdll__inv_8.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__inv_8.spice -* Created: Thu Aug 27 19:09:38 2020 +* Created: Wed Sep 2 08:33:26 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_1.lvs.report b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_1.lvs.report new file mode 100644 index 0000000..fcc7e40 --- /dev/null +++ b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_1.lvs.report
@@ -0,0 +1,480 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_1.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__isobufsrc_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__isobufsrc_1.sp ('sky130_fd_sc_hdll__isobufsrc_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_1.spice ('sky130_fd_sc_hdll__isobufsrc_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:33:37 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__isobufsrc_1 sky130_fd_sc_hdll__isobufsrc_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__isobufsrc_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__isobufsrc_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 10 9 * + + Instances: 3 3 MN (4 pins) + 3 3 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 8 6 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 3 3 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMP2 (4 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 8 8 0 0 + + Instances: 3 3 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A SLEEP VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_1.pex.spice b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_1.pex.spice index c6b1843..29a059c 100644 --- a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_1.pex.spice +++ b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__isobufsrc_1.pex.spice -* Created: Thu Aug 27 19:09:52 2020 +* Created: Wed Sep 2 08:33:40 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_1.pxi.spice b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_1.pxi.spice index cb3e4c8..38e932d 100644 --- a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_1.pxi.spice +++ b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__isobufsrc_1.pxi.spice -* Created: Thu Aug 27 19:09:52 2020 +* Created: Wed Sep 2 08:33:40 2020 * x_PM_SKY130_FD_SC_HDLL__ISOBUFSRC_1%A N_A_M1004_g N_A_c_44_n N_A_M1005_g + N_A_c_41_n N_A_c_42_n A A PM_SKY130_FD_SC_HDLL__ISOBUFSRC_1%A
diff --git a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_1.spice b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_1.spice index 1b57c4d..006d946 100644 --- a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_1.spice +++ b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__isobufsrc_1.spice -* Created: Thu Aug 27 19:09:52 2020 +* Created: Wed Sep 2 08:33:40 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.lvs.report b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.lvs.report new file mode 100644 index 0000000..7551db5 --- /dev/null +++ b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.lvs.report
@@ -0,0 +1,551 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file 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"/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 147 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 149 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 151 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 153 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 155 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 157 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 159 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" +Warning: Duplicate parameter definition "MULT" at line 161 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__isobufsrc_16.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__isobufsrc_16.sp ('sky130_fd_sc_hdll__isobufsrc_16') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice ('sky130_fd_sc_hdll__isobufsrc_16') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:33:30 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__isobufsrc_16 sky130_fd_sc_hdll__isobufsrc_16 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__isobufsrc_16 +SOURCE CELL NAME: sky130_fd_sc_hdll__isobufsrc_16 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 10 9 * + + Instances: 36 36 MN (4 pins) + 36 36 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 74 72 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 3 3 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMP2 (4 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 8 8 0 0 + + Instances: 3 3 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 72 layout mos transistors were reduced to 6. + 66 mos transistors were deleted by parallel reduction. + 72 source mos transistors were reduced to 6. + 66 mos transistors were deleted by parallel reduction. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A SLEEP VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.pex.spice b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.pex.spice index 7a629e9..6d1135d 100644 --- a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.pex.spice +++ b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__isobufsrc_16.pex.spice -* Created: Thu Aug 27 19:09:45 2020 +* Created: Wed Sep 2 08:33:33 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.pxi.spice b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.pxi.spice index 8a97064..3c9ea2f 100644 --- a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.pxi.spice +++ b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__isobufsrc_16.pxi.spice -* Created: Thu Aug 27 19:09:45 2020 +* Created: Wed Sep 2 08:33:33 2020 * x_PM_SKY130_FD_SC_HDLL__ISOBUFSRC_16%A N_A_c_256_n N_A_M1001_g N_A_c_248_n + N_A_M1028_g N_A_c_257_n N_A_M1015_g N_A_c_249_n N_A_M1037_g N_A_c_258_n
diff --git a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice index 8624204..e1d51c8 100644 --- a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice +++ b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__isobufsrc_16.spice -* Created: Thu Aug 27 19:09:45 2020 +* Created: Wed Sep 2 08:33:33 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_2.lvs.report b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_2.lvs.report new file mode 100644 index 0000000..94abc88 --- /dev/null +++ b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_2.lvs.report
@@ -0,0 +1,489 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_2.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__isobufsrc_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__isobufsrc_2.sp ('sky130_fd_sc_hdll__isobufsrc_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_2.spice ('sky130_fd_sc_hdll__isobufsrc_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:33:44 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__isobufsrc_2 sky130_fd_sc_hdll__isobufsrc_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__isobufsrc_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__isobufsrc_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 10 9 * + + Instances: 5 5 MN (4 pins) + 5 5 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 12 10 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 3 3 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMP2 (4 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 8 8 0 0 + + Instances: 3 3 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 4. + 4 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 4. + 4 mos transistors were deleted by parallel reduction. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB SLEEP A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_2.pex.spice b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_2.pex.spice index ba45c1e..9252b71 100644 --- a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_2.pex.spice +++ b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__isobufsrc_2.pex.spice -* Created: Thu Aug 27 19:09:59 2020 +* Created: Wed Sep 2 08:33:47 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_2.pxi.spice b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_2.pxi.spice index 7a56292..15f119e 100644 --- a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_2.pxi.spice +++ b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__isobufsrc_2.pxi.spice -* Created: Thu Aug 27 19:09:59 2020 +* Created: Wed Sep 2 08:33:47 2020 * x_PM_SKY130_FD_SC_HDLL__ISOBUFSRC_2%SLEEP N_SLEEP_c_65_n N_SLEEP_M1004_g + N_SLEEP_c_68_n N_SLEEP_M1000_g N_SLEEP_c_69_n N_SLEEP_M1007_g N_SLEEP_c_66_n
diff --git a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_2.spice b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_2.spice index 2aaa68a..fa9c403 100644 --- a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_2.spice +++ b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__isobufsrc_2.spice -* Created: Thu Aug 27 19:09:59 2020 +* Created: Wed Sep 2 08:33:47 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_4.lvs.report b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_4.lvs.report new file mode 100644 index 0000000..f2fa616 --- /dev/null +++ b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_4.lvs.report
@@ -0,0 +1,497 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_4.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__isobufsrc_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__isobufsrc_4.sp ('sky130_fd_sc_hdll__isobufsrc_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_4.spice ('sky130_fd_sc_hdll__isobufsrc_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:33:51 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__isobufsrc_4 sky130_fd_sc_hdll__isobufsrc_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__isobufsrc_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__isobufsrc_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 10 9 * + + Instances: 9 9 MN (4 pins) + 9 9 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 20 18 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 3 3 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMP2 (4 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 8 8 0 0 + + Instances: 3 3 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 16 layout mos transistors were reduced to 4. + 12 mos transistors were deleted by parallel reduction. + 16 source mos transistors were reduced to 4. + 12 mos transistors were deleted by parallel reduction. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB SLEEP A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_4.pex.spice b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_4.pex.spice index a7ef03f..75544a2 100644 --- a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_4.pex.spice +++ b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__isobufsrc_4.pex.spice -* Created: Thu Aug 27 19:10:06 2020 +* Created: Wed Sep 2 08:33:54 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_4.pxi.spice b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_4.pxi.spice index fb75adb..24adebb 100644 --- a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_4.pxi.spice +++ b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__isobufsrc_4.pxi.spice -* Created: Thu Aug 27 19:10:06 2020 +* Created: Wed Sep 2 08:33:54 2020 * x_PM_SKY130_FD_SC_HDLL__ISOBUFSRC_4%SLEEP N_SLEEP_c_86_n N_SLEEP_M1002_g + N_SLEEP_c_92_n N_SLEEP_M1001_g N_SLEEP_c_87_n N_SLEEP_M1007_g N_SLEEP_c_93_n
diff --git a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_4.spice b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_4.spice index 1d3c1b1..e8ba64e 100644 --- a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_4.spice +++ b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__isobufsrc_4.spice -* Created: Thu Aug 27 19:10:06 2020 +* Created: Wed Sep 2 08:33:54 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.lvs.report b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.lvs.report new file mode 100644 index 0000000..9385206 --- /dev/null +++ b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.lvs.report
@@ -0,0 +1,515 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice" +Warning: Duplicate parameter definition "MULT" at line 87 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice" +Warning: Duplicate parameter definition "MULT" at line 89 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__isobufsrc_8.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__isobufsrc_8.sp ('sky130_fd_sc_hdll__isobufsrc_8') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice ('sky130_fd_sc_hdll__isobufsrc_8') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:33:58 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__isobufsrc_8 sky130_fd_sc_hdll__isobufsrc_8 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__isobufsrc_8 +SOURCE CELL NAME: sky130_fd_sc_hdll__isobufsrc_8 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 10 9 * + + Instances: 18 18 MN (4 pins) + 18 18 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 38 36 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 3 3 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMP2 (4 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 8 8 0 0 + + Instances: 3 3 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 36 layout mos transistors were reduced to 6. + 30 mos transistors were deleted by parallel reduction. + 36 source mos transistors were reduced to 6. + 30 mos transistors were deleted by parallel reduction. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A SLEEP VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.pex.spice b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.pex.spice index 40f797a..3a3c359 100644 --- a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.pex.spice +++ b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__isobufsrc_8.pex.spice -* Created: Thu Aug 27 19:10:13 2020 +* Created: Wed Sep 2 08:34:01 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.pxi.spice b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.pxi.spice index 4c02b42..abc0dd2 100644 --- a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.pxi.spice +++ b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__isobufsrc_8.pxi.spice -* Created: Thu Aug 27 19:10:13 2020 +* Created: Wed Sep 2 08:34:01 2020 * x_PM_SKY130_FD_SC_HDLL__ISOBUFSRC_8%A N_A_c_137_n N_A_M1001_g N_A_c_132_n + N_A_M1018_g N_A_c_138_n N_A_M1014_g N_A_c_133_n N_A_M1027_g A N_A_c_135_n
diff --git a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice index 48f1d09..d806c05 100644 --- a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice +++ b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__isobufsrc_8.spice -* Created: Thu Aug 27 19:10:13 2020 +* Created: Wed Sep 2 08:34:01 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/mux2/sky130_fd_sc_hdll__mux2_1.lvs.report b/cells/mux2/sky130_fd_sc_hdll__mux2_1.lvs.report new file mode 100644 index 0000000..6a24fc0 --- /dev/null +++ b/cells/mux2/sky130_fd_sc_hdll__mux2_1.lvs.report
@@ -0,0 +1,488 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_1.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__mux2_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__mux2_1.sp ('sky130_fd_sc_hdll__mux2_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_1.spice ('sky130_fd_sc_hdll__mux2_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:34:20 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__mux2_1 sky130_fd_sc_hdll__mux2_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__mux2_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__mux2_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 15 14 * + + Instances: 6 6 MN (4 pins) + 6 6 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 14 12 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 10 10 + + Instances: 2 2 MN (4 pins) + 2 2 MP (4 pins) + 2 2 SMN2 (4 pins) + 2 2 SMP2 (4 pins) + ------ ------ + Total Inst: 8 8 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 10 10 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + 2 2 0 0 SMN2 + 2 2 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 8 8 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB S A1 A0 X VPWR VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/mux2/sky130_fd_sc_hdll__mux2_1.pex.spice b/cells/mux2/sky130_fd_sc_hdll__mux2_1.pex.spice index e264cca..a9c0838 100644 --- a/cells/mux2/sky130_fd_sc_hdll__mux2_1.pex.spice +++ b/cells/mux2/sky130_fd_sc_hdll__mux2_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__mux2_1.pex.spice -* Created: Thu Aug 27 19:10:34 2020 +* Created: Wed Sep 2 08:34:23 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/mux2/sky130_fd_sc_hdll__mux2_1.pxi.spice b/cells/mux2/sky130_fd_sc_hdll__mux2_1.pxi.spice index ff8c8cf..a0b1292 100644 --- a/cells/mux2/sky130_fd_sc_hdll__mux2_1.pxi.spice +++ b/cells/mux2/sky130_fd_sc_hdll__mux2_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__mux2_1.pxi.spice -* Created: Thu Aug 27 19:10:34 2020 +* Created: Wed Sep 2 08:34:23 2020 * x_PM_SKY130_FD_SC_HDLL__MUX2_1%A_79_21# N_A_79_21#_M1004_d N_A_79_21#_M1002_d + N_A_79_21#_c_75_n N_A_79_21#_M1010_g N_A_79_21#_c_76_n N_A_79_21#_M1005_g
diff --git a/cells/mux2/sky130_fd_sc_hdll__mux2_1.spice b/cells/mux2/sky130_fd_sc_hdll__mux2_1.spice index e5fe660..50c77f5 100644 --- a/cells/mux2/sky130_fd_sc_hdll__mux2_1.spice +++ b/cells/mux2/sky130_fd_sc_hdll__mux2_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__mux2_1.spice -* Created: Thu Aug 27 19:10:34 2020 +* Created: Wed Sep 2 08:34:23 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/mux2/sky130_fd_sc_hdll__mux2_12.lvs.report b/cells/mux2/sky130_fd_sc_hdll__mux2_12.lvs.report new file mode 100644 index 0000000..b2f9279 --- /dev/null +++ b/cells/mux2/sky130_fd_sc_hdll__mux2_12.lvs.report
@@ -0,0 +1,538 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +---------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 87 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 89 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 91 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 93 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 95 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 97 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 99 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 101 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 103 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 105 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 107 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 109 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 111 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 113 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 115 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 117 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 119 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 121 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 123 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 125 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 127 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 129 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 131 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 133 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 135 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 137 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__mux2_12.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__mux2_12.sp ('sky130_fd_sc_hdll__mux2_12') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice ('sky130_fd_sc_hdll__mux2_12') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:34:06 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__mux2_12 sky130_fd_sc_hdll__mux2_12 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__mux2_12 +SOURCE CELL NAME: sky130_fd_sc_hdll__mux2_12 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 14 14 + + Instances: 30 30 MN (4 pins) + 30 30 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 61 60 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 10 10 + + Instances: 2 2 MN (4 pins) + 2 2 MP (4 pins) + 2 2 SMN2 (4 pins) + 2 2 SMP2 (4 pins) + ------ ------ + Total Inst: 8 8 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 10 10 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + 2 2 0 0 SMN2 + 2 2 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 8 8 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 60 layout mos transistors were reduced to 12. + 48 mos transistors were deleted by parallel reduction. + 60 source mos transistors were reduced to 12. + 48 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A1 S A0 VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/mux2/sky130_fd_sc_hdll__mux2_12.pex.spice b/cells/mux2/sky130_fd_sc_hdll__mux2_12.pex.spice index 99b9937..2a65bde 100644 --- a/cells/mux2/sky130_fd_sc_hdll__mux2_12.pex.spice +++ b/cells/mux2/sky130_fd_sc_hdll__mux2_12.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__mux2_12.pex.spice -* Created: Thu Aug 27 19:10:20 2020 +* Created: Wed Sep 2 08:34:09 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/mux2/sky130_fd_sc_hdll__mux2_12.pxi.spice b/cells/mux2/sky130_fd_sc_hdll__mux2_12.pxi.spice index 0a6f64c..6c767bb 100644 --- a/cells/mux2/sky130_fd_sc_hdll__mux2_12.pxi.spice +++ b/cells/mux2/sky130_fd_sc_hdll__mux2_12.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__mux2_12.pxi.spice -* Created: Thu Aug 27 19:10:20 2020 +* Created: Wed Sep 2 08:34:09 2020 * x_PM_SKY130_FD_SC_HDLL__MUX2_12%A1 N_A1_c_209_n N_A1_M1002_g N_A1_c_204_n + N_A1_M1016_g N_A1_c_205_n N_A1_M1040_g N_A1_c_210_n N_A1_M1026_g N_A1_c_211_n
diff --git a/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice b/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice index 5b75eca..dcba391 100644 --- a/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice +++ b/cells/mux2/sky130_fd_sc_hdll__mux2_12.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__mux2_12.spice -* Created: Thu Aug 27 19:10:20 2020 +* Created: Wed Sep 2 08:34:09 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/mux2/sky130_fd_sc_hdll__mux2_16.lvs.report b/cells/mux2/sky130_fd_sc_hdll__mux2_16.lvs.report new file mode 100644 index 0000000..bb1a615 --- /dev/null +++ b/cells/mux2/sky130_fd_sc_hdll__mux2_16.lvs.report
@@ -0,0 +1,546 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +---------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 87 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 89 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 91 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 93 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 95 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 97 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 99 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 101 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 103 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 105 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 107 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 109 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 111 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 113 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 115 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 117 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 119 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 121 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 123 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 125 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 127 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 129 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 131 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 133 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 135 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 137 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 139 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 141 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 143 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 145 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 147 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 149 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 151 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 153 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__mux2_16.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__mux2_16.sp ('sky130_fd_sc_hdll__mux2_16') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice ('sky130_fd_sc_hdll__mux2_16') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:34:13 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__mux2_16 sky130_fd_sc_hdll__mux2_16 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__mux2_16 +SOURCE CELL NAME: sky130_fd_sc_hdll__mux2_16 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 14 14 + + Instances: 34 34 MN (4 pins) + 34 34 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 69 68 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 10 10 + + Instances: 2 2 MN (4 pins) + 2 2 MP (4 pins) + 2 2 SMN2 (4 pins) + 2 2 SMP2 (4 pins) + ------ ------ + Total Inst: 8 8 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 10 10 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + 2 2 0 0 SMN2 + 2 2 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 8 8 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 68 layout mos transistors were reduced to 12. + 56 mos transistors were deleted by parallel reduction. + 68 source mos transistors were reduced to 12. + 56 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A1 S A0 VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/mux2/sky130_fd_sc_hdll__mux2_16.pex.spice b/cells/mux2/sky130_fd_sc_hdll__mux2_16.pex.spice index 2b6bdd9..01c56f0 100644 --- a/cells/mux2/sky130_fd_sc_hdll__mux2_16.pex.spice +++ b/cells/mux2/sky130_fd_sc_hdll__mux2_16.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__mux2_16.pex.spice -* Created: Thu Aug 27 19:10:27 2020 +* Created: Wed Sep 2 08:34:16 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/mux2/sky130_fd_sc_hdll__mux2_16.pxi.spice b/cells/mux2/sky130_fd_sc_hdll__mux2_16.pxi.spice index 457731a..a842bd7 100644 --- a/cells/mux2/sky130_fd_sc_hdll__mux2_16.pxi.spice +++ b/cells/mux2/sky130_fd_sc_hdll__mux2_16.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__mux2_16.pxi.spice -* Created: Thu Aug 27 19:10:27 2020 +* Created: Wed Sep 2 08:34:16 2020 * x_PM_SKY130_FD_SC_HDLL__MUX2_16%A1 N_A1_c_233_n N_A1_M1002_g N_A1_c_228_n + N_A1_M1017_g N_A1_c_229_n N_A1_M1044_g N_A1_c_234_n N_A1_M1029_g N_A1_c_235_n
diff --git a/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice b/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice index 8a38035..ebd63b8 100644 --- a/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice +++ b/cells/mux2/sky130_fd_sc_hdll__mux2_16.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__mux2_16.spice -* Created: Thu Aug 27 19:10:27 2020 +* Created: Wed Sep 2 08:34:16 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/mux2/sky130_fd_sc_hdll__mux2_2.lvs.report b/cells/mux2/sky130_fd_sc_hdll__mux2_2.lvs.report new file mode 100644 index 0000000..6f26796 --- /dev/null +++ b/cells/mux2/sky130_fd_sc_hdll__mux2_2.lvs.report
@@ -0,0 +1,492 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_2.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__mux2_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__mux2_2.sp ('sky130_fd_sc_hdll__mux2_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_2.spice ('sky130_fd_sc_hdll__mux2_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:34:27 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__mux2_2 sky130_fd_sc_hdll__mux2_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__mux2_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__mux2_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 14 14 + + Instances: 7 7 MN (4 pins) + 7 7 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 15 14 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 10 10 + + Instances: 2 2 MN (4 pins) + 2 2 MP (4 pins) + 2 2 SMN2 (4 pins) + 2 2 SMP2 (4 pins) + ------ ------ + Total Inst: 8 8 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 10 10 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + 2 2 0 0 SMN2 + 2 2 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 8 8 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A0 A1 S VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/mux2/sky130_fd_sc_hdll__mux2_2.pex.spice b/cells/mux2/sky130_fd_sc_hdll__mux2_2.pex.spice index 1ba7d6d..12a134f 100644 --- a/cells/mux2/sky130_fd_sc_hdll__mux2_2.pex.spice +++ b/cells/mux2/sky130_fd_sc_hdll__mux2_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__mux2_2.pex.spice -* Created: Thu Aug 27 19:10:41 2020 +* Created: Wed Sep 2 08:34:30 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/mux2/sky130_fd_sc_hdll__mux2_2.pxi.spice b/cells/mux2/sky130_fd_sc_hdll__mux2_2.pxi.spice index 5abc321..c1e6f86 100644 --- a/cells/mux2/sky130_fd_sc_hdll__mux2_2.pxi.spice +++ b/cells/mux2/sky130_fd_sc_hdll__mux2_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__mux2_2.pxi.spice -* Created: Thu Aug 27 19:10:41 2020 +* Created: Wed Sep 2 08:34:30 2020 * x_PM_SKY130_FD_SC_HDLL__MUX2_2%A_79_21# N_A_79_21#_M1004_d N_A_79_21#_M1010_d + N_A_79_21#_c_77_n N_A_79_21#_M1006_g N_A_79_21#_c_84_n N_A_79_21#_M1000_g
diff --git a/cells/mux2/sky130_fd_sc_hdll__mux2_2.spice b/cells/mux2/sky130_fd_sc_hdll__mux2_2.spice index 59aa8af..181e2f4 100644 --- a/cells/mux2/sky130_fd_sc_hdll__mux2_2.spice +++ b/cells/mux2/sky130_fd_sc_hdll__mux2_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__mux2_2.spice -* Created: Thu Aug 27 19:10:41 2020 +* Created: Wed Sep 2 08:34:30 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/mux2/sky130_fd_sc_hdll__mux2_4.lvs.report b/cells/mux2/sky130_fd_sc_hdll__mux2_4.lvs.report new file mode 100644 index 0000000..9b81069 --- /dev/null +++ b/cells/mux2/sky130_fd_sc_hdll__mux2_4.lvs.report
@@ -0,0 +1,496 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_4.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__mux2_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__mux2_4.sp ('sky130_fd_sc_hdll__mux2_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_4.spice ('sky130_fd_sc_hdll__mux2_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:34:34 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__mux2_4 sky130_fd_sc_hdll__mux2_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__mux2_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__mux2_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 14 14 + + Instances: 9 9 MN (4 pins) + 9 9 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 19 18 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 10 10 + + Instances: 2 2 MN (4 pins) + 2 2 MP (4 pins) + 2 2 SMN2 (4 pins) + 2 2 SMP2 (4 pins) + ------ ------ + Total Inst: 8 8 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 10 10 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + 2 2 0 0 SMN2 + 2 2 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 8 8 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB S A0 A1 VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/mux2/sky130_fd_sc_hdll__mux2_4.pex.spice b/cells/mux2/sky130_fd_sc_hdll__mux2_4.pex.spice index e300dd4..e0edcce 100644 --- a/cells/mux2/sky130_fd_sc_hdll__mux2_4.pex.spice +++ b/cells/mux2/sky130_fd_sc_hdll__mux2_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__mux2_4.pex.spice -* Created: Thu Aug 27 19:10:48 2020 +* Created: Wed Sep 2 08:34:37 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/mux2/sky130_fd_sc_hdll__mux2_4.pxi.spice b/cells/mux2/sky130_fd_sc_hdll__mux2_4.pxi.spice index b3075de..dc6b526 100644 --- a/cells/mux2/sky130_fd_sc_hdll__mux2_4.pxi.spice +++ b/cells/mux2/sky130_fd_sc_hdll__mux2_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__mux2_4.pxi.spice -* Created: Thu Aug 27 19:10:48 2020 +* Created: Wed Sep 2 08:34:37 2020 * x_PM_SKY130_FD_SC_HDLL__MUX2_4%S N_S_c_80_n N_S_M1004_g N_S_c_81_n N_S_M1010_g + N_S_c_88_n N_S_M1012_g N_S_c_82_n N_S_M1008_g N_S_c_83_n N_S_c_93_p
diff --git a/cells/mux2/sky130_fd_sc_hdll__mux2_4.spice b/cells/mux2/sky130_fd_sc_hdll__mux2_4.spice index bf5d9f3..8a97c50 100644 --- a/cells/mux2/sky130_fd_sc_hdll__mux2_4.spice +++ b/cells/mux2/sky130_fd_sc_hdll__mux2_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__mux2_4.spice -* Created: Thu Aug 27 19:10:48 2020 +* Created: Wed Sep 2 08:34:37 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/mux2/sky130_fd_sc_hdll__mux2_8.lvs.report b/cells/mux2/sky130_fd_sc_hdll__mux2_8.lvs.report new file mode 100644 index 0000000..5c8b70f --- /dev/null +++ b/cells/mux2/sky130_fd_sc_hdll__mux2_8.lvs.report
@@ -0,0 +1,512 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_8.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_8.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__mux2_8.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__mux2_8.sp ('sky130_fd_sc_hdll__mux2_8') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2/sky130_fd_sc_hdll__mux2_8.spice ('sky130_fd_sc_hdll__mux2_8') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:34:41 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__mux2_8 sky130_fd_sc_hdll__mux2_8 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__mux2_8 +SOURCE CELL NAME: sky130_fd_sc_hdll__mux2_8 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 14 14 + + Instances: 17 17 MN (4 pins) + 17 17 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 35 34 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 10 10 + + Instances: 2 2 MN (4 pins) + 2 2 MP (4 pins) + 2 2 SMN2 (4 pins) + 2 2 SMP2 (4 pins) + ------ ------ + Total Inst: 8 8 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 10 10 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + 2 2 0 0 SMN2 + 2 2 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 8 8 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 32 layout mos transistors were reduced to 10. + 22 mos transistors were deleted by parallel reduction. + 32 source mos transistors were reduced to 10. + 22 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB S A1 A0 VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/mux2/sky130_fd_sc_hdll__mux2_8.pex.spice b/cells/mux2/sky130_fd_sc_hdll__mux2_8.pex.spice index b781129..af12024 100644 --- a/cells/mux2/sky130_fd_sc_hdll__mux2_8.pex.spice +++ b/cells/mux2/sky130_fd_sc_hdll__mux2_8.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__mux2_8.pex.spice -* Created: Thu Aug 27 19:10:54 2020 +* Created: Wed Sep 2 08:34:44 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/mux2/sky130_fd_sc_hdll__mux2_8.pxi.spice b/cells/mux2/sky130_fd_sc_hdll__mux2_8.pxi.spice index f79f16a..d483ef7 100644 --- a/cells/mux2/sky130_fd_sc_hdll__mux2_8.pxi.spice +++ b/cells/mux2/sky130_fd_sc_hdll__mux2_8.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__mux2_8.pxi.spice -* Created: Thu Aug 27 19:10:54 2020 +* Created: Wed Sep 2 08:34:44 2020 * x_PM_SKY130_FD_SC_HDLL__MUX2_8%A_79_21# N_A_79_21#_M1003_d N_A_79_21#_M1017_d + N_A_79_21#_M1002_s N_A_79_21#_M1016_s N_A_79_21#_c_122_n N_A_79_21#_M1006_g
diff --git a/cells/mux2/sky130_fd_sc_hdll__mux2_8.spice b/cells/mux2/sky130_fd_sc_hdll__mux2_8.spice index 31103b7..4776885 100644 --- a/cells/mux2/sky130_fd_sc_hdll__mux2_8.spice +++ b/cells/mux2/sky130_fd_sc_hdll__mux2_8.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__mux2_8.spice -* Created: Thu Aug 27 19:10:54 2020 +* Created: Wed Sep 2 08:34:44 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/mux2i/sky130_fd_sc_hdll__mux2i_1.lvs.report b/cells/mux2i/sky130_fd_sc_hdll__mux2i_1.lvs.report new file mode 100644 index 0000000..0562f61 --- /dev/null +++ b/cells/mux2i/sky130_fd_sc_hdll__mux2i_1.lvs.report
@@ -0,0 +1,483 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_1.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__mux2i_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__mux2i_1.sp ('sky130_fd_sc_hdll__mux2i_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_1.spice ('sky130_fd_sc_hdll__mux2i_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:34:49 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__mux2i_1 sky130_fd_sc_hdll__mux2i_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__mux2i_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__mux2i_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 13 13 + + Instances: 5 5 MN (4 pins) + 5 5 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 11 10 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 9 9 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + 2 2 SMN2 (4 pins) + 2 2 SMP2 (4 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 9 9 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 2 2 0 0 SMN2 + 2 2 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB A0 A1 S Y VPWR VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/mux2i/sky130_fd_sc_hdll__mux2i_1.pex.spice b/cells/mux2i/sky130_fd_sc_hdll__mux2i_1.pex.spice index c387785..0ac5e28 100644 --- a/cells/mux2i/sky130_fd_sc_hdll__mux2i_1.pex.spice +++ b/cells/mux2i/sky130_fd_sc_hdll__mux2i_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__mux2i_1.pex.spice -* Created: Thu Aug 27 19:11:01 2020 +* Created: Wed Sep 2 08:34:52 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/mux2i/sky130_fd_sc_hdll__mux2i_1.pxi.spice b/cells/mux2i/sky130_fd_sc_hdll__mux2i_1.pxi.spice index 5b8f722..afdc2ef 100644 --- a/cells/mux2i/sky130_fd_sc_hdll__mux2i_1.pxi.spice +++ b/cells/mux2i/sky130_fd_sc_hdll__mux2i_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__mux2i_1.pxi.spice -* Created: Thu Aug 27 19:11:01 2020 +* Created: Wed Sep 2 08:34:52 2020 * x_PM_SKY130_FD_SC_HDLL__MUX2I_1%A0 N_A0_c_67_n N_A0_M1000_g N_A0_c_64_n + N_A0_M1005_g A0 N_A0_c_66_n PM_SKY130_FD_SC_HDLL__MUX2I_1%A0
diff --git a/cells/mux2i/sky130_fd_sc_hdll__mux2i_1.spice b/cells/mux2i/sky130_fd_sc_hdll__mux2i_1.spice index d66abb7..e9f4821 100644 --- a/cells/mux2i/sky130_fd_sc_hdll__mux2i_1.spice +++ b/cells/mux2i/sky130_fd_sc_hdll__mux2i_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__mux2i_1.spice -* Created: Thu Aug 27 19:11:01 2020 +* Created: Wed Sep 2 08:34:52 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/mux2i/sky130_fd_sc_hdll__mux2i_2.lvs.report b/cells/mux2i/sky130_fd_sc_hdll__mux2i_2.lvs.report new file mode 100644 index 0000000..0a99e06 --- /dev/null +++ b/cells/mux2i/sky130_fd_sc_hdll__mux2i_2.lvs.report
@@ -0,0 +1,496 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_2.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_2.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_2.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_2.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_2.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__mux2i_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__mux2i_2.sp ('sky130_fd_sc_hdll__mux2i_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_2.spice ('sky130_fd_sc_hdll__mux2i_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:34:56 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__mux2i_2 sky130_fd_sc_hdll__mux2i_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__mux2i_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__mux2i_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 13 13 + + Instances: 9 9 MN (4 pins) + 9 9 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 19 18 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 9 9 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + 2 2 SMN2 (4 pins) + 2 2 SMP2 (4 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 9 9 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 2 2 0 0 SMN2 + 2 2 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 16 layout mos transistors were reduced to 8. + 8 mos transistors were deleted by parallel reduction. + 16 source mos transistors were reduced to 8. + 8 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB S A0 A1 VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/mux2i/sky130_fd_sc_hdll__mux2i_2.pex.spice b/cells/mux2i/sky130_fd_sc_hdll__mux2i_2.pex.spice index c442447..024480a 100644 --- a/cells/mux2i/sky130_fd_sc_hdll__mux2i_2.pex.spice +++ b/cells/mux2i/sky130_fd_sc_hdll__mux2i_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__mux2i_2.pex.spice -* Created: Thu Aug 27 19:11:08 2020 +* Created: Wed Sep 2 08:34:59 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/mux2i/sky130_fd_sc_hdll__mux2i_2.pxi.spice b/cells/mux2i/sky130_fd_sc_hdll__mux2i_2.pxi.spice index 36539d4..b077c3a 100644 --- a/cells/mux2i/sky130_fd_sc_hdll__mux2i_2.pxi.spice +++ b/cells/mux2i/sky130_fd_sc_hdll__mux2i_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__mux2i_2.pxi.spice -* Created: Thu Aug 27 19:11:08 2020 +* Created: Wed Sep 2 08:34:59 2020 * x_PM_SKY130_FD_SC_HDLL__MUX2I_2%S N_S_c_85_n N_S_M1005_g N_S_c_80_n N_S_M1011_g + N_S_c_86_n N_S_M1001_g N_S_c_81_n N_S_M1002_g N_S_c_87_n N_S_M1014_g
diff --git a/cells/mux2i/sky130_fd_sc_hdll__mux2i_2.spice b/cells/mux2i/sky130_fd_sc_hdll__mux2i_2.spice index 57db514..0df3a7e 100644 --- a/cells/mux2i/sky130_fd_sc_hdll__mux2i_2.spice +++ b/cells/mux2i/sky130_fd_sc_hdll__mux2i_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__mux2i_2.spice -* Created: Thu Aug 27 19:11:08 2020 +* Created: Wed Sep 2 08:34:59 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.lvs.report b/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.lvs.report new file mode 100644 index 0000000..befcfbd --- /dev/null +++ b/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.lvs.report
@@ -0,0 +1,512 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__mux2i_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__mux2i_4.sp ('sky130_fd_sc_hdll__mux2i_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.spice ('sky130_fd_sc_hdll__mux2i_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:35:03 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__mux2i_4 sky130_fd_sc_hdll__mux2i_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__mux2i_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__mux2i_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 13 13 + + Instances: 17 17 MN (4 pins) + 17 17 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 35 34 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 9 9 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + 2 2 SMN2 (4 pins) + 2 2 SMP2 (4 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 9 9 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 2 2 0 0 SMN2 + 2 2 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 32 layout mos transistors were reduced to 8. + 24 mos transistors were deleted by parallel reduction. + 32 source mos transistors were reduced to 8. + 24 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A0 A1 S Y VPWR VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.pex.spice b/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.pex.spice index 3ff39f0..376e330 100644 --- a/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.pex.spice +++ b/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__mux2i_4.pex.spice -* Created: Thu Aug 27 19:11:15 2020 +* Created: Wed Sep 2 08:35:06 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.pxi.spice b/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.pxi.spice index 7b0e9b5..4a094cb 100644 --- a/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.pxi.spice +++ b/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__mux2i_4.pxi.spice -* Created: Thu Aug 27 19:11:15 2020 +* Created: Wed Sep 2 08:35:06 2020 * x_PM_SKY130_FD_SC_HDLL__MUX2I_4%A0 N_A0_c_106_n N_A0_M1010_g N_A0_c_111_n + N_A0_M1002_g N_A0_c_107_n N_A0_M1012_g N_A0_c_112_n N_A0_M1015_g N_A0_c_108_n
diff --git a/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.spice b/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.spice index 124a3ae..3f65435 100644 --- a/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.spice +++ b/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__mux2i_4.spice -* Created: Thu Aug 27 19:11:15 2020 +* Created: Wed Sep 2 08:35:06 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.lvs.report b/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.lvs.report new file mode 100644 index 0000000..1dc8c21 --- /dev/null +++ b/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.lvs.report
@@ -0,0 +1,571 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file 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"/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 149 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 151 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 153 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 155 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 157 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 159 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 161 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 163 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 165 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 167 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 169 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 171 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 173 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 175 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 177 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 179 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 181 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 183 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 185 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 187 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 189 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 191 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 193 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 195 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 197 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 199 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 201 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 203 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 205 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 207 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 209 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 211 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__muxb16to1_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__muxb16to1_1.sp ('sky130_fd_sc_hdll__muxb16to1_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice ('sky130_fd_sc_hdll__muxb16to1_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:35:11 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__muxb16to1_1 sky130_fd_sc_hdll__muxb16to1_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__muxb16to1_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__muxb16to1_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 37 37 + + Nets: 85 85 + + Instances: 48 48 MN (4 pins) + 48 48 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 97 96 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 37 37 + + Nets: 53 53 + + Instances: 16 16 MN (4 pins) + 16 16 MP (4 pins) + 16 16 SMN2 (4 pins) + 16 16 SMP2 (4 pins) + ------ ------ + Total Inst: 64 64 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 37 37 0 0 + + Nets: 53 53 0 0 + + Instances: 16 16 0 0 MN(NSHORT) + 16 16 0 0 MP(PHIGHVT) + 16 16 0 0 SMN2 + 16 16 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 64 64 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB D[0] D[8] S[0] S[8] S[1] S[9] D[1] D[9] D[2] D[10] S[2] S[10] S[3] + S[11] D[3] D[11] D[4] D[12] S[4] S[12] S[5] S[13] D[5] D[13] D[6] D[14] S[6] + S[14] S[7] S[15] D[7] D[15] VPWR Z VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.pex.spice b/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.pex.spice index 62a8a6f..633cac0 100644 --- a/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.pex.spice +++ b/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__muxb16to1_1.pex.spice -* Created: Thu Aug 27 19:11:23 2020 +* Created: Wed Sep 2 08:35:15 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.pxi.spice b/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.pxi.spice index ffcbb17..a000102 100644 --- a/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.pxi.spice +++ b/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__muxb16to1_1.pxi.spice -* Created: Thu Aug 27 19:11:23 2020 +* Created: Wed Sep 2 08:35:15 2020 * x_PM_SKY130_FD_SC_HDLL__MUXB16TO1_1%D[0] N_D[0]_c_548_n N_D[0]_M1086_g + N_D[0]_c_549_n N_D[0]_M1027_g N_D[0]_c_550_n N_D[0]_c_551_n D[0]
diff --git a/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice b/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice index c7f3190..1a8137d 100644 --- a/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice +++ b/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__muxb16to1_1.spice -* Created: Thu Aug 27 19:11:23 2020 +* Created: Wed Sep 2 08:35:15 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.lvs.report b/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.lvs.report new file mode 100644 index 0000000..eccce0e --- /dev/null +++ b/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.lvs.report
@@ -0,0 +1,640 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file 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"/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 319 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 321 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 323 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 325 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 327 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 329 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 331 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 333 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 335 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 337 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 339 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__muxb16to1_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__muxb16to1_2.sp ('sky130_fd_sc_hdll__muxb16to1_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.spice ('sky130_fd_sc_hdll__muxb16to1_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:35:19 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__muxb16to1_2 sky130_fd_sc_hdll__muxb16to1_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__muxb16to1_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__muxb16to1_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 37 37 + + Nets: 85 85 + + Instances: 80 80 MN (4 pins) + 80 80 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 161 160 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 37 37 + + Nets: 53 53 + + Instances: 16 16 MN (4 pins) + 16 16 MP (4 pins) + 16 16 SMN2 (4 pins) + 16 16 SMP2 (4 pins) + ------ ------ + Total Inst: 64 64 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 37 37 0 0 + + Nets: 53 53 0 0 + + Instances: 16 16 0 0 MN(NSHORT) + 16 16 0 0 MP(PHIGHVT) + 16 16 0 0 SMN2 + 16 16 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 64 64 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 128 layout mos transistors were reduced to 64. + 64 mos transistors were deleted by parallel reduction. + 128 source mos transistors were reduced to 64. + 64 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB D[0] D[8] S[0] S[8] S[1] S[9] D[1] D[9] D[2] D[10] S[2] S[10] S[3] + S[11] D[3] D[11] D[4] D[12] S[4] S[12] S[5] S[13] D[5] D[13] D[6] D[14] S[6] + S[14] S[7] S[15] D[7] D[15] VPWR Z VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.pex.spice b/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.pex.spice index 3005a57..686cbf4 100644 --- a/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.pex.spice +++ b/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__muxb16to1_2.pex.spice -* Created: Thu Aug 27 19:11:31 2020 +* Created: Wed Sep 2 08:35:22 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.pxi.spice b/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.pxi.spice index 5ed2c52..20e6cbd 100644 --- a/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.pxi.spice +++ b/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__muxb16to1_2.pxi.spice -* Created: Thu Aug 27 19:11:31 2020 +* Created: Wed Sep 2 08:35:22 2020 * x_PM_SKY130_FD_SC_HDLL__MUXB16TO1_2%D[0] N_D[0]_M1010_g N_D[0]_M1042_g + N_D[0]_M1108_g N_D[0]_M1075_g D[0] N_D[0]_c_852_n N_D[0]_c_853_n
diff --git a/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.spice b/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.spice index 4e65865..d434c91 100644 --- a/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.spice +++ b/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__muxb16to1_2.spice -* Created: Thu Aug 27 19:11:31 2020 +* Created: Wed Sep 2 08:35:22 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_4.lvs.report b/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_4.lvs.report new file mode 100644 index 0000000..264505e --- /dev/null +++ b/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_4.lvs.report
@@ -0,0 +1,736 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_4.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_4.spice" +Warning: Duplicate parameter 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"/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 529 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 531 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__muxb16to1_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__muxb16to1_4.sp ('sky130_fd_sc_hdll__muxb16to1_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_4.spice ('sky130_fd_sc_hdll__muxb16to1_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:35:26 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__muxb16to1_4 sky130_fd_sc_hdll__muxb16to1_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__muxb16to1_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__muxb16to1_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 37 37 + + Nets: 85 85 + + Instances: 160 160 MN (4 pins) + 160 160 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 321 320 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 37 37 + + Nets: 53 53 + + Instances: 16 16 MN (4 pins) + 16 16 MP (4 pins) + 16 16 SMN2 (4 pins) + 16 16 SMP2 (4 pins) + ------ ------ + Total Inst: 64 64 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 37 37 0 0 + + Nets: 53 53 0 0 + + Instances: 16 16 0 0 MN(NSHORT) + 16 16 0 0 MP(PHIGHVT) + 16 16 0 0 SMN2 + 16 16 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 64 64 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 320 layout mos transistors were reduced to 96. + 224 mos transistors were deleted by parallel reduction. + 320 source mos transistors were reduced to 96. + 224 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB D[0] D[8] S[0] S[8] S[1] S[9] D[1] D[9] D[2] D[10] S[2] S[10] S[3] + S[11] D[3] D[11] D[4] D[12] S[4] S[12] S[5] S[13] D[5] D[13] D[6] D[14] S[6] + S[14] S[7] S[15] D[7] D[15] VPWR Z VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_4.pex.spice b/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_4.pex.spice index 4b56a0e..315c77d 100644 --- a/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_4.pex.spice +++ b/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__muxb16to1_4.pex.spice -* Created: Thu Aug 27 19:11:38 2020 +* Created: Wed Sep 2 08:35:30 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_4.pxi.spice b/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_4.pxi.spice index 2ad91c1..811bf5c 100644 --- a/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_4.pxi.spice +++ b/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__muxb16to1_4.pxi.spice -* Created: Thu Aug 27 19:11:38 2020 +* Created: Wed Sep 2 08:35:30 2020 * x_PM_SKY130_FD_SC_HDLL__MUXB16TO1_4%VNB VNB VNB VNB + PM_SKY130_FD_SC_HDLL__MUXB16TO1_4%VNB
diff --git a/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_4.spice b/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_4.spice index 90c0381..8a5819a 100644 --- a/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_4.spice +++ b/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__muxb16to1_4.spice -* Created: Thu Aug 27 19:11:38 2020 +* Created: Wed Sep 2 08:35:30 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.lvs.report b/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.lvs.report new file mode 100644 index 0000000..dd63cd5 --- /dev/null +++ b/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.lvs.report
@@ -0,0 +1,497 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 20 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 22 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 24 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 26 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 28 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 30 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 32 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 34 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 36 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 38 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 40 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 42 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 44 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 46 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 48 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 50 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 52 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 54 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 56 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 58 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 60 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 62 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 64 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 66 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__muxb4to1_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__muxb4to1_1.sp ('sky130_fd_sc_hdll__muxb4to1_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.spice ('sky130_fd_sc_hdll__muxb4to1_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:35:34 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__muxb4to1_1 sky130_fd_sc_hdll__muxb4to1_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__muxb4to1_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__muxb4to1_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 13 13 + + Nets: 25 25 + + Instances: 12 12 MN (4 pins) + 12 12 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 25 24 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 13 13 + + Nets: 17 17 + + Instances: 4 4 MN (4 pins) + 4 4 MP (4 pins) + 4 4 SMN2 (4 pins) + 4 4 SMP2 (4 pins) + ------ ------ + Total Inst: 16 16 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 13 13 0 0 + + Nets: 17 17 0 0 + + Instances: 4 4 0 0 MN(NSHORT) + 4 4 0 0 MP(PHIGHVT) + 4 4 0 0 SMN2 + 4 4 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 16 16 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB D[0] S[0] S[1] D[1] D[2] S[2] S[3] D[3] VPWR Z VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.pex.spice b/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.pex.spice index 6c21f6d..95b9665 100644 --- a/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.pex.spice +++ b/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__muxb4to1_1.pex.spice -* Created: Thu Aug 27 19:11:45 2020 +* Created: Wed Sep 2 08:35:38 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.pxi.spice b/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.pxi.spice index fe34958..8990908 100644 --- a/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.pxi.spice +++ b/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__muxb4to1_1.pxi.spice -* Created: Thu Aug 27 19:11:45 2020 +* Created: Wed Sep 2 08:35:38 2020 * x_PM_SKY130_FD_SC_HDLL__MUXB4TO1_1%D[0] N_D[0]_c_140_n N_D[0]_M1021_g + N_D[0]_c_141_n N_D[0]_M1007_g N_D[0]_c_142_n N_D[0]_c_143_n D[0]
diff --git a/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.spice b/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.spice index e1c736d..cf87ae8 100644 --- a/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.spice +++ b/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__muxb4to1_1.spice -* Created: Thu Aug 27 19:11:45 2020 +* Created: Wed Sep 2 08:35:38 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.lvs.report b/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.lvs.report new file mode 100644 index 0000000..934a005 --- /dev/null +++ b/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.lvs.report
@@ -0,0 +1,518 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 20 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 22 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 24 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 26 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 28 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 30 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 32 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 34 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 36 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 38 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 40 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 42 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 44 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 46 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 48 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 50 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 52 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 54 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 56 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 58 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 60 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 62 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 64 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 66 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 68 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 70 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 72 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 74 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 76 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 78 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 80 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 82 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 84 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 86 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 88 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 90 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 92 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 94 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 96 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 98 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__muxb4to1_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__muxb4to1_2.sp ('sky130_fd_sc_hdll__muxb4to1_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice ('sky130_fd_sc_hdll__muxb4to1_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:35:41 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__muxb4to1_2 sky130_fd_sc_hdll__muxb4to1_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__muxb4to1_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__muxb4to1_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 13 13 + + Nets: 25 25 + + Instances: 20 20 MN (4 pins) + 20 20 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 41 40 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 13 13 + + Nets: 17 17 + + Instances: 4 4 MN (4 pins) + 4 4 MP (4 pins) + 4 4 SMN2 (4 pins) + 4 4 SMP2 (4 pins) + ------ ------ + Total Inst: 16 16 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 13 13 0 0 + + Nets: 17 17 0 0 + + Instances: 4 4 0 0 MN(NSHORT) + 4 4 0 0 MP(PHIGHVT) + 4 4 0 0 SMN2 + 4 4 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 16 16 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 32 layout mos transistors were reduced to 16. + 16 mos transistors were deleted by parallel reduction. + 32 source mos transistors were reduced to 16. + 16 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB D[0] S[0] S[1] D[1] D[2] S[2] S[3] D[3] VPWR Z VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.pex.spice b/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.pex.spice index 7fc5bf2..c617fa5 100644 --- a/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.pex.spice +++ b/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__muxb4to1_2.pex.spice -* Created: Thu Aug 27 19:11:52 2020 +* Created: Wed Sep 2 08:35:45 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.pxi.spice b/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.pxi.spice index 1a0d3bf..05815fc 100644 --- a/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.pxi.spice +++ b/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__muxb4to1_2.pxi.spice -* Created: Thu Aug 27 19:11:52 2020 +* Created: Wed Sep 2 08:35:45 2020 * x_PM_SKY130_FD_SC_HDLL__MUXB4TO1_2%D[0] N_D[0]_M1002_g N_D[0]_M1013_g + N_D[0]_M1026_g N_D[0]_M1017_g D[0] N_D[0]_c_219_n N_D[0]_c_220_n
diff --git a/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice b/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice index 890d801..76ea5dd 100644 --- a/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice +++ b/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__muxb4to1_2.spice -* Created: Thu Aug 27 19:11:52 2020 +* Created: Wed Sep 2 08:35:45 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.lvs.report b/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.lvs.report new file mode 100644 index 0000000..d9ca990 --- /dev/null +++ b/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.lvs.report
@@ -0,0 +1,558 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 20 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 22 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 24 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 26 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 28 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 30 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 32 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 34 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 36 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 38 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 40 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 42 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 44 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 46 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 48 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 50 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 52 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 54 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 56 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 58 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 60 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 62 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 64 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 66 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 68 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 70 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 72 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 74 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 76 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 78 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 80 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 82 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 84 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 86 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 88 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 90 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 92 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 94 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 96 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 98 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 100 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 102 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 104 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 106 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 108 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 110 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 112 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 114 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 116 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 118 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 120 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 122 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 124 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 126 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 128 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 130 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 132 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 134 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 136 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 138 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 140 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 142 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 144 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 146 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 148 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 150 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 152 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 154 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 156 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 158 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 160 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 162 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 164 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 166 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 168 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 170 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 172 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 174 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 176 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 178 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__muxb4to1_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__muxb4to1_4.sp ('sky130_fd_sc_hdll__muxb4to1_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice ('sky130_fd_sc_hdll__muxb4to1_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:35:49 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__muxb4to1_4 sky130_fd_sc_hdll__muxb4to1_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__muxb4to1_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__muxb4to1_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 13 13 + + Nets: 25 25 + + Instances: 40 40 MN (4 pins) + 40 40 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 81 80 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 13 13 + + Nets: 17 17 + + Instances: 4 4 MN (4 pins) + 4 4 MP (4 pins) + 4 4 SMN2 (4 pins) + 4 4 SMP2 (4 pins) + ------ ------ + Total Inst: 16 16 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 13 13 0 0 + + Nets: 17 17 0 0 + + Instances: 4 4 0 0 MN(NSHORT) + 4 4 0 0 MP(PHIGHVT) + 4 4 0 0 SMN2 + 4 4 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 16 16 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 80 layout mos transistors were reduced to 24. + 56 mos transistors were deleted by parallel reduction. + 80 source mos transistors were reduced to 24. + 56 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB D[0] S[0] S[1] D[1] D[2] S[2] S[3] D[3] VPWR Z VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.pex.spice b/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.pex.spice index 84625a7..169ed05 100644 --- a/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.pex.spice +++ b/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__muxb4to1_4.pex.spice -* Created: Thu Aug 27 19:11:59 2020 +* Created: Wed Sep 2 08:35:52 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.pxi.spice b/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.pxi.spice index eaa1b1b..99160d1 100644 --- a/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.pxi.spice +++ b/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__muxb4to1_4.pxi.spice -* Created: Thu Aug 27 19:11:59 2020 +* Created: Wed Sep 2 08:35:52 2020 * x_PM_SKY130_FD_SC_HDLL__MUXB4TO1_4%D[0] N_D[0]_M1003_g N_D[0]_M1024_g + N_D[0]_M1057_g N_D[0]_M1041_g N_D[0]_M1055_g N_D[0]_M1073_g N_D[0]_M1078_g
diff --git a/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice b/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice index c326e02..4517504 100644 --- a/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice +++ b/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__muxb4to1_4.spice -* Created: Thu Aug 27 19:11:59 2020 +* Created: Wed Sep 2 08:35:52 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.lvs.report b/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.lvs.report new file mode 100644 index 0000000..ebebf8b --- /dev/null +++ b/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.lvs.report
@@ -0,0 +1,522 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 20 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 22 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 24 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 26 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 28 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 30 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 32 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 34 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 36 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 38 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 40 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 42 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 44 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 46 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 48 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 50 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 52 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 54 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 56 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 58 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 60 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 62 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 64 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 66 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 68 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 70 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 72 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 74 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 76 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 78 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 80 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 82 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 84 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 86 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 88 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 90 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 92 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 94 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 96 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 98 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 100 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 102 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 104 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 106 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 108 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 110 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 112 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" +Warning: Duplicate parameter definition "MULT" at line 114 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__muxb8to1_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__muxb8to1_1.sp ('sky130_fd_sc_hdll__muxb8to1_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice ('sky130_fd_sc_hdll__muxb8to1_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:35:56 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__muxb8to1_1 sky130_fd_sc_hdll__muxb8to1_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__muxb8to1_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__muxb8to1_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 21 21 + + Nets: 45 45 + + Instances: 24 24 MN (4 pins) + 24 24 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 49 48 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 21 21 + + Nets: 29 29 + + Instances: 8 8 MN (4 pins) + 8 8 MP (4 pins) + 8 8 SMN2 (4 pins) + 8 8 SMP2 (4 pins) + ------ ------ + Total Inst: 32 32 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 21 21 0 0 + + Nets: 29 29 0 0 + + Instances: 8 8 0 0 MN(NSHORT) + 8 8 0 0 MP(PHIGHVT) + 8 8 0 0 SMN2 + 8 8 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 32 32 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB D[0] S[0] S[1] D[1] D[2] S[2] S[3] D[3] D[4] S[4] S[5] D[5] D[6] S[6] + S[7] D[7] VPWR Z VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.pex.spice b/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.pex.spice index bf764b9..017e2d2 100644 --- a/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.pex.spice +++ b/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__muxb8to1_1.pex.spice -* Created: Thu Aug 27 19:12:06 2020 +* Created: Wed Sep 2 08:36:00 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.pxi.spice b/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.pxi.spice index 9863ce5..f4f1d5a 100644 --- a/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.pxi.spice +++ b/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__muxb8to1_1.pxi.spice -* Created: Thu Aug 27 19:12:06 2020 +* Created: Wed Sep 2 08:36:00 2020 * x_PM_SKY130_FD_SC_HDLL__MUXB8TO1_1%D[0] N_D[0]_c_272_n N_D[0]_M1040_g + N_D[0]_c_273_n N_D[0]_M1015_g N_D[0]_c_274_n N_D[0]_c_275_n D[0]
diff --git a/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice b/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice index 886dbf5..ac675fa 100644 --- a/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice +++ b/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__muxb8to1_1.spice -* Created: Thu Aug 27 19:12:06 2020 +* Created: Wed Sep 2 08:36:00 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.lvs.report b/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.lvs.report new file mode 100644 index 0000000..2c8d906 --- /dev/null +++ b/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.lvs.report
@@ -0,0 +1,559 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 20 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 22 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 24 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 26 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 28 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 30 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 32 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 34 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 36 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 38 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 40 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 42 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 44 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 46 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 48 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 50 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 52 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 54 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 56 in file 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"/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.spice" +Warning: Duplicate parameter definition "MULT" at line 178 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__muxb8to1_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__muxb8to1_2.sp ('sky130_fd_sc_hdll__muxb8to1_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.spice ('sky130_fd_sc_hdll__muxb8to1_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:36:04 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__muxb8to1_2 sky130_fd_sc_hdll__muxb8to1_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__muxb8to1_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__muxb8to1_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 21 21 + + Nets: 45 45 + + Instances: 40 40 MN (4 pins) + 40 40 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 81 80 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 21 21 + + Nets: 29 29 + + Instances: 8 8 MN (4 pins) + 8 8 MP (4 pins) + 8 8 SMN2 (4 pins) + 8 8 SMP2 (4 pins) + ------ ------ + Total Inst: 32 32 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 21 21 0 0 + + Nets: 29 29 0 0 + + Instances: 8 8 0 0 MN(NSHORT) + 8 8 0 0 MP(PHIGHVT) + 8 8 0 0 SMN2 + 8 8 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 32 32 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 64 layout mos transistors were reduced to 32. + 32 mos transistors were deleted by parallel reduction. + 64 source mos transistors were reduced to 32. + 32 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB D[0] S[0] S[1] D[1] D[2] S[2] S[3] D[3] D[4] S[4] S[5] D[5] D[6] S[6] + S[7] D[7] VPWR Z VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.pex.spice b/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.pex.spice index 8c2321a..6d3901c 100644 --- a/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.pex.spice +++ b/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__muxb8to1_2.pex.spice -* Created: Thu Aug 27 19:12:13 2020 +* Created: Wed Sep 2 08:36:07 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.pxi.spice b/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.pxi.spice index 04d2561..8676526 100644 --- a/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.pxi.spice +++ b/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__muxb8to1_2.pxi.spice -* Created: Thu Aug 27 19:12:13 2020 +* Created: Wed Sep 2 08:36:07 2020 * x_PM_SKY130_FD_SC_HDLL__MUXB8TO1_2%D[0] N_D[0]_M1003_g N_D[0]_M1019_g + N_D[0]_M1053_g N_D[0]_M1034_g D[0] N_D[0]_c_429_n N_D[0]_c_430_n
diff --git a/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.spice b/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.spice index df5bf58..2fbd5ea 100644 --- a/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.spice +++ b/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__muxb8to1_2.spice -* Created: Thu Aug 27 19:12:13 2020 +* Created: Wed Sep 2 08:36:07 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.lvs.report b/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.lvs.report new file mode 100644 index 0000000..036915b --- /dev/null +++ b/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.lvs.report
@@ -0,0 +1,639 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 20 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 22 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 24 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 26 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 28 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 30 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 32 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 34 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 36 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 38 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 40 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 42 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 44 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 46 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 48 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 50 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 52 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 54 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 56 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 58 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 60 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 62 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 64 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 66 in file 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"/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 278 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 280 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 282 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 284 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 286 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 288 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 290 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 292 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 294 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 296 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 298 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 300 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 302 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 304 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 306 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 308 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 310 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 312 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 314 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 316 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 318 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 320 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 322 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 324 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 326 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 328 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 330 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 332 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 334 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 336 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" +Warning: Duplicate parameter definition "MULT" at line 338 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__muxb8to1_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__muxb8to1_4.sp ('sky130_fd_sc_hdll__muxb8to1_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice ('sky130_fd_sc_hdll__muxb8to1_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:36:11 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__muxb8to1_4 sky130_fd_sc_hdll__muxb8to1_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__muxb8to1_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__muxb8to1_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 21 21 + + Nets: 45 45 + + Instances: 80 80 MN (4 pins) + 80 80 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 161 160 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 21 21 + + Nets: 29 29 + + Instances: 8 8 MN (4 pins) + 8 8 MP (4 pins) + 8 8 SMN2 (4 pins) + 8 8 SMP2 (4 pins) + ------ ------ + Total Inst: 32 32 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 21 21 0 0 + + Nets: 29 29 0 0 + + Instances: 8 8 0 0 MN(NSHORT) + 8 8 0 0 MP(PHIGHVT) + 8 8 0 0 SMN2 + 8 8 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 32 32 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 160 layout mos transistors were reduced to 48. + 112 mos transistors were deleted by parallel reduction. + 160 source mos transistors were reduced to 48. + 112 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB S[0] S[1] D[0] D[1] D[2] D[3] S[2] S[3] S[4] S[5] D[4] D[5] D[6] D[7] + S[6] S[7] VPWR Z VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.pex.spice b/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.pex.spice index b6c8f85..9214365 100644 --- a/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.pex.spice +++ b/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__muxb8to1_4.pex.spice -* Created: Thu Aug 27 19:12:21 2020 +* Created: Wed Sep 2 08:36:14 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.pxi.spice b/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.pxi.spice index 0add7cc..ce1e35a 100644 --- a/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.pxi.spice +++ b/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__muxb8to1_4.pxi.spice -* Created: Thu Aug 27 19:12:21 2020 +* Created: Wed Sep 2 08:36:14 2020 * x_PM_SKY130_FD_SC_HDLL__MUXB8TO1_4%S[0] N_S[0]_c_904_n N_S[0]_c_905_n + N_S[0]_M1001_g N_S[0]_c_906_n N_S[0]_M1043_g N_S[0]_c_907_n N_S[0]_c_908_n
diff --git a/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice b/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice index 306bfea..cb248b6 100644 --- a/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice +++ b/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__muxb8to1_4.spice -* Created: Thu Aug 27 19:12:21 2020 +* Created: Wed Sep 2 08:36:14 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nand2/sky130_fd_sc_hdll__nand2_1.lvs.report b/cells/nand2/sky130_fd_sc_hdll__nand2_1.lvs.report new file mode 100644 index 0000000..cd48275 --- /dev/null +++ b/cells/nand2/sky130_fd_sc_hdll__nand2_1.lvs.report
@@ -0,0 +1,476 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_1.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nand2_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nand2_1.sp ('sky130_fd_sc_hdll__nand2_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_1.spice ('sky130_fd_sc_hdll__nand2_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:36:33 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nand2_1 sky130_fd_sc_hdll__nand2_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nand2_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__nand2_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 9 8 * + + Instances: 2 2 MN (4 pins) + 2 2 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 6 4 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 7 7 + + Instances: 2 2 MP (4 pins) + 1 1 SMN2 (4 pins) + ------ ------ + Total Inst: 3 3 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 7 7 0 0 + + Instances: 2 2 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + ------- ------- --------- --------- + Total Inst: 3 3 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB B A VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nand2/sky130_fd_sc_hdll__nand2_1.pex.spice b/cells/nand2/sky130_fd_sc_hdll__nand2_1.pex.spice index e02ecb0..b242a67 100644 --- a/cells/nand2/sky130_fd_sc_hdll__nand2_1.pex.spice +++ b/cells/nand2/sky130_fd_sc_hdll__nand2_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand2_1.pex.spice -* Created: Thu Aug 27 19:12:42 2020 +* Created: Wed Sep 2 08:36:36 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nand2/sky130_fd_sc_hdll__nand2_1.pxi.spice b/cells/nand2/sky130_fd_sc_hdll__nand2_1.pxi.spice index 24445c9..919f504 100644 --- a/cells/nand2/sky130_fd_sc_hdll__nand2_1.pxi.spice +++ b/cells/nand2/sky130_fd_sc_hdll__nand2_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand2_1.pxi.spice -* Created: Thu Aug 27 19:12:42 2020 +* Created: Wed Sep 2 08:36:36 2020 * x_PM_SKY130_FD_SC_HDLL__NAND2_1%B N_B_c_31_n N_B_M1000_g N_B_c_28_n N_B_M1002_g + B N_B_c_30_n PM_SKY130_FD_SC_HDLL__NAND2_1%B
diff --git a/cells/nand2/sky130_fd_sc_hdll__nand2_1.spice b/cells/nand2/sky130_fd_sc_hdll__nand2_1.spice index d17b3fb..ceef17e 100644 --- a/cells/nand2/sky130_fd_sc_hdll__nand2_1.spice +++ b/cells/nand2/sky130_fd_sc_hdll__nand2_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand2_1.spice -* Created: Thu Aug 27 19:12:42 2020 +* Created: Wed Sep 2 08:36:36 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nand2/sky130_fd_sc_hdll__nand2_12.lvs.report b/cells/nand2/sky130_fd_sc_hdll__nand2_12.lvs.report new file mode 100644 index 0000000..d116390 --- /dev/null +++ b/cells/nand2/sky130_fd_sc_hdll__nand2_12.lvs.report
@@ -0,0 +1,522 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------ + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 87 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 89 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 91 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 93 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 95 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 97 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 99 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 101 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 103 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 105 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 107 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 109 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 111 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" +Warning: Duplicate parameter definition "MULT" at line 113 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nand2_12.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nand2_12.sp ('sky130_fd_sc_hdll__nand2_12') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice ('sky130_fd_sc_hdll__nand2_12') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:36:19 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nand2_12 sky130_fd_sc_hdll__nand2_12 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nand2_12 +SOURCE CELL NAME: sky130_fd_sc_hdll__nand2_12 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 24 24 MN (4 pins) + 24 24 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 49 48 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 7 7 + + Instances: 2 2 MP (4 pins) + 1 1 SMN2 (4 pins) + ------ ------ + Total Inst: 3 3 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 7 7 0 0 + + Instances: 2 2 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + ------- ------- --------- --------- + Total Inst: 3 3 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 48 layout mos transistors were reduced to 4. + 44 mos transistors were deleted by parallel reduction. + 48 source mos transistors were reduced to 4. + 44 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB B A VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nand2/sky130_fd_sc_hdll__nand2_12.pex.spice b/cells/nand2/sky130_fd_sc_hdll__nand2_12.pex.spice index 855d4f7..a858cb0 100644 --- a/cells/nand2/sky130_fd_sc_hdll__nand2_12.pex.spice +++ b/cells/nand2/sky130_fd_sc_hdll__nand2_12.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand2_12.pex.spice -* Created: Thu Aug 27 19:12:28 2020 +* Created: Wed Sep 2 08:36:22 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nand2/sky130_fd_sc_hdll__nand2_12.pxi.spice b/cells/nand2/sky130_fd_sc_hdll__nand2_12.pxi.spice index afb5fb0..c844c54 100644 --- a/cells/nand2/sky130_fd_sc_hdll__nand2_12.pxi.spice +++ b/cells/nand2/sky130_fd_sc_hdll__nand2_12.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand2_12.pxi.spice -* Created: Thu Aug 27 19:12:28 2020 +* Created: Wed Sep 2 08:36:22 2020 * x_PM_SKY130_FD_SC_HDLL__NAND2_12%B N_B_c_132_n N_B_M1003_g N_B_c_146_n + N_B_M1000_g N_B_c_147_n N_B_M1001_g N_B_c_133_n N_B_M1011_g N_B_c_134_n
diff --git a/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice b/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice index 5fa841b..c29b3f6 100644 --- a/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice +++ b/cells/nand2/sky130_fd_sc_hdll__nand2_12.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand2_12.spice -* Created: Thu Aug 27 19:12:28 2020 +* Created: Wed Sep 2 08:36:22 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nand2/sky130_fd_sc_hdll__nand2_16.lvs.report b/cells/nand2/sky130_fd_sc_hdll__nand2_16.lvs.report new file mode 100644 index 0000000..86c0c0c --- /dev/null +++ b/cells/nand2/sky130_fd_sc_hdll__nand2_16.lvs.report
@@ -0,0 +1,538 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_16.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------ + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file 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"/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 87 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 89 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 91 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 93 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 95 in file 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"/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 137 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 139 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 141 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 143 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_16.spice" +Warning: Duplicate parameter definition "MULT" at line 145 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_16.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nand2_16.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nand2_16.sp ('sky130_fd_sc_hdll__nand2_16') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_16.spice ('sky130_fd_sc_hdll__nand2_16') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:36:26 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nand2_16 sky130_fd_sc_hdll__nand2_16 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nand2_16 +SOURCE CELL NAME: sky130_fd_sc_hdll__nand2_16 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 32 32 MN (4 pins) + 32 32 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 65 64 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 7 7 + + Instances: 2 2 MP (4 pins) + 1 1 SMN2 (4 pins) + ------ ------ + Total Inst: 3 3 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 7 7 0 0 + + Instances: 2 2 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + ------- ------- --------- --------- + Total Inst: 3 3 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 64 layout mos transistors were reduced to 4. + 60 mos transistors were deleted by parallel reduction. + 64 source mos transistors were reduced to 4. + 60 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB B A VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nand2/sky130_fd_sc_hdll__nand2_16.pex.spice b/cells/nand2/sky130_fd_sc_hdll__nand2_16.pex.spice index 2f80d93..70f9840 100644 --- a/cells/nand2/sky130_fd_sc_hdll__nand2_16.pex.spice +++ b/cells/nand2/sky130_fd_sc_hdll__nand2_16.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand2_16.pex.spice -* Created: Thu Aug 27 19:12:35 2020 +* Created: Wed Sep 2 08:36:29 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nand2/sky130_fd_sc_hdll__nand2_16.pxi.spice b/cells/nand2/sky130_fd_sc_hdll__nand2_16.pxi.spice index 081f012..70d97c7 100644 --- a/cells/nand2/sky130_fd_sc_hdll__nand2_16.pxi.spice +++ b/cells/nand2/sky130_fd_sc_hdll__nand2_16.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand2_16.pxi.spice -* Created: Thu Aug 27 19:12:35 2020 +* Created: Wed Sep 2 08:36:29 2020 * x_PM_SKY130_FD_SC_HDLL__NAND2_16%B N_B_c_165_n N_B_M1004_g N_B_c_183_n + N_B_M1000_g N_B_c_184_n N_B_M1002_g N_B_c_166_n N_B_M1005_g N_B_c_167_n
diff --git a/cells/nand2/sky130_fd_sc_hdll__nand2_16.spice b/cells/nand2/sky130_fd_sc_hdll__nand2_16.spice index 3d5ec86..fd2f4f6 100644 --- a/cells/nand2/sky130_fd_sc_hdll__nand2_16.spice +++ b/cells/nand2/sky130_fd_sc_hdll__nand2_16.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand2_16.spice -* Created: Thu Aug 27 19:12:35 2020 +* Created: Wed Sep 2 08:36:29 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nand2/sky130_fd_sc_hdll__nand2_2.lvs.report b/cells/nand2/sky130_fd_sc_hdll__nand2_2.lvs.report new file mode 100644 index 0000000..a66e01f --- /dev/null +++ b/cells/nand2/sky130_fd_sc_hdll__nand2_2.lvs.report
@@ -0,0 +1,482 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_2.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nand2_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nand2_2.sp ('sky130_fd_sc_hdll__nand2_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_2.spice ('sky130_fd_sc_hdll__nand2_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:36:40 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nand2_2 sky130_fd_sc_hdll__nand2_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nand2_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__nand2_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 4 4 MN (4 pins) + 4 4 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 9 8 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 7 7 + + Instances: 2 2 MP (4 pins) + 1 1 SMN2 (4 pins) + ------ ------ + Total Inst: 3 3 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 7 7 0 0 + + Instances: 2 2 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + ------- ------- --------- --------- + Total Inst: 3 3 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 4. + 4 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 4. + 4 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB B A VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nand2/sky130_fd_sc_hdll__nand2_2.pex.spice b/cells/nand2/sky130_fd_sc_hdll__nand2_2.pex.spice index 532ba53..69b8ef6 100644 --- a/cells/nand2/sky130_fd_sc_hdll__nand2_2.pex.spice +++ b/cells/nand2/sky130_fd_sc_hdll__nand2_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand2_2.pex.spice -* Created: Thu Aug 27 19:12:48 2020 +* Created: Wed Sep 2 08:36:43 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nand2/sky130_fd_sc_hdll__nand2_2.pxi.spice b/cells/nand2/sky130_fd_sc_hdll__nand2_2.pxi.spice index fee1d83..b4bcc89 100644 --- a/cells/nand2/sky130_fd_sc_hdll__nand2_2.pxi.spice +++ b/cells/nand2/sky130_fd_sc_hdll__nand2_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand2_2.pxi.spice -* Created: Thu Aug 27 19:12:48 2020 +* Created: Wed Sep 2 08:36:43 2020 * x_PM_SKY130_FD_SC_HDLL__NAND2_2%B N_B_c_40_n N_B_M1001_g N_B_c_44_n N_B_M1000_g + N_B_c_45_n N_B_M1003_g N_B_c_41_n N_B_M1007_g B B N_B_c_43_n
diff --git a/cells/nand2/sky130_fd_sc_hdll__nand2_2.spice b/cells/nand2/sky130_fd_sc_hdll__nand2_2.spice index 00dffbf..5484b8b 100644 --- a/cells/nand2/sky130_fd_sc_hdll__nand2_2.spice +++ b/cells/nand2/sky130_fd_sc_hdll__nand2_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand2_2.spice -* Created: Thu Aug 27 19:12:48 2020 +* Created: Wed Sep 2 08:36:43 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nand2/sky130_fd_sc_hdll__nand2_4.lvs.report b/cells/nand2/sky130_fd_sc_hdll__nand2_4.lvs.report new file mode 100644 index 0000000..06234f7 --- /dev/null +++ b/cells/nand2/sky130_fd_sc_hdll__nand2_4.lvs.report
@@ -0,0 +1,490 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_4.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nand2_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nand2_4.sp ('sky130_fd_sc_hdll__nand2_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_4.spice ('sky130_fd_sc_hdll__nand2_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:36:47 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nand2_4 sky130_fd_sc_hdll__nand2_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nand2_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__nand2_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 8 8 MN (4 pins) + 8 8 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 17 16 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 7 7 + + Instances: 2 2 MP (4 pins) + 1 1 SMN2 (4 pins) + ------ ------ + Total Inst: 3 3 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 7 7 0 0 + + Instances: 2 2 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + ------- ------- --------- --------- + Total Inst: 3 3 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 16 layout mos transistors were reduced to 4. + 12 mos transistors were deleted by parallel reduction. + 16 source mos transistors were reduced to 4. + 12 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB B A VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nand2/sky130_fd_sc_hdll__nand2_4.pex.spice b/cells/nand2/sky130_fd_sc_hdll__nand2_4.pex.spice index d2c4464..d403dab 100644 --- a/cells/nand2/sky130_fd_sc_hdll__nand2_4.pex.spice +++ b/cells/nand2/sky130_fd_sc_hdll__nand2_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand2_4.pex.spice -* Created: Thu Aug 27 19:12:55 2020 +* Created: Wed Sep 2 08:36:50 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nand2/sky130_fd_sc_hdll__nand2_4.pxi.spice b/cells/nand2/sky130_fd_sc_hdll__nand2_4.pxi.spice index bb8a1b3..acccece 100644 --- a/cells/nand2/sky130_fd_sc_hdll__nand2_4.pxi.spice +++ b/cells/nand2/sky130_fd_sc_hdll__nand2_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand2_4.pxi.spice -* Created: Thu Aug 27 19:12:55 2020 +* Created: Wed Sep 2 08:36:50 2020 * x_PM_SKY130_FD_SC_HDLL__NAND2_4%B N_B_c_65_n N_B_M1001_g N_B_c_59_n N_B_M1002_g + N_B_c_66_n N_B_M1006_g N_B_c_60_n N_B_M1010_g N_B_c_67_n N_B_M1009_g
diff --git a/cells/nand2/sky130_fd_sc_hdll__nand2_4.spice b/cells/nand2/sky130_fd_sc_hdll__nand2_4.spice index b3a3fa9..c6f2801 100644 --- a/cells/nand2/sky130_fd_sc_hdll__nand2_4.spice +++ b/cells/nand2/sky130_fd_sc_hdll__nand2_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand2_4.spice -* Created: Thu Aug 27 19:12:55 2020 +* Created: Wed Sep 2 08:36:50 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nand2/sky130_fd_sc_hdll__nand2_6.lvs.report b/cells/nand2/sky130_fd_sc_hdll__nand2_6.lvs.report new file mode 100644 index 0000000..a9ee44b --- /dev/null +++ b/cells/nand2/sky130_fd_sc_hdll__nand2_6.lvs.report
@@ -0,0 +1,498 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_6.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_6.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nand2_6.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nand2_6.sp ('sky130_fd_sc_hdll__nand2_6') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_6.spice ('sky130_fd_sc_hdll__nand2_6') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:36:54 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nand2_6 sky130_fd_sc_hdll__nand2_6 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nand2_6 +SOURCE CELL NAME: sky130_fd_sc_hdll__nand2_6 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 12 12 MN (4 pins) + 12 12 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 25 24 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 7 7 + + Instances: 2 2 MP (4 pins) + 1 1 SMN2 (4 pins) + ------ ------ + Total Inst: 3 3 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 7 7 0 0 + + Instances: 2 2 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + ------- ------- --------- --------- + Total Inst: 3 3 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 24 layout mos transistors were reduced to 4. + 20 mos transistors were deleted by parallel reduction. + 24 source mos transistors were reduced to 4. + 20 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB B A VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nand2/sky130_fd_sc_hdll__nand2_6.pex.spice b/cells/nand2/sky130_fd_sc_hdll__nand2_6.pex.spice index b14845f..2ba8217 100644 --- a/cells/nand2/sky130_fd_sc_hdll__nand2_6.pex.spice +++ b/cells/nand2/sky130_fd_sc_hdll__nand2_6.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand2_6.pex.spice -* Created: Thu Aug 27 19:13:02 2020 +* Created: Wed Sep 2 08:36:57 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nand2/sky130_fd_sc_hdll__nand2_6.pxi.spice b/cells/nand2/sky130_fd_sc_hdll__nand2_6.pxi.spice index 6991921..552ac45 100644 --- a/cells/nand2/sky130_fd_sc_hdll__nand2_6.pxi.spice +++ b/cells/nand2/sky130_fd_sc_hdll__nand2_6.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand2_6.pxi.spice -* Created: Thu Aug 27 19:13:02 2020 +* Created: Wed Sep 2 08:36:57 2020 * x_PM_SKY130_FD_SC_HDLL__NAND2_6%B N_B_c_77_n N_B_M1002_g N_B_c_85_n N_B_M1001_g + N_B_c_86_n N_B_M1008_g N_B_c_78_n N_B_M1007_g N_B_c_79_n N_B_M1015_g
diff --git a/cells/nand2/sky130_fd_sc_hdll__nand2_6.spice b/cells/nand2/sky130_fd_sc_hdll__nand2_6.spice index 556182e..dfe03b1 100644 --- a/cells/nand2/sky130_fd_sc_hdll__nand2_6.spice +++ b/cells/nand2/sky130_fd_sc_hdll__nand2_6.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand2_6.spice -* Created: Thu Aug 27 19:13:02 2020 +* Created: Wed Sep 2 08:36:57 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nand2/sky130_fd_sc_hdll__nand2_8.lvs.report b/cells/nand2/sky130_fd_sc_hdll__nand2_8.lvs.report new file mode 100644 index 0000000..879bdbc --- /dev/null +++ b/cells/nand2/sky130_fd_sc_hdll__nand2_8.lvs.report
@@ -0,0 +1,506 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_8.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_8.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nand2_8.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nand2_8.sp ('sky130_fd_sc_hdll__nand2_8') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2/sky130_fd_sc_hdll__nand2_8.spice ('sky130_fd_sc_hdll__nand2_8') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:37:01 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nand2_8 sky130_fd_sc_hdll__nand2_8 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nand2_8 +SOURCE CELL NAME: sky130_fd_sc_hdll__nand2_8 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 16 16 MN (4 pins) + 16 16 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 33 32 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 7 7 + + Instances: 2 2 MP (4 pins) + 1 1 SMN2 (4 pins) + ------ ------ + Total Inst: 3 3 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 7 7 0 0 + + Instances: 2 2 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + ------- ------- --------- --------- + Total Inst: 3 3 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 32 layout mos transistors were reduced to 4. + 28 mos transistors were deleted by parallel reduction. + 32 source mos transistors were reduced to 4. + 28 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB B A VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nand2/sky130_fd_sc_hdll__nand2_8.pex.spice b/cells/nand2/sky130_fd_sc_hdll__nand2_8.pex.spice index 71ae679..8659898 100644 --- a/cells/nand2/sky130_fd_sc_hdll__nand2_8.pex.spice +++ b/cells/nand2/sky130_fd_sc_hdll__nand2_8.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand2_8.pex.spice -* Created: Thu Aug 27 19:13:09 2020 +* Created: Wed Sep 2 08:37:04 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nand2/sky130_fd_sc_hdll__nand2_8.pxi.spice b/cells/nand2/sky130_fd_sc_hdll__nand2_8.pxi.spice index 9bca508..38e2ef7 100644 --- a/cells/nand2/sky130_fd_sc_hdll__nand2_8.pxi.spice +++ b/cells/nand2/sky130_fd_sc_hdll__nand2_8.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand2_8.pxi.spice -* Created: Thu Aug 27 19:13:09 2020 +* Created: Wed Sep 2 08:37:04 2020 * x_PM_SKY130_FD_SC_HDLL__NAND2_8%B N_B_M1008_g N_B_c_120_n N_B_M1000_g + N_B_M1010_g N_B_c_121_n N_B_M1001_g N_B_M1011_g N_B_c_122_n N_B_M1003_g
diff --git a/cells/nand2/sky130_fd_sc_hdll__nand2_8.spice b/cells/nand2/sky130_fd_sc_hdll__nand2_8.spice index d1c8756..605d1c6 100644 --- a/cells/nand2/sky130_fd_sc_hdll__nand2_8.spice +++ b/cells/nand2/sky130_fd_sc_hdll__nand2_8.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand2_8.spice -* Created: Thu Aug 27 19:13:09 2020 +* Created: Wed Sep 2 08:37:04 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nand2b/sky130_fd_sc_hdll__nand2b_1.lvs.report b/cells/nand2b/sky130_fd_sc_hdll__nand2b_1.lvs.report new file mode 100644 index 0000000..62442d5 --- /dev/null +++ b/cells/nand2b/sky130_fd_sc_hdll__nand2b_1.lvs.report
@@ -0,0 +1,480 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2b/sky130_fd_sc_hdll__nand2b_1.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2b/sky130_fd_sc_hdll__nand2b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2b/sky130_fd_sc_hdll__nand2b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2b/sky130_fd_sc_hdll__nand2b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2b/sky130_fd_sc_hdll__nand2b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2b/sky130_fd_sc_hdll__nand2b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2b/sky130_fd_sc_hdll__nand2b_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nand2b_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nand2b_1.sp ('sky130_fd_sc_hdll__nand2b_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2b/sky130_fd_sc_hdll__nand2b_1.spice ('sky130_fd_sc_hdll__nand2b_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:37:09 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nand2b_1 sky130_fd_sc_hdll__nand2b_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nand2b_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__nand2b_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 14 9 * + + Instances: 3 3 MN (4 pins) + 3 3 MP (4 pins) + 1 0 * Dpar (2 pins) + 5 0 * Probe (2 pins) + ------ ------ + Total Inst: 12 6 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 1 1 MN (4 pins) + 3 3 MP (4 pins) + 1 1 SMN2 (4 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 8 8 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 3 3 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 6 layout instances were filtered and their pins removed from adjoining nets. + + 5 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A_N B VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nand2b/sky130_fd_sc_hdll__nand2b_1.pex.spice b/cells/nand2b/sky130_fd_sc_hdll__nand2b_1.pex.spice index 8fafbea..288515e 100644 --- a/cells/nand2b/sky130_fd_sc_hdll__nand2b_1.pex.spice +++ b/cells/nand2b/sky130_fd_sc_hdll__nand2b_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand2b_1.pex.spice -* Created: Thu Aug 27 19:13:16 2020 +* Created: Wed Sep 2 08:37:12 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nand2b/sky130_fd_sc_hdll__nand2b_1.pxi.spice b/cells/nand2b/sky130_fd_sc_hdll__nand2b_1.pxi.spice index be65416..a8533aa 100644 --- a/cells/nand2b/sky130_fd_sc_hdll__nand2b_1.pxi.spice +++ b/cells/nand2b/sky130_fd_sc_hdll__nand2b_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand2b_1.pxi.spice -* Created: Thu Aug 27 19:13:16 2020 +* Created: Wed Sep 2 08:37:12 2020 * x_PM_SKY130_FD_SC_HDLL__NAND2B_1%A_N N_A_N_c_39_n N_A_N_M1000_g N_A_N_c_36_n + N_A_N_M1002_g A_N N_A_N_c_38_n PM_SKY130_FD_SC_HDLL__NAND2B_1%A_N
diff --git a/cells/nand2b/sky130_fd_sc_hdll__nand2b_1.spice b/cells/nand2b/sky130_fd_sc_hdll__nand2b_1.spice index ff1f39c..7f701d2 100644 --- a/cells/nand2b/sky130_fd_sc_hdll__nand2b_1.spice +++ b/cells/nand2b/sky130_fd_sc_hdll__nand2b_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand2b_1.spice -* Created: Thu Aug 27 19:13:16 2020 +* Created: Wed Sep 2 08:37:12 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nand2b/sky130_fd_sc_hdll__nand2b_2.lvs.report b/cells/nand2b/sky130_fd_sc_hdll__nand2b_2.lvs.report new file mode 100644 index 0000000..11f0d9f --- /dev/null +++ b/cells/nand2b/sky130_fd_sc_hdll__nand2b_2.lvs.report
@@ -0,0 +1,486 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2b/sky130_fd_sc_hdll__nand2b_2.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2b/sky130_fd_sc_hdll__nand2b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2b/sky130_fd_sc_hdll__nand2b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2b/sky130_fd_sc_hdll__nand2b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2b/sky130_fd_sc_hdll__nand2b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2b/sky130_fd_sc_hdll__nand2b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2b/sky130_fd_sc_hdll__nand2b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2b/sky130_fd_sc_hdll__nand2b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2b/sky130_fd_sc_hdll__nand2b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2b/sky130_fd_sc_hdll__nand2b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2b/sky130_fd_sc_hdll__nand2b_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nand2b_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nand2b_2.sp ('sky130_fd_sc_hdll__nand2b_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2b/sky130_fd_sc_hdll__nand2b_2.spice ('sky130_fd_sc_hdll__nand2b_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:37:16 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nand2b_2 sky130_fd_sc_hdll__nand2b_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nand2b_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__nand2b_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 9 9 + + Instances: 5 5 MN (4 pins) + 5 5 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 11 10 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 1 1 MN (4 pins) + 3 3 MP (4 pins) + 1 1 SMN2 (4 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 8 8 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 3 3 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 4. + 4 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 4. + 4 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A_N B VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nand2b/sky130_fd_sc_hdll__nand2b_2.pex.spice b/cells/nand2b/sky130_fd_sc_hdll__nand2b_2.pex.spice index e16e7ff..6b909be 100644 --- a/cells/nand2b/sky130_fd_sc_hdll__nand2b_2.pex.spice +++ b/cells/nand2b/sky130_fd_sc_hdll__nand2b_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand2b_2.pex.spice -* Created: Thu Aug 27 19:13:23 2020 +* Created: Wed Sep 2 08:37:19 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nand2b/sky130_fd_sc_hdll__nand2b_2.pxi.spice b/cells/nand2b/sky130_fd_sc_hdll__nand2b_2.pxi.spice index 2fba1e2..7fb3fc0 100644 --- a/cells/nand2b/sky130_fd_sc_hdll__nand2b_2.pxi.spice +++ b/cells/nand2b/sky130_fd_sc_hdll__nand2b_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand2b_2.pxi.spice -* Created: Thu Aug 27 19:13:23 2020 +* Created: Wed Sep 2 08:37:19 2020 * x_PM_SKY130_FD_SC_HDLL__NAND2B_2%A_N N_A_N_c_51_n N_A_N_M1009_g N_A_N_c_52_n + N_A_N_M1006_g A_N A_N PM_SKY130_FD_SC_HDLL__NAND2B_2%A_N
diff --git a/cells/nand2b/sky130_fd_sc_hdll__nand2b_2.spice b/cells/nand2b/sky130_fd_sc_hdll__nand2b_2.spice index 1d134de..ea73858 100644 --- a/cells/nand2b/sky130_fd_sc_hdll__nand2b_2.spice +++ b/cells/nand2b/sky130_fd_sc_hdll__nand2b_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand2b_2.spice -* Created: Thu Aug 27 19:13:23 2020 +* Created: Wed Sep 2 08:37:19 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nand2b/sky130_fd_sc_hdll__nand2b_4.lvs.report b/cells/nand2b/sky130_fd_sc_hdll__nand2b_4.lvs.report new file mode 100644 index 0000000..d8a3882 --- /dev/null +++ b/cells/nand2b/sky130_fd_sc_hdll__nand2b_4.lvs.report
@@ -0,0 +1,497 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2b/sky130_fd_sc_hdll__nand2b_4.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2b/sky130_fd_sc_hdll__nand2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2b/sky130_fd_sc_hdll__nand2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2b/sky130_fd_sc_hdll__nand2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2b/sky130_fd_sc_hdll__nand2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2b/sky130_fd_sc_hdll__nand2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2b/sky130_fd_sc_hdll__nand2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2b/sky130_fd_sc_hdll__nand2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2b/sky130_fd_sc_hdll__nand2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2b/sky130_fd_sc_hdll__nand2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2b/sky130_fd_sc_hdll__nand2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2b/sky130_fd_sc_hdll__nand2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2b/sky130_fd_sc_hdll__nand2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2b/sky130_fd_sc_hdll__nand2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2b/sky130_fd_sc_hdll__nand2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2b/sky130_fd_sc_hdll__nand2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2b/sky130_fd_sc_hdll__nand2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2b/sky130_fd_sc_hdll__nand2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2b/sky130_fd_sc_hdll__nand2b_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nand2b_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nand2b_4.sp ('sky130_fd_sc_hdll__nand2b_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand2b/sky130_fd_sc_hdll__nand2b_4.spice ('sky130_fd_sc_hdll__nand2b_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:37:23 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nand2b_4 sky130_fd_sc_hdll__nand2b_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nand2b_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__nand2b_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 15 9 * + + Instances: 9 9 MN (4 pins) + 9 9 MP (4 pins) + 1 0 * Dpar (2 pins) + 6 0 * Probe (2 pins) + ------ ------ + Total Inst: 25 18 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 1 1 MN (4 pins) + 3 3 MP (4 pins) + 1 1 SMN2 (4 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 8 8 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 3 3 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 7 layout instances were filtered and their pins removed from adjoining nets. + + 16 layout mos transistors were reduced to 4. + 12 mos transistors were deleted by parallel reduction. + 16 source mos transistors were reduced to 4. + 12 mos transistors were deleted by parallel reduction. + + 6 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A_N B VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nand2b/sky130_fd_sc_hdll__nand2b_4.pex.spice b/cells/nand2b/sky130_fd_sc_hdll__nand2b_4.pex.spice index ac5dd75..32e89bf 100644 --- a/cells/nand2b/sky130_fd_sc_hdll__nand2b_4.pex.spice +++ b/cells/nand2b/sky130_fd_sc_hdll__nand2b_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand2b_4.pex.spice -* Created: Thu Aug 27 19:13:30 2020 +* Created: Wed Sep 2 08:37:26 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nand2b/sky130_fd_sc_hdll__nand2b_4.pxi.spice b/cells/nand2b/sky130_fd_sc_hdll__nand2b_4.pxi.spice index 0cce2ec..ebc766c 100644 --- a/cells/nand2b/sky130_fd_sc_hdll__nand2b_4.pxi.spice +++ b/cells/nand2b/sky130_fd_sc_hdll__nand2b_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand2b_4.pxi.spice -* Created: Thu Aug 27 19:13:30 2020 +* Created: Wed Sep 2 08:37:26 2020 * x_PM_SKY130_FD_SC_HDLL__NAND2B_4%A_N N_A_N_c_89_n N_A_N_M1006_g N_A_N_M1013_g + A_N N_A_N_c_88_n PM_SKY130_FD_SC_HDLL__NAND2B_4%A_N
diff --git a/cells/nand2b/sky130_fd_sc_hdll__nand2b_4.spice b/cells/nand2b/sky130_fd_sc_hdll__nand2b_4.spice index ce8dae6..9f8f6bc 100644 --- a/cells/nand2b/sky130_fd_sc_hdll__nand2b_4.spice +++ b/cells/nand2b/sky130_fd_sc_hdll__nand2b_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand2b_4.spice -* Created: Thu Aug 27 19:13:30 2020 +* Created: Wed Sep 2 08:37:26 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nand3/sky130_fd_sc_hdll__nand3_1.lvs.report b/cells/nand3/sky130_fd_sc_hdll__nand3_1.lvs.report new file mode 100644 index 0000000..6149a41 --- /dev/null +++ b/cells/nand3/sky130_fd_sc_hdll__nand3_1.lvs.report
@@ -0,0 +1,475 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_1.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nand3_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nand3_1.sp ('sky130_fd_sc_hdll__nand3_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_1.spice ('sky130_fd_sc_hdll__nand3_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:37:30 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nand3_1 sky130_fd_sc_hdll__nand3_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nand3_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__nand3_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 10 10 + + Instances: 3 3 MN (4 pins) + 3 3 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 7 6 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 8 8 + + Instances: 3 3 MP (4 pins) + 1 1 SMN3 (5 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 8 8 0 0 + + Instances: 3 3 0 0 MP(PHIGHVT) + 1 1 0 0 SMN3 + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB C B A VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nand3/sky130_fd_sc_hdll__nand3_1.pex.spice b/cells/nand3/sky130_fd_sc_hdll__nand3_1.pex.spice index c802ee5..e914a9b 100644 --- a/cells/nand3/sky130_fd_sc_hdll__nand3_1.pex.spice +++ b/cells/nand3/sky130_fd_sc_hdll__nand3_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand3_1.pex.spice -* Created: Thu Aug 27 19:13:37 2020 +* Created: Wed Sep 2 08:37:33 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nand3/sky130_fd_sc_hdll__nand3_1.pxi.spice b/cells/nand3/sky130_fd_sc_hdll__nand3_1.pxi.spice index cbeb266..aa3905b 100644 --- a/cells/nand3/sky130_fd_sc_hdll__nand3_1.pxi.spice +++ b/cells/nand3/sky130_fd_sc_hdll__nand3_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand3_1.pxi.spice -* Created: Thu Aug 27 19:13:37 2020 +* Created: Wed Sep 2 08:37:33 2020 * x_PM_SKY130_FD_SC_HDLL__NAND3_1%C N_C_c_37_n N_C_M1003_g N_C_c_34_n N_C_M1005_g + C C N_C_c_36_n PM_SKY130_FD_SC_HDLL__NAND3_1%C
diff --git a/cells/nand3/sky130_fd_sc_hdll__nand3_1.spice b/cells/nand3/sky130_fd_sc_hdll__nand3_1.spice index 03daf55..ffd569d 100644 --- a/cells/nand3/sky130_fd_sc_hdll__nand3_1.spice +++ b/cells/nand3/sky130_fd_sc_hdll__nand3_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand3_1.spice -* Created: Thu Aug 27 19:13:37 2020 +* Created: Wed Sep 2 08:37:33 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nand3/sky130_fd_sc_hdll__nand3_2.lvs.report b/cells/nand3/sky130_fd_sc_hdll__nand3_2.lvs.report new file mode 100644 index 0000000..bbf430e --- /dev/null +++ b/cells/nand3/sky130_fd_sc_hdll__nand3_2.lvs.report
@@ -0,0 +1,486 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_2.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nand3_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nand3_2.sp ('sky130_fd_sc_hdll__nand3_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_2.spice ('sky130_fd_sc_hdll__nand3_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:37:37 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nand3_2 sky130_fd_sc_hdll__nand3_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nand3_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__nand3_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 10 10 + + Instances: 6 6 MN (4 pins) + 6 6 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 13 12 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 8 8 + + Instances: 3 3 MP (4 pins) + 1 1 SMN3 (5 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 8 8 0 0 + + Instances: 3 3 0 0 MP(PHIGHVT) + 1 1 0 0 SMN3 + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 12 layout mos transistors were reduced to 6. + 6 mos transistors were deleted by parallel reduction. + 12 source mos transistors were reduced to 6. + 6 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A B C VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nand3/sky130_fd_sc_hdll__nand3_2.pex.spice b/cells/nand3/sky130_fd_sc_hdll__nand3_2.pex.spice index fd8cf5d..03f0c44 100644 --- a/cells/nand3/sky130_fd_sc_hdll__nand3_2.pex.spice +++ b/cells/nand3/sky130_fd_sc_hdll__nand3_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand3_2.pex.spice -* Created: Thu Aug 27 19:13:44 2020 +* Created: Wed Sep 2 08:37:40 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nand3/sky130_fd_sc_hdll__nand3_2.pxi.spice b/cells/nand3/sky130_fd_sc_hdll__nand3_2.pxi.spice index 3ffc5b2..67984e2 100644 --- a/cells/nand3/sky130_fd_sc_hdll__nand3_2.pxi.spice +++ b/cells/nand3/sky130_fd_sc_hdll__nand3_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand3_2.pxi.spice -* Created: Thu Aug 27 19:13:44 2020 +* Created: Wed Sep 2 08:37:40 2020 * x_PM_SKY130_FD_SC_HDLL__NAND3_2%A N_A_c_56_n N_A_M1000_g N_A_c_52_n N_A_M1001_g + N_A_c_57_n N_A_M1005_g N_A_c_53_n N_A_M1008_g A N_A_c_55_n
diff --git a/cells/nand3/sky130_fd_sc_hdll__nand3_2.spice b/cells/nand3/sky130_fd_sc_hdll__nand3_2.spice index 86bbd61..17f7c12 100644 --- a/cells/nand3/sky130_fd_sc_hdll__nand3_2.spice +++ b/cells/nand3/sky130_fd_sc_hdll__nand3_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand3_2.spice -* Created: Thu Aug 27 19:13:44 2020 +* Created: Wed Sep 2 08:37:40 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nand3/sky130_fd_sc_hdll__nand3_4.lvs.report b/cells/nand3/sky130_fd_sc_hdll__nand3_4.lvs.report new file mode 100644 index 0000000..252d6bd --- /dev/null +++ b/cells/nand3/sky130_fd_sc_hdll__nand3_4.lvs.report
@@ -0,0 +1,498 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_4.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nand3_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nand3_4.sp ('sky130_fd_sc_hdll__nand3_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3/sky130_fd_sc_hdll__nand3_4.spice ('sky130_fd_sc_hdll__nand3_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:37:44 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nand3_4 sky130_fd_sc_hdll__nand3_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nand3_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__nand3_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 10 10 + + Instances: 12 12 MN (4 pins) + 12 12 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 25 24 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 8 8 + + Instances: 3 3 MP (4 pins) + 1 1 SMN3 (5 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 8 8 0 0 + + Instances: 3 3 0 0 MP(PHIGHVT) + 1 1 0 0 SMN3 + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 24 layout mos transistors were reduced to 6. + 18 mos transistors were deleted by parallel reduction. + 24 source mos transistors were reduced to 6. + 18 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB C B A VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nand3/sky130_fd_sc_hdll__nand3_4.pex.spice b/cells/nand3/sky130_fd_sc_hdll__nand3_4.pex.spice index bd479a4..a8d58cf 100644 --- a/cells/nand3/sky130_fd_sc_hdll__nand3_4.pex.spice +++ b/cells/nand3/sky130_fd_sc_hdll__nand3_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand3_4.pex.spice -* Created: Thu Aug 27 19:13:51 2020 +* Created: Wed Sep 2 08:37:48 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nand3/sky130_fd_sc_hdll__nand3_4.pxi.spice b/cells/nand3/sky130_fd_sc_hdll__nand3_4.pxi.spice index 658763e..0a8ce0c 100644 --- a/cells/nand3/sky130_fd_sc_hdll__nand3_4.pxi.spice +++ b/cells/nand3/sky130_fd_sc_hdll__nand3_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand3_4.pxi.spice -* Created: Thu Aug 27 19:13:51 2020 +* Created: Wed Sep 2 08:37:48 2020 * x_PM_SKY130_FD_SC_HDLL__NAND3_4%C N_C_c_101_n N_C_M1001_g N_C_M1002_g + N_C_c_102_n N_C_M1010_g N_C_M1017_g N_C_c_103_n N_C_M1015_g N_C_M1018_g
diff --git a/cells/nand3/sky130_fd_sc_hdll__nand3_4.spice b/cells/nand3/sky130_fd_sc_hdll__nand3_4.spice index dd9b9e2..c560a3e 100644 --- a/cells/nand3/sky130_fd_sc_hdll__nand3_4.spice +++ b/cells/nand3/sky130_fd_sc_hdll__nand3_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand3_4.spice -* Created: Thu Aug 27 19:13:51 2020 +* Created: Wed Sep 2 08:37:48 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nand3b/sky130_fd_sc_hdll__nand3b_1.lvs.report b/cells/nand3b/sky130_fd_sc_hdll__nand3b_1.lvs.report new file mode 100644 index 0000000..97cc246 --- /dev/null +++ b/cells/nand3b/sky130_fd_sc_hdll__nand3b_1.lvs.report
@@ -0,0 +1,482 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_1.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nand3b_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nand3b_1.sp ('sky130_fd_sc_hdll__nand3b_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_1.spice ('sky130_fd_sc_hdll__nand3b_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:37:52 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nand3b_1 sky130_fd_sc_hdll__nand3b_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nand3b_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__nand3b_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 12 11 * + + Instances: 4 4 MN (4 pins) + 4 4 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 10 8 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 9 9 + + Instances: 1 1 MN (4 pins) + 4 4 MP (4 pins) + 1 1 SMN3 (5 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 9 9 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 4 4 0 0 MP(PHIGHVT) + 1 1 0 0 SMN3 + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A_N C B VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nand3b/sky130_fd_sc_hdll__nand3b_1.pex.spice b/cells/nand3b/sky130_fd_sc_hdll__nand3b_1.pex.spice index 79722c9..53092b6 100644 --- a/cells/nand3b/sky130_fd_sc_hdll__nand3b_1.pex.spice +++ b/cells/nand3b/sky130_fd_sc_hdll__nand3b_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand3b_1.pex.spice -* Created: Thu Aug 27 19:13:58 2020 +* Created: Wed Sep 2 08:37:55 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nand3b/sky130_fd_sc_hdll__nand3b_1.pxi.spice b/cells/nand3b/sky130_fd_sc_hdll__nand3b_1.pxi.spice index 78c88f3..419cfd8 100644 --- a/cells/nand3b/sky130_fd_sc_hdll__nand3b_1.pxi.spice +++ b/cells/nand3b/sky130_fd_sc_hdll__nand3b_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand3b_1.pxi.spice -* Created: Thu Aug 27 19:13:58 2020 +* Created: Wed Sep 2 08:37:55 2020 * x_PM_SKY130_FD_SC_HDLL__NAND3B_1%A_N N_A_N_c_44_n N_A_N_M1000_g N_A_N_c_45_n + N_A_N_M1003_g A_N PM_SKY130_FD_SC_HDLL__NAND3B_1%A_N
diff --git a/cells/nand3b/sky130_fd_sc_hdll__nand3b_1.spice b/cells/nand3b/sky130_fd_sc_hdll__nand3b_1.spice index 2dcc667..e0cd29d 100644 --- a/cells/nand3b/sky130_fd_sc_hdll__nand3b_1.spice +++ b/cells/nand3b/sky130_fd_sc_hdll__nand3b_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand3b_1.spice -* Created: Thu Aug 27 19:13:58 2020 +* Created: Wed Sep 2 08:37:55 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nand3b/sky130_fd_sc_hdll__nand3b_2.lvs.report b/cells/nand3b/sky130_fd_sc_hdll__nand3b_2.lvs.report new file mode 100644 index 0000000..2fcba95 --- /dev/null +++ b/cells/nand3b/sky130_fd_sc_hdll__nand3b_2.lvs.report
@@ -0,0 +1,490 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_2.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nand3b_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nand3b_2.sp ('sky130_fd_sc_hdll__nand3b_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_2.spice ('sky130_fd_sc_hdll__nand3b_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:37:59 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nand3b_2 sky130_fd_sc_hdll__nand3b_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nand3b_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__nand3b_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 11 11 + + Instances: 7 7 MN (4 pins) + 7 7 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 15 14 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 9 9 + + Instances: 1 1 MN (4 pins) + 4 4 MP (4 pins) + 1 1 SMN3 (5 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 9 9 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 4 4 0 0 MP(PHIGHVT) + 1 1 0 0 SMN3 + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 12 layout mos transistors were reduced to 6. + 6 mos transistors were deleted by parallel reduction. + 12 source mos transistors were reduced to 6. + 6 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A_N C B VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nand3b/sky130_fd_sc_hdll__nand3b_2.pex.spice b/cells/nand3b/sky130_fd_sc_hdll__nand3b_2.pex.spice index c46f2f9..71995dc 100644 --- a/cells/nand3b/sky130_fd_sc_hdll__nand3b_2.pex.spice +++ b/cells/nand3b/sky130_fd_sc_hdll__nand3b_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand3b_2.pex.spice -* Created: Thu Aug 27 19:14:05 2020 +* Created: Wed Sep 2 08:38:02 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nand3b/sky130_fd_sc_hdll__nand3b_2.pxi.spice b/cells/nand3b/sky130_fd_sc_hdll__nand3b_2.pxi.spice index 84dcc28..b9ddd75 100644 --- a/cells/nand3b/sky130_fd_sc_hdll__nand3b_2.pxi.spice +++ b/cells/nand3b/sky130_fd_sc_hdll__nand3b_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand3b_2.pxi.spice -* Created: Thu Aug 27 19:14:05 2020 +* Created: Wed Sep 2 08:38:02 2020 * x_PM_SKY130_FD_SC_HDLL__NAND3B_2%A_N N_A_N_M1013_g N_A_N_c_75_n N_A_N_c_76_n + N_A_N_M1002_g A_N N_A_N_c_74_n A_N PM_SKY130_FD_SC_HDLL__NAND3B_2%A_N
diff --git a/cells/nand3b/sky130_fd_sc_hdll__nand3b_2.spice b/cells/nand3b/sky130_fd_sc_hdll__nand3b_2.spice index 54dee72..a03e41b 100644 --- a/cells/nand3b/sky130_fd_sc_hdll__nand3b_2.spice +++ b/cells/nand3b/sky130_fd_sc_hdll__nand3b_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand3b_2.spice -* Created: Thu Aug 27 19:14:05 2020 +* Created: Wed Sep 2 08:38:02 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.lvs.report b/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.lvs.report new file mode 100644 index 0000000..009489f --- /dev/null +++ b/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.lvs.report
@@ -0,0 +1,502 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nand3b_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nand3b_4.sp ('sky130_fd_sc_hdll__nand3b_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.spice ('sky130_fd_sc_hdll__nand3b_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:38:06 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nand3b_4 sky130_fd_sc_hdll__nand3b_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nand3b_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__nand3b_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 11 11 + + Instances: 13 13 MN (4 pins) + 13 13 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 27 26 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 9 9 + + Instances: 1 1 MN (4 pins) + 4 4 MP (4 pins) + 1 1 SMN3 (5 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 9 9 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 4 4 0 0 MP(PHIGHVT) + 1 1 0 0 SMN3 + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 24 layout mos transistors were reduced to 6. + 18 mos transistors were deleted by parallel reduction. + 24 source mos transistors were reduced to 6. + 18 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A_N B C VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.pex.spice b/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.pex.spice index d6991a6..6ccef6a 100644 --- a/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.pex.spice +++ b/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand3b_4.pex.spice -* Created: Thu Aug 27 19:14:12 2020 +* Created: Wed Sep 2 08:38:09 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.pxi.spice b/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.pxi.spice index c8d8a93..919cdc2 100644 --- a/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.pxi.spice +++ b/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand3b_4.pxi.spice -* Created: Thu Aug 27 19:14:12 2020 +* Created: Wed Sep 2 08:38:09 2020 * x_PM_SKY130_FD_SC_HDLL__NAND3B_4%A_N N_A_N_M1023_g N_A_N_c_100_n N_A_N_M1007_g + A_N A_N PM_SKY130_FD_SC_HDLL__NAND3B_4%A_N
diff --git a/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.spice b/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.spice index 8f17b5e..65b1b66 100644 --- a/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.spice +++ b/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand3b_4.spice -* Created: Thu Aug 27 19:14:12 2020 +* Created: Wed Sep 2 08:38:09 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nand4/sky130_fd_sc_hdll__nand4_1.lvs.report b/cells/nand4/sky130_fd_sc_hdll__nand4_1.lvs.report new file mode 100644 index 0000000..04492ef --- /dev/null +++ b/cells/nand4/sky130_fd_sc_hdll__nand4_1.lvs.report
@@ -0,0 +1,480 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_1.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nand4_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nand4_1.sp ('sky130_fd_sc_hdll__nand4_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_1.spice ('sky130_fd_sc_hdll__nand4_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:38:13 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nand4_1 sky130_fd_sc_hdll__nand4_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nand4_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__nand4_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 13 12 * + + Instances: 4 4 MN (4 pins) + 4 4 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 10 8 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 9 9 + + Instances: 4 4 MP (4 pins) + 1 1 SMN4 (6 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 9 9 0 0 + + Instances: 4 4 0 0 MP(PHIGHVT) + 1 1 0 0 SMN4 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB D C B A VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nand4/sky130_fd_sc_hdll__nand4_1.pex.spice b/cells/nand4/sky130_fd_sc_hdll__nand4_1.pex.spice index 4cee4a8..5f5f91f 100644 --- a/cells/nand4/sky130_fd_sc_hdll__nand4_1.pex.spice +++ b/cells/nand4/sky130_fd_sc_hdll__nand4_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand4_1.pex.spice -* Created: Thu Aug 27 19:14:19 2020 +* Created: Wed Sep 2 08:38:17 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nand4/sky130_fd_sc_hdll__nand4_1.pxi.spice b/cells/nand4/sky130_fd_sc_hdll__nand4_1.pxi.spice index ef1068b..14f34e6 100644 --- a/cells/nand4/sky130_fd_sc_hdll__nand4_1.pxi.spice +++ b/cells/nand4/sky130_fd_sc_hdll__nand4_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand4_1.pxi.spice -* Created: Thu Aug 27 19:14:19 2020 +* Created: Wed Sep 2 08:38:17 2020 * x_PM_SKY130_FD_SC_HDLL__NAND4_1%D N_D_c_46_n N_D_M1004_g N_D_c_43_n N_D_M1006_g + D N_D_c_45_n PM_SKY130_FD_SC_HDLL__NAND4_1%D
diff --git a/cells/nand4/sky130_fd_sc_hdll__nand4_1.spice b/cells/nand4/sky130_fd_sc_hdll__nand4_1.spice index 80ea2ee..65d8396 100644 --- a/cells/nand4/sky130_fd_sc_hdll__nand4_1.spice +++ b/cells/nand4/sky130_fd_sc_hdll__nand4_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand4_1.spice -* Created: Thu Aug 27 19:14:19 2020 +* Created: Wed Sep 2 08:38:17 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nand4/sky130_fd_sc_hdll__nand4_2.lvs.report b/cells/nand4/sky130_fd_sc_hdll__nand4_2.lvs.report new file mode 100644 index 0000000..a39734d --- /dev/null +++ b/cells/nand4/sky130_fd_sc_hdll__nand4_2.lvs.report
@@ -0,0 +1,490 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_2.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nand4_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nand4_2.sp ('sky130_fd_sc_hdll__nand4_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_2.spice ('sky130_fd_sc_hdll__nand4_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:38:20 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nand4_2 sky130_fd_sc_hdll__nand4_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nand4_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__nand4_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 12 12 + + Instances: 8 8 MN (4 pins) + 8 8 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 17 16 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 9 9 + + Instances: 4 4 MP (4 pins) + 1 1 SMN4 (6 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 9 9 0 0 + + Instances: 4 4 0 0 MP(PHIGHVT) + 1 1 0 0 SMN4 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 16 layout mos transistors were reduced to 8. + 8 mos transistors were deleted by parallel reduction. + 16 source mos transistors were reduced to 8. + 8 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB D C B A VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nand4/sky130_fd_sc_hdll__nand4_2.pex.spice b/cells/nand4/sky130_fd_sc_hdll__nand4_2.pex.spice index 598b981..7d018a2 100644 --- a/cells/nand4/sky130_fd_sc_hdll__nand4_2.pex.spice +++ b/cells/nand4/sky130_fd_sc_hdll__nand4_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand4_2.pex.spice -* Created: Thu Aug 27 19:14:26 2020 +* Created: Wed Sep 2 08:38:24 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nand4/sky130_fd_sc_hdll__nand4_2.pxi.spice b/cells/nand4/sky130_fd_sc_hdll__nand4_2.pxi.spice index d286f27..fae6860 100644 --- a/cells/nand4/sky130_fd_sc_hdll__nand4_2.pxi.spice +++ b/cells/nand4/sky130_fd_sc_hdll__nand4_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand4_2.pxi.spice -* Created: Thu Aug 27 19:14:26 2020 +* Created: Wed Sep 2 08:38:24 2020 * x_PM_SKY130_FD_SC_HDLL__NAND4_2%D N_D_c_76_n N_D_M1000_g N_D_M1002_g N_D_c_77_n + N_D_M1009_g N_D_M1012_g D D N_D_c_74_n N_D_c_75_n
diff --git a/cells/nand4/sky130_fd_sc_hdll__nand4_2.spice b/cells/nand4/sky130_fd_sc_hdll__nand4_2.spice index a88a403..064e8f0 100644 --- a/cells/nand4/sky130_fd_sc_hdll__nand4_2.spice +++ b/cells/nand4/sky130_fd_sc_hdll__nand4_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand4_2.spice -* Created: Thu Aug 27 19:14:26 2020 +* Created: Wed Sep 2 08:38:24 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nand4/sky130_fd_sc_hdll__nand4_4.lvs.report b/cells/nand4/sky130_fd_sc_hdll__nand4_4.lvs.report new file mode 100644 index 0000000..8fbbc2c --- /dev/null +++ b/cells/nand4/sky130_fd_sc_hdll__nand4_4.lvs.report
@@ -0,0 +1,509 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_4.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nand4_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nand4_4.sp ('sky130_fd_sc_hdll__nand4_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4/sky130_fd_sc_hdll__nand4_4.spice ('sky130_fd_sc_hdll__nand4_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:38:28 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nand4_4 sky130_fd_sc_hdll__nand4_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nand4_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__nand4_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 13 12 * + + Instances: 16 16 MN (4 pins) + 16 16 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 34 32 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 9 9 + + Instances: 4 4 MP (4 pins) + 1 1 SMN4 (6 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 9 9 0 0 + + Instances: 4 4 0 0 MP(PHIGHVT) + 1 1 0 0 SMN4 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 32 layout mos transistors were reduced to 8. + 24 mos transistors were deleted by parallel reduction. + 32 source mos transistors were reduced to 8. + 24 mos transistors were deleted by parallel reduction. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB D C B A VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nand4/sky130_fd_sc_hdll__nand4_4.pex.spice b/cells/nand4/sky130_fd_sc_hdll__nand4_4.pex.spice index 6d29f5e..a08fda0 100644 --- a/cells/nand4/sky130_fd_sc_hdll__nand4_4.pex.spice +++ b/cells/nand4/sky130_fd_sc_hdll__nand4_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand4_4.pex.spice -* Created: Thu Aug 27 19:14:33 2020 +* Created: Wed Sep 2 08:38:31 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nand4/sky130_fd_sc_hdll__nand4_4.pxi.spice b/cells/nand4/sky130_fd_sc_hdll__nand4_4.pxi.spice index 2a12654..97bcae7 100644 --- a/cells/nand4/sky130_fd_sc_hdll__nand4_4.pxi.spice +++ b/cells/nand4/sky130_fd_sc_hdll__nand4_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand4_4.pxi.spice -* Created: Thu Aug 27 19:14:33 2020 +* Created: Wed Sep 2 08:38:31 2020 * x_PM_SKY130_FD_SC_HDLL__NAND4_4%D N_D_c_122_n N_D_M1001_g N_D_M1002_g + N_D_c_123_n N_D_M1014_g N_D_M1022_g N_D_c_124_n N_D_M1020_g N_D_M1023_g
diff --git a/cells/nand4/sky130_fd_sc_hdll__nand4_4.spice b/cells/nand4/sky130_fd_sc_hdll__nand4_4.spice index 9e1c7da..7f8aee6 100644 --- a/cells/nand4/sky130_fd_sc_hdll__nand4_4.spice +++ b/cells/nand4/sky130_fd_sc_hdll__nand4_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand4_4.spice -* Created: Thu Aug 27 19:14:33 2020 +* Created: Wed Sep 2 08:38:31 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nand4b/sky130_fd_sc_hdll__nand4b_1.lvs.report b/cells/nand4b/sky130_fd_sc_hdll__nand4b_1.lvs.report new file mode 100644 index 0000000..1f8d5e1 --- /dev/null +++ b/cells/nand4b/sky130_fd_sc_hdll__nand4b_1.lvs.report
@@ -0,0 +1,481 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_1.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nand4b_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nand4b_1.sp ('sky130_fd_sc_hdll__nand4b_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_1.spice ('sky130_fd_sc_hdll__nand4b_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:38:35 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nand4b_1 sky130_fd_sc_hdll__nand4b_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nand4b_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__nand4b_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 13 13 + + Instances: 5 5 MN (4 pins) + 5 5 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 11 10 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 10 10 + + Instances: 1 1 MN (4 pins) + 5 5 MP (4 pins) + 1 1 SMN4 (6 pins) + ------ ------ + Total Inst: 7 7 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 10 10 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 5 5 0 0 MP(PHIGHVT) + 1 1 0 0 SMN4 + ------- ------- --------- --------- + Total Inst: 7 7 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB A_N D C B VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nand4b/sky130_fd_sc_hdll__nand4b_1.pex.spice b/cells/nand4b/sky130_fd_sc_hdll__nand4b_1.pex.spice index cbfd6ca..d0984cb 100644 --- a/cells/nand4b/sky130_fd_sc_hdll__nand4b_1.pex.spice +++ b/cells/nand4b/sky130_fd_sc_hdll__nand4b_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand4b_1.pex.spice -* Created: Thu Aug 27 19:14:40 2020 +* Created: Wed Sep 2 08:38:38 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nand4b/sky130_fd_sc_hdll__nand4b_1.pxi.spice b/cells/nand4b/sky130_fd_sc_hdll__nand4b_1.pxi.spice index 60b4eab..39e7130 100644 --- a/cells/nand4b/sky130_fd_sc_hdll__nand4b_1.pxi.spice +++ b/cells/nand4b/sky130_fd_sc_hdll__nand4b_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand4b_1.pxi.spice -* Created: Thu Aug 27 19:14:40 2020 +* Created: Wed Sep 2 08:38:38 2020 * x_PM_SKY130_FD_SC_HDLL__NAND4B_1%A_N N_A_N_c_51_n N_A_N_M1001_g N_A_N_c_52_n + N_A_N_M1002_g A_N A_N PM_SKY130_FD_SC_HDLL__NAND4B_1%A_N
diff --git a/cells/nand4b/sky130_fd_sc_hdll__nand4b_1.spice b/cells/nand4b/sky130_fd_sc_hdll__nand4b_1.spice index c9e95d3..6b2499e 100644 --- a/cells/nand4b/sky130_fd_sc_hdll__nand4b_1.spice +++ b/cells/nand4b/sky130_fd_sc_hdll__nand4b_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand4b_1.spice -* Created: Thu Aug 27 19:14:40 2020 +* Created: Wed Sep 2 08:38:38 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nand4b/sky130_fd_sc_hdll__nand4b_2.lvs.report b/cells/nand4b/sky130_fd_sc_hdll__nand4b_2.lvs.report new file mode 100644 index 0000000..4814b19 --- /dev/null +++ b/cells/nand4b/sky130_fd_sc_hdll__nand4b_2.lvs.report
@@ -0,0 +1,494 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_2.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nand4b_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nand4b_2.sp ('sky130_fd_sc_hdll__nand4b_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_2.spice ('sky130_fd_sc_hdll__nand4b_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:38:42 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nand4b_2 sky130_fd_sc_hdll__nand4b_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nand4b_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__nand4b_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 13 13 + + Instances: 9 9 MN (4 pins) + 9 9 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 19 18 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 10 10 + + Instances: 1 1 MN (4 pins) + 5 5 MP (4 pins) + 1 1 SMN4 (6 pins) + ------ ------ + Total Inst: 7 7 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 10 10 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 5 5 0 0 MP(PHIGHVT) + 1 1 0 0 SMN4 + ------- ------- --------- --------- + Total Inst: 7 7 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 16 layout mos transistors were reduced to 8. + 8 mos transistors were deleted by parallel reduction. + 16 source mos transistors were reduced to 8. + 8 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A_N B C D VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nand4b/sky130_fd_sc_hdll__nand4b_2.pex.spice b/cells/nand4b/sky130_fd_sc_hdll__nand4b_2.pex.spice index 16971bb..51a0d66 100644 --- a/cells/nand4b/sky130_fd_sc_hdll__nand4b_2.pex.spice +++ b/cells/nand4b/sky130_fd_sc_hdll__nand4b_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand4b_2.pex.spice -* Created: Thu Aug 27 19:14:47 2020 +* Created: Wed Sep 2 08:38:45 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nand4b/sky130_fd_sc_hdll__nand4b_2.pxi.spice b/cells/nand4b/sky130_fd_sc_hdll__nand4b_2.pxi.spice index b6ba35c..2bf02bd 100644 --- a/cells/nand4b/sky130_fd_sc_hdll__nand4b_2.pxi.spice +++ b/cells/nand4b/sky130_fd_sc_hdll__nand4b_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand4b_2.pxi.spice -* Created: Thu Aug 27 19:14:47 2020 +* Created: Wed Sep 2 08:38:45 2020 * x_PM_SKY130_FD_SC_HDLL__NAND4B_2%A_N N_A_N_c_90_n N_A_N_c_91_n N_A_N_M1000_g + N_A_N_M1011_g A_N A_N N_A_N_c_89_n PM_SKY130_FD_SC_HDLL__NAND4B_2%A_N
diff --git a/cells/nand4b/sky130_fd_sc_hdll__nand4b_2.spice b/cells/nand4b/sky130_fd_sc_hdll__nand4b_2.spice index b83b874..c8b715c 100644 --- a/cells/nand4b/sky130_fd_sc_hdll__nand4b_2.spice +++ b/cells/nand4b/sky130_fd_sc_hdll__nand4b_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand4b_2.spice -* Created: Thu Aug 27 19:14:47 2020 +* Created: Wed Sep 2 08:38:45 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.lvs.report b/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.lvs.report new file mode 100644 index 0000000..47e571a --- /dev/null +++ b/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.lvs.report
@@ -0,0 +1,510 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nand4b_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nand4b_4.sp ('sky130_fd_sc_hdll__nand4b_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.spice ('sky130_fd_sc_hdll__nand4b_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:38:49 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nand4b_4 sky130_fd_sc_hdll__nand4b_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nand4b_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__nand4b_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 13 13 + + Instances: 17 17 MN (4 pins) + 17 17 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 35 34 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 10 10 + + Instances: 1 1 MN (4 pins) + 5 5 MP (4 pins) + 1 1 SMN4 (6 pins) + ------ ------ + Total Inst: 7 7 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 10 10 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 5 5 0 0 MP(PHIGHVT) + 1 1 0 0 SMN4 + ------- ------- --------- --------- + Total Inst: 7 7 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 32 layout mos transistors were reduced to 8. + 24 mos transistors were deleted by parallel reduction. + 32 source mos transistors were reduced to 8. + 24 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A_N B C D VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.pex.spice b/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.pex.spice index 1f75111..d2d954b 100644 --- a/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.pex.spice +++ b/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand4b_4.pex.spice -* Created: Thu Aug 27 19:14:54 2020 +* Created: Wed Sep 2 08:38:53 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.pxi.spice b/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.pxi.spice index d22fa83..602480d 100644 --- a/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.pxi.spice +++ b/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand4b_4.pxi.spice -* Created: Thu Aug 27 19:14:54 2020 +* Created: Wed Sep 2 08:38:53 2020 * x_PM_SKY130_FD_SC_HDLL__NAND4B_4%A_N N_A_N_c_134_n N_A_N_M1011_g N_A_N_M1023_g + A_N N_A_N_c_133_n PM_SKY130_FD_SC_HDLL__NAND4B_4%A_N
diff --git a/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.spice b/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.spice index f283516..4dbb2e9 100644 --- a/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.spice +++ b/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand4b_4.spice -* Created: Thu Aug 27 19:14:54 2020 +* Created: Wed Sep 2 08:38:53 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_1.lvs.report b/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_1.lvs.report new file mode 100644 index 0000000..7f25d33 --- /dev/null +++ b/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_1.lvs.report
@@ -0,0 +1,483 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_1.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nand4bb_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nand4bb_1.sp ('sky130_fd_sc_hdll__nand4bb_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_1.spice ('sky130_fd_sc_hdll__nand4bb_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:38:57 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nand4bb_1 sky130_fd_sc_hdll__nand4bb_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nand4bb_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__nand4bb_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 14 14 + + Instances: 6 6 MN (4 pins) + 6 6 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 13 12 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 11 11 + + Instances: 2 2 MN (4 pins) + 6 6 MP (4 pins) + 1 1 SMN4 (6 pins) + ------ ------ + Total Inst: 9 9 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 11 11 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 6 6 0 0 MP(PHIGHVT) + 1 1 0 0 SMN4 + ------- ------- --------- --------- + Total Inst: 9 9 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB B_N D C A_N VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_1.pex.spice b/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_1.pex.spice index 59e4d5b..44e4595 100644 --- a/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_1.pex.spice +++ b/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand4bb_1.pex.spice -* Created: Thu Aug 27 19:15:01 2020 +* Created: Wed Sep 2 08:39:00 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_1.pxi.spice b/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_1.pxi.spice index e27596a..57f5784 100644 --- a/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_1.pxi.spice +++ b/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand4bb_1.pxi.spice -* Created: Thu Aug 27 19:15:01 2020 +* Created: Wed Sep 2 08:39:00 2020 * x_PM_SKY130_FD_SC_HDLL__NAND4BB_1%B_N N_B_N_M1011_g N_B_N_c_71_n N_B_N_c_72_n + N_B_N_M1000_g B_N B_N N_B_N_c_69_n N_B_N_c_70_n
diff --git a/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_1.spice b/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_1.spice index 5cbc200..c4e5654 100644 --- a/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_1.spice +++ b/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand4bb_1.spice -* Created: Thu Aug 27 19:15:01 2020 +* Created: Wed Sep 2 08:39:00 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.lvs.report b/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.lvs.report new file mode 100644 index 0000000..56b53dc --- /dev/null +++ b/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.lvs.report
@@ -0,0 +1,496 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nand4bb_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nand4bb_2.sp ('sky130_fd_sc_hdll__nand4bb_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.spice ('sky130_fd_sc_hdll__nand4bb_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:39:04 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nand4bb_2 sky130_fd_sc_hdll__nand4bb_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nand4bb_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__nand4bb_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 14 14 + + Instances: 10 10 MN (4 pins) + 10 10 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 21 20 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 11 11 + + Instances: 2 2 MN (4 pins) + 6 6 MP (4 pins) + 1 1 SMN4 (6 pins) + ------ ------ + Total Inst: 9 9 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 11 11 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 6 6 0 0 MP(PHIGHVT) + 1 1 0 0 SMN4 + ------- ------- --------- --------- + Total Inst: 9 9 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 16 layout mos transistors were reduced to 8. + 8 mos transistors were deleted by parallel reduction. + 16 source mos transistors were reduced to 8. + 8 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB B_N A_N C D VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.pex.spice b/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.pex.spice index 856e20b..37d4fbf 100644 --- a/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.pex.spice +++ b/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand4bb_2.pex.spice -* Created: Thu Aug 27 19:15:08 2020 +* Created: Wed Sep 2 08:39:07 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.pxi.spice b/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.pxi.spice index 505d453..53dbc51 100644 --- a/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.pxi.spice +++ b/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand4bb_2.pxi.spice -* Created: Thu Aug 27 19:15:08 2020 +* Created: Wed Sep 2 08:39:07 2020 * x_PM_SKY130_FD_SC_HDLL__NAND4BB_2%B_N N_B_N_c_107_n N_B_N_c_108_n N_B_N_M1002_g + N_B_N_c_102_n N_B_N_M1012_g N_B_N_c_103_n N_B_N_c_109_n B_N B_N N_B_N_c_105_n
diff --git a/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.spice b/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.spice index f43f641..3712dc6 100644 --- a/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.spice +++ b/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand4bb_2.spice -* Created: Thu Aug 27 19:15:08 2020 +* Created: Wed Sep 2 08:39:07 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.lvs.report b/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.lvs.report new file mode 100644 index 0000000..e06ffed --- /dev/null +++ b/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.lvs.report
@@ -0,0 +1,512 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 87 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 89 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nand4bb_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nand4bb_4.sp ('sky130_fd_sc_hdll__nand4bb_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice ('sky130_fd_sc_hdll__nand4bb_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:39:11 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nand4bb_4 sky130_fd_sc_hdll__nand4bb_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nand4bb_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__nand4bb_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 14 14 + + Instances: 18 18 MN (4 pins) + 18 18 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 37 36 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 11 11 + + Instances: 2 2 MN (4 pins) + 6 6 MP (4 pins) + 1 1 SMN4 (6 pins) + ------ ------ + Total Inst: 9 9 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 11 11 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 6 6 0 0 MP(PHIGHVT) + 1 1 0 0 SMN4 + ------- ------- --------- --------- + Total Inst: 9 9 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 32 layout mos transistors were reduced to 8. + 24 mos transistors were deleted by parallel reduction. + 32 source mos transistors were reduced to 8. + 24 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A_N B_N C D VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.pex.spice b/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.pex.spice index d4a845d..091bb6d 100644 --- a/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.pex.spice +++ b/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand4bb_4.pex.spice -* Created: Thu Aug 27 19:15:15 2020 +* Created: Wed Sep 2 08:39:15 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.pxi.spice b/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.pxi.spice index 380eece..8fcc3f4 100644 --- a/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.pxi.spice +++ b/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand4bb_4.pxi.spice -* Created: Thu Aug 27 19:15:15 2020 +* Created: Wed Sep 2 08:39:15 2020 * x_PM_SKY130_FD_SC_HDLL__NAND4BB_4%A_N N_A_N_c_136_n N_A_N_M1014_g N_A_N_c_133_n + N_A_N_M1021_g A_N A_N N_A_N_c_135_n PM_SKY130_FD_SC_HDLL__NAND4BB_4%A_N
diff --git a/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice b/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice index 9e48ff6..082bd2f 100644 --- a/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice +++ b/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nand4bb_4.spice -* Created: Thu Aug 27 19:15:15 2020 +* Created: Wed Sep 2 08:39:15 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nor2/sky130_fd_sc_hdll__nor2_1.lvs.report b/cells/nor2/sky130_fd_sc_hdll__nor2_1.lvs.report new file mode 100644 index 0000000..9149055 --- /dev/null +++ b/cells/nor2/sky130_fd_sc_hdll__nor2_1.lvs.report
@@ -0,0 +1,476 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_1.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nor2_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nor2_1.sp ('sky130_fd_sc_hdll__nor2_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_1.spice ('sky130_fd_sc_hdll__nor2_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:39:19 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nor2_1 sky130_fd_sc_hdll__nor2_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nor2_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__nor2_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 9 8 * + + Instances: 2 2 MN (4 pins) + 2 2 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 6 4 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 7 7 + + Instances: 2 2 MN (4 pins) + 1 1 SMP2 (4 pins) + ------ ------ + Total Inst: 3 3 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 7 7 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 1 1 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 3 3 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB B A Y VPWR VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nor2/sky130_fd_sc_hdll__nor2_1.pex.spice b/cells/nor2/sky130_fd_sc_hdll__nor2_1.pex.spice index 97d8dc1..8fcdcca 100644 --- a/cells/nor2/sky130_fd_sc_hdll__nor2_1.pex.spice +++ b/cells/nor2/sky130_fd_sc_hdll__nor2_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor2_1.pex.spice -* Created: Thu Aug 27 19:15:22 2020 +* Created: Wed Sep 2 08:39:22 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nor2/sky130_fd_sc_hdll__nor2_1.pxi.spice b/cells/nor2/sky130_fd_sc_hdll__nor2_1.pxi.spice index 1cd5b62..a9d8f2b 100644 --- a/cells/nor2/sky130_fd_sc_hdll__nor2_1.pxi.spice +++ b/cells/nor2/sky130_fd_sc_hdll__nor2_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor2_1.pxi.spice -* Created: Thu Aug 27 19:15:22 2020 +* Created: Wed Sep 2 08:39:22 2020 * x_PM_SKY130_FD_SC_HDLL__NOR2_1%B N_B_c_28_n N_B_M1002_g N_B_c_29_n N_B_M1003_g B + PM_SKY130_FD_SC_HDLL__NOR2_1%B
diff --git a/cells/nor2/sky130_fd_sc_hdll__nor2_1.spice b/cells/nor2/sky130_fd_sc_hdll__nor2_1.spice index 3475536..5142ccf 100644 --- a/cells/nor2/sky130_fd_sc_hdll__nor2_1.spice +++ b/cells/nor2/sky130_fd_sc_hdll__nor2_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor2_1.spice -* Created: Thu Aug 27 19:15:22 2020 +* Created: Wed Sep 2 08:39:22 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nor2/sky130_fd_sc_hdll__nor2_2.lvs.report b/cells/nor2/sky130_fd_sc_hdll__nor2_2.lvs.report new file mode 100644 index 0000000..0d12b32 --- /dev/null +++ b/cells/nor2/sky130_fd_sc_hdll__nor2_2.lvs.report
@@ -0,0 +1,482 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_2.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nor2_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nor2_2.sp ('sky130_fd_sc_hdll__nor2_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_2.spice ('sky130_fd_sc_hdll__nor2_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:39:26 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nor2_2 sky130_fd_sc_hdll__nor2_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nor2_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__nor2_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 4 4 MN (4 pins) + 4 4 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 9 8 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 7 7 + + Instances: 2 2 MN (4 pins) + 1 1 SMP2 (4 pins) + ------ ------ + Total Inst: 3 3 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 7 7 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 1 1 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 3 3 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 4. + 4 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 4. + 4 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A B VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nor2/sky130_fd_sc_hdll__nor2_2.pex.spice b/cells/nor2/sky130_fd_sc_hdll__nor2_2.pex.spice index c4951e2..6392034 100644 --- a/cells/nor2/sky130_fd_sc_hdll__nor2_2.pex.spice +++ b/cells/nor2/sky130_fd_sc_hdll__nor2_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor2_2.pex.spice -* Created: Thu Aug 27 19:15:29 2020 +* Created: Wed Sep 2 08:39:29 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nor2/sky130_fd_sc_hdll__nor2_2.pxi.spice b/cells/nor2/sky130_fd_sc_hdll__nor2_2.pxi.spice index 9d1bf6e..a7f67de 100644 --- a/cells/nor2/sky130_fd_sc_hdll__nor2_2.pxi.spice +++ b/cells/nor2/sky130_fd_sc_hdll__nor2_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor2_2.pxi.spice -* Created: Thu Aug 27 19:15:29 2020 +* Created: Wed Sep 2 08:39:29 2020 * x_PM_SKY130_FD_SC_HDLL__NOR2_2%A N_A_c_45_n N_A_M1003_g N_A_c_49_n N_A_M1000_g + N_A_c_50_n N_A_M1005_g N_A_c_46_n N_A_M1007_g A A N_A_c_48_n
diff --git a/cells/nor2/sky130_fd_sc_hdll__nor2_2.spice b/cells/nor2/sky130_fd_sc_hdll__nor2_2.spice index bde817a..19886a6 100644 --- a/cells/nor2/sky130_fd_sc_hdll__nor2_2.spice +++ b/cells/nor2/sky130_fd_sc_hdll__nor2_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor2_2.spice -* Created: Thu Aug 27 19:15:29 2020 +* Created: Wed Sep 2 08:39:29 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nor2/sky130_fd_sc_hdll__nor2_4.lvs.report b/cells/nor2/sky130_fd_sc_hdll__nor2_4.lvs.report new file mode 100644 index 0000000..0ae955d --- /dev/null +++ b/cells/nor2/sky130_fd_sc_hdll__nor2_4.lvs.report
@@ -0,0 +1,490 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_4.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nor2_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nor2_4.sp ('sky130_fd_sc_hdll__nor2_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_4.spice ('sky130_fd_sc_hdll__nor2_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:39:33 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nor2_4 sky130_fd_sc_hdll__nor2_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nor2_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__nor2_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 8 8 MN (4 pins) + 8 8 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 17 16 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 7 7 + + Instances: 2 2 MN (4 pins) + 1 1 SMP2 (4 pins) + ------ ------ + Total Inst: 3 3 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 7 7 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 1 1 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 3 3 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 16 layout mos transistors were reduced to 4. + 12 mos transistors were deleted by parallel reduction. + 16 source mos transistors were reduced to 4. + 12 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A B VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nor2/sky130_fd_sc_hdll__nor2_4.pex.spice b/cells/nor2/sky130_fd_sc_hdll__nor2_4.pex.spice index d18bf52..897be72 100644 --- a/cells/nor2/sky130_fd_sc_hdll__nor2_4.pex.spice +++ b/cells/nor2/sky130_fd_sc_hdll__nor2_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor2_4.pex.spice -* Created: Thu Aug 27 19:15:36 2020 +* Created: Wed Sep 2 08:39:36 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nor2/sky130_fd_sc_hdll__nor2_4.pxi.spice b/cells/nor2/sky130_fd_sc_hdll__nor2_4.pxi.spice index 53bdf78..d1664db 100644 --- a/cells/nor2/sky130_fd_sc_hdll__nor2_4.pxi.spice +++ b/cells/nor2/sky130_fd_sc_hdll__nor2_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor2_4.pxi.spice -* Created: Thu Aug 27 19:15:36 2020 +* Created: Wed Sep 2 08:39:36 2020 * x_PM_SKY130_FD_SC_HDLL__NOR2_4%A N_A_c_68_n N_A_M1002_g N_A_c_74_n N_A_M1001_g + N_A_c_69_n N_A_M1007_g N_A_c_75_n N_A_M1003_g N_A_c_70_n N_A_M1008_g
diff --git a/cells/nor2/sky130_fd_sc_hdll__nor2_4.spice b/cells/nor2/sky130_fd_sc_hdll__nor2_4.spice index 7df70da..19d7597 100644 --- a/cells/nor2/sky130_fd_sc_hdll__nor2_4.spice +++ b/cells/nor2/sky130_fd_sc_hdll__nor2_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor2_4.spice -* Created: Thu Aug 27 19:15:36 2020 +* Created: Wed Sep 2 08:39:36 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nor2/sky130_fd_sc_hdll__nor2_8.lvs.report b/cells/nor2/sky130_fd_sc_hdll__nor2_8.lvs.report new file mode 100644 index 0000000..370e8b0 --- /dev/null +++ b/cells/nor2/sky130_fd_sc_hdll__nor2_8.lvs.report
@@ -0,0 +1,506 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_8.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_8.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nor2_8.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nor2_8.sp ('sky130_fd_sc_hdll__nor2_8') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2/sky130_fd_sc_hdll__nor2_8.spice ('sky130_fd_sc_hdll__nor2_8') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:39:40 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nor2_8 sky130_fd_sc_hdll__nor2_8 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nor2_8 +SOURCE CELL NAME: sky130_fd_sc_hdll__nor2_8 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 16 16 MN (4 pins) + 16 16 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 33 32 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 7 7 + + Instances: 2 2 MN (4 pins) + 1 1 SMP2 (4 pins) + ------ ------ + Total Inst: 3 3 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 7 7 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 1 1 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 3 3 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 32 layout mos transistors were reduced to 4. + 28 mos transistors were deleted by parallel reduction. + 32 source mos transistors were reduced to 4. + 28 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A B VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nor2/sky130_fd_sc_hdll__nor2_8.pex.spice b/cells/nor2/sky130_fd_sc_hdll__nor2_8.pex.spice index 1ac1ac4..c256b1f 100644 --- a/cells/nor2/sky130_fd_sc_hdll__nor2_8.pex.spice +++ b/cells/nor2/sky130_fd_sc_hdll__nor2_8.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor2_8.pex.spice -* Created: Thu Aug 27 19:15:43 2020 +* Created: Wed Sep 2 08:39:44 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nor2/sky130_fd_sc_hdll__nor2_8.pxi.spice b/cells/nor2/sky130_fd_sc_hdll__nor2_8.pxi.spice index fe5cb94..9d14456 100644 --- a/cells/nor2/sky130_fd_sc_hdll__nor2_8.pxi.spice +++ b/cells/nor2/sky130_fd_sc_hdll__nor2_8.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor2_8.pxi.spice -* Created: Thu Aug 27 19:15:43 2020 +* Created: Wed Sep 2 08:39:44 2020 * x_PM_SKY130_FD_SC_HDLL__NOR2_8%A N_A_c_113_n N_A_M1004_g N_A_c_123_n N_A_M1001_g + N_A_c_114_n N_A_M1010_g N_A_c_124_n N_A_M1002_g N_A_c_115_n N_A_M1012_g
diff --git a/cells/nor2/sky130_fd_sc_hdll__nor2_8.spice b/cells/nor2/sky130_fd_sc_hdll__nor2_8.spice index a771735..f0b5635 100644 --- a/cells/nor2/sky130_fd_sc_hdll__nor2_8.spice +++ b/cells/nor2/sky130_fd_sc_hdll__nor2_8.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor2_8.spice -* Created: Thu Aug 27 19:15:43 2020 +* Created: Wed Sep 2 08:39:44 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nor2b/sky130_fd_sc_hdll__nor2b_1.lvs.report b/cells/nor2b/sky130_fd_sc_hdll__nor2b_1.lvs.report new file mode 100644 index 0000000..d075e8d --- /dev/null +++ b/cells/nor2b/sky130_fd_sc_hdll__nor2b_1.lvs.report
@@ -0,0 +1,480 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2b/sky130_fd_sc_hdll__nor2b_1.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2b/sky130_fd_sc_hdll__nor2b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2b/sky130_fd_sc_hdll__nor2b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2b/sky130_fd_sc_hdll__nor2b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2b/sky130_fd_sc_hdll__nor2b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2b/sky130_fd_sc_hdll__nor2b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2b/sky130_fd_sc_hdll__nor2b_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nor2b_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nor2b_1.sp ('sky130_fd_sc_hdll__nor2b_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2b/sky130_fd_sc_hdll__nor2b_1.spice ('sky130_fd_sc_hdll__nor2b_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:39:48 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nor2b_1 sky130_fd_sc_hdll__nor2b_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nor2b_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__nor2b_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 10 9 * + + Instances: 3 3 MN (4 pins) + 3 3 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 8 6 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 3 3 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMP2 (4 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 8 8 0 0 + + Instances: 3 3 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB B_N A VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nor2b/sky130_fd_sc_hdll__nor2b_1.pex.spice b/cells/nor2b/sky130_fd_sc_hdll__nor2b_1.pex.spice index 96c1e0f..122c600 100644 --- a/cells/nor2b/sky130_fd_sc_hdll__nor2b_1.pex.spice +++ b/cells/nor2b/sky130_fd_sc_hdll__nor2b_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor2b_1.pex.spice -* Created: Thu Aug 27 19:15:50 2020 +* Created: Wed Sep 2 08:39:51 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nor2b/sky130_fd_sc_hdll__nor2b_1.pxi.spice b/cells/nor2b/sky130_fd_sc_hdll__nor2b_1.pxi.spice index e03410e..d9455ea 100644 --- a/cells/nor2b/sky130_fd_sc_hdll__nor2b_1.pxi.spice +++ b/cells/nor2b/sky130_fd_sc_hdll__nor2b_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor2b_1.pxi.spice -* Created: Thu Aug 27 19:15:50 2020 +* Created: Wed Sep 2 08:39:51 2020 * x_PM_SKY130_FD_SC_HDLL__NOR2B_1%B_N N_B_N_M1005_g N_B_N_c_38_n N_B_N_M1001_g B_N + B_N B_N PM_SKY130_FD_SC_HDLL__NOR2B_1%B_N
diff --git a/cells/nor2b/sky130_fd_sc_hdll__nor2b_1.spice b/cells/nor2b/sky130_fd_sc_hdll__nor2b_1.spice index ed5cd52..81fa7e9 100644 --- a/cells/nor2b/sky130_fd_sc_hdll__nor2b_1.spice +++ b/cells/nor2b/sky130_fd_sc_hdll__nor2b_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor2b_1.spice -* Created: Thu Aug 27 19:15:50 2020 +* Created: Wed Sep 2 08:39:51 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nor2b/sky130_fd_sc_hdll__nor2b_2.lvs.report b/cells/nor2b/sky130_fd_sc_hdll__nor2b_2.lvs.report new file mode 100644 index 0000000..70f4796 --- /dev/null +++ b/cells/nor2b/sky130_fd_sc_hdll__nor2b_2.lvs.report
@@ -0,0 +1,489 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2b/sky130_fd_sc_hdll__nor2b_2.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2b/sky130_fd_sc_hdll__nor2b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2b/sky130_fd_sc_hdll__nor2b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2b/sky130_fd_sc_hdll__nor2b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2b/sky130_fd_sc_hdll__nor2b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2b/sky130_fd_sc_hdll__nor2b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2b/sky130_fd_sc_hdll__nor2b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2b/sky130_fd_sc_hdll__nor2b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2b/sky130_fd_sc_hdll__nor2b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2b/sky130_fd_sc_hdll__nor2b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2b/sky130_fd_sc_hdll__nor2b_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nor2b_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nor2b_2.sp ('sky130_fd_sc_hdll__nor2b_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2b/sky130_fd_sc_hdll__nor2b_2.spice ('sky130_fd_sc_hdll__nor2b_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:39:55 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nor2b_2 sky130_fd_sc_hdll__nor2b_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nor2b_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__nor2b_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 10 9 * + + Instances: 5 5 MN (4 pins) + 5 5 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 12 10 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 3 3 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMP2 (4 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 8 8 0 0 + + Instances: 3 3 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 4. + 4 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 4. + 4 mos transistors were deleted by parallel reduction. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A B_N VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nor2b/sky130_fd_sc_hdll__nor2b_2.pex.spice b/cells/nor2b/sky130_fd_sc_hdll__nor2b_2.pex.spice index e3ee0a4..3845b4c 100644 --- a/cells/nor2b/sky130_fd_sc_hdll__nor2b_2.pex.spice +++ b/cells/nor2b/sky130_fd_sc_hdll__nor2b_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor2b_2.pex.spice -* Created: Thu Aug 27 19:15:57 2020 +* Created: Wed Sep 2 08:39:59 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nor2b/sky130_fd_sc_hdll__nor2b_2.pxi.spice b/cells/nor2b/sky130_fd_sc_hdll__nor2b_2.pxi.spice index 8ff6397..ef6cd1e 100644 --- a/cells/nor2b/sky130_fd_sc_hdll__nor2b_2.pxi.spice +++ b/cells/nor2b/sky130_fd_sc_hdll__nor2b_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor2b_2.pxi.spice -* Created: Thu Aug 27 19:15:57 2020 +* Created: Wed Sep 2 08:39:59 2020 * x_PM_SKY130_FD_SC_HDLL__NOR2B_2%A N_A_c_60_n N_A_M1004_g N_A_c_64_n N_A_M1000_g + N_A_c_65_n N_A_M1005_g N_A_c_61_n N_A_M1008_g A N_A_c_63_n A
diff --git a/cells/nor2b/sky130_fd_sc_hdll__nor2b_2.spice b/cells/nor2b/sky130_fd_sc_hdll__nor2b_2.spice index a92a7f3..ce21b57 100644 --- a/cells/nor2b/sky130_fd_sc_hdll__nor2b_2.spice +++ b/cells/nor2b/sky130_fd_sc_hdll__nor2b_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor2b_2.spice -* Created: Thu Aug 27 19:15:57 2020 +* Created: Wed Sep 2 08:39:59 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nor2b/sky130_fd_sc_hdll__nor2b_4.lvs.report b/cells/nor2b/sky130_fd_sc_hdll__nor2b_4.lvs.report new file mode 100644 index 0000000..cf6810b --- /dev/null +++ b/cells/nor2b/sky130_fd_sc_hdll__nor2b_4.lvs.report
@@ -0,0 +1,494 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2b/sky130_fd_sc_hdll__nor2b_4.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2b/sky130_fd_sc_hdll__nor2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2b/sky130_fd_sc_hdll__nor2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2b/sky130_fd_sc_hdll__nor2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2b/sky130_fd_sc_hdll__nor2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2b/sky130_fd_sc_hdll__nor2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2b/sky130_fd_sc_hdll__nor2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2b/sky130_fd_sc_hdll__nor2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2b/sky130_fd_sc_hdll__nor2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2b/sky130_fd_sc_hdll__nor2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2b/sky130_fd_sc_hdll__nor2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2b/sky130_fd_sc_hdll__nor2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2b/sky130_fd_sc_hdll__nor2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2b/sky130_fd_sc_hdll__nor2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2b/sky130_fd_sc_hdll__nor2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2b/sky130_fd_sc_hdll__nor2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2b/sky130_fd_sc_hdll__nor2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2b/sky130_fd_sc_hdll__nor2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2b/sky130_fd_sc_hdll__nor2b_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nor2b_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nor2b_4.sp ('sky130_fd_sc_hdll__nor2b_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor2b/sky130_fd_sc_hdll__nor2b_4.spice ('sky130_fd_sc_hdll__nor2b_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:40:02 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nor2b_4 sky130_fd_sc_hdll__nor2b_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nor2b_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__nor2b_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 9 9 + + Instances: 9 9 MN (4 pins) + 9 9 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 19 18 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 3 3 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMP2 (4 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 8 8 0 0 + + Instances: 3 3 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 16 layout mos transistors were reduced to 4. + 12 mos transistors were deleted by parallel reduction. + 16 source mos transistors were reduced to 4. + 12 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A B_N VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nor2b/sky130_fd_sc_hdll__nor2b_4.pex.spice b/cells/nor2b/sky130_fd_sc_hdll__nor2b_4.pex.spice index 01c50c5..3161e18 100644 --- a/cells/nor2b/sky130_fd_sc_hdll__nor2b_4.pex.spice +++ b/cells/nor2b/sky130_fd_sc_hdll__nor2b_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor2b_4.pex.spice -* Created: Thu Aug 27 19:16:04 2020 +* Created: Wed Sep 2 08:40:06 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nor2b/sky130_fd_sc_hdll__nor2b_4.pxi.spice b/cells/nor2b/sky130_fd_sc_hdll__nor2b_4.pxi.spice index 5582a86..3d1ccb1 100644 --- a/cells/nor2b/sky130_fd_sc_hdll__nor2b_4.pxi.spice +++ b/cells/nor2b/sky130_fd_sc_hdll__nor2b_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor2b_4.pxi.spice -* Created: Thu Aug 27 19:16:04 2020 +* Created: Wed Sep 2 08:40:06 2020 * x_PM_SKY130_FD_SC_HDLL__NOR2B_4%A N_A_c_80_n N_A_M1003_g N_A_c_86_n N_A_M1002_g + N_A_c_81_n N_A_M1008_g N_A_c_87_n N_A_M1004_g N_A_c_82_n N_A_M1009_g
diff --git a/cells/nor2b/sky130_fd_sc_hdll__nor2b_4.spice b/cells/nor2b/sky130_fd_sc_hdll__nor2b_4.spice index 49ed141..4bcbd0f 100644 --- a/cells/nor2b/sky130_fd_sc_hdll__nor2b_4.spice +++ b/cells/nor2b/sky130_fd_sc_hdll__nor2b_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor2b_4.spice -* Created: Thu Aug 27 19:16:04 2020 +* Created: Wed Sep 2 08:40:06 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nor3/sky130_fd_sc_hdll__nor3_1.lvs.report b/cells/nor3/sky130_fd_sc_hdll__nor3_1.lvs.report new file mode 100644 index 0000000..939759e --- /dev/null +++ b/cells/nor3/sky130_fd_sc_hdll__nor3_1.lvs.report
@@ -0,0 +1,475 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_1.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nor3_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nor3_1.sp ('sky130_fd_sc_hdll__nor3_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_1.spice ('sky130_fd_sc_hdll__nor3_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:40:10 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nor3_1 sky130_fd_sc_hdll__nor3_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nor3_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__nor3_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 10 10 + + Instances: 3 3 MN (4 pins) + 3 3 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 7 6 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 8 8 + + Instances: 3 3 MN (4 pins) + 1 1 SMP3 (5 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 8 8 0 0 + + Instances: 3 3 0 0 MN(NSHORT) + 1 1 0 0 SMP3 + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB C B A Y VPWR VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nor3/sky130_fd_sc_hdll__nor3_1.pex.spice b/cells/nor3/sky130_fd_sc_hdll__nor3_1.pex.spice index 20b7fc9..7859ff8 100644 --- a/cells/nor3/sky130_fd_sc_hdll__nor3_1.pex.spice +++ b/cells/nor3/sky130_fd_sc_hdll__nor3_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor3_1.pex.spice -* Created: Thu Aug 27 19:16:11 2020 +* Created: Wed Sep 2 08:40:13 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nor3/sky130_fd_sc_hdll__nor3_1.pxi.spice b/cells/nor3/sky130_fd_sc_hdll__nor3_1.pxi.spice index f29213b..076356e 100644 --- a/cells/nor3/sky130_fd_sc_hdll__nor3_1.pxi.spice +++ b/cells/nor3/sky130_fd_sc_hdll__nor3_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor3_1.pxi.spice -* Created: Thu Aug 27 19:16:11 2020 +* Created: Wed Sep 2 08:40:13 2020 * x_PM_SKY130_FD_SC_HDLL__NOR3_1%C N_C_c_38_n N_C_M1003_g N_C_c_35_n N_C_M1004_g C + N_C_c_37_n PM_SKY130_FD_SC_HDLL__NOR3_1%C
diff --git a/cells/nor3/sky130_fd_sc_hdll__nor3_1.spice b/cells/nor3/sky130_fd_sc_hdll__nor3_1.spice index 0c7ea63..8592f6f 100644 --- a/cells/nor3/sky130_fd_sc_hdll__nor3_1.spice +++ b/cells/nor3/sky130_fd_sc_hdll__nor3_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor3_1.spice -* Created: Thu Aug 27 19:16:11 2020 +* Created: Wed Sep 2 08:40:13 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nor3/sky130_fd_sc_hdll__nor3_2.lvs.report b/cells/nor3/sky130_fd_sc_hdll__nor3_2.lvs.report new file mode 100644 index 0000000..d6c485b --- /dev/null +++ b/cells/nor3/sky130_fd_sc_hdll__nor3_2.lvs.report
@@ -0,0 +1,489 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_2.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nor3_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nor3_2.sp ('sky130_fd_sc_hdll__nor3_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_2.spice ('sky130_fd_sc_hdll__nor3_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:40:17 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nor3_2 sky130_fd_sc_hdll__nor3_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nor3_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__nor3_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 11 10 * + + Instances: 6 6 MN (4 pins) + 6 6 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 14 12 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 8 8 + + Instances: 3 3 MN (4 pins) + 1 1 SMP3 (5 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 8 8 0 0 + + Instances: 3 3 0 0 MN(NSHORT) + 1 1 0 0 SMP3 + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 12 layout mos transistors were reduced to 6. + 6 mos transistors were deleted by parallel reduction. + 12 source mos transistors were reduced to 6. + 6 mos transistors were deleted by parallel reduction. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A B C VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nor3/sky130_fd_sc_hdll__nor3_2.pex.spice b/cells/nor3/sky130_fd_sc_hdll__nor3_2.pex.spice index 6b124bc..d82252a 100644 --- a/cells/nor3/sky130_fd_sc_hdll__nor3_2.pex.spice +++ b/cells/nor3/sky130_fd_sc_hdll__nor3_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor3_2.pex.spice -* Created: Thu Aug 27 19:16:18 2020 +* Created: Wed Sep 2 08:40:21 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nor3/sky130_fd_sc_hdll__nor3_2.pxi.spice b/cells/nor3/sky130_fd_sc_hdll__nor3_2.pxi.spice index c2fa00f..14bd026 100644 --- a/cells/nor3/sky130_fd_sc_hdll__nor3_2.pxi.spice +++ b/cells/nor3/sky130_fd_sc_hdll__nor3_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor3_2.pxi.spice -* Created: Thu Aug 27 19:16:18 2020 +* Created: Wed Sep 2 08:40:21 2020 * x_PM_SKY130_FD_SC_HDLL__NOR3_2%A N_A_c_53_n N_A_M1005_g N_A_c_57_n N_A_M1000_g + N_A_c_58_n N_A_M1008_g N_A_c_54_n N_A_M1011_g A A N_A_c_56_n A
diff --git a/cells/nor3/sky130_fd_sc_hdll__nor3_2.spice b/cells/nor3/sky130_fd_sc_hdll__nor3_2.spice index 15e12ed..3beb824 100644 --- a/cells/nor3/sky130_fd_sc_hdll__nor3_2.spice +++ b/cells/nor3/sky130_fd_sc_hdll__nor3_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor3_2.spice -* Created: Thu Aug 27 19:16:18 2020 +* Created: Wed Sep 2 08:40:21 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nor3/sky130_fd_sc_hdll__nor3_4.lvs.report b/cells/nor3/sky130_fd_sc_hdll__nor3_4.lvs.report new file mode 100644 index 0000000..599396f --- /dev/null +++ b/cells/nor3/sky130_fd_sc_hdll__nor3_4.lvs.report
@@ -0,0 +1,498 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_4.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nor3_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nor3_4.sp ('sky130_fd_sc_hdll__nor3_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3/sky130_fd_sc_hdll__nor3_4.spice ('sky130_fd_sc_hdll__nor3_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:40:24 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nor3_4 sky130_fd_sc_hdll__nor3_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nor3_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__nor3_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 10 10 + + Instances: 12 12 MN (4 pins) + 12 12 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 25 24 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 8 8 + + Instances: 3 3 MN (4 pins) + 1 1 SMP3 (5 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 8 8 0 0 + + Instances: 3 3 0 0 MN(NSHORT) + 1 1 0 0 SMP3 + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 24 layout mos transistors were reduced to 6. + 18 mos transistors were deleted by parallel reduction. + 24 source mos transistors were reduced to 6. + 18 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A B C VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nor3/sky130_fd_sc_hdll__nor3_4.pex.spice b/cells/nor3/sky130_fd_sc_hdll__nor3_4.pex.spice index ef3c5b5..f31088b 100644 --- a/cells/nor3/sky130_fd_sc_hdll__nor3_4.pex.spice +++ b/cells/nor3/sky130_fd_sc_hdll__nor3_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor3_4.pex.spice -* Created: Thu Aug 27 19:16:25 2020 +* Created: Wed Sep 2 08:40:28 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nor3/sky130_fd_sc_hdll__nor3_4.pxi.spice b/cells/nor3/sky130_fd_sc_hdll__nor3_4.pxi.spice index 339f7c3..91c4201 100644 --- a/cells/nor3/sky130_fd_sc_hdll__nor3_4.pxi.spice +++ b/cells/nor3/sky130_fd_sc_hdll__nor3_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor3_4.pxi.spice -* Created: Thu Aug 27 19:16:25 2020 +* Created: Wed Sep 2 08:40:28 2020 * x_PM_SKY130_FD_SC_HDLL__NOR3_4%A N_A_c_92_n N_A_M1004_g N_A_c_98_n N_A_M1003_g + N_A_c_93_n N_A_M1013_g N_A_c_99_n N_A_M1009_g N_A_c_94_n N_A_M1014_g
diff --git a/cells/nor3/sky130_fd_sc_hdll__nor3_4.spice b/cells/nor3/sky130_fd_sc_hdll__nor3_4.spice index 4a30f99..31c2847 100644 --- a/cells/nor3/sky130_fd_sc_hdll__nor3_4.spice +++ b/cells/nor3/sky130_fd_sc_hdll__nor3_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor3_4.spice -* Created: Thu Aug 27 19:16:25 2020 +* Created: Wed Sep 2 08:40:28 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nor3b/sky130_fd_sc_hdll__nor3b_1.lvs.report b/cells/nor3b/sky130_fd_sc_hdll__nor3b_1.lvs.report new file mode 100644 index 0000000..827bbc2 --- /dev/null +++ b/cells/nor3b/sky130_fd_sc_hdll__nor3b_1.lvs.report
@@ -0,0 +1,482 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_1.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nor3b_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nor3b_1.sp ('sky130_fd_sc_hdll__nor3b_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_1.spice ('sky130_fd_sc_hdll__nor3b_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:40:32 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nor3b_1 sky130_fd_sc_hdll__nor3b_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nor3b_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__nor3b_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 12 11 * + + Instances: 4 4 MN (4 pins) + 4 4 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 10 8 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 9 9 + + Instances: 4 4 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMP3 (5 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 9 9 0 0 + + Instances: 4 4 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMP3 + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB B A C_N Y VPWR VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nor3b/sky130_fd_sc_hdll__nor3b_1.pex.spice b/cells/nor3b/sky130_fd_sc_hdll__nor3b_1.pex.spice index 52b7c6a..f8570ff 100644 --- a/cells/nor3b/sky130_fd_sc_hdll__nor3b_1.pex.spice +++ b/cells/nor3b/sky130_fd_sc_hdll__nor3b_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor3b_1.pex.spice -* Created: Thu Aug 27 19:16:32 2020 +* Created: Wed Sep 2 08:40:35 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nor3b/sky130_fd_sc_hdll__nor3b_1.pxi.spice b/cells/nor3b/sky130_fd_sc_hdll__nor3b_1.pxi.spice index 39634c3..c91fa84 100644 --- a/cells/nor3b/sky130_fd_sc_hdll__nor3b_1.pxi.spice +++ b/cells/nor3b/sky130_fd_sc_hdll__nor3b_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor3b_1.pxi.spice -* Created: Thu Aug 27 19:16:32 2020 +* Created: Wed Sep 2 08:40:35 2020 * x_PM_SKY130_FD_SC_HDLL__NOR3B_1%A_91_199# N_A_91_199#_M1000_d + N_A_91_199#_M1003_d N_A_91_199#_c_46_n N_A_91_199#_M1002_g N_A_91_199#_c_47_n
diff --git a/cells/nor3b/sky130_fd_sc_hdll__nor3b_1.spice b/cells/nor3b/sky130_fd_sc_hdll__nor3b_1.spice index 2b0064b..20154e6 100644 --- a/cells/nor3b/sky130_fd_sc_hdll__nor3b_1.spice +++ b/cells/nor3b/sky130_fd_sc_hdll__nor3b_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor3b_1.spice -* Created: Thu Aug 27 19:16:32 2020 +* Created: Wed Sep 2 08:40:35 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nor3b/sky130_fd_sc_hdll__nor3b_2.lvs.report b/cells/nor3b/sky130_fd_sc_hdll__nor3b_2.lvs.report new file mode 100644 index 0000000..0a9a3c4 --- /dev/null +++ b/cells/nor3b/sky130_fd_sc_hdll__nor3b_2.lvs.report
@@ -0,0 +1,493 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_2.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nor3b_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nor3b_2.sp ('sky130_fd_sc_hdll__nor3b_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_2.spice ('sky130_fd_sc_hdll__nor3b_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:40:39 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nor3b_2 sky130_fd_sc_hdll__nor3b_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nor3b_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__nor3b_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 13 11 * + + Instances: 7 7 MN (4 pins) + 7 7 MP (4 pins) + 1 0 * Dpar (2 pins) + 2 0 * Probe (2 pins) + ------ ------ + Total Inst: 17 14 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 9 9 + + Instances: 4 4 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMP3 (5 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 9 9 0 0 + + Instances: 4 4 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMP3 + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 3 layout instances were filtered and their pins removed from adjoining nets. + + 12 layout mos transistors were reduced to 6. + 6 mos transistors were deleted by parallel reduction. + 12 source mos transistors were reduced to 6. + 6 mos transistors were deleted by parallel reduction. + + 2 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A B C_N VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nor3b/sky130_fd_sc_hdll__nor3b_2.pex.spice b/cells/nor3b/sky130_fd_sc_hdll__nor3b_2.pex.spice index 39ecdcd..48337d4 100644 --- a/cells/nor3b/sky130_fd_sc_hdll__nor3b_2.pex.spice +++ b/cells/nor3b/sky130_fd_sc_hdll__nor3b_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor3b_2.pex.spice -* Created: Thu Aug 27 19:16:39 2020 +* Created: Wed Sep 2 08:40:42 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nor3b/sky130_fd_sc_hdll__nor3b_2.pxi.spice b/cells/nor3b/sky130_fd_sc_hdll__nor3b_2.pxi.spice index 73d0835..1c91542 100644 --- a/cells/nor3b/sky130_fd_sc_hdll__nor3b_2.pxi.spice +++ b/cells/nor3b/sky130_fd_sc_hdll__nor3b_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor3b_2.pxi.spice -* Created: Thu Aug 27 19:16:39 2020 +* Created: Wed Sep 2 08:40:42 2020 * x_PM_SKY130_FD_SC_HDLL__NOR3B_2%A N_A_c_65_n N_A_M1006_g N_A_c_69_n N_A_M1001_g + N_A_c_70_n N_A_M1010_g N_A_c_66_n N_A_M1012_g A A N_A_c_68_n A
diff --git a/cells/nor3b/sky130_fd_sc_hdll__nor3b_2.spice b/cells/nor3b/sky130_fd_sc_hdll__nor3b_2.spice index 1fb2afa..632ac2e 100644 --- a/cells/nor3b/sky130_fd_sc_hdll__nor3b_2.spice +++ b/cells/nor3b/sky130_fd_sc_hdll__nor3b_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor3b_2.spice -* Created: Thu Aug 27 19:16:39 2020 +* Created: Wed Sep 2 08:40:42 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.lvs.report b/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.lvs.report new file mode 100644 index 0000000..16652ce --- /dev/null +++ b/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.lvs.report
@@ -0,0 +1,502 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nor3b_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nor3b_4.sp ('sky130_fd_sc_hdll__nor3b_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.spice ('sky130_fd_sc_hdll__nor3b_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:40:46 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nor3b_4 sky130_fd_sc_hdll__nor3b_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nor3b_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__nor3b_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 11 11 + + Instances: 13 13 MN (4 pins) + 13 13 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 27 26 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 9 9 + + Instances: 4 4 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMP3 (5 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 9 9 0 0 + + Instances: 4 4 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMP3 + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 24 layout mos transistors were reduced to 6. + 18 mos transistors were deleted by parallel reduction. + 24 source mos transistors were reduced to 6. + 18 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB C_N A B VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.pex.spice b/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.pex.spice index a3bd26c..17c26ff 100644 --- a/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.pex.spice +++ b/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor3b_4.pex.spice -* Created: Thu Aug 27 19:16:46 2020 +* Created: Wed Sep 2 08:40:50 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.pxi.spice b/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.pxi.spice index e184d15..a1364ea 100644 --- a/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.pxi.spice +++ b/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor3b_4.pxi.spice -* Created: Thu Aug 27 19:16:46 2020 +* Created: Wed Sep 2 08:40:50 2020 * x_PM_SKY130_FD_SC_HDLL__NOR3B_4%C_N N_C_N_c_106_n N_C_N_M1001_g N_C_N_c_103_n + N_C_N_M1006_g C_N N_C_N_c_105_n C_N PM_SKY130_FD_SC_HDLL__NOR3B_4%C_N
diff --git a/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.spice b/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.spice index 67038ef..7e1810c 100644 --- a/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.spice +++ b/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor3b_4.spice -* Created: Thu Aug 27 19:16:46 2020 +* Created: Wed Sep 2 08:40:50 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nor4/sky130_fd_sc_hdll__nor4_1.lvs.report b/cells/nor4/sky130_fd_sc_hdll__nor4_1.lvs.report new file mode 100644 index 0000000..855862b --- /dev/null +++ b/cells/nor4/sky130_fd_sc_hdll__nor4_1.lvs.report
@@ -0,0 +1,477 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_1.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nor4_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nor4_1.sp ('sky130_fd_sc_hdll__nor4_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_1.spice ('sky130_fd_sc_hdll__nor4_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:40:54 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nor4_1 sky130_fd_sc_hdll__nor4_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nor4_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__nor4_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 12 12 + + Instances: 4 4 MN (4 pins) + 4 4 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 9 8 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 9 9 + + Instances: 4 4 MN (4 pins) + 1 1 SMP4 (6 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 9 9 0 0 + + Instances: 4 4 0 0 MN(NSHORT) + 1 1 0 0 SMP4 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB D C B A Y VPWR VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nor4/sky130_fd_sc_hdll__nor4_1.pex.spice b/cells/nor4/sky130_fd_sc_hdll__nor4_1.pex.spice index 92b230b..4c91640 100644 --- a/cells/nor4/sky130_fd_sc_hdll__nor4_1.pex.spice +++ b/cells/nor4/sky130_fd_sc_hdll__nor4_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor4_1.pex.spice -* Created: Thu Aug 27 19:16:53 2020 +* Created: Wed Sep 2 08:40:57 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nor4/sky130_fd_sc_hdll__nor4_1.pxi.spice b/cells/nor4/sky130_fd_sc_hdll__nor4_1.pxi.spice index e89f69e..3ee79d1 100644 --- a/cells/nor4/sky130_fd_sc_hdll__nor4_1.pxi.spice +++ b/cells/nor4/sky130_fd_sc_hdll__nor4_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor4_1.pxi.spice -* Created: Thu Aug 27 19:16:53 2020 +* Created: Wed Sep 2 08:40:57 2020 * x_PM_SKY130_FD_SC_HDLL__NOR4_1%D N_D_c_41_n N_D_M1004_g N_D_c_38_n N_D_M1006_g D + D N_D_c_40_n PM_SKY130_FD_SC_HDLL__NOR4_1%D
diff --git a/cells/nor4/sky130_fd_sc_hdll__nor4_1.spice b/cells/nor4/sky130_fd_sc_hdll__nor4_1.spice index 05a16ab..55f32d7 100644 --- a/cells/nor4/sky130_fd_sc_hdll__nor4_1.spice +++ b/cells/nor4/sky130_fd_sc_hdll__nor4_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor4_1.spice -* Created: Thu Aug 27 19:16:53 2020 +* Created: Wed Sep 2 08:40:57 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nor4/sky130_fd_sc_hdll__nor4_2.lvs.report b/cells/nor4/sky130_fd_sc_hdll__nor4_2.lvs.report new file mode 100644 index 0000000..25f2688 --- /dev/null +++ b/cells/nor4/sky130_fd_sc_hdll__nor4_2.lvs.report
@@ -0,0 +1,493 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_2.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nor4_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nor4_2.sp ('sky130_fd_sc_hdll__nor4_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_2.spice ('sky130_fd_sc_hdll__nor4_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:41:01 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nor4_2 sky130_fd_sc_hdll__nor4_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nor4_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__nor4_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 13 12 * + + Instances: 8 8 MN (4 pins) + 8 8 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 18 16 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 9 9 + + Instances: 4 4 MN (4 pins) + 1 1 SMP4 (6 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 9 9 0 0 + + Instances: 4 4 0 0 MN(NSHORT) + 1 1 0 0 SMP4 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 16 layout mos transistors were reduced to 8. + 8 mos transistors were deleted by parallel reduction. + 16 source mos transistors were reduced to 8. + 8 mos transistors were deleted by parallel reduction. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A B C D VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nor4/sky130_fd_sc_hdll__nor4_2.pex.spice b/cells/nor4/sky130_fd_sc_hdll__nor4_2.pex.spice index ceccc30..9319188 100644 --- a/cells/nor4/sky130_fd_sc_hdll__nor4_2.pex.spice +++ b/cells/nor4/sky130_fd_sc_hdll__nor4_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor4_2.pex.spice -* Created: Thu Aug 27 19:17:00 2020 +* Created: Wed Sep 2 08:41:05 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nor4/sky130_fd_sc_hdll__nor4_2.pxi.spice b/cells/nor4/sky130_fd_sc_hdll__nor4_2.pxi.spice index e578b8a..f27afa8 100644 --- a/cells/nor4/sky130_fd_sc_hdll__nor4_2.pxi.spice +++ b/cells/nor4/sky130_fd_sc_hdll__nor4_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor4_2.pxi.spice -* Created: Thu Aug 27 19:17:00 2020 +* Created: Wed Sep 2 08:41:05 2020 * x_PM_SKY130_FD_SC_HDLL__NOR4_2%A N_A_c_71_n N_A_M1006_g N_A_c_75_n N_A_M1001_g + N_A_c_76_n N_A_M1011_g N_A_c_72_n N_A_M1013_g A N_A_c_74_n A
diff --git a/cells/nor4/sky130_fd_sc_hdll__nor4_2.spice b/cells/nor4/sky130_fd_sc_hdll__nor4_2.spice index 1fde1b8..8d9d4f9 100644 --- a/cells/nor4/sky130_fd_sc_hdll__nor4_2.spice +++ b/cells/nor4/sky130_fd_sc_hdll__nor4_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor4_2.spice -* Created: Thu Aug 27 19:17:00 2020 +* Created: Wed Sep 2 08:41:05 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nor4/sky130_fd_sc_hdll__nor4_4.lvs.report b/cells/nor4/sky130_fd_sc_hdll__nor4_4.lvs.report new file mode 100644 index 0000000..f29e055 --- /dev/null +++ b/cells/nor4/sky130_fd_sc_hdll__nor4_4.lvs.report
@@ -0,0 +1,509 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_4.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nor4_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nor4_4.sp ('sky130_fd_sc_hdll__nor4_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_4.spice ('sky130_fd_sc_hdll__nor4_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:41:08 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nor4_4 sky130_fd_sc_hdll__nor4_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nor4_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__nor4_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 14 12 * + + Instances: 16 16 MN (4 pins) + 16 16 MP (4 pins) + 1 0 * Dpar (2 pins) + 2 0 * Probe (2 pins) + ------ ------ + Total Inst: 35 32 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 9 9 + + Instances: 4 4 MN (4 pins) + 1 1 SMP4 (6 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 9 9 0 0 + + Instances: 4 4 0 0 MN(NSHORT) + 1 1 0 0 SMP4 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 3 layout instances were filtered and their pins removed from adjoining nets. + + 32 layout mos transistors were reduced to 8. + 24 mos transistors were deleted by parallel reduction. + 32 source mos transistors were reduced to 8. + 24 mos transistors were deleted by parallel reduction. + + 2 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A B C D VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nor4/sky130_fd_sc_hdll__nor4_4.pex.spice b/cells/nor4/sky130_fd_sc_hdll__nor4_4.pex.spice index 542da0d..d148534 100644 --- a/cells/nor4/sky130_fd_sc_hdll__nor4_4.pex.spice +++ b/cells/nor4/sky130_fd_sc_hdll__nor4_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor4_4.pex.spice -* Created: Thu Aug 27 19:17:07 2020 +* Created: Wed Sep 2 08:41:12 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nor4/sky130_fd_sc_hdll__nor4_4.pxi.spice b/cells/nor4/sky130_fd_sc_hdll__nor4_4.pxi.spice index 95c9bbb..b0e7970 100644 --- a/cells/nor4/sky130_fd_sc_hdll__nor4_4.pxi.spice +++ b/cells/nor4/sky130_fd_sc_hdll__nor4_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor4_4.pxi.spice -* Created: Thu Aug 27 19:17:07 2020 +* Created: Wed Sep 2 08:41:12 2020 * x_PM_SKY130_FD_SC_HDLL__NOR4_4%A N_A_c_121_n N_A_M1003_g N_A_c_127_n N_A_M1002_g + N_A_c_122_n N_A_M1015_g N_A_c_128_n N_A_M1008_g N_A_c_123_n N_A_M1016_g
diff --git a/cells/nor4/sky130_fd_sc_hdll__nor4_4.spice b/cells/nor4/sky130_fd_sc_hdll__nor4_4.spice index c8ef077..02cb3fe 100644 --- a/cells/nor4/sky130_fd_sc_hdll__nor4_4.spice +++ b/cells/nor4/sky130_fd_sc_hdll__nor4_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor4_4.spice -* Created: Thu Aug 27 19:17:07 2020 +* Created: Wed Sep 2 08:41:12 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nor4/sky130_fd_sc_hdll__nor4_6.lvs.report b/cells/nor4/sky130_fd_sc_hdll__nor4_6.lvs.report new file mode 100644 index 0000000..ea5458e --- /dev/null +++ b/cells/nor4/sky130_fd_sc_hdll__nor4_6.lvs.report
@@ -0,0 +1,522 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 87 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 89 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 91 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 93 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 95 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 97 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 99 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 101 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 103 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 105 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 107 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 109 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 111 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" +Warning: Duplicate parameter definition "MULT" at line 113 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nor4_6.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nor4_6.sp ('sky130_fd_sc_hdll__nor4_6') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice ('sky130_fd_sc_hdll__nor4_6') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:41:16 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nor4_6 sky130_fd_sc_hdll__nor4_6 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nor4_6 +SOURCE CELL NAME: sky130_fd_sc_hdll__nor4_6 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 12 12 + + Instances: 24 24 MN (4 pins) + 24 24 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 49 48 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 9 9 + + Instances: 4 4 MN (4 pins) + 1 1 SMP4 (6 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 9 9 0 0 + + Instances: 4 4 0 0 MN(NSHORT) + 1 1 0 0 SMP4 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 48 layout mos transistors were reduced to 8. + 40 mos transistors were deleted by parallel reduction. + 48 source mos transistors were reduced to 8. + 40 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A B C D VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nor4/sky130_fd_sc_hdll__nor4_6.pex.spice b/cells/nor4/sky130_fd_sc_hdll__nor4_6.pex.spice index 939b035..ac07c65 100644 --- a/cells/nor4/sky130_fd_sc_hdll__nor4_6.pex.spice +++ b/cells/nor4/sky130_fd_sc_hdll__nor4_6.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor4_6.pex.spice -* Created: Thu Aug 27 19:17:14 2020 +* Created: Wed Sep 2 08:41:19 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nor4/sky130_fd_sc_hdll__nor4_6.pxi.spice b/cells/nor4/sky130_fd_sc_hdll__nor4_6.pxi.spice index 244a3ad..ce2d623 100644 --- a/cells/nor4/sky130_fd_sc_hdll__nor4_6.pxi.spice +++ b/cells/nor4/sky130_fd_sc_hdll__nor4_6.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor4_6.pxi.spice -* Created: Thu Aug 27 19:17:14 2020 +* Created: Wed Sep 2 08:41:19 2020 * x_PM_SKY130_FD_SC_HDLL__NOR4_6%A N_A_c_166_n N_A_M1000_g N_A_c_159_n N_A_M1006_g + N_A_c_160_n N_A_M1011_g N_A_c_167_n N_A_M1005_g N_A_c_168_n N_A_M1014_g
diff --git a/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice b/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice index 31ce34c..09747c8 100644 --- a/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice +++ b/cells/nor4/sky130_fd_sc_hdll__nor4_6.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor4_6.spice -* Created: Thu Aug 27 19:17:14 2020 +* Created: Wed Sep 2 08:41:19 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nor4/sky130_fd_sc_hdll__nor4_8.lvs.report b/cells/nor4/sky130_fd_sc_hdll__nor4_8.lvs.report new file mode 100644 index 0000000..7ee7f34 --- /dev/null +++ b/cells/nor4/sky130_fd_sc_hdll__nor4_8.lvs.report
@@ -0,0 +1,538 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_8.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_8.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_8.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_8.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_8.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_8.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_8.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_8.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_8.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_8.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_8.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_8.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_8.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_8.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file 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"/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_8.spice" +Warning: Duplicate parameter definition "MULT" at line 137 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_8.spice" +Warning: Duplicate parameter definition "MULT" at line 139 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_8.spice" +Warning: Duplicate parameter definition "MULT" at line 141 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_8.spice" +Warning: Duplicate parameter definition "MULT" at line 143 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_8.spice" +Warning: Duplicate parameter definition "MULT" at line 145 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_8.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nor4_8.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nor4_8.sp ('sky130_fd_sc_hdll__nor4_8') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4/sky130_fd_sc_hdll__nor4_8.spice ('sky130_fd_sc_hdll__nor4_8') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:41:23 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nor4_8 sky130_fd_sc_hdll__nor4_8 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nor4_8 +SOURCE CELL NAME: sky130_fd_sc_hdll__nor4_8 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 12 12 + + Instances: 32 32 MN (4 pins) + 32 32 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 65 64 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 9 9 + + Instances: 4 4 MN (4 pins) + 1 1 SMP4 (6 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 9 9 0 0 + + Instances: 4 4 0 0 MN(NSHORT) + 1 1 0 0 SMP4 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 64 layout mos transistors were reduced to 8. + 56 mos transistors were deleted by parallel reduction. + 64 source mos transistors were reduced to 8. + 56 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A B C D VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nor4/sky130_fd_sc_hdll__nor4_8.pex.spice b/cells/nor4/sky130_fd_sc_hdll__nor4_8.pex.spice index 7785989..bc39e1a 100644 --- a/cells/nor4/sky130_fd_sc_hdll__nor4_8.pex.spice +++ b/cells/nor4/sky130_fd_sc_hdll__nor4_8.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor4_8.pex.spice -* Created: Thu Aug 27 19:17:21 2020 +* Created: Wed Sep 2 08:41:26 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nor4/sky130_fd_sc_hdll__nor4_8.pxi.spice b/cells/nor4/sky130_fd_sc_hdll__nor4_8.pxi.spice index 834853a..4315781 100644 --- a/cells/nor4/sky130_fd_sc_hdll__nor4_8.pxi.spice +++ b/cells/nor4/sky130_fd_sc_hdll__nor4_8.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor4_8.pxi.spice -* Created: Thu Aug 27 19:17:21 2020 +* Created: Wed Sep 2 08:41:26 2020 * x_PM_SKY130_FD_SC_HDLL__NOR4_8%A N_A_c_218_n N_A_M1000_g N_A_c_209_n N_A_M1018_g + N_A_c_210_n N_A_M1019_g N_A_c_219_n N_A_M1003_g N_A_c_220_n N_A_M1008_g
diff --git a/cells/nor4/sky130_fd_sc_hdll__nor4_8.spice b/cells/nor4/sky130_fd_sc_hdll__nor4_8.spice index ee5d3f9..5eb87a0 100644 --- a/cells/nor4/sky130_fd_sc_hdll__nor4_8.spice +++ b/cells/nor4/sky130_fd_sc_hdll__nor4_8.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor4_8.spice -* Created: Thu Aug 27 19:17:21 2020 +* Created: Wed Sep 2 08:41:26 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nor4b/sky130_fd_sc_hdll__nor4b_1.lvs.report b/cells/nor4b/sky130_fd_sc_hdll__nor4b_1.lvs.report new file mode 100644 index 0000000..184cb46 --- /dev/null +++ b/cells/nor4b/sky130_fd_sc_hdll__nor4b_1.lvs.report
@@ -0,0 +1,484 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_1.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nor4b_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nor4b_1.sp ('sky130_fd_sc_hdll__nor4b_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_1.spice ('sky130_fd_sc_hdll__nor4b_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:41:31 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nor4b_1 sky130_fd_sc_hdll__nor4b_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nor4b_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__nor4b_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 14 13 * + + Instances: 5 5 MN (4 pins) + 5 5 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 12 10 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 10 10 + + Instances: 5 5 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMP4 (6 pins) + ------ ------ + Total Inst: 7 7 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 10 10 0 0 + + Instances: 5 5 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMP4 + ------- ------- --------- --------- + Total Inst: 7 7 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB C B A D_N Y VPWR VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nor4b/sky130_fd_sc_hdll__nor4b_1.pex.spice b/cells/nor4b/sky130_fd_sc_hdll__nor4b_1.pex.spice index fece087..eedfad7 100644 --- a/cells/nor4b/sky130_fd_sc_hdll__nor4b_1.pex.spice +++ b/cells/nor4b/sky130_fd_sc_hdll__nor4b_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor4b_1.pex.spice -* Created: Thu Aug 27 19:17:28 2020 +* Created: Wed Sep 2 08:41:34 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nor4b/sky130_fd_sc_hdll__nor4b_1.pxi.spice b/cells/nor4b/sky130_fd_sc_hdll__nor4b_1.pxi.spice index 82f877d..c565b7d 100644 --- a/cells/nor4b/sky130_fd_sc_hdll__nor4b_1.pxi.spice +++ b/cells/nor4b/sky130_fd_sc_hdll__nor4b_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor4b_1.pxi.spice -* Created: Thu Aug 27 19:17:28 2020 +* Created: Wed Sep 2 08:41:34 2020 * x_PM_SKY130_FD_SC_HDLL__NOR4B_1%A_91_199# N_A_91_199#_M1008_d + N_A_91_199#_M1002_d N_A_91_199#_c_53_n N_A_91_199#_M1001_g N_A_91_199#_c_54_n
diff --git a/cells/nor4b/sky130_fd_sc_hdll__nor4b_1.spice b/cells/nor4b/sky130_fd_sc_hdll__nor4b_1.spice index fb61ef1..7b92ec9 100644 --- a/cells/nor4b/sky130_fd_sc_hdll__nor4b_1.spice +++ b/cells/nor4b/sky130_fd_sc_hdll__nor4b_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor4b_1.spice -* Created: Thu Aug 27 19:17:28 2020 +* Created: Wed Sep 2 08:41:34 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nor4b/sky130_fd_sc_hdll__nor4b_2.lvs.report b/cells/nor4b/sky130_fd_sc_hdll__nor4b_2.lvs.report new file mode 100644 index 0000000..57c15d7 --- /dev/null +++ b/cells/nor4b/sky130_fd_sc_hdll__nor4b_2.lvs.report
@@ -0,0 +1,497 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_2.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nor4b_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nor4b_2.sp ('sky130_fd_sc_hdll__nor4b_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_2.spice ('sky130_fd_sc_hdll__nor4b_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:41:38 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nor4b_2 sky130_fd_sc_hdll__nor4b_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nor4b_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__nor4b_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 14 13 * + + Instances: 9 9 MN (4 pins) + 9 9 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 20 18 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 10 10 + + Instances: 5 5 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMP4 (6 pins) + ------ ------ + Total Inst: 7 7 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 10 10 0 0 + + Instances: 5 5 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMP4 + ------- ------- --------- --------- + Total Inst: 7 7 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 16 layout mos transistors were reduced to 8. + 8 mos transistors were deleted by parallel reduction. + 16 source mos transistors were reduced to 8. + 8 mos transistors were deleted by parallel reduction. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A B C D_N VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nor4b/sky130_fd_sc_hdll__nor4b_2.pex.spice b/cells/nor4b/sky130_fd_sc_hdll__nor4b_2.pex.spice index bdbabf8..f084ca0 100644 --- a/cells/nor4b/sky130_fd_sc_hdll__nor4b_2.pex.spice +++ b/cells/nor4b/sky130_fd_sc_hdll__nor4b_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor4b_2.pex.spice -* Created: Thu Aug 27 19:17:35 2020 +* Created: Wed Sep 2 08:41:41 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nor4b/sky130_fd_sc_hdll__nor4b_2.pxi.spice b/cells/nor4b/sky130_fd_sc_hdll__nor4b_2.pxi.spice index 7124e8d..4562124 100644 --- a/cells/nor4b/sky130_fd_sc_hdll__nor4b_2.pxi.spice +++ b/cells/nor4b/sky130_fd_sc_hdll__nor4b_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor4b_2.pxi.spice -* Created: Thu Aug 27 19:17:35 2020 +* Created: Wed Sep 2 08:41:41 2020 * x_PM_SKY130_FD_SC_HDLL__NOR4B_2%A N_A_c_91_n N_A_M1001_g N_A_c_95_n N_A_M1000_g + N_A_c_96_n N_A_M1008_g N_A_c_92_n N_A_M1015_g A A A N_A_c_94_n A
diff --git a/cells/nor4b/sky130_fd_sc_hdll__nor4b_2.spice b/cells/nor4b/sky130_fd_sc_hdll__nor4b_2.spice index 0397981..65368c3 100644 --- a/cells/nor4b/sky130_fd_sc_hdll__nor4b_2.spice +++ b/cells/nor4b/sky130_fd_sc_hdll__nor4b_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor4b_2.spice -* Created: Thu Aug 27 19:17:35 2020 +* Created: Wed Sep 2 08:41:41 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.lvs.report b/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.lvs.report new file mode 100644 index 0000000..c8f41d9 --- /dev/null +++ b/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.lvs.report
@@ -0,0 +1,513 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nor4b_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nor4b_4.sp ('sky130_fd_sc_hdll__nor4b_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.spice ('sky130_fd_sc_hdll__nor4b_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:41:45 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nor4b_4 sky130_fd_sc_hdll__nor4b_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nor4b_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__nor4b_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 15 13 * + + Instances: 17 17 MN (4 pins) + 17 17 MP (4 pins) + 1 0 * Dpar (2 pins) + 2 0 * Probe (2 pins) + ------ ------ + Total Inst: 37 34 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 10 10 + + Instances: 5 5 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMP4 (6 pins) + ------ ------ + Total Inst: 7 7 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 10 10 0 0 + + Instances: 5 5 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMP4 + ------- ------- --------- --------- + Total Inst: 7 7 0 0 + + +o Statistics: + + 3 layout instances were filtered and their pins removed from adjoining nets. + + 32 layout mos transistors were reduced to 8. + 24 mos transistors were deleted by parallel reduction. + 32 source mos transistors were reduced to 8. + 24 mos transistors were deleted by parallel reduction. + + 2 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A B C D_N VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.pex.spice b/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.pex.spice index 660b356..bd8e08f 100644 --- a/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.pex.spice +++ b/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor4b_4.pex.spice -* Created: Thu Aug 27 19:17:42 2020 +* Created: Wed Sep 2 08:41:48 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.pxi.spice b/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.pxi.spice index 90d3d13..f8c2654 100644 --- a/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.pxi.spice +++ b/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor4b_4.pxi.spice -* Created: Thu Aug 27 19:17:42 2020 +* Created: Wed Sep 2 08:41:48 2020 * x_PM_SKY130_FD_SC_HDLL__NOR4B_4%A N_A_c_132_n N_A_M1008_g N_A_c_138_n + N_A_M1002_g N_A_c_133_n N_A_M1010_g N_A_c_139_n N_A_M1016_g N_A_c_134_n
diff --git a/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.spice b/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.spice index de54255..e4c5db5 100644 --- a/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.spice +++ b/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor4b_4.spice -* Created: Thu Aug 27 19:17:42 2020 +* Created: Wed Sep 2 08:41:48 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_1.lvs.report b/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_1.lvs.report new file mode 100644 index 0000000..04a74db --- /dev/null +++ b/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_1.lvs.report
@@ -0,0 +1,486 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_1.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nor4bb_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nor4bb_1.sp ('sky130_fd_sc_hdll__nor4bb_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_1.spice ('sky130_fd_sc_hdll__nor4bb_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:41:52 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nor4bb_1 sky130_fd_sc_hdll__nor4bb_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nor4bb_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__nor4bb_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 15 14 * + + Instances: 6 6 MN (4 pins) + 6 6 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 14 12 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 11 11 + + Instances: 6 6 MN (4 pins) + 2 2 MP (4 pins) + 1 1 SMP4 (6 pins) + ------ ------ + Total Inst: 9 9 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 11 11 0 0 + + Instances: 6 6 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + 1 1 0 0 SMP4 + ------- ------- --------- --------- + Total Inst: 9 9 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB C_N D_N B A VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_1.pex.spice b/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_1.pex.spice index 3f6d6e2..a61b541 100644 --- a/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_1.pex.spice +++ b/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor4bb_1.pex.spice -* Created: Thu Aug 27 19:17:49 2020 +* Created: Wed Sep 2 08:41:56 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_1.pxi.spice b/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_1.pxi.spice index dc8db24..5886afd 100644 --- a/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_1.pxi.spice +++ b/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor4bb_1.pxi.spice -* Created: Thu Aug 27 19:17:49 2020 +* Created: Wed Sep 2 08:41:56 2020 * x_PM_SKY130_FD_SC_HDLL__NOR4BB_1%C_N N_C_N_c_75_n N_C_N_c_76_n N_C_N_M1008_g + N_C_N_M1000_g C_N C_N N_C_N_c_72_n N_C_N_c_73_n N_C_N_c_74_n
diff --git a/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_1.spice b/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_1.spice index 8484ecb..f35f675 100644 --- a/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_1.spice +++ b/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor4bb_1.spice -* Created: Thu Aug 27 19:17:49 2020 +* Created: Wed Sep 2 08:41:56 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.lvs.report b/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.lvs.report new file mode 100644 index 0000000..d7aa6ab --- /dev/null +++ b/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.lvs.report
@@ -0,0 +1,496 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nor4bb_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nor4bb_2.sp ('sky130_fd_sc_hdll__nor4bb_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.spice ('sky130_fd_sc_hdll__nor4bb_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:41:59 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nor4bb_2 sky130_fd_sc_hdll__nor4bb_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nor4bb_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__nor4bb_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 14 14 + + Instances: 10 10 MN (4 pins) + 10 10 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 21 20 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 11 11 + + Instances: 6 6 MN (4 pins) + 2 2 MP (4 pins) + 1 1 SMP4 (6 pins) + ------ ------ + Total Inst: 9 9 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 11 11 0 0 + + Instances: 6 6 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + 1 1 0 0 SMP4 + ------- ------- --------- --------- + Total Inst: 9 9 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 16 layout mos transistors were reduced to 8. + 8 mos transistors were deleted by parallel reduction. + 16 source mos transistors were reduced to 8. + 8 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB D_N C_N B A VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.pex.spice b/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.pex.spice index a629ee3..07d0460 100644 --- a/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.pex.spice +++ b/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor4bb_2.pex.spice -* Created: Thu Aug 27 19:17:56 2020 +* Created: Wed Sep 2 08:42:03 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.pxi.spice b/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.pxi.spice index 432d830..d801c97 100644 --- a/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.pxi.spice +++ b/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor4bb_2.pxi.spice -* Created: Thu Aug 27 19:17:56 2020 +* Created: Wed Sep 2 08:42:03 2020 * x_PM_SKY130_FD_SC_HDLL__NOR4BB_2%D_N N_D_N_M1019_g N_D_N_c_103_n N_D_N_c_104_n + N_D_N_M1008_g D_N D_N N_D_N_c_100_n N_D_N_c_101_n N_D_N_c_102_n
diff --git a/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.spice b/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.spice index b8cf6f2..700f64c 100644 --- a/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.spice +++ b/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor4bb_2.spice -* Created: Thu Aug 27 19:17:56 2020 +* Created: Wed Sep 2 08:42:03 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.lvs.report b/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.lvs.report new file mode 100644 index 0000000..e90fc7f --- /dev/null +++ b/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.lvs.report
@@ -0,0 +1,515 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 87 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 89 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__nor4bb_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__nor4bb_4.sp ('sky130_fd_sc_hdll__nor4bb_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice ('sky130_fd_sc_hdll__nor4bb_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:42:07 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__nor4bb_4 sky130_fd_sc_hdll__nor4bb_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__nor4bb_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__nor4bb_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 16 14 * + + Instances: 18 18 MN (4 pins) + 18 18 MP (4 pins) + 1 0 * Dpar (2 pins) + 2 0 * Probe (2 pins) + ------ ------ + Total Inst: 39 36 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 11 11 + + Instances: 6 6 MN (4 pins) + 2 2 MP (4 pins) + 1 1 SMP4 (6 pins) + ------ ------ + Total Inst: 9 9 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 11 11 0 0 + + Instances: 6 6 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + 1 1 0 0 SMP4 + ------- ------- --------- --------- + Total Inst: 9 9 0 0 + + +o Statistics: + + 3 layout instances were filtered and their pins removed from adjoining nets. + + 32 layout mos transistors were reduced to 8. + 24 mos transistors were deleted by parallel reduction. + 32 source mos transistors were reduced to 8. + 24 mos transistors were deleted by parallel reduction. + + 2 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB C_N D_N B A VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.pex.spice b/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.pex.spice index e2eccdf..d0cc592 100644 --- a/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.pex.spice +++ b/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor4bb_4.pex.spice -* Created: Thu Aug 27 19:18:03 2020 +* Created: Wed Sep 2 08:42:10 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.pxi.spice b/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.pxi.spice index 04f570a..5783e3b 100644 --- a/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.pxi.spice +++ b/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor4bb_4.pxi.spice -* Created: Thu Aug 27 19:18:03 2020 +* Created: Wed Sep 2 08:42:10 2020 * x_PM_SKY130_FD_SC_HDLL__NOR4BB_4%C_N N_C_N_c_155_n N_C_N_M1002_g N_C_N_c_152_n + N_C_N_M1006_g C_N N_C_N_c_154_n C_N PM_SKY130_FD_SC_HDLL__NOR4BB_4%C_N
diff --git a/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice b/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice index e00245c..8e8c687 100644 --- a/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice +++ b/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__nor4bb_4.spice -* Created: Thu Aug 27 19:18:03 2020 +* Created: Wed Sep 2 08:42:10 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o211a/sky130_fd_sc_hdll__o211a_1.lvs.report b/cells/o211a/sky130_fd_sc_hdll__o211a_1.lvs.report new file mode 100644 index 0000000..daf6588 --- /dev/null +++ b/cells/o211a/sky130_fd_sc_hdll__o211a_1.lvs.report
@@ -0,0 +1,483 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_1.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o211a_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o211a_1.sp ('sky130_fd_sc_hdll__o211a_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_1.spice ('sky130_fd_sc_hdll__o211a_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:42:14 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o211a_1 sky130_fd_sc_hdll__o211a_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o211a_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__o211a_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 13 13 + + Instances: 5 5 MN (4 pins) + 5 5 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 11 10 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 10 10 + + Instances: 1 1 MN (4 pins) + 3 3 MP (4 pins) + 1 1 SMP2 (4 pins) + 1 1 SPMN_2_1_1 (6 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 10 10 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 3 3 0 0 MP(PHIGHVT) + 1 1 0 0 SMP2 + 1 1 0 0 SPMN_2_1_1 + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB A1 A2 B1 C1 X VPWR VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o211a/sky130_fd_sc_hdll__o211a_1.pex.spice b/cells/o211a/sky130_fd_sc_hdll__o211a_1.pex.spice index f5c8230..19f9122 100644 --- a/cells/o211a/sky130_fd_sc_hdll__o211a_1.pex.spice +++ b/cells/o211a/sky130_fd_sc_hdll__o211a_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o211a_1.pex.spice -* Created: Thu Aug 27 19:18:10 2020 +* Created: Wed Sep 2 08:42:18 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o211a/sky130_fd_sc_hdll__o211a_1.pxi.spice b/cells/o211a/sky130_fd_sc_hdll__o211a_1.pxi.spice index 35e6126..9c7d776 100644 --- a/cells/o211a/sky130_fd_sc_hdll__o211a_1.pxi.spice +++ b/cells/o211a/sky130_fd_sc_hdll__o211a_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o211a_1.pxi.spice -* Created: Thu Aug 27 19:18:10 2020 +* Created: Wed Sep 2 08:42:18 2020 * x_PM_SKY130_FD_SC_HDLL__O211A_1%A_79_21# N_A_79_21#_M1006_d N_A_79_21#_M1005_d + N_A_79_21#_M1001_d N_A_79_21#_M1008_g N_A_79_21#_c_62_n N_A_79_21#_M1004_g
diff --git a/cells/o211a/sky130_fd_sc_hdll__o211a_1.spice b/cells/o211a/sky130_fd_sc_hdll__o211a_1.spice index 9cb4e91..2beb210 100644 --- a/cells/o211a/sky130_fd_sc_hdll__o211a_1.spice +++ b/cells/o211a/sky130_fd_sc_hdll__o211a_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o211a_1.spice -* Created: Thu Aug 27 19:18:10 2020 +* Created: Wed Sep 2 08:42:18 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o211a/sky130_fd_sc_hdll__o211a_2.lvs.report b/cells/o211a/sky130_fd_sc_hdll__o211a_2.lvs.report new file mode 100644 index 0000000..5c5a01a --- /dev/null +++ b/cells/o211a/sky130_fd_sc_hdll__o211a_2.lvs.report
@@ -0,0 +1,490 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_2.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o211a_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o211a_2.sp ('sky130_fd_sc_hdll__o211a_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_2.spice ('sky130_fd_sc_hdll__o211a_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:42:22 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o211a_2 sky130_fd_sc_hdll__o211a_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o211a_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__o211a_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 13 13 + + Instances: 6 6 MN (4 pins) + 6 6 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 13 12 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 10 10 + + Instances: 1 1 MN (4 pins) + 3 3 MP (4 pins) + 1 1 SMP2 (4 pins) + 1 1 SPMN_2_1_1 (6 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 10 10 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 3 3 0 0 MP(PHIGHVT) + 1 1 0 0 SMP2 + 1 1 0 0 SPMN_2_1_1 + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB C1 B1 A2 A1 VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o211a/sky130_fd_sc_hdll__o211a_2.pex.spice b/cells/o211a/sky130_fd_sc_hdll__o211a_2.pex.spice index 901ba53..645661f 100644 --- a/cells/o211a/sky130_fd_sc_hdll__o211a_2.pex.spice +++ b/cells/o211a/sky130_fd_sc_hdll__o211a_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o211a_2.pex.spice -* Created: Thu Aug 27 19:18:17 2020 +* Created: Wed Sep 2 08:42:25 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o211a/sky130_fd_sc_hdll__o211a_2.pxi.spice b/cells/o211a/sky130_fd_sc_hdll__o211a_2.pxi.spice index b710c7f..ac1e8cc 100644 --- a/cells/o211a/sky130_fd_sc_hdll__o211a_2.pxi.spice +++ b/cells/o211a/sky130_fd_sc_hdll__o211a_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o211a_2.pxi.spice -* Created: Thu Aug 27 19:18:17 2020 +* Created: Wed Sep 2 08:42:25 2020 * x_PM_SKY130_FD_SC_HDLL__O211A_2%C1 N_C1_c_59_n N_C1_M1002_g N_C1_c_60_n + N_C1_M1001_g C1 C1 PM_SKY130_FD_SC_HDLL__O211A_2%C1
diff --git a/cells/o211a/sky130_fd_sc_hdll__o211a_2.spice b/cells/o211a/sky130_fd_sc_hdll__o211a_2.spice index b90f1ae..5d67d5e 100644 --- a/cells/o211a/sky130_fd_sc_hdll__o211a_2.spice +++ b/cells/o211a/sky130_fd_sc_hdll__o211a_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o211a_2.spice -* Created: Thu Aug 27 19:18:17 2020 +* Created: Wed Sep 2 08:42:25 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o211a/sky130_fd_sc_hdll__o211a_4.lvs.report b/cells/o211a/sky130_fd_sc_hdll__o211a_4.lvs.report new file mode 100644 index 0000000..162014a --- /dev/null +++ b/cells/o211a/sky130_fd_sc_hdll__o211a_4.lvs.report
@@ -0,0 +1,504 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_4.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o211a_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o211a_4.sp ('sky130_fd_sc_hdll__o211a_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211a/sky130_fd_sc_hdll__o211a_4.spice ('sky130_fd_sc_hdll__o211a_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:42:29 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o211a_4 sky130_fd_sc_hdll__o211a_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o211a_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__o211a_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 15 15 + + Instances: 12 12 MN (4 pins) + 12 12 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 25 24 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 10 10 + + Instances: 1 1 MN (4 pins) + 3 3 MP (4 pins) + 1 1 SMP2 (4 pins) + 1 1 SPMN_2_1_1 (6 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 10 10 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 3 3 0 0 MP(PHIGHVT) + 1 1 0 0 SMP2 + 1 1 0 0 SPMN_2_1_1 + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 24 layout mos transistors were reduced to 10. 2 connecting nets were deleted. + 10 mos transistors were deleted by parallel reduction. + 4 mos transistors and 2 connecting nets were deleted by split-gate reduction. + 24 source mos transistors were reduced to 10. 2 connecting nets were deleted. + 10 mos transistors were deleted by parallel reduction. + 4 mos transistors and 2 connecting nets were deleted by split-gate reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB B1 C1 A1 A2 VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o211a/sky130_fd_sc_hdll__o211a_4.pex.spice b/cells/o211a/sky130_fd_sc_hdll__o211a_4.pex.spice index a52d09b..2118264 100644 --- a/cells/o211a/sky130_fd_sc_hdll__o211a_4.pex.spice +++ b/cells/o211a/sky130_fd_sc_hdll__o211a_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o211a_4.pex.spice -* Created: Thu Aug 27 19:18:24 2020 +* Created: Wed Sep 2 08:42:32 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o211a/sky130_fd_sc_hdll__o211a_4.pxi.spice b/cells/o211a/sky130_fd_sc_hdll__o211a_4.pxi.spice index bd18ff4..5f001a4 100644 --- a/cells/o211a/sky130_fd_sc_hdll__o211a_4.pxi.spice +++ b/cells/o211a/sky130_fd_sc_hdll__o211a_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o211a_4.pxi.spice -* Created: Thu Aug 27 19:18:24 2020 +* Created: Wed Sep 2 08:42:32 2020 * x_PM_SKY130_FD_SC_HDLL__O211A_4%A_80_21# N_A_80_21#_M1023_d N_A_80_21#_M1001_d + N_A_80_21#_M1014_s N_A_80_21#_M1006_s N_A_80_21#_c_96_n N_A_80_21#_M1009_g
diff --git a/cells/o211a/sky130_fd_sc_hdll__o211a_4.spice b/cells/o211a/sky130_fd_sc_hdll__o211a_4.spice index 6050ea6..63a557f 100644 --- a/cells/o211a/sky130_fd_sc_hdll__o211a_4.spice +++ b/cells/o211a/sky130_fd_sc_hdll__o211a_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o211a_4.spice -* Created: Thu Aug 27 19:18:24 2020 +* Created: Wed Sep 2 08:42:32 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o211ai/sky130_fd_sc_hdll__o211ai_1.lvs.report b/cells/o211ai/sky130_fd_sc_hdll__o211ai_1.lvs.report new file mode 100644 index 0000000..72b0f64 --- /dev/null +++ b/cells/o211ai/sky130_fd_sc_hdll__o211ai_1.lvs.report
@@ -0,0 +1,479 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_1.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o211ai_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o211ai_1.sp ('sky130_fd_sc_hdll__o211ai_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_1.spice ('sky130_fd_sc_hdll__o211ai_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:42:36 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o211ai_1 sky130_fd_sc_hdll__o211ai_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o211ai_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__o211ai_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 12 12 + + Instances: 4 4 MN (4 pins) + 4 4 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 9 8 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 9 9 + + Instances: 2 2 MP (4 pins) + 1 1 SMP2 (4 pins) + 1 1 SPMN_2_1_1 (6 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 9 9 0 0 + + Instances: 2 2 0 0 MP(PHIGHVT) + 1 1 0 0 SMP2 + 1 1 0 0 SPMN_2_1_1 + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB A1 A2 B1 C1 VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o211ai/sky130_fd_sc_hdll__o211ai_1.pex.spice b/cells/o211ai/sky130_fd_sc_hdll__o211ai_1.pex.spice index 68c5011..78bcbe2 100644 --- a/cells/o211ai/sky130_fd_sc_hdll__o211ai_1.pex.spice +++ b/cells/o211ai/sky130_fd_sc_hdll__o211ai_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o211ai_1.pex.spice -* Created: Thu Aug 27 19:18:31 2020 +* Created: Wed Sep 2 08:42:40 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o211ai/sky130_fd_sc_hdll__o211ai_1.pxi.spice b/cells/o211ai/sky130_fd_sc_hdll__o211ai_1.pxi.spice index f66ff39..f8c3331 100644 --- a/cells/o211ai/sky130_fd_sc_hdll__o211ai_1.pxi.spice +++ b/cells/o211ai/sky130_fd_sc_hdll__o211ai_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o211ai_1.pxi.spice -* Created: Thu Aug 27 19:18:31 2020 +* Created: Wed Sep 2 08:42:40 2020 * x_PM_SKY130_FD_SC_HDLL__O211AI_1%A1 N_A1_c_40_n N_A1_M1005_g N_A1_c_41_n + N_A1_M1000_g A1 PM_SKY130_FD_SC_HDLL__O211AI_1%A1
diff --git a/cells/o211ai/sky130_fd_sc_hdll__o211ai_1.spice b/cells/o211ai/sky130_fd_sc_hdll__o211ai_1.spice index 94396dc..4dd3865 100644 --- a/cells/o211ai/sky130_fd_sc_hdll__o211ai_1.spice +++ b/cells/o211ai/sky130_fd_sc_hdll__o211ai_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o211ai_1.spice -* Created: Thu Aug 27 19:18:31 2020 +* Created: Wed Sep 2 08:42:40 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o211ai/sky130_fd_sc_hdll__o211ai_2.lvs.report b/cells/o211ai/sky130_fd_sc_hdll__o211ai_2.lvs.report new file mode 100644 index 0000000..a3c565e --- /dev/null +++ b/cells/o211ai/sky130_fd_sc_hdll__o211ai_2.lvs.report
@@ -0,0 +1,492 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_2.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o211ai_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o211ai_2.sp ('sky130_fd_sc_hdll__o211ai_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_2.spice ('sky130_fd_sc_hdll__o211ai_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:42:43 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o211ai_2 sky130_fd_sc_hdll__o211ai_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o211ai_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__o211ai_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 12 12 + + Instances: 8 8 MN (4 pins) + 8 8 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 17 16 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 9 9 + + Instances: 2 2 MP (4 pins) + 1 1 SMP2 (4 pins) + 1 1 SPMN_2_1_1 (6 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 9 9 0 0 + + Instances: 2 2 0 0 MP(PHIGHVT) + 1 1 0 0 SMP2 + 1 1 0 0 SPMN_2_1_1 + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 16 layout mos transistors were reduced to 8. + 8 mos transistors were deleted by parallel reduction. + 16 source mos transistors were reduced to 8. + 8 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB C1 B1 A2 A1 VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o211ai/sky130_fd_sc_hdll__o211ai_2.pex.spice b/cells/o211ai/sky130_fd_sc_hdll__o211ai_2.pex.spice index 03fa8ea..9f32bbf 100644 --- a/cells/o211ai/sky130_fd_sc_hdll__o211ai_2.pex.spice +++ b/cells/o211ai/sky130_fd_sc_hdll__o211ai_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o211ai_2.pex.spice -* Created: Thu Aug 27 19:18:38 2020 +* Created: Wed Sep 2 08:42:47 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o211ai/sky130_fd_sc_hdll__o211ai_2.pxi.spice b/cells/o211ai/sky130_fd_sc_hdll__o211ai_2.pxi.spice index cecf0f4..c6431a9 100644 --- a/cells/o211ai/sky130_fd_sc_hdll__o211ai_2.pxi.spice +++ b/cells/o211ai/sky130_fd_sc_hdll__o211ai_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o211ai_2.pxi.spice -* Created: Thu Aug 27 19:18:38 2020 +* Created: Wed Sep 2 08:42:47 2020 * x_PM_SKY130_FD_SC_HDLL__O211AI_2%C1 N_C1_c_68_n N_C1_M1003_g N_C1_c_64_n + N_C1_M1007_g N_C1_c_69_n N_C1_M1014_g N_C1_c_65_n N_C1_M1013_g C1 N_C1_c_66_n
diff --git a/cells/o211ai/sky130_fd_sc_hdll__o211ai_2.spice b/cells/o211ai/sky130_fd_sc_hdll__o211ai_2.spice index 302dad3..30538c7 100644 --- a/cells/o211ai/sky130_fd_sc_hdll__o211ai_2.spice +++ b/cells/o211ai/sky130_fd_sc_hdll__o211ai_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o211ai_2.spice -* Created: Thu Aug 27 19:18:38 2020 +* Created: Wed Sep 2 08:42:47 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.lvs.report b/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.lvs.report new file mode 100644 index 0000000..c286553 --- /dev/null +++ b/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.lvs.report
@@ -0,0 +1,513 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o211ai_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o211ai_4.sp ('sky130_fd_sc_hdll__o211ai_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.spice ('sky130_fd_sc_hdll__o211ai_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:42:51 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o211ai_4 sky130_fd_sc_hdll__o211ai_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o211ai_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__o211ai_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 17 14 * + + Instances: 16 16 MN (4 pins) + 16 16 MP (4 pins) + 1 0 * Dpar (2 pins) + 3 0 * Probe (2 pins) + ------ ------ + Total Inst: 36 32 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 9 9 + + Instances: 2 2 MP (4 pins) + 1 1 SMP2 (4 pins) + 1 1 SPMN_2_1_1 (6 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 9 9 0 0 + + Instances: 2 2 0 0 MP(PHIGHVT) + 1 1 0 0 SMP2 + 1 1 0 0 SPMN_2_1_1 + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 4 layout instances were filtered and their pins removed from adjoining nets. + + 32 layout mos transistors were reduced to 8. 2 connecting nets were deleted. + 20 mos transistors were deleted by parallel reduction. + 4 mos transistors and 2 connecting nets were deleted by split-gate reduction. + 32 source mos transistors were reduced to 8. 2 connecting nets were deleted. + 20 mos transistors were deleted by parallel reduction. + 4 mos transistors and 2 connecting nets were deleted by split-gate reduction. + + 3 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A1 A2 B1 C1 VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.pex.spice b/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.pex.spice index 8bdf601..0c87fc4 100644 --- a/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.pex.spice +++ b/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o211ai_4.pex.spice -* Created: Thu Aug 27 19:18:45 2020 +* Created: Wed Sep 2 08:42:54 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C @@ -503,7 +503,7 @@ + $Y=0.235 $X2=6.045 $Y2=0.365 .ends -.subckt PM_SKY130_FD_SC_HDLL__O211AI_4%noxref_10 1 2 3 4 5 6 7 22 24 25 30 32 34 +.subckt PM_SKY130_FD_SC_HDLL__O211AI_4%A_27_47# 1 2 3 4 5 6 7 22 24 25 30 32 34 + 41 42 43 49 59 c128 42 0 1.15388e-19 $X=8.26 $Y=0.51 c129 34 0 1.88158e-19 $X=8.32 $Y=0.395 @@ -649,7 +649,7 @@ + $Y=0.235 $X2=0.74 $Y2=0.36 .ends -.subckt PM_SKY130_FD_SC_HDLL__O211AI_4%noxref_12 1 2 11 +.subckt PM_SKY130_FD_SC_HDLL__O211AI_4%A_886_47# 1 2 11 c27 11 0 1.81301e-19 $X=6.515 $Y=0.725 r28 8 11 116.763 $w=1.78e-07 $l=1.895e-06 $layer=LI1_cond $X=4.62 $Y=0.725 + $X2=6.515 $Y2=0.725
diff --git a/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.pxi.spice b/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.pxi.spice index 3a824a7..082538a 100644 --- a/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.pxi.spice +++ b/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.pxi.spice
@@ -1,26 +1,24 @@ * File: sky130_fd_sc_hdll__o211ai_4.pxi.spice -* Created: Thu Aug 27 19:18:45 2020 +* Created: Wed Sep 2 08:42:54 2020 * -x_PM_SKY130_FD_SC_HDLL__O211AI_4%A1 N_A1_c_98_n N_A1_M0_noxref_g N_A1_c_106_n -+ N_A1_M1011_g N_A1_c_99_n N_A1_M1_noxref_g N_A1_c_107_n N_A1_M1014_g -+ N_A1_c_108_n N_A1_M1017_g N_A1_c_100_n N_A1_M2_noxref_g N_A1_c_101_n -+ N_A1_M1024_g N_A1_c_102_n N_A1_M7_noxref_g N_A1_c_103_n N_A1_c_116_p -+ N_A1_c_104_n A1 N_A1_c_112_n N_A1_c_105_n PM_SKY130_FD_SC_HDLL__O211AI_4%A1 -x_PM_SKY130_FD_SC_HDLL__O211AI_4%A2 N_A2_c_214_n N_A2_M3_noxref_g N_A2_c_220_n -+ N_A2_M1002_g N_A2_c_215_n N_A2_M4_noxref_g N_A2_c_221_n N_A2_M1021_g -+ N_A2_c_216_n N_A2_M5_noxref_g N_A2_c_222_n N_A2_M1027_g N_A2_c_223_n -+ N_A2_M1029_g N_A2_c_217_n N_A2_M6_noxref_g A2 N_A2_c_218_n N_A2_c_219_n A2 -+ PM_SKY130_FD_SC_HDLL__O211AI_4%A2 -x_PM_SKY130_FD_SC_HDLL__O211AI_4%B1 N_B1_c_290_n N_B1_M8_noxref_g N_B1_c_299_n -+ N_B1_M1006_g N_B1_c_291_n N_B1_M9_noxref_g N_B1_c_300_n N_B1_M1009_g -+ N_B1_c_301_n N_B1_M1012_g N_B1_c_292_n N_B1_M10_noxref_g N_B1_c_293_n -+ N_B1_M1025_g N_B1_c_294_n N_B1_M15_noxref_g N_B1_c_318_p N_B1_c_295_n B1 -+ N_B1_c_296_n B1 N_B1_c_297_n N_B1_c_298_n PM_SKY130_FD_SC_HDLL__O211AI_4%B1 -x_PM_SKY130_FD_SC_HDLL__O211AI_4%C1 N_C1_c_403_n N_C1_M11_noxref_g N_C1_c_408_n -+ N_C1_M1001_g N_C1_c_404_n N_C1_M12_noxref_g N_C1_c_409_n N_C1_M1019_g -+ N_C1_c_405_n N_C1_M13_noxref_g N_C1_c_410_n N_C1_M1023_g N_C1_c_411_n -+ N_C1_M1031_g N_C1_c_406_n N_C1_M14_noxref_g C1 N_C1_c_412_n N_C1_c_407_n C1 -+ PM_SKY130_FD_SC_HDLL__O211AI_4%C1 +x_PM_SKY130_FD_SC_HDLL__O211AI_4%A1 N_A1_c_98_n N_A1_M1007_g N_A1_c_106_n ++ N_A1_M1011_g N_A1_c_99_n N_A1_M1015_g N_A1_c_107_n N_A1_M1014_g N_A1_c_108_n ++ N_A1_M1017_g N_A1_c_100_n N_A1_M1016_g N_A1_c_101_n N_A1_M1024_g N_A1_c_102_n ++ N_A1_M1022_g N_A1_c_103_n N_A1_c_116_p N_A1_c_104_n A1 N_A1_c_112_n ++ N_A1_c_105_n PM_SKY130_FD_SC_HDLL__O211AI_4%A1 +x_PM_SKY130_FD_SC_HDLL__O211AI_4%A2 N_A2_c_214_n N_A2_M1000_g N_A2_c_220_n ++ N_A2_M1002_g N_A2_c_215_n N_A2_M1003_g N_A2_c_221_n N_A2_M1021_g N_A2_c_216_n ++ N_A2_M1026_g N_A2_c_222_n N_A2_M1027_g N_A2_c_223_n N_A2_M1029_g N_A2_c_217_n ++ N_A2_M1030_g A2 N_A2_c_218_n N_A2_c_219_n A2 PM_SKY130_FD_SC_HDLL__O211AI_4%A2 +x_PM_SKY130_FD_SC_HDLL__O211AI_4%B1 N_B1_c_290_n N_B1_M1008_g N_B1_c_299_n ++ N_B1_M1006_g N_B1_c_291_n N_B1_M1013_g N_B1_c_300_n N_B1_M1009_g N_B1_c_301_n ++ N_B1_M1012_g N_B1_c_292_n N_B1_M1010_g N_B1_c_293_n N_B1_M1025_g N_B1_c_294_n ++ N_B1_M1018_g N_B1_c_318_p N_B1_c_295_n B1 N_B1_c_296_n B1 N_B1_c_297_n ++ N_B1_c_298_n PM_SKY130_FD_SC_HDLL__O211AI_4%B1 +x_PM_SKY130_FD_SC_HDLL__O211AI_4%C1 N_C1_c_403_n N_C1_M1005_g N_C1_c_408_n ++ N_C1_M1001_g N_C1_c_404_n N_C1_M1004_g N_C1_c_409_n N_C1_M1019_g N_C1_c_405_n ++ N_C1_M1028_g N_C1_c_410_n N_C1_M1023_g N_C1_c_411_n N_C1_M1031_g N_C1_c_406_n ++ N_C1_M1020_g C1 N_C1_c_412_n N_C1_c_407_n C1 PM_SKY130_FD_SC_HDLL__O211AI_4%C1 x_PM_SKY130_FD_SC_HDLL__O211AI_4%VPWR N_VPWR_M1011_s N_VPWR_M1014_s + N_VPWR_M1024_s N_VPWR_M1009_s N_VPWR_M1001_d N_VPWR_M1023_d N_VPWR_M1025_s + N_VPWR_c_484_n N_VPWR_c_485_n N_VPWR_c_486_n N_VPWR_c_487_n N_VPWR_c_488_n @@ -32,26 +30,24 @@ + N_A_118_297#_M1017_d N_A_118_297#_M1021_s N_A_118_297#_M1029_s + N_A_118_297#_c_607_n N_A_118_297#_c_631_n N_A_118_297#_c_613_n + N_A_118_297#_c_615_n PM_SKY130_FD_SC_HDLL__O211AI_4%A_118_297# -x_PM_SKY130_FD_SC_HDLL__O211AI_4%Y N_Y_M11_noxref_d N_Y_M13_noxref_d N_Y_M1002_d +x_PM_SKY130_FD_SC_HDLL__O211AI_4%Y N_Y_M1005_s N_Y_M1028_s N_Y_M1002_d + N_Y_M1027_d N_Y_M1006_d N_Y_M1012_d N_Y_M1019_s N_Y_M1031_s N_Y_c_652_n + N_Y_c_666_n N_Y_c_667_n N_Y_c_668_n N_Y_c_693_n N_Y_c_654_n N_Y_c_646_n + N_Y_c_645_n Y N_Y_c_649_n N_Y_c_656_n Y PM_SKY130_FD_SC_HDLL__O211AI_4%Y -x_PM_SKY130_FD_SC_HDLL__O211AI_4%noxref_10 N_noxref_10_M0_noxref_s -+ N_noxref_10_M1_noxref_d N_noxref_10_M3_noxref_d N_noxref_10_M5_noxref_d -+ N_noxref_10_M7_noxref_d N_noxref_10_M9_noxref_d N_noxref_10_M15_noxref_d -+ N_noxref_10_c_760_n N_noxref_10_c_772_n N_noxref_10_c_761_n -+ N_noxref_10_c_781_n N_noxref_10_c_798_n N_noxref_10_c_762_n -+ N_noxref_10_c_763_n N_noxref_10_c_764_n N_noxref_10_c_784_n -+ N_noxref_10_c_765_n N_noxref_10_c_766_n -+ PM_SKY130_FD_SC_HDLL__O211AI_4%noxref_10 -x_PM_SKY130_FD_SC_HDLL__O211AI_4%VGND N_VGND_M0_noxref_d N_VGND_M2_noxref_d -+ N_VGND_M4_noxref_d N_VGND_M6_noxref_d N_VGND_c_888_n N_VGND_c_889_n -+ N_VGND_c_890_n VGND N_VGND_c_891_n N_VGND_c_892_n N_VGND_c_893_n -+ N_VGND_c_894_n N_VGND_c_895_n N_VGND_c_896_n N_VGND_c_897_n N_VGND_c_898_n +x_PM_SKY130_FD_SC_HDLL__O211AI_4%A_27_47# N_A_27_47#_M1007_s N_A_27_47#_M1015_s ++ N_A_27_47#_M1000_d N_A_27_47#_M1026_d N_A_27_47#_M1022_s N_A_27_47#_M1013_d ++ N_A_27_47#_M1018_d N_A_27_47#_c_760_n N_A_27_47#_c_772_n N_A_27_47#_c_761_n ++ N_A_27_47#_c_781_n N_A_27_47#_c_798_n N_A_27_47#_c_762_n N_A_27_47#_c_763_n ++ N_A_27_47#_c_764_n N_A_27_47#_c_784_n N_A_27_47#_c_765_n N_A_27_47#_c_766_n ++ PM_SKY130_FD_SC_HDLL__O211AI_4%A_27_47# +x_PM_SKY130_FD_SC_HDLL__O211AI_4%VGND N_VGND_M1007_d N_VGND_M1016_d ++ N_VGND_M1003_s N_VGND_M1030_s N_VGND_c_888_n N_VGND_c_889_n N_VGND_c_890_n ++ VGND N_VGND_c_891_n N_VGND_c_892_n N_VGND_c_893_n N_VGND_c_894_n ++ N_VGND_c_895_n N_VGND_c_896_n N_VGND_c_897_n N_VGND_c_898_n + PM_SKY130_FD_SC_HDLL__O211AI_4%VGND -x_PM_SKY130_FD_SC_HDLL__O211AI_4%noxref_12 N_noxref_12_M8_noxref_d -+ N_noxref_12_M12_noxref_d N_noxref_12_c_1007_n -+ PM_SKY130_FD_SC_HDLL__O211AI_4%noxref_12 +x_PM_SKY130_FD_SC_HDLL__O211AI_4%A_886_47# N_A_886_47#_M1008_s ++ N_A_886_47#_M1004_d N_A_886_47#_c_1007_n ++ PM_SKY130_FD_SC_HDLL__O211AI_4%A_886_47# cc_1 VNB N_A1_c_98_n 0.0218629f $X=-0.19 $Y=-0.24 $X2=0.475 $Y2=0.995 cc_2 VNB N_A1_c_99_n 0.0171779f $X=-0.19 $Y=-0.24 $X2=0.955 $Y2=0.995 cc_3 VNB N_A1_c_100_n 0.016863f $X=-0.19 $Y=-0.24 $X2=1.485 $Y2=0.995 @@ -82,13 +78,13 @@ cc_28 VNB N_C1_c_407_n 0.0770371f $X=-0.19 $Y=-0.24 $X2=0.98 $Y2=1.202 cc_29 VNB N_VPWR_c_483_n 0.364621f $X=-0.19 $Y=-0.24 $X2=0 $Y2=0 cc_30 VNB N_Y_c_645_n 0.0199827f $X=-0.19 $Y=-0.24 $X2=1.485 $Y2=1.202 -cc_31 VNB N_noxref_10_c_760_n 0.00498999f $X=-0.19 $Y=-0.24 $X2=3.895 $Y2=0.995 -cc_32 VNB N_noxref_10_c_761_n 0.0146992f $X=-0.19 $Y=-0.24 $X2=1.015 $Y2=1.202 -cc_33 VNB N_noxref_10_c_762_n 0.00224113f $X=-0.19 $Y=-0.24 $X2=3.855 $Y2=1.16 -cc_34 VNB N_noxref_10_c_763_n 0.00837836f $X=-0.19 $Y=-0.24 $X2=0.955 $Y2=1.202 -cc_35 VNB N_noxref_10_c_764_n 4.96561e-19 $X=-0.19 $Y=-0.24 $X2=0.98 $Y2=1.202 -cc_36 VNB N_noxref_10_c_765_n 0.0208627f $X=-0.19 $Y=-0.24 $X2=1.287 $Y2=1.16 -cc_37 VNB N_noxref_10_c_766_n 0.0124137f $X=-0.19 $Y=-0.24 $X2=0 $Y2=0 +cc_31 VNB N_A_27_47#_c_760_n 0.00498999f $X=-0.19 $Y=-0.24 $X2=3.895 $Y2=0.995 +cc_32 VNB N_A_27_47#_c_761_n 0.0146992f $X=-0.19 $Y=-0.24 $X2=1.015 $Y2=1.202 +cc_33 VNB N_A_27_47#_c_762_n 0.00224113f $X=-0.19 $Y=-0.24 $X2=3.855 $Y2=1.16 +cc_34 VNB N_A_27_47#_c_763_n 0.00837836f $X=-0.19 $Y=-0.24 $X2=0.955 $Y2=1.202 +cc_35 VNB N_A_27_47#_c_764_n 4.96561e-19 $X=-0.19 $Y=-0.24 $X2=0.98 $Y2=1.202 +cc_36 VNB N_A_27_47#_c_765_n 0.0208627f $X=-0.19 $Y=-0.24 $X2=1.287 $Y2=1.16 +cc_37 VNB N_A_27_47#_c_766_n 0.0124137f $X=-0.19 $Y=-0.24 $X2=0 $Y2=0 cc_38 VNB N_VGND_c_888_n 0.0145889f $X=-0.19 $Y=-0.24 $X2=1.46 $Y2=1.41 cc_39 VNB N_VGND_c_889_n 3.34065e-19 $X=-0.19 $Y=-0.24 $X2=1.485 $Y2=0.56 cc_40 VNB N_VGND_c_890_n 0.0137175f $X=-0.19 $Y=-0.24 $X2=3.86 $Y2=1.41 @@ -221,30 +217,26 @@ cc_161 N_A1_c_101_n N_Y_c_654_n 0.00747676f $X=3.86 $Y=1.41 $X2=0 $Y2=0 cc_162 N_A1_c_116_p N_Y_c_654_n 0.016669f $X=3.7 $Y=1.6 $X2=0 $Y2=0 cc_163 N_A1_c_101_n N_Y_c_656_n 0.0104857f $X=3.86 $Y=1.41 $X2=0 $Y2=0 -cc_164 N_A1_c_98_n N_noxref_10_c_760_n 0.0132853f $X=0.475 $Y=0.995 $X2=0 $Y2=0 -cc_165 N_A1_c_99_n N_noxref_10_c_760_n 0.0131977f $X=0.955 $Y=0.995 $X2=0 $Y2=0 -cc_166 N_A1_c_103_n N_noxref_10_c_760_n 0.0460086f $X=1.015 $Y=1.202 $X2=0 $Y2=0 -cc_167 N_A1_c_112_n N_noxref_10_c_760_n 0.00881237f $X=1.345 $Y=1.16 $X2=0 $Y2=0 -cc_168 N_A1_c_105_n N_noxref_10_c_760_n 0.00386608f $X=1.46 $Y=1.202 $X2=0 $Y2=0 -cc_169 N_A1_c_101_n N_noxref_10_c_772_n 0.00288519f $X=3.86 $Y=1.41 $X2=0 $Y2=0 -cc_170 N_A1_c_102_n N_noxref_10_c_772_n 0.0110591f $X=3.895 $Y=0.995 $X2=0 $Y2=0 -cc_171 N_A1_c_104_n N_noxref_10_c_772_n 0.0170843f $X=3.855 $Y=1.16 $X2=0 $Y2=0 -cc_172 N_A1_c_99_n N_noxref_10_c_761_n 0.00340518f $X=0.955 $Y=0.995 $X2=0 $Y2=0 -cc_173 N_A1_c_100_n N_noxref_10_c_761_n 0.0157917f $X=1.485 $Y=0.995 $X2=0 $Y2=0 -cc_174 N_A1_c_102_n N_noxref_10_c_761_n 6.5376e-19 $X=3.895 $Y=0.995 $X2=0 $Y2=0 -cc_175 N_A1_c_116_p N_noxref_10_c_761_n 0.00753594f $X=3.7 $Y=1.6 $X2=0 $Y2=0 -cc_176 N_A1_c_112_n N_noxref_10_c_761_n 0.0345931f $X=1.345 $Y=1.16 $X2=0 $Y2=0 -cc_177 N_A1_c_105_n N_noxref_10_c_761_n 0.00494155f $X=1.46 $Y=1.202 $X2=0 $Y2=0 -cc_178 N_A1_c_102_n N_noxref_10_c_781_n 3.29317e-19 $X=3.895 $Y=0.995 $X2=0 -+ $Y2=0 -cc_179 N_A1_c_100_n N_noxref_10_c_764_n 0.00272001f $X=1.485 $Y=0.995 $X2=0 -+ $Y2=0 -cc_180 N_A1_c_102_n N_noxref_10_c_764_n 0.00352307f $X=3.895 $Y=0.995 $X2=0 -+ $Y2=0 -cc_181 N_A1_c_99_n N_noxref_10_c_784_n 0.00419048f $X=0.955 $Y=0.995 $X2=0 $Y2=0 -cc_182 N_A1_c_100_n N_noxref_10_c_784_n 8.07403e-19 $X=1.485 $Y=0.995 $X2=0 -+ $Y2=0 -cc_183 N_A1_c_112_n N_noxref_10_c_784_n 0.00117031f $X=1.345 $Y=1.16 $X2=0 $Y2=0 +cc_164 N_A1_c_98_n N_A_27_47#_c_760_n 0.0132853f $X=0.475 $Y=0.995 $X2=0 $Y2=0 +cc_165 N_A1_c_99_n N_A_27_47#_c_760_n 0.0131977f $X=0.955 $Y=0.995 $X2=0 $Y2=0 +cc_166 N_A1_c_103_n N_A_27_47#_c_760_n 0.0460086f $X=1.015 $Y=1.202 $X2=0 $Y2=0 +cc_167 N_A1_c_112_n N_A_27_47#_c_760_n 0.00881237f $X=1.345 $Y=1.16 $X2=0 $Y2=0 +cc_168 N_A1_c_105_n N_A_27_47#_c_760_n 0.00386608f $X=1.46 $Y=1.202 $X2=0 $Y2=0 +cc_169 N_A1_c_101_n N_A_27_47#_c_772_n 0.00288519f $X=3.86 $Y=1.41 $X2=0 $Y2=0 +cc_170 N_A1_c_102_n N_A_27_47#_c_772_n 0.0110591f $X=3.895 $Y=0.995 $X2=0 $Y2=0 +cc_171 N_A1_c_104_n N_A_27_47#_c_772_n 0.0170843f $X=3.855 $Y=1.16 $X2=0 $Y2=0 +cc_172 N_A1_c_99_n N_A_27_47#_c_761_n 0.00340518f $X=0.955 $Y=0.995 $X2=0 $Y2=0 +cc_173 N_A1_c_100_n N_A_27_47#_c_761_n 0.0157917f $X=1.485 $Y=0.995 $X2=0 $Y2=0 +cc_174 N_A1_c_102_n N_A_27_47#_c_761_n 6.5376e-19 $X=3.895 $Y=0.995 $X2=0 $Y2=0 +cc_175 N_A1_c_116_p N_A_27_47#_c_761_n 0.00753594f $X=3.7 $Y=1.6 $X2=0 $Y2=0 +cc_176 N_A1_c_112_n N_A_27_47#_c_761_n 0.0345931f $X=1.345 $Y=1.16 $X2=0 $Y2=0 +cc_177 N_A1_c_105_n N_A_27_47#_c_761_n 0.00494155f $X=1.46 $Y=1.202 $X2=0 $Y2=0 +cc_178 N_A1_c_102_n N_A_27_47#_c_781_n 3.29317e-19 $X=3.895 $Y=0.995 $X2=0 $Y2=0 +cc_179 N_A1_c_100_n N_A_27_47#_c_764_n 0.00272001f $X=1.485 $Y=0.995 $X2=0 $Y2=0 +cc_180 N_A1_c_102_n N_A_27_47#_c_764_n 0.00352307f $X=3.895 $Y=0.995 $X2=0 $Y2=0 +cc_181 N_A1_c_99_n N_A_27_47#_c_784_n 0.00419048f $X=0.955 $Y=0.995 $X2=0 $Y2=0 +cc_182 N_A1_c_100_n N_A_27_47#_c_784_n 8.07403e-19 $X=1.485 $Y=0.995 $X2=0 $Y2=0 +cc_183 N_A1_c_112_n N_A_27_47#_c_784_n 0.00117031f $X=1.345 $Y=1.16 $X2=0 $Y2=0 cc_184 N_A1_c_99_n N_VGND_c_888_n 0.00353009f $X=0.955 $Y=0.995 $X2=0 $Y2=0 cc_185 N_A1_c_100_n N_VGND_c_888_n 0.00352186f $X=1.485 $Y=0.995 $X2=0 $Y2=0 cc_186 N_A1_c_99_n N_VGND_c_889_n 0.00101018f $X=0.955 $Y=0.995 $X2=0 $Y2=0 @@ -277,20 +269,16 @@ cc_213 N_A2_c_221_n N_Y_c_652_n 0.0122704f $X=2.42 $Y=1.41 $X2=0 $Y2=0 cc_214 N_A2_c_222_n N_Y_c_652_n 0.0122704f $X=2.9 $Y=1.41 $X2=0 $Y2=0 cc_215 N_A2_c_223_n N_Y_c_652_n 0.0122038f $X=3.38 $Y=1.41 $X2=0 $Y2=0 -cc_216 N_A2_c_214_n N_noxref_10_c_761_n 0.0126072f $X=1.915 $Y=0.995 $X2=0 $Y2=0 -cc_217 N_A2_c_215_n N_noxref_10_c_761_n 0.0129944f $X=2.395 $Y=0.995 $X2=0 $Y2=0 -cc_218 N_A2_c_216_n N_noxref_10_c_761_n 0.0130229f $X=2.875 $Y=0.995 $X2=0 $Y2=0 -cc_219 N_A2_c_217_n N_noxref_10_c_761_n 0.011746f $X=3.405 $Y=0.995 $X2=0 $Y2=0 -cc_220 N_A2_c_218_n N_noxref_10_c_761_n 0.119169f $X=3.19 $Y=1.16 $X2=0 $Y2=0 -cc_221 N_A2_c_219_n N_noxref_10_c_761_n 0.0128516f $X=3.38 $Y=1.202 $X2=0 $Y2=0 -cc_222 N_A2_c_214_n N_noxref_10_c_764_n 0.00307664f $X=1.915 $Y=0.995 $X2=0 -+ $Y2=0 -cc_223 N_A2_c_215_n N_noxref_10_c_764_n 0.00315083f $X=2.395 $Y=0.995 $X2=0 -+ $Y2=0 -cc_224 N_A2_c_216_n N_noxref_10_c_764_n 0.00321611f $X=2.875 $Y=0.995 $X2=0 -+ $Y2=0 -cc_225 N_A2_c_217_n N_noxref_10_c_764_n 0.00275293f $X=3.405 $Y=0.995 $X2=0 -+ $Y2=0 +cc_216 N_A2_c_214_n N_A_27_47#_c_761_n 0.0126072f $X=1.915 $Y=0.995 $X2=0 $Y2=0 +cc_217 N_A2_c_215_n N_A_27_47#_c_761_n 0.0129944f $X=2.395 $Y=0.995 $X2=0 $Y2=0 +cc_218 N_A2_c_216_n N_A_27_47#_c_761_n 0.0130229f $X=2.875 $Y=0.995 $X2=0 $Y2=0 +cc_219 N_A2_c_217_n N_A_27_47#_c_761_n 0.011746f $X=3.405 $Y=0.995 $X2=0 $Y2=0 +cc_220 N_A2_c_218_n N_A_27_47#_c_761_n 0.119169f $X=3.19 $Y=1.16 $X2=0 $Y2=0 +cc_221 N_A2_c_219_n N_A_27_47#_c_761_n 0.0128516f $X=3.38 $Y=1.202 $X2=0 $Y2=0 +cc_222 N_A2_c_214_n N_A_27_47#_c_764_n 0.00307664f $X=1.915 $Y=0.995 $X2=0 $Y2=0 +cc_223 N_A2_c_215_n N_A_27_47#_c_764_n 0.00315083f $X=2.395 $Y=0.995 $X2=0 $Y2=0 +cc_224 N_A2_c_216_n N_A_27_47#_c_764_n 0.00321611f $X=2.875 $Y=0.995 $X2=0 $Y2=0 +cc_225 N_A2_c_217_n N_A_27_47#_c_764_n 0.00275293f $X=3.405 $Y=0.995 $X2=0 $Y2=0 cc_226 N_A2_c_214_n N_VGND_c_889_n 0.00796693f $X=1.915 $Y=0.995 $X2=0 $Y2=0 cc_227 N_A2_c_215_n N_VGND_c_889_n 0.00113111f $X=2.395 $Y=0.995 $X2=0 $Y2=0 cc_228 N_A2_c_216_n N_VGND_c_890_n 0.00352884f $X=2.875 $Y=0.995 $X2=0 $Y2=0 @@ -369,27 +357,19 @@ cc_300 N_B1_c_298_n N_Y_c_649_n 0.159976f $X=5.525 $Y=1.34 $X2=0 $Y2=0 cc_301 N_B1_c_299_n N_Y_c_656_n 0.0136821f $X=4.38 $Y=1.41 $X2=0 $Y2=0 cc_302 N_B1_c_297_n N_Y_c_656_n 0.0172505f $X=4.71 $Y=1.34 $X2=0 $Y2=0 -cc_303 N_B1_c_297_n N_noxref_10_c_772_n 0.00205362f $X=4.71 $Y=1.34 $X2=0 $Y2=0 -cc_304 N_B1_c_290_n N_noxref_10_c_798_n 0.00972566f $X=4.355 $Y=0.995 $X2=0 -+ $Y2=0 -cc_305 N_B1_c_291_n N_noxref_10_c_798_n 0.00796047f $X=4.835 $Y=0.995 $X2=0 -+ $Y2=0 -cc_306 N_B1_c_292_n N_noxref_10_c_798_n 0.0059805f $X=5.365 $Y=0.995 $X2=0 $Y2=0 -cc_307 N_B1_c_297_n N_noxref_10_c_798_n 0.00251253f $X=4.71 $Y=1.34 $X2=0 $Y2=0 -cc_308 N_B1_c_294_n N_noxref_10_c_762_n 0.00514577f $X=7.775 $Y=0.995 $X2=0 -+ $Y2=0 -cc_309 N_B1_c_290_n N_noxref_10_c_764_n 0.00235806f $X=4.355 $Y=0.995 $X2=0 -+ $Y2=0 -cc_310 N_B1_c_291_n N_noxref_10_c_764_n 0.0021112f $X=4.835 $Y=0.995 $X2=0 $Y2=0 -cc_311 N_B1_c_292_n N_noxref_10_c_764_n 0.00232103f $X=5.365 $Y=0.995 $X2=0 -+ $Y2=0 -cc_312 N_B1_c_294_n N_noxref_10_c_764_n 0.00256483f $X=7.775 $Y=0.995 $X2=0 -+ $Y2=0 -cc_313 N_B1_c_297_n N_noxref_10_c_764_n 0.00602013f $X=4.71 $Y=1.34 $X2=0 $Y2=0 -cc_314 N_B1_c_294_n N_noxref_10_c_765_n 8.38249e-19 $X=7.775 $Y=0.995 $X2=0 -+ $Y2=0 -cc_315 N_B1_c_294_n N_noxref_10_c_766_n 9.94574e-19 $X=7.775 $Y=0.995 $X2=0 -+ $Y2=0 +cc_303 N_B1_c_297_n N_A_27_47#_c_772_n 0.00205362f $X=4.71 $Y=1.34 $X2=0 $Y2=0 +cc_304 N_B1_c_290_n N_A_27_47#_c_798_n 0.00972566f $X=4.355 $Y=0.995 $X2=0 $Y2=0 +cc_305 N_B1_c_291_n N_A_27_47#_c_798_n 0.00796047f $X=4.835 $Y=0.995 $X2=0 $Y2=0 +cc_306 N_B1_c_292_n N_A_27_47#_c_798_n 0.0059805f $X=5.365 $Y=0.995 $X2=0 $Y2=0 +cc_307 N_B1_c_297_n N_A_27_47#_c_798_n 0.00251253f $X=4.71 $Y=1.34 $X2=0 $Y2=0 +cc_308 N_B1_c_294_n N_A_27_47#_c_762_n 0.00514577f $X=7.775 $Y=0.995 $X2=0 $Y2=0 +cc_309 N_B1_c_290_n N_A_27_47#_c_764_n 0.00235806f $X=4.355 $Y=0.995 $X2=0 $Y2=0 +cc_310 N_B1_c_291_n N_A_27_47#_c_764_n 0.0021112f $X=4.835 $Y=0.995 $X2=0 $Y2=0 +cc_311 N_B1_c_292_n N_A_27_47#_c_764_n 0.00232103f $X=5.365 $Y=0.995 $X2=0 $Y2=0 +cc_312 N_B1_c_294_n N_A_27_47#_c_764_n 0.00256483f $X=7.775 $Y=0.995 $X2=0 $Y2=0 +cc_313 N_B1_c_297_n N_A_27_47#_c_764_n 0.00602013f $X=4.71 $Y=1.34 $X2=0 $Y2=0 +cc_314 N_B1_c_294_n N_A_27_47#_c_765_n 8.38249e-19 $X=7.775 $Y=0.995 $X2=0 $Y2=0 +cc_315 N_B1_c_294_n N_A_27_47#_c_766_n 9.94574e-19 $X=7.775 $Y=0.995 $X2=0 $Y2=0 cc_316 N_B1_c_290_n N_VGND_c_893_n 0.00357877f $X=4.355 $Y=0.995 $X2=0 $Y2=0 cc_317 N_B1_c_291_n N_VGND_c_893_n 0.00357877f $X=4.835 $Y=0.995 $X2=0 $Y2=0 cc_318 N_B1_c_292_n N_VGND_c_893_n 0.00357877f $X=5.365 $Y=0.995 $X2=0 $Y2=0 @@ -398,14 +378,14 @@ cc_321 N_B1_c_291_n N_VGND_c_894_n 0.00515079f $X=4.835 $Y=0.995 $X2=0 $Y2=0 cc_322 N_B1_c_292_n N_VGND_c_894_n 0.0050223f $X=5.365 $Y=0.995 $X2=0 $Y2=0 cc_323 N_B1_c_294_n N_VGND_c_894_n 0.00640034f $X=7.775 $Y=0.995 $X2=0 $Y2=0 -cc_324 N_B1_c_290_n N_noxref_12_c_1007_n 0.00265506f $X=4.355 $Y=0.995 $X2=0 +cc_324 N_B1_c_290_n N_A_886_47#_c_1007_n 0.00265506f $X=4.355 $Y=0.995 $X2=0 + $Y2=0 -cc_325 N_B1_c_291_n N_noxref_12_c_1007_n 0.00929367f $X=4.835 $Y=0.995 $X2=0 +cc_325 N_B1_c_291_n N_A_886_47#_c_1007_n 0.00929367f $X=4.835 $Y=0.995 $X2=0 + $Y2=0 -cc_326 N_B1_c_292_n N_noxref_12_c_1007_n 0.011351f $X=5.365 $Y=0.995 $X2=0 $Y2=0 -cc_327 N_B1_c_296_n N_noxref_12_c_1007_n 0.00780733f $X=5.34 $Y=1.202 $X2=0 +cc_326 N_B1_c_292_n N_A_886_47#_c_1007_n 0.011351f $X=5.365 $Y=0.995 $X2=0 $Y2=0 +cc_327 N_B1_c_296_n N_A_886_47#_c_1007_n 0.00780733f $X=5.34 $Y=1.202 $X2=0 + $Y2=0 -cc_328 N_B1_c_297_n N_noxref_12_c_1007_n 0.0680068f $X=4.71 $Y=1.34 $X2=0 $Y2=0 +cc_328 N_B1_c_297_n N_A_886_47#_c_1007_n 0.0680068f $X=4.71 $Y=1.34 $X2=0 $Y2=0 cc_329 N_C1_c_408_n N_VPWR_c_491_n 9.99588e-19 $X=5.81 $Y=1.41 $X2=0 $Y2=0 cc_330 N_C1_c_408_n N_VPWR_c_493_n 0.0106707f $X=5.81 $Y=1.41 $X2=0 $Y2=0 cc_331 N_C1_c_409_n N_VPWR_c_493_n 0.00783855f $X=6.28 $Y=1.41 $X2=0 $Y2=0 @@ -435,17 +415,13 @@ cc_355 N_C1_c_409_n N_Y_c_649_n 0.0135278f $X=6.28 $Y=1.41 $X2=0 $Y2=0 cc_356 N_C1_c_410_n N_Y_c_649_n 0.0130983f $X=6.75 $Y=1.41 $X2=0 $Y2=0 cc_357 N_C1_c_411_n N_Y_c_649_n 0.0134848f $X=7.22 $Y=1.41 $X2=0 $Y2=0 -cc_358 N_C1_c_403_n N_noxref_10_c_798_n 6.02163e-19 $X=5.785 $Y=0.995 $X2=0 -+ $Y2=0 -cc_359 N_C1_c_403_n N_noxref_10_c_764_n 0.00336823f $X=5.785 $Y=0.995 $X2=0 -+ $Y2=0 -cc_360 N_C1_c_404_n N_noxref_10_c_764_n 0.0021087f $X=6.255 $Y=0.995 $X2=0 $Y2=0 -cc_361 N_C1_c_405_n N_noxref_10_c_764_n 0.00212645f $X=6.725 $Y=0.995 $X2=0 -+ $Y2=0 -cc_362 N_C1_c_406_n N_noxref_10_c_764_n 0.00410005f $X=7.245 $Y=0.995 $X2=0 -+ $Y2=0 -cc_363 N_C1_c_412_n N_noxref_10_c_764_n 0.00760746f $X=6.975 $Y=1.16 $X2=0 $Y2=0 -cc_364 N_C1_c_407_n N_noxref_10_c_764_n 0.00397112f $X=7.22 $Y=1.202 $X2=0 $Y2=0 +cc_358 N_C1_c_403_n N_A_27_47#_c_798_n 6.02163e-19 $X=5.785 $Y=0.995 $X2=0 $Y2=0 +cc_359 N_C1_c_403_n N_A_27_47#_c_764_n 0.00336823f $X=5.785 $Y=0.995 $X2=0 $Y2=0 +cc_360 N_C1_c_404_n N_A_27_47#_c_764_n 0.0021087f $X=6.255 $Y=0.995 $X2=0 $Y2=0 +cc_361 N_C1_c_405_n N_A_27_47#_c_764_n 0.00212645f $X=6.725 $Y=0.995 $X2=0 $Y2=0 +cc_362 N_C1_c_406_n N_A_27_47#_c_764_n 0.00410005f $X=7.245 $Y=0.995 $X2=0 $Y2=0 +cc_363 N_C1_c_412_n N_A_27_47#_c_764_n 0.00760746f $X=6.975 $Y=1.16 $X2=0 $Y2=0 +cc_364 N_C1_c_407_n N_A_27_47#_c_764_n 0.00397112f $X=7.22 $Y=1.202 $X2=0 $Y2=0 cc_365 N_C1_c_403_n N_VGND_c_893_n 0.00412276f $X=5.785 $Y=0.995 $X2=0 $Y2=0 cc_366 N_C1_c_404_n N_VGND_c_893_n 0.00361001f $X=6.255 $Y=0.995 $X2=0 $Y2=0 cc_367 N_C1_c_405_n N_VGND_c_893_n 0.00361001f $X=6.725 $Y=0.995 $X2=0 $Y2=0 @@ -454,16 +430,16 @@ cc_370 N_C1_c_404_n N_VGND_c_894_n 0.00499047f $X=6.255 $Y=0.995 $X2=0 $Y2=0 cc_371 N_C1_c_405_n N_VGND_c_894_n 0.00510581f $X=6.725 $Y=0.995 $X2=0 $Y2=0 cc_372 N_C1_c_406_n N_VGND_c_894_n 0.00525824f $X=7.245 $Y=0.995 $X2=0 $Y2=0 -cc_373 N_C1_c_403_n N_noxref_12_c_1007_n 0.0164769f $X=5.785 $Y=0.995 $X2=0 +cc_373 N_C1_c_403_n N_A_886_47#_c_1007_n 0.0164769f $X=5.785 $Y=0.995 $X2=0 + $Y2=0 -cc_374 N_C1_c_404_n N_noxref_12_c_1007_n 0.00945706f $X=6.255 $Y=0.995 $X2=0 +cc_374 N_C1_c_404_n N_A_886_47#_c_1007_n 0.00945706f $X=6.255 $Y=0.995 $X2=0 + $Y2=0 -cc_375 N_C1_c_405_n N_noxref_12_c_1007_n 0.00835265f $X=6.725 $Y=0.995 $X2=0 +cc_375 N_C1_c_405_n N_A_886_47#_c_1007_n 0.00835265f $X=6.725 $Y=0.995 $X2=0 + $Y2=0 -cc_376 N_C1_c_406_n N_noxref_12_c_1007_n 0.00150053f $X=7.245 $Y=0.995 $X2=0 +cc_376 N_C1_c_406_n N_A_886_47#_c_1007_n 0.00150053f $X=7.245 $Y=0.995 $X2=0 + $Y2=0 -cc_377 N_C1_c_412_n N_noxref_12_c_1007_n 0.0363925f $X=6.975 $Y=1.16 $X2=0 $Y2=0 -cc_378 N_C1_c_407_n N_noxref_12_c_1007_n 0.00678446f $X=7.22 $Y=1.202 $X2=0 +cc_377 N_C1_c_412_n N_A_886_47#_c_1007_n 0.0363925f $X=6.975 $Y=1.16 $X2=0 $Y2=0 +cc_378 N_C1_c_407_n N_A_886_47#_c_1007_n 0.00678446f $X=7.22 $Y=1.202 $X2=0 + $Y2=0 cc_379 N_VPWR_c_483_n N_A_118_297#_M1011_d 0.00365219f $X=8.51 $Y=2.72 $X2=-0.19 + $Y2=-0.24 @@ -537,156 +513,127 @@ + $Y2=1.202 cc_429 N_A_118_297#_M1029_s N_Y_c_654_n 3.50153e-19 $X=3.47 $Y=1.485 $X2=1.345 + $Y2=1.16 -cc_430 N_Y_c_668_n N_noxref_10_M15_noxref_d 0.0141187f $X=7.98 $Y=0.74 $X2=0 -+ $Y2=0 -cc_431 N_Y_c_645_n N_noxref_10_M15_noxref_d 0.0033607f $X=8.23 $Y=1.34 $X2=0 -+ $Y2=0 -cc_432 N_Y_c_666_n N_noxref_10_c_798_n 0.004097f $X=7.265 $Y=0.36 $X2=0 $Y2=0 -cc_433 N_Y_c_666_n N_noxref_10_c_762_n 0.00887123f $X=7.265 $Y=0.36 $X2=0 $Y2=0 -cc_434 N_Y_c_667_n N_noxref_10_c_762_n 0.00130172f $X=7.375 $Y=0.655 $X2=0 $Y2=0 -cc_435 N_Y_c_668_n N_noxref_10_c_762_n 0.0244243f $X=7.98 $Y=0.74 $X2=0 $Y2=0 -cc_436 N_Y_M11_noxref_d N_noxref_10_c_764_n 0.00231205f $X=5.86 $Y=0.235 $X2=0 -+ $Y2=0 -cc_437 N_Y_M13_noxref_d N_noxref_10_c_764_n 0.00499996f $X=6.8 $Y=0.235 $X2=0 -+ $Y2=0 -cc_438 N_Y_c_666_n N_noxref_10_c_764_n 0.0329018f $X=7.265 $Y=0.36 $X2=0 $Y2=0 -cc_439 N_Y_c_667_n N_noxref_10_c_764_n 0.0201476f $X=7.375 $Y=0.655 $X2=0 $Y2=0 -cc_440 N_Y_c_668_n N_noxref_10_c_764_n 0.0200613f $X=7.98 $Y=0.74 $X2=0 $Y2=0 +cc_430 N_Y_c_668_n N_A_27_47#_M1018_d 0.0141187f $X=7.98 $Y=0.74 $X2=0 $Y2=0 +cc_431 N_Y_c_645_n N_A_27_47#_M1018_d 0.0033607f $X=8.23 $Y=1.34 $X2=0 $Y2=0 +cc_432 N_Y_c_666_n N_A_27_47#_c_798_n 0.004097f $X=7.265 $Y=0.36 $X2=0 $Y2=0 +cc_433 N_Y_c_666_n N_A_27_47#_c_762_n 0.00887123f $X=7.265 $Y=0.36 $X2=0 $Y2=0 +cc_434 N_Y_c_667_n N_A_27_47#_c_762_n 0.00130172f $X=7.375 $Y=0.655 $X2=0 $Y2=0 +cc_435 N_Y_c_668_n N_A_27_47#_c_762_n 0.0244243f $X=7.98 $Y=0.74 $X2=0 $Y2=0 +cc_436 N_Y_M1005_s N_A_27_47#_c_764_n 0.00231205f $X=5.86 $Y=0.235 $X2=0 $Y2=0 +cc_437 N_Y_M1028_s N_A_27_47#_c_764_n 0.00499996f $X=6.8 $Y=0.235 $X2=0 $Y2=0 +cc_438 N_Y_c_666_n N_A_27_47#_c_764_n 0.0329018f $X=7.265 $Y=0.36 $X2=0 $Y2=0 +cc_439 N_Y_c_667_n N_A_27_47#_c_764_n 0.0201476f $X=7.375 $Y=0.655 $X2=0 $Y2=0 +cc_440 N_Y_c_668_n N_A_27_47#_c_764_n 0.0200613f $X=7.98 $Y=0.74 $X2=0 $Y2=0 cc_441 N_Y_c_666_n N_VGND_c_893_n 0.085761f $X=7.265 $Y=0.36 $X2=0 $Y2=0 cc_442 N_Y_c_668_n N_VGND_c_893_n 0.00326381f $X=7.98 $Y=0.74 $X2=0 $Y2=0 -cc_443 N_Y_M11_noxref_d N_VGND_c_894_n 0.00144449f $X=5.86 $Y=0.235 $X2=0 $Y2=0 -cc_444 N_Y_M13_noxref_d N_VGND_c_894_n 0.00167161f $X=6.8 $Y=0.235 $X2=0 $Y2=0 +cc_443 N_Y_M1005_s N_VGND_c_894_n 0.00144449f $X=5.86 $Y=0.235 $X2=0 $Y2=0 +cc_444 N_Y_M1028_s N_VGND_c_894_n 0.00167161f $X=6.8 $Y=0.235 $X2=0 $Y2=0 cc_445 N_Y_c_666_n N_VGND_c_894_n 0.0155663f $X=7.265 $Y=0.36 $X2=0 $Y2=0 -cc_446 N_Y_c_666_n N_noxref_12_M12_noxref_d 0.00306559f $X=7.265 $Y=0.36 $X2=0 +cc_446 N_Y_c_666_n N_A_886_47#_M1004_d 0.00306559f $X=7.265 $Y=0.36 $X2=0 $Y2=0 +cc_447 N_Y_M1005_s N_A_886_47#_c_1007_n 0.00513447f $X=5.86 $Y=0.235 $X2=0 $Y2=0 +cc_448 N_Y_M1028_s N_A_886_47#_c_1007_n 0.00262923f $X=6.8 $Y=0.235 $X2=0 $Y2=0 +cc_449 N_Y_c_666_n N_A_886_47#_c_1007_n 0.0466828f $X=7.265 $Y=0.36 $X2=0 $Y2=0 +cc_450 N_Y_c_667_n N_A_886_47#_c_1007_n 7.79711e-19 $X=7.375 $Y=0.655 $X2=0 + $Y2=0 -cc_447 N_Y_M11_noxref_d N_noxref_12_c_1007_n 0.00513447f $X=5.86 $Y=0.235 $X2=0 -+ $Y2=0 -cc_448 N_Y_M13_noxref_d N_noxref_12_c_1007_n 0.00262923f $X=6.8 $Y=0.235 $X2=0 -+ $Y2=0 -cc_449 N_Y_c_666_n N_noxref_12_c_1007_n 0.0466828f $X=7.265 $Y=0.36 $X2=0 $Y2=0 -cc_450 N_Y_c_667_n N_noxref_12_c_1007_n 7.79711e-19 $X=7.375 $Y=0.655 $X2=0 -+ $Y2=0 -cc_451 N_Y_c_693_n N_noxref_12_c_1007_n 0.00722787f $X=7.485 $Y=0.74 $X2=0 $Y2=0 -cc_452 N_Y_c_666_n noxref_14 0.00305272f $X=7.265 $Y=0.36 $X2=-0.19 $Y2=-0.24 -cc_453 N_Y_c_667_n noxref_14 0.0028236f $X=7.375 $Y=0.655 $X2=-0.19 $Y2=-0.24 -cc_454 N_Y_c_668_n noxref_14 0.00541918f $X=7.98 $Y=0.74 $X2=-0.19 $Y2=-0.24 -cc_455 N_Y_c_693_n noxref_14 0.00475485f $X=7.485 $Y=0.74 $X2=-0.19 $Y2=-0.24 -cc_456 N_noxref_10_c_760_n N_VGND_M0_noxref_d 0.0022909f $X=1.125 $Y=0.765 -+ $X2=-0.19 $Y2=-0.24 -cc_457 N_noxref_10_c_761_n N_VGND_M2_noxref_d 0.00158f $X=3.48 $Y=0.71 $X2=0 -+ $Y2=0 -cc_458 N_noxref_10_c_764_n N_VGND_M2_noxref_d 0.00201451f $X=8.26 $Y=0.51 $X2=0 -+ $Y2=0 -cc_459 N_noxref_10_c_761_n N_VGND_M4_noxref_d 0.00210124f $X=3.48 $Y=0.71 $X2=0 -+ $Y2=0 -cc_460 N_noxref_10_c_764_n N_VGND_M4_noxref_d 0.00237425f $X=8.26 $Y=0.51 $X2=0 -+ $Y2=0 -cc_461 N_noxref_10_c_772_n N_VGND_M6_noxref_d 0.00869456f $X=4.005 $Y=0.71 $X2=0 -+ $Y2=0 -cc_462 N_noxref_10_c_764_n N_VGND_M6_noxref_d 0.0026406f $X=8.26 $Y=0.51 $X2=0 -+ $Y2=0 -cc_463 N_noxref_10_c_760_n N_VGND_c_888_n 0.00338958f $X=1.125 $Y=0.765 $X2=0 -+ $Y2=0 -cc_464 N_noxref_10_c_761_n N_VGND_c_888_n 0.0104158f $X=3.48 $Y=0.71 $X2=0 $Y2=0 -cc_465 N_noxref_10_c_764_n N_VGND_c_888_n 3.74208e-19 $X=8.26 $Y=0.51 $X2=0 -+ $Y2=0 -cc_466 N_noxref_10_c_784_n N_VGND_c_888_n 8.52016e-19 $X=1.4 $Y=0.51 $X2=0 $Y2=0 -cc_467 N_noxref_10_c_761_n N_VGND_c_889_n 0.0178786f $X=3.48 $Y=0.71 $X2=0 $Y2=0 -cc_468 N_noxref_10_c_764_n N_VGND_c_889_n 0.00817983f $X=8.26 $Y=0.51 $X2=0 -+ $Y2=0 -cc_469 N_noxref_10_c_784_n N_VGND_c_889_n 0.0015315f $X=1.4 $Y=0.51 $X2=0 $Y2=0 -cc_470 N_noxref_10_c_761_n N_VGND_c_890_n 0.00858711f $X=3.48 $Y=0.71 $X2=0 -+ $Y2=0 -cc_471 N_noxref_10_c_764_n N_VGND_c_890_n 0.00177014f $X=8.26 $Y=0.51 $X2=0 -+ $Y2=0 -cc_472 N_noxref_10_c_760_n N_VGND_c_891_n 0.0026054f $X=1.125 $Y=0.765 $X2=0 -+ $Y2=0 -cc_473 N_noxref_10_c_763_n N_VGND_c_891_n 0.00453599f $X=0.355 $Y=0.72 $X2=0 -+ $Y2=0 -cc_474 N_noxref_10_c_761_n N_VGND_c_892_n 0.00853161f $X=3.48 $Y=0.71 $X2=0 -+ $Y2=0 -cc_475 N_noxref_10_c_764_n N_VGND_c_892_n 0.00174721f $X=8.26 $Y=0.51 $X2=0 -+ $Y2=0 -cc_476 N_noxref_10_c_772_n N_VGND_c_893_n 0.00295179f $X=4.005 $Y=0.71 $X2=0 -+ $Y2=0 -cc_477 N_noxref_10_c_781_n N_VGND_c_893_n 0.0147597f $X=4.235 $Y=0.355 $X2=0 -+ $Y2=0 -cc_478 N_noxref_10_c_798_n N_VGND_c_893_n 0.0695034f $X=5.1 $Y=0.365 $X2=0 $Y2=0 -cc_479 N_noxref_10_c_762_n N_VGND_c_893_n 0.0264198f $X=8.32 $Y=0.395 $X2=0 -+ $Y2=0 -cc_480 N_noxref_10_c_764_n N_VGND_c_893_n 0.00510596f $X=8.26 $Y=0.51 $X2=0 -+ $Y2=0 -cc_481 N_noxref_10_c_765_n N_VGND_c_893_n 5.08791e-19 $X=8.405 $Y=0.51 $X2=0 -+ $Y2=0 -cc_482 N_noxref_10_c_766_n N_VGND_c_893_n 0.00838914f $X=8.405 $Y=0.395 $X2=0 -+ $Y2=0 -cc_483 N_noxref_10_M0_noxref_s N_VGND_c_894_n 0.00344766f $X=0.135 $Y=0.235 -+ $X2=0 $Y2=0 -cc_484 N_noxref_10_M1_noxref_d N_VGND_c_894_n 0.00237391f $X=1.03 $Y=0.235 $X2=0 -+ $Y2=0 -cc_485 N_noxref_10_M3_noxref_d N_VGND_c_894_n 0.00194336f $X=1.99 $Y=0.235 $X2=0 -+ $Y2=0 -cc_486 N_noxref_10_M5_noxref_d N_VGND_c_894_n 0.0022674f $X=2.95 $Y=0.235 $X2=0 -+ $Y2=0 -cc_487 N_noxref_10_M7_noxref_d N_VGND_c_894_n 0.00145272f $X=3.97 $Y=0.235 $X2=0 -+ $Y2=0 -cc_488 N_noxref_10_M9_noxref_d N_VGND_c_894_n 0.00171342f $X=4.91 $Y=0.235 $X2=0 -+ $Y2=0 -cc_489 N_noxref_10_M15_noxref_d N_VGND_c_894_n 0.00184732f $X=7.85 $Y=0.235 -+ $X2=0 $Y2=0 -cc_490 N_noxref_10_c_760_n N_VGND_c_894_n 0.0115485f $X=1.125 $Y=0.765 $X2=0 -+ $Y2=0 -cc_491 N_noxref_10_c_761_n N_VGND_c_894_n 0.00107448f $X=3.48 $Y=0.71 $X2=0 -+ $Y2=0 -cc_492 N_noxref_10_c_781_n N_VGND_c_894_n 0.00244609f $X=4.235 $Y=0.355 $X2=0 -+ $Y2=0 -cc_493 N_noxref_10_c_798_n N_VGND_c_894_n 0.011443f $X=5.1 $Y=0.365 $X2=0 $Y2=0 -cc_494 N_noxref_10_c_762_n N_VGND_c_894_n 0.00543455f $X=8.32 $Y=0.395 $X2=0 -+ $Y2=0 -cc_495 N_noxref_10_c_763_n N_VGND_c_894_n 0.00630153f $X=0.355 $Y=0.72 $X2=0 -+ $Y2=0 -cc_496 N_noxref_10_c_764_n N_VGND_c_894_n 0.581415f $X=8.26 $Y=0.51 $X2=0 $Y2=0 -cc_497 N_noxref_10_c_784_n N_VGND_c_894_n 0.0298383f $X=1.4 $Y=0.51 $X2=0 $Y2=0 -cc_498 N_noxref_10_c_765_n N_VGND_c_894_n 0.0288358f $X=8.405 $Y=0.51 $X2=0 -+ $Y2=0 -cc_499 N_noxref_10_c_766_n N_VGND_c_894_n 0.00152175f $X=8.405 $Y=0.395 $X2=0 -+ $Y2=0 -cc_500 N_noxref_10_c_760_n N_VGND_c_895_n 0.0193953f $X=1.125 $Y=0.765 $X2=0 -+ $Y2=0 -cc_501 N_noxref_10_c_761_n N_VGND_c_895_n 9.97233e-19 $X=3.48 $Y=0.71 $X2=0 -+ $Y2=0 -cc_502 N_noxref_10_c_784_n N_VGND_c_895_n 0.00158555f $X=1.4 $Y=0.51 $X2=0 $Y2=0 -cc_503 N_noxref_10_c_761_n N_VGND_c_897_n 0.018283f $X=3.48 $Y=0.71 $X2=0 $Y2=0 -cc_504 N_noxref_10_c_764_n N_VGND_c_897_n 0.00883914f $X=8.26 $Y=0.51 $X2=0 -+ $Y2=0 -cc_505 N_noxref_10_c_772_n N_VGND_c_898_n 0.0149026f $X=4.005 $Y=0.71 $X2=0 -+ $Y2=0 -cc_506 N_noxref_10_c_761_n N_VGND_c_898_n 0.00429609f $X=3.48 $Y=0.71 $X2=0 -+ $Y2=0 -cc_507 N_noxref_10_c_764_n N_VGND_c_898_n 0.00881372f $X=8.26 $Y=0.51 $X2=0 -+ $Y2=0 -cc_508 N_noxref_10_c_798_n N_noxref_12_M8_noxref_d 0.0031236f $X=5.1 $Y=0.365 -+ $X2=-0.19 $Y2=-0.24 -cc_509 N_noxref_10_c_764_n N_noxref_12_M8_noxref_d 0.00236985f $X=8.26 $Y=0.51 -+ $X2=-0.19 $Y2=-0.24 -cc_510 N_noxref_10_c_764_n N_noxref_12_M12_noxref_d 0.0022976f $X=8.26 $Y=0.51 -+ $X2=0 $Y2=0 -cc_511 N_noxref_10_M9_noxref_d N_noxref_12_c_1007_n 0.00520425f $X=4.91 $Y=0.235 -+ $X2=0 $Y2=0 -cc_512 N_noxref_10_c_798_n N_noxref_12_c_1007_n 0.0508149f $X=5.1 $Y=0.365 $X2=0 -+ $Y2=0 -cc_513 N_noxref_10_c_764_n N_noxref_12_c_1007_n 0.0701774f $X=8.26 $Y=0.51 $X2=0 -+ $Y2=0 -cc_514 N_noxref_10_c_764_n noxref_13 0.00331135f $X=8.26 $Y=0.51 $X2=-0.19 +cc_451 N_Y_c_693_n N_A_886_47#_c_1007_n 0.00722787f $X=7.485 $Y=0.74 $X2=0 $Y2=0 +cc_452 N_Y_c_666_n A_1464_47# 0.00305272f $X=7.265 $Y=0.36 $X2=-0.19 $Y2=-0.24 +cc_453 N_Y_c_667_n A_1464_47# 0.0028236f $X=7.375 $Y=0.655 $X2=-0.19 $Y2=-0.24 +cc_454 N_Y_c_668_n A_1464_47# 0.00541918f $X=7.98 $Y=0.74 $X2=-0.19 $Y2=-0.24 +cc_455 N_Y_c_693_n A_1464_47# 0.00475485f $X=7.485 $Y=0.74 $X2=-0.19 $Y2=-0.24 +cc_456 N_A_27_47#_c_760_n N_VGND_M1007_d 0.0022909f $X=1.125 $Y=0.765 $X2=-0.19 + $Y2=-0.24 -cc_515 N_noxref_10_c_764_n noxref_14 0.00279275f $X=8.26 $Y=0.51 $X2=-0.19 -+ $Y2=-0.24 -cc_516 N_VGND_c_894_n N_noxref_12_M8_noxref_d 0.00149584f $X=8.51 $Y=0 $X2=-0.19 -+ $Y2=-0.24 -cc_517 N_VGND_c_894_n N_noxref_12_M12_noxref_d 0.00145358f $X=8.51 $Y=0 $X2=0 +cc_457 N_A_27_47#_c_761_n N_VGND_M1016_d 0.00158f $X=3.48 $Y=0.71 $X2=0 $Y2=0 +cc_458 N_A_27_47#_c_764_n N_VGND_M1016_d 0.00201451f $X=8.26 $Y=0.51 $X2=0 $Y2=0 +cc_459 N_A_27_47#_c_761_n N_VGND_M1003_s 0.00210124f $X=3.48 $Y=0.71 $X2=0 $Y2=0 +cc_460 N_A_27_47#_c_764_n N_VGND_M1003_s 0.00237425f $X=8.26 $Y=0.51 $X2=0 $Y2=0 +cc_461 N_A_27_47#_c_772_n N_VGND_M1030_s 0.00869456f $X=4.005 $Y=0.71 $X2=0 + $Y2=0 -cc_518 N_VGND_c_893_n N_noxref_12_c_1007_n 0.00500307f $X=8.51 $Y=0 $X2=0 $Y2=0 -cc_519 N_VGND_c_894_n noxref_13 0.00156226f $X=8.51 $Y=0 $X2=-0.19 $Y2=-0.24 -cc_520 N_VGND_c_894_n noxref_14 0.00204794f $X=8.51 $Y=0 $X2=-0.19 $Y2=-0.24 -cc_521 N_noxref_12_c_1007_n noxref_13 0.00762341f $X=6.515 $Y=0.725 $X2=0.475 +cc_462 N_A_27_47#_c_764_n N_VGND_M1030_s 0.0026406f $X=8.26 $Y=0.51 $X2=0 $Y2=0 +cc_463 N_A_27_47#_c_760_n N_VGND_c_888_n 0.00338958f $X=1.125 $Y=0.765 $X2=0 ++ $Y2=0 +cc_464 N_A_27_47#_c_761_n N_VGND_c_888_n 0.0104158f $X=3.48 $Y=0.71 $X2=0 $Y2=0 +cc_465 N_A_27_47#_c_764_n N_VGND_c_888_n 3.74208e-19 $X=8.26 $Y=0.51 $X2=0 $Y2=0 +cc_466 N_A_27_47#_c_784_n N_VGND_c_888_n 8.52016e-19 $X=1.4 $Y=0.51 $X2=0 $Y2=0 +cc_467 N_A_27_47#_c_761_n N_VGND_c_889_n 0.0178786f $X=3.48 $Y=0.71 $X2=0 $Y2=0 +cc_468 N_A_27_47#_c_764_n N_VGND_c_889_n 0.00817983f $X=8.26 $Y=0.51 $X2=0 $Y2=0 +cc_469 N_A_27_47#_c_784_n N_VGND_c_889_n 0.0015315f $X=1.4 $Y=0.51 $X2=0 $Y2=0 +cc_470 N_A_27_47#_c_761_n N_VGND_c_890_n 0.00858711f $X=3.48 $Y=0.71 $X2=0 $Y2=0 +cc_471 N_A_27_47#_c_764_n N_VGND_c_890_n 0.00177014f $X=8.26 $Y=0.51 $X2=0 $Y2=0 +cc_472 N_A_27_47#_c_760_n N_VGND_c_891_n 0.0026054f $X=1.125 $Y=0.765 $X2=0 ++ $Y2=0 +cc_473 N_A_27_47#_c_763_n N_VGND_c_891_n 0.00453599f $X=0.355 $Y=0.72 $X2=0 ++ $Y2=0 +cc_474 N_A_27_47#_c_761_n N_VGND_c_892_n 0.00853161f $X=3.48 $Y=0.71 $X2=0 $Y2=0 +cc_475 N_A_27_47#_c_764_n N_VGND_c_892_n 0.00174721f $X=8.26 $Y=0.51 $X2=0 $Y2=0 +cc_476 N_A_27_47#_c_772_n N_VGND_c_893_n 0.00295179f $X=4.005 $Y=0.71 $X2=0 ++ $Y2=0 +cc_477 N_A_27_47#_c_781_n N_VGND_c_893_n 0.0147597f $X=4.235 $Y=0.355 $X2=0 ++ $Y2=0 +cc_478 N_A_27_47#_c_798_n N_VGND_c_893_n 0.0695034f $X=5.1 $Y=0.365 $X2=0 $Y2=0 +cc_479 N_A_27_47#_c_762_n N_VGND_c_893_n 0.0264198f $X=8.32 $Y=0.395 $X2=0 $Y2=0 +cc_480 N_A_27_47#_c_764_n N_VGND_c_893_n 0.00510596f $X=8.26 $Y=0.51 $X2=0 $Y2=0 +cc_481 N_A_27_47#_c_765_n N_VGND_c_893_n 5.08791e-19 $X=8.405 $Y=0.51 $X2=0 ++ $Y2=0 +cc_482 N_A_27_47#_c_766_n N_VGND_c_893_n 0.00838914f $X=8.405 $Y=0.395 $X2=0 ++ $Y2=0 +cc_483 N_A_27_47#_M1007_s N_VGND_c_894_n 0.00344766f $X=0.135 $Y=0.235 $X2=0 ++ $Y2=0 +cc_484 N_A_27_47#_M1015_s N_VGND_c_894_n 0.00237391f $X=1.03 $Y=0.235 $X2=0 ++ $Y2=0 +cc_485 N_A_27_47#_M1000_d N_VGND_c_894_n 0.00194336f $X=1.99 $Y=0.235 $X2=0 ++ $Y2=0 +cc_486 N_A_27_47#_M1026_d N_VGND_c_894_n 0.0022674f $X=2.95 $Y=0.235 $X2=0 $Y2=0 +cc_487 N_A_27_47#_M1022_s N_VGND_c_894_n 0.00145272f $X=3.97 $Y=0.235 $X2=0 ++ $Y2=0 +cc_488 N_A_27_47#_M1013_d N_VGND_c_894_n 0.00171342f $X=4.91 $Y=0.235 $X2=0 ++ $Y2=0 +cc_489 N_A_27_47#_M1018_d N_VGND_c_894_n 0.00184732f $X=7.85 $Y=0.235 $X2=0 ++ $Y2=0 +cc_490 N_A_27_47#_c_760_n N_VGND_c_894_n 0.0115485f $X=1.125 $Y=0.765 $X2=0 ++ $Y2=0 +cc_491 N_A_27_47#_c_761_n N_VGND_c_894_n 0.00107448f $X=3.48 $Y=0.71 $X2=0 $Y2=0 +cc_492 N_A_27_47#_c_781_n N_VGND_c_894_n 0.00244609f $X=4.235 $Y=0.355 $X2=0 ++ $Y2=0 +cc_493 N_A_27_47#_c_798_n N_VGND_c_894_n 0.011443f $X=5.1 $Y=0.365 $X2=0 $Y2=0 +cc_494 N_A_27_47#_c_762_n N_VGND_c_894_n 0.00543455f $X=8.32 $Y=0.395 $X2=0 ++ $Y2=0 +cc_495 N_A_27_47#_c_763_n N_VGND_c_894_n 0.00630153f $X=0.355 $Y=0.72 $X2=0 ++ $Y2=0 +cc_496 N_A_27_47#_c_764_n N_VGND_c_894_n 0.581415f $X=8.26 $Y=0.51 $X2=0 $Y2=0 +cc_497 N_A_27_47#_c_784_n N_VGND_c_894_n 0.0298383f $X=1.4 $Y=0.51 $X2=0 $Y2=0 +cc_498 N_A_27_47#_c_765_n N_VGND_c_894_n 0.0288358f $X=8.405 $Y=0.51 $X2=0 $Y2=0 +cc_499 N_A_27_47#_c_766_n N_VGND_c_894_n 0.00152175f $X=8.405 $Y=0.395 $X2=0 ++ $Y2=0 +cc_500 N_A_27_47#_c_760_n N_VGND_c_895_n 0.0193953f $X=1.125 $Y=0.765 $X2=0 ++ $Y2=0 +cc_501 N_A_27_47#_c_761_n N_VGND_c_895_n 9.97233e-19 $X=3.48 $Y=0.71 $X2=0 $Y2=0 +cc_502 N_A_27_47#_c_784_n N_VGND_c_895_n 0.00158555f $X=1.4 $Y=0.51 $X2=0 $Y2=0 +cc_503 N_A_27_47#_c_761_n N_VGND_c_897_n 0.018283f $X=3.48 $Y=0.71 $X2=0 $Y2=0 +cc_504 N_A_27_47#_c_764_n N_VGND_c_897_n 0.00883914f $X=8.26 $Y=0.51 $X2=0 $Y2=0 +cc_505 N_A_27_47#_c_772_n N_VGND_c_898_n 0.0149026f $X=4.005 $Y=0.71 $X2=0 $Y2=0 +cc_506 N_A_27_47#_c_761_n N_VGND_c_898_n 0.00429609f $X=3.48 $Y=0.71 $X2=0 $Y2=0 +cc_507 N_A_27_47#_c_764_n N_VGND_c_898_n 0.00881372f $X=8.26 $Y=0.51 $X2=0 $Y2=0 +cc_508 N_A_27_47#_c_798_n N_A_886_47#_M1008_s 0.0031236f $X=5.1 $Y=0.365 ++ $X2=-0.19 $Y2=-0.24 +cc_509 N_A_27_47#_c_764_n N_A_886_47#_M1008_s 0.00236985f $X=8.26 $Y=0.51 ++ $X2=-0.19 $Y2=-0.24 +cc_510 N_A_27_47#_c_764_n N_A_886_47#_M1004_d 0.0022976f $X=8.26 $Y=0.51 $X2=0 ++ $Y2=0 +cc_511 N_A_27_47#_M1013_d N_A_886_47#_c_1007_n 0.00520425f $X=4.91 $Y=0.235 ++ $X2=0 $Y2=0 +cc_512 N_A_27_47#_c_798_n N_A_886_47#_c_1007_n 0.0508149f $X=5.1 $Y=0.365 $X2=0 ++ $Y2=0 +cc_513 N_A_27_47#_c_764_n N_A_886_47#_c_1007_n 0.0701774f $X=8.26 $Y=0.51 $X2=0 ++ $Y2=0 +cc_514 N_A_27_47#_c_764_n A_1088_47# 0.00331135f $X=8.26 $Y=0.51 $X2=-0.19 ++ $Y2=-0.24 +cc_515 N_A_27_47#_c_764_n A_1464_47# 0.00279275f $X=8.26 $Y=0.51 $X2=-0.19 ++ $Y2=-0.24 +cc_516 N_VGND_c_894_n N_A_886_47#_M1008_s 0.00149584f $X=8.51 $Y=0 $X2=-0.19 ++ $Y2=-0.24 +cc_517 N_VGND_c_894_n N_A_886_47#_M1004_d 0.00145358f $X=8.51 $Y=0 $X2=0 $Y2=0 +cc_518 N_VGND_c_893_n N_A_886_47#_c_1007_n 0.00500307f $X=8.51 $Y=0 $X2=0 $Y2=0 +cc_519 N_VGND_c_894_n A_1088_47# 0.00156226f $X=8.51 $Y=0 $X2=-0.19 $Y2=-0.24 +cc_520 N_VGND_c_894_n A_1464_47# 0.00204794f $X=8.51 $Y=0 $X2=-0.19 $Y2=-0.24 +cc_521 N_A_886_47#_c_1007_n A_1088_47# 0.00762341f $X=6.515 $Y=0.725 $X2=0.475 + $Y2=0.995
diff --git a/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.spice b/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.spice index f23d1cc..b7788bf 100644 --- a/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.spice +++ b/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o211ai_4.spice -* Created: Thu Aug 27 19:18:45 2020 +* Created: Wed Sep 2 08:42:54 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * @@ -15,54 +15,54 @@ * A1 A1 * VPB VPB * VNB VNB -MM0_noxref N_VGND_M0_noxref_d N_A1_M0_noxref_g N_noxref_10_M0_noxref_s VNB -+ NSHORT L=0.15 W=0.65 AD=0.10725 AS=0.17225 PD=0.98 PS=1.83 NRD=9.228 NRS=0 M=1 -+ R=4.33333 SA=75000.2 SB=75007.6 A=0.0975 P=1.6 MULT=1 -MM1_noxref N_noxref_10_M1_noxref_d N_A1_M1_noxref_g N_VGND_M0_noxref_d VNB -+ NSHORT L=0.15 W=0.65 AD=0.1235 AS=0.10725 PD=1.03 PS=0.98 NRD=9.228 NRS=0 M=1 -+ R=4.33333 SA=75000.7 SB=75007.1 A=0.0975 P=1.6 MULT=1 -MM2_noxref N_VGND_M2_noxref_d N_A1_M2_noxref_g N_noxref_10_M1_noxref_d VNB -+ NSHORT L=0.15 W=0.65 AD=0.091 AS=0.1235 PD=0.93 PS=1.03 NRD=0 NRS=9.228 M=1 -+ R=4.33333 SA=75001.2 SB=75006.6 A=0.0975 P=1.6 MULT=1 -MM3_noxref N_noxref_10_M3_noxref_d N_A2_M3_noxref_g N_VGND_M2_noxref_d VNB -+ NSHORT L=0.15 W=0.65 AD=0.10725 AS=0.091 PD=0.98 PS=0.93 NRD=9.228 NRS=0 M=1 -+ R=4.33333 SA=75001.6 SB=75006.2 A=0.0975 P=1.6 MULT=1 -MM4_noxref N_VGND_M4_noxref_d N_A2_M4_noxref_g N_noxref_10_M3_noxref_d VNB -+ NSHORT L=0.15 W=0.65 AD=0.10725 AS=0.10725 PD=0.98 PS=0.98 NRD=9.228 NRS=0 M=1 -+ R=4.33333 SA=75002.1 SB=75005.7 A=0.0975 P=1.6 MULT=1 -MM5_noxref N_noxref_10_M5_noxref_d N_A2_M5_noxref_g N_VGND_M4_noxref_d VNB -+ NSHORT L=0.15 W=0.65 AD=0.1235 AS=0.10725 PD=1.03 PS=0.98 NRD=9.228 NRS=0 M=1 -+ R=4.33333 SA=75002.6 SB=75005.2 A=0.0975 P=1.6 MULT=1 -MM6_noxref N_VGND_M6_noxref_d N_A2_M6_noxref_g N_noxref_10_M5_noxref_d VNB -+ NSHORT L=0.15 W=0.65 AD=0.1105 AS=0.1235 PD=0.99 PS=1.03 NRD=0 NRS=9.228 M=1 -+ R=4.33333 SA=75003.1 SB=75004.7 A=0.0975 P=1.6 MULT=1 -MM7_noxref N_noxref_10_M7_noxref_d N_A1_M7_noxref_g N_VGND_M6_noxref_d VNB -+ NSHORT L=0.15 W=0.65 AD=0.10075 AS=0.1105 PD=0.96 PS=0.99 NRD=1.836 NRS=11.076 -+ M=1 R=4.33333 SA=75003.6 SB=75004.2 A=0.0975 P=1.6 MULT=1 -MM8_noxref N_noxref_12_M8_noxref_d N_B1_M8_noxref_g N_noxref_10_M7_noxref_d VNB -+ NSHORT L=0.15 W=0.65 AD=0.10725 AS=0.10075 PD=0.98 PS=0.96 NRD=9.228 NRS=3.684 -+ M=1 R=4.33333 SA=75004.1 SB=75003.7 A=0.0975 P=1.6 MULT=1 -MM9_noxref N_noxref_10_M9_noxref_d N_B1_M9_noxref_g N_noxref_12_M8_noxref_d VNB -+ NSHORT L=0.15 W=0.65 AD=0.1235 AS=0.10725 PD=1.03 PS=0.98 NRD=9.228 NRS=0 M=1 -+ R=4.33333 SA=75004.5 SB=75003.3 A=0.0975 P=1.6 MULT=1 -MM10_noxref noxref_13 N_B1_M10_noxref_g N_noxref_10_M9_noxref_d VNB NSHORT -+ L=0.15 W=0.65 AD=0.08775 AS=0.1235 PD=0.92 PS=1.03 NRD=14.76 NRS=9.228 M=1 -+ R=4.33333 SA=75005.1 SB=75002.7 A=0.0975 P=1.6 MULT=1 -MM11_noxref N_Y_M11_noxref_d N_C1_M11_noxref_g noxref_13 VNB NSHORT L=0.15 -+ W=0.65 AD=0.104 AS=0.08775 PD=0.97 PS=0.92 NRD=8.304 NRS=14.76 M=1 R=4.33333 -+ SA=75005.5 SB=75002.3 A=0.0975 P=1.6 MULT=1 -MM12_noxref N_noxref_12_M12_noxref_d N_C1_M12_noxref_g N_Y_M11_noxref_d VNB -+ NSHORT L=0.15 W=0.65 AD=0.104 AS=0.104 PD=0.97 PS=0.97 NRD=8.304 NRS=0 M=1 -+ R=4.33333 SA=75006 SB=75001.8 A=0.0975 P=1.6 MULT=1 -MM13_noxref N_Y_M13_noxref_d N_C1_M13_noxref_g N_noxref_12_M12_noxref_d VNB -+ NSHORT L=0.15 W=0.65 AD=0.12025 AS=0.104 PD=1.02 PS=0.97 NRD=8.304 NRS=0 M=1 -+ R=4.33333 SA=75006.4 SB=75001.4 A=0.0975 P=1.6 MULT=1 -MM14_noxref noxref_14 N_C1_M14_noxref_g N_Y_M13_noxref_d VNB NSHORT L=0.15 -+ W=0.65 AD=0.1235 AS=0.12025 PD=1.03 PS=1.02 NRD=24.912 NRS=8.304 M=1 R=4.33333 -+ SA=75007 SB=75000.8 A=0.0975 P=1.6 MULT=1 -MM15_noxref N_noxref_10_M15_noxref_d N_B1_M15_noxref_g noxref_14 VNB NSHORT -+ L=0.15 W=0.65 AD=0.25675 AS=0.1235 PD=2.09 PS=1.03 NRD=0 NRS=24.912 M=1 -+ R=4.33333 SA=75007.5 SB=75000.3 A=0.0975 P=1.6 MULT=1 +MM1007 N_VGND_M1007_d N_A1_M1007_g N_A_27_47#_M1007_s VNB NSHORT L=0.15 W=0.65 ++ AD=0.10725 AS=0.17225 PD=0.98 PS=1.83 NRD=9.228 NRS=0 M=1 R=4.33333 SA=75000.2 ++ SB=75007.6 A=0.0975 P=1.6 MULT=1 +MM1015 N_VGND_M1007_d N_A1_M1015_g N_A_27_47#_M1015_s VNB NSHORT L=0.15 W=0.65 ++ AD=0.10725 AS=0.1235 PD=0.98 PS=1.03 NRD=0 NRS=9.228 M=1 R=4.33333 SA=75000.7 ++ SB=75007.1 A=0.0975 P=1.6 MULT=1 +MM1016 N_VGND_M1016_d N_A1_M1016_g N_A_27_47#_M1015_s VNB NSHORT L=0.15 W=0.65 ++ AD=0.091 AS=0.1235 PD=0.93 PS=1.03 NRD=0 NRS=9.228 M=1 R=4.33333 SA=75001.2 ++ SB=75006.6 A=0.0975 P=1.6 MULT=1 +MM1000 N_A_27_47#_M1000_d N_A2_M1000_g N_VGND_M1016_d VNB NSHORT L=0.15 W=0.65 ++ AD=0.10725 AS=0.091 PD=0.98 PS=0.93 NRD=9.228 NRS=0 M=1 R=4.33333 SA=75001.6 ++ SB=75006.2 A=0.0975 P=1.6 MULT=1 +MM1003 N_A_27_47#_M1000_d N_A2_M1003_g N_VGND_M1003_s VNB NSHORT L=0.15 W=0.65 ++ AD=0.10725 AS=0.10725 PD=0.98 PS=0.98 NRD=0 NRS=9.228 M=1 R=4.33333 SA=75002.1 ++ SB=75005.7 A=0.0975 P=1.6 MULT=1 +MM1026 N_A_27_47#_M1026_d N_A2_M1026_g N_VGND_M1003_s VNB NSHORT L=0.15 W=0.65 ++ AD=0.1235 AS=0.10725 PD=1.03 PS=0.98 NRD=9.228 NRS=0 M=1 R=4.33333 SA=75002.6 ++ SB=75005.2 A=0.0975 P=1.6 MULT=1 +MM1030 N_A_27_47#_M1026_d N_A2_M1030_g N_VGND_M1030_s VNB NSHORT L=0.15 W=0.65 ++ AD=0.1235 AS=0.1105 PD=1.03 PS=0.99 NRD=9.228 NRS=0 M=1 R=4.33333 SA=75003.1 ++ SB=75004.7 A=0.0975 P=1.6 MULT=1 +MM1022 N_VGND_M1030_s N_A1_M1022_g N_A_27_47#_M1022_s VNB NSHORT L=0.15 W=0.65 ++ AD=0.1105 AS=0.10075 PD=0.99 PS=0.96 NRD=11.076 NRS=1.836 M=1 R=4.33333 ++ SA=75003.6 SB=75004.2 A=0.0975 P=1.6 MULT=1 +MM1008 N_A_27_47#_M1022_s N_B1_M1008_g N_A_886_47#_M1008_s VNB NSHORT L=0.15 ++ W=0.65 AD=0.10075 AS=0.10725 PD=0.96 PS=0.98 NRD=3.684 NRS=9.228 M=1 R=4.33333 ++ SA=75004.1 SB=75003.7 A=0.0975 P=1.6 MULT=1 +MM1013 N_A_27_47#_M1013_d N_B1_M1013_g N_A_886_47#_M1008_s VNB NSHORT L=0.15 ++ W=0.65 AD=0.1235 AS=0.10725 PD=1.03 PS=0.98 NRD=9.228 NRS=0 M=1 R=4.33333 ++ SA=75004.5 SB=75003.3 A=0.0975 P=1.6 MULT=1 +MM1010 N_A_27_47#_M1013_d N_B1_M1010_g A_1088_47# VNB NSHORT L=0.15 W=0.65 ++ AD=0.1235 AS=0.08775 PD=1.03 PS=0.92 NRD=9.228 NRS=14.76 M=1 R=4.33333 ++ SA=75005.1 SB=75002.7 A=0.0975 P=1.6 MULT=1 +MM1005 A_1088_47# N_C1_M1005_g N_Y_M1005_s VNB NSHORT L=0.15 W=0.65 AD=0.08775 ++ AS=0.104 PD=0.92 PS=0.97 NRD=14.76 NRS=8.304 M=1 R=4.33333 SA=75005.5 ++ SB=75002.3 A=0.0975 P=1.6 MULT=1 +MM1004 N_A_886_47#_M1004_d N_C1_M1004_g N_Y_M1005_s VNB NSHORT L=0.15 W=0.65 ++ AD=0.104 AS=0.104 PD=0.97 PS=0.97 NRD=8.304 NRS=0 M=1 R=4.33333 SA=75006 ++ SB=75001.8 A=0.0975 P=1.6 MULT=1 +MM1028 N_A_886_47#_M1004_d N_C1_M1028_g N_Y_M1028_s VNB NSHORT L=0.15 W=0.65 ++ AD=0.104 AS=0.12025 PD=0.97 PS=1.02 NRD=0 NRS=8.304 M=1 R=4.33333 SA=75006.4 ++ SB=75001.4 A=0.0975 P=1.6 MULT=1 +MM1020 A_1464_47# N_C1_M1020_g N_Y_M1028_s VNB NSHORT L=0.15 W=0.65 AD=0.1235 ++ AS=0.12025 PD=1.03 PS=1.02 NRD=24.912 NRS=8.304 M=1 R=4.33333 SA=75007 ++ SB=75000.8 A=0.0975 P=1.6 MULT=1 +MM1018 N_A_27_47#_M1018_d N_B1_M1018_g A_1464_47# VNB NSHORT L=0.15 W=0.65 ++ AD=0.25675 AS=0.1235 PD=2.09 PS=1.03 NRD=0 NRS=24.912 M=1 R=4.33333 SA=75007.5 ++ SB=75000.3 A=0.0975 P=1.6 MULT=1 MM1011 N_A_118_297#_M1011_d N_A1_M1011_g N_VPWR_M1011_s VPB PHIGHVT L=0.18 W=1 + AD=0.15 AS=0.275 PD=1.3 PS=2.55 NRD=1.9503 NRS=1.9503 M=1 R=5.55556 SA=90000.2 + SB=90007.8 A=0.18 P=2.36 MULT=1
diff --git a/cells/o21a/sky130_fd_sc_hdll__o21a_1.lvs.report b/cells/o21a/sky130_fd_sc_hdll__o21a_1.lvs.report new file mode 100644 index 0000000..99c1499 --- /dev/null +++ b/cells/o21a/sky130_fd_sc_hdll__o21a_1.lvs.report
@@ -0,0 +1,484 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_1.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o21a_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o21a_1.sp ('sky130_fd_sc_hdll__o21a_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_1.spice ('sky130_fd_sc_hdll__o21a_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:42:58 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o21a_1 sky130_fd_sc_hdll__o21a_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o21a_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__o21a_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 12 11 * + + Instances: 4 4 MN (4 pins) + 4 4 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 10 8 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 9 9 + + Instances: 1 1 MN (4 pins) + 2 2 MP (4 pins) + 1 1 SMP2 (4 pins) + 1 1 SPMN_2_1 (5 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 9 9 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + 1 1 0 0 SMP2 + 1 1 0 0 SPMN_2_1 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB B1 A2 A1 X VPWR VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o21a/sky130_fd_sc_hdll__o21a_1.pex.spice b/cells/o21a/sky130_fd_sc_hdll__o21a_1.pex.spice index c76d2bf..0ed9aa6 100644 --- a/cells/o21a/sky130_fd_sc_hdll__o21a_1.pex.spice +++ b/cells/o21a/sky130_fd_sc_hdll__o21a_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o21a_1.pex.spice -* Created: Thu Aug 27 19:18:52 2020 +* Created: Wed Sep 2 08:43:02 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o21a/sky130_fd_sc_hdll__o21a_1.pxi.spice b/cells/o21a/sky130_fd_sc_hdll__o21a_1.pxi.spice index 66688ab..64a4411 100644 --- a/cells/o21a/sky130_fd_sc_hdll__o21a_1.pxi.spice +++ b/cells/o21a/sky130_fd_sc_hdll__o21a_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o21a_1.pxi.spice -* Created: Thu Aug 27 19:18:52 2020 +* Created: Wed Sep 2 08:43:02 2020 * x_PM_SKY130_FD_SC_HDLL__O21A_1%A_83_21# N_A_83_21#_M1003_s N_A_83_21#_M1005_d + N_A_83_21#_c_46_n N_A_83_21#_M1002_g N_A_83_21#_c_47_n N_A_83_21#_M1000_g
diff --git a/cells/o21a/sky130_fd_sc_hdll__o21a_1.spice b/cells/o21a/sky130_fd_sc_hdll__o21a_1.spice index d109822..97da1e5 100644 --- a/cells/o21a/sky130_fd_sc_hdll__o21a_1.spice +++ b/cells/o21a/sky130_fd_sc_hdll__o21a_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o21a_1.spice -* Created: Thu Aug 27 19:18:52 2020 +* Created: Wed Sep 2 08:43:02 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o21a/sky130_fd_sc_hdll__o21a_2.lvs.report b/cells/o21a/sky130_fd_sc_hdll__o21a_2.lvs.report new file mode 100644 index 0000000..ff3fb1a --- /dev/null +++ b/cells/o21a/sky130_fd_sc_hdll__o21a_2.lvs.report
@@ -0,0 +1,491 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_2.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o21a_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o21a_2.sp ('sky130_fd_sc_hdll__o21a_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_2.spice ('sky130_fd_sc_hdll__o21a_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:43:06 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o21a_2 sky130_fd_sc_hdll__o21a_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o21a_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__o21a_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 12 11 * + + Instances: 5 5 MN (4 pins) + 5 5 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 12 10 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 9 9 + + Instances: 1 1 MN (4 pins) + 2 2 MP (4 pins) + 1 1 SMP2 (4 pins) + 1 1 SPMN_2_1 (5 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 9 9 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + 1 1 0 0 SMP2 + 1 1 0 0 SPMN_2_1 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB B1 A2 A1 VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o21a/sky130_fd_sc_hdll__o21a_2.pex.spice b/cells/o21a/sky130_fd_sc_hdll__o21a_2.pex.spice index 1f951a8..78f1564 100644 --- a/cells/o21a/sky130_fd_sc_hdll__o21a_2.pex.spice +++ b/cells/o21a/sky130_fd_sc_hdll__o21a_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o21a_2.pex.spice -* Created: Thu Aug 27 19:18:59 2020 +* Created: Wed Sep 2 08:43:09 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o21a/sky130_fd_sc_hdll__o21a_2.pxi.spice b/cells/o21a/sky130_fd_sc_hdll__o21a_2.pxi.spice index 116a60c..2886439 100644 --- a/cells/o21a/sky130_fd_sc_hdll__o21a_2.pxi.spice +++ b/cells/o21a/sky130_fd_sc_hdll__o21a_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o21a_2.pxi.spice -* Created: Thu Aug 27 19:18:59 2020 +* Created: Wed Sep 2 08:43:09 2020 * x_PM_SKY130_FD_SC_HDLL__O21A_2%A_79_21# N_A_79_21#_M1002_s N_A_79_21#_M1000_d + N_A_79_21#_c_51_n N_A_79_21#_M1005_g N_A_79_21#_c_59_n N_A_79_21#_M1001_g
diff --git a/cells/o21a/sky130_fd_sc_hdll__o21a_2.spice b/cells/o21a/sky130_fd_sc_hdll__o21a_2.spice index 35c7797..982032e 100644 --- a/cells/o21a/sky130_fd_sc_hdll__o21a_2.spice +++ b/cells/o21a/sky130_fd_sc_hdll__o21a_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o21a_2.spice -* Created: Thu Aug 27 19:18:59 2020 +* Created: Wed Sep 2 08:43:09 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o21a/sky130_fd_sc_hdll__o21a_4.lvs.report b/cells/o21a/sky130_fd_sc_hdll__o21a_4.lvs.report new file mode 100644 index 0000000..c01fb92 --- /dev/null +++ b/cells/o21a/sky130_fd_sc_hdll__o21a_4.lvs.report
@@ -0,0 +1,500 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_4.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o21a_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o21a_4.sp ('sky130_fd_sc_hdll__o21a_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21a/sky130_fd_sc_hdll__o21a_4.spice ('sky130_fd_sc_hdll__o21a_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:43:13 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o21a_4 sky130_fd_sc_hdll__o21a_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o21a_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__o21a_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 12 12 + + Instances: 10 10 MN (4 pins) + 10 10 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 21 20 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 9 9 + + Instances: 1 1 MN (4 pins) + 2 2 MP (4 pins) + 1 1 SMP2 (4 pins) + 1 1 SPMN_2_1 (5 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 9 9 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + 1 1 0 0 SMP2 + 1 1 0 0 SPMN_2_1 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 20 layout mos transistors were reduced to 8. 1 connecting net was deleted. + 10 mos transistors were deleted by parallel reduction. + 2 mos transistors and 1 connecting net were deleted by split-gate reduction. + 20 source mos transistors were reduced to 8. 1 connecting net was deleted. + 10 mos transistors were deleted by parallel reduction. + 2 mos transistors and 1 connecting net were deleted by split-gate reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB B1 A1 A2 VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o21a/sky130_fd_sc_hdll__o21a_4.pex.spice b/cells/o21a/sky130_fd_sc_hdll__o21a_4.pex.spice index 0f65bb6..b3571e0 100644 --- a/cells/o21a/sky130_fd_sc_hdll__o21a_4.pex.spice +++ b/cells/o21a/sky130_fd_sc_hdll__o21a_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o21a_4.pex.spice -* Created: Thu Aug 27 19:19:06 2020 +* Created: Wed Sep 2 08:43:16 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o21a/sky130_fd_sc_hdll__o21a_4.pxi.spice b/cells/o21a/sky130_fd_sc_hdll__o21a_4.pxi.spice index 332ecdc..0722587 100644 --- a/cells/o21a/sky130_fd_sc_hdll__o21a_4.pxi.spice +++ b/cells/o21a/sky130_fd_sc_hdll__o21a_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o21a_4.pxi.spice -* Created: Thu Aug 27 19:19:06 2020 +* Created: Wed Sep 2 08:43:16 2020 * x_PM_SKY130_FD_SC_HDLL__O21A_4%A_80_21# N_A_80_21#_M1013_s N_A_80_21#_M1001_d + N_A_80_21#_M1004_s N_A_80_21#_c_79_n N_A_80_21#_M1005_g N_A_80_21#_c_86_n
diff --git a/cells/o21a/sky130_fd_sc_hdll__o21a_4.spice b/cells/o21a/sky130_fd_sc_hdll__o21a_4.spice index 721b19a..172000d 100644 --- a/cells/o21a/sky130_fd_sc_hdll__o21a_4.spice +++ b/cells/o21a/sky130_fd_sc_hdll__o21a_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o21a_4.spice -* Created: Thu Aug 27 19:19:06 2020 +* Created: Wed Sep 2 08:43:16 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o21ai/sky130_fd_sc_hdll__o21ai_1.lvs.report b/cells/o21ai/sky130_fd_sc_hdll__o21ai_1.lvs.report new file mode 100644 index 0000000..968b524 --- /dev/null +++ b/cells/o21ai/sky130_fd_sc_hdll__o21ai_1.lvs.report
@@ -0,0 +1,477 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_1.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o21ai_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o21ai_1.sp ('sky130_fd_sc_hdll__o21ai_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_1.spice ('sky130_fd_sc_hdll__o21ai_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:43:20 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o21ai_1 sky130_fd_sc_hdll__o21ai_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o21ai_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__o21ai_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 10 10 + + Instances: 3 3 MN (4 pins) + 3 3 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 7 6 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 8 8 + + Instances: 1 1 MP (4 pins) + 1 1 SMP2 (4 pins) + 1 1 SPMN_2_1 (5 pins) + ------ ------ + Total Inst: 3 3 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 8 8 0 0 + + Instances: 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMP2 + 1 1 0 0 SPMN_2_1 + ------- ------- --------- --------- + Total Inst: 3 3 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB A1 A2 B1 VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o21ai/sky130_fd_sc_hdll__o21ai_1.pex.spice b/cells/o21ai/sky130_fd_sc_hdll__o21ai_1.pex.spice index 0a4b6c0..4c9a851 100644 --- a/cells/o21ai/sky130_fd_sc_hdll__o21ai_1.pex.spice +++ b/cells/o21ai/sky130_fd_sc_hdll__o21ai_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o21ai_1.pex.spice -* Created: Thu Aug 27 19:19:13 2020 +* Created: Wed Sep 2 08:43:24 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o21ai/sky130_fd_sc_hdll__o21ai_1.pxi.spice b/cells/o21ai/sky130_fd_sc_hdll__o21ai_1.pxi.spice index e8fe135..92af2a0 100644 --- a/cells/o21ai/sky130_fd_sc_hdll__o21ai_1.pxi.spice +++ b/cells/o21ai/sky130_fd_sc_hdll__o21ai_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o21ai_1.pxi.spice -* Created: Thu Aug 27 19:19:13 2020 +* Created: Wed Sep 2 08:43:24 2020 * x_PM_SKY130_FD_SC_HDLL__O21AI_1%A1 N_A1_c_36_n N_A1_M1002_g N_A1_c_37_n + N_A1_M1005_g A1 N_A1_c_38_n PM_SKY130_FD_SC_HDLL__O21AI_1%A1
diff --git a/cells/o21ai/sky130_fd_sc_hdll__o21ai_1.spice b/cells/o21ai/sky130_fd_sc_hdll__o21ai_1.spice index 24b444d..b633880 100644 --- a/cells/o21ai/sky130_fd_sc_hdll__o21ai_1.spice +++ b/cells/o21ai/sky130_fd_sc_hdll__o21ai_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o21ai_1.spice -* Created: Thu Aug 27 19:19:13 2020 +* Created: Wed Sep 2 08:43:24 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o21ai/sky130_fd_sc_hdll__o21ai_2.lvs.report b/cells/o21ai/sky130_fd_sc_hdll__o21ai_2.lvs.report new file mode 100644 index 0000000..73c5ed2 --- /dev/null +++ b/cells/o21ai/sky130_fd_sc_hdll__o21ai_2.lvs.report
@@ -0,0 +1,491 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_2.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o21ai_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o21ai_2.sp ('sky130_fd_sc_hdll__o21ai_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_2.spice ('sky130_fd_sc_hdll__o21ai_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:43:28 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o21ai_2 sky130_fd_sc_hdll__o21ai_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o21ai_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__o21ai_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 11 10 * + + Instances: 6 6 MN (4 pins) + 6 6 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 14 12 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 8 8 + + Instances: 1 1 MP (4 pins) + 1 1 SMP2 (4 pins) + 1 1 SPMN_2_1 (5 pins) + ------ ------ + Total Inst: 3 3 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 8 8 0 0 + + Instances: 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMP2 + 1 1 0 0 SPMN_2_1 + ------- ------- --------- --------- + Total Inst: 3 3 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 12 layout mos transistors were reduced to 6. + 6 mos transistors were deleted by parallel reduction. + 12 source mos transistors were reduced to 6. + 6 mos transistors were deleted by parallel reduction. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A1 A2 B1 VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o21ai/sky130_fd_sc_hdll__o21ai_2.pex.spice b/cells/o21ai/sky130_fd_sc_hdll__o21ai_2.pex.spice index 8b8796f..a50d9f0 100644 --- a/cells/o21ai/sky130_fd_sc_hdll__o21ai_2.pex.spice +++ b/cells/o21ai/sky130_fd_sc_hdll__o21ai_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o21ai_2.pex.spice -* Created: Thu Aug 27 19:19:20 2020 +* Created: Wed Sep 2 08:43:31 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o21ai/sky130_fd_sc_hdll__o21ai_2.pxi.spice b/cells/o21ai/sky130_fd_sc_hdll__o21ai_2.pxi.spice index 006c807..4252532 100644 --- a/cells/o21ai/sky130_fd_sc_hdll__o21ai_2.pxi.spice +++ b/cells/o21ai/sky130_fd_sc_hdll__o21ai_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o21ai_2.pxi.spice -* Created: Thu Aug 27 19:19:20 2020 +* Created: Wed Sep 2 08:43:31 2020 * x_PM_SKY130_FD_SC_HDLL__O21AI_2%A1 N_A1_c_57_n N_A1_M1002_g N_A1_c_58_n + N_A1_M1000_g N_A1_c_59_n N_A1_M1005_g N_A1_c_60_n N_A1_M1008_g N_A1_c_64_n
diff --git a/cells/o21ai/sky130_fd_sc_hdll__o21ai_2.spice b/cells/o21ai/sky130_fd_sc_hdll__o21ai_2.spice index c2ed1de..6336db3 100644 --- a/cells/o21ai/sky130_fd_sc_hdll__o21ai_2.spice +++ b/cells/o21ai/sky130_fd_sc_hdll__o21ai_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o21ai_2.spice -* Created: Thu Aug 27 19:19:20 2020 +* Created: Wed Sep 2 08:43:31 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.lvs.report b/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.lvs.report new file mode 100644 index 0000000..08e2c9f --- /dev/null +++ b/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.lvs.report
@@ -0,0 +1,503 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o21ai_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o21ai_4.sp ('sky130_fd_sc_hdll__o21ai_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.spice ('sky130_fd_sc_hdll__o21ai_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:43:35 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o21ai_4 sky130_fd_sc_hdll__o21ai_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o21ai_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__o21ai_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 12 10 * + + Instances: 12 12 MN (4 pins) + 12 12 MP (4 pins) + 1 0 * Dpar (2 pins) + 2 0 * Probe (2 pins) + ------ ------ + Total Inst: 27 24 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 8 8 + + Instances: 1 1 MP (4 pins) + 1 1 SMP2 (4 pins) + 1 1 SPMN_2_1 (5 pins) + ------ ------ + Total Inst: 3 3 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 8 8 0 0 + + Instances: 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMP2 + 1 1 0 0 SPMN_2_1 + ------- ------- --------- --------- + Total Inst: 3 3 0 0 + + +o Statistics: + + 3 layout instances were filtered and their pins removed from adjoining nets. + + 24 layout mos transistors were reduced to 6. + 18 mos transistors were deleted by parallel reduction. + 24 source mos transistors were reduced to 6. + 18 mos transistors were deleted by parallel reduction. + + 2 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A1 A2 B1 VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.pex.spice b/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.pex.spice index 9d4273a..7cbeb80 100644 --- a/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.pex.spice +++ b/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o21ai_4.pex.spice -* Created: Thu Aug 27 19:19:27 2020 +* Created: Wed Sep 2 08:43:39 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.pxi.spice b/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.pxi.spice index 381a566..395b04c 100644 --- a/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.pxi.spice +++ b/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o21ai_4.pxi.spice -* Created: Thu Aug 27 19:19:27 2020 +* Created: Wed Sep 2 08:43:39 2020 * x_PM_SKY130_FD_SC_HDLL__O21AI_4%A1 N_A1_c_82_n N_A1_M1003_g N_A1_c_73_n + N_A1_M1002_g N_A1_c_83_n N_A1_M1021_g N_A1_c_74_n N_A1_M1007_g N_A1_c_84_n
diff --git a/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.spice b/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.spice index 1f21062..646783c 100644 --- a/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.spice +++ b/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o21ai_4.spice -* Created: Thu Aug 27 19:19:27 2020 +* Created: Wed Sep 2 08:43:39 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o21ba/sky130_fd_sc_hdll__o21ba_1.lvs.report b/cells/o21ba/sky130_fd_sc_hdll__o21ba_1.lvs.report new file mode 100644 index 0000000..a4a6b00 --- /dev/null +++ b/cells/o21ba/sky130_fd_sc_hdll__o21ba_1.lvs.report
@@ -0,0 +1,486 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_1.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o21ba_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o21ba_1.sp ('sky130_fd_sc_hdll__o21ba_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_1.spice ('sky130_fd_sc_hdll__o21ba_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:43:43 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o21ba_1 sky130_fd_sc_hdll__o21ba_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o21ba_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__o21ba_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 14 12 * + + Instances: 5 5 MN (4 pins) + 5 5 MP (4 pins) + 1 0 * Dpar (2 pins) + 2 0 * Probe (2 pins) + ------ ------ + Total Inst: 13 10 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 10 10 + + Instances: 2 2 MN (4 pins) + 3 3 MP (4 pins) + 1 1 SMP2 (4 pins) + 1 1 SPMN_2_1 (5 pins) + ------ ------ + Total Inst: 7 7 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 10 10 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 3 3 0 0 MP(PHIGHVT) + 1 1 0 0 SMP2 + 1 1 0 0 SPMN_2_1 + ------- ------- --------- --------- + Total Inst: 7 7 0 0 + + +o Statistics: + + 3 layout instances were filtered and their pins removed from adjoining nets. + + 2 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB B1_N A2 A1 X VPWR VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o21ba/sky130_fd_sc_hdll__o21ba_1.pex.spice b/cells/o21ba/sky130_fd_sc_hdll__o21ba_1.pex.spice index cb16996..56ace52 100644 --- a/cells/o21ba/sky130_fd_sc_hdll__o21ba_1.pex.spice +++ b/cells/o21ba/sky130_fd_sc_hdll__o21ba_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o21ba_1.pex.spice -* Created: Thu Aug 27 19:19:34 2020 +* Created: Wed Sep 2 08:43:46 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o21ba/sky130_fd_sc_hdll__o21ba_1.pxi.spice b/cells/o21ba/sky130_fd_sc_hdll__o21ba_1.pxi.spice index 9523c80..ab8ff1f 100644 --- a/cells/o21ba/sky130_fd_sc_hdll__o21ba_1.pxi.spice +++ b/cells/o21ba/sky130_fd_sc_hdll__o21ba_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o21ba_1.pxi.spice -* Created: Thu Aug 27 19:19:34 2020 +* Created: Wed Sep 2 08:43:46 2020 * x_PM_SKY130_FD_SC_HDLL__O21BA_1%A_79_199# N_A_79_199#_M1009_s + N_A_79_199#_M1000_d N_A_79_199#_c_60_n N_A_79_199#_M1005_g N_A_79_199#_c_61_n
diff --git a/cells/o21ba/sky130_fd_sc_hdll__o21ba_1.spice b/cells/o21ba/sky130_fd_sc_hdll__o21ba_1.spice index 26ad44a..9d29d42 100644 --- a/cells/o21ba/sky130_fd_sc_hdll__o21ba_1.spice +++ b/cells/o21ba/sky130_fd_sc_hdll__o21ba_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o21ba_1.spice -* Created: Thu Aug 27 19:19:34 2020 +* Created: Wed Sep 2 08:43:46 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o21ba/sky130_fd_sc_hdll__o21ba_2.lvs.report b/cells/o21ba/sky130_fd_sc_hdll__o21ba_2.lvs.report new file mode 100644 index 0000000..fddacda --- /dev/null +++ b/cells/o21ba/sky130_fd_sc_hdll__o21ba_2.lvs.report
@@ -0,0 +1,493 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_2.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o21ba_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o21ba_2.sp ('sky130_fd_sc_hdll__o21ba_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_2.spice ('sky130_fd_sc_hdll__o21ba_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:43:50 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o21ba_2 sky130_fd_sc_hdll__o21ba_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o21ba_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__o21ba_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 13 12 * + + Instances: 6 6 MN (4 pins) + 6 6 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 14 12 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 10 10 + + Instances: 2 2 MN (4 pins) + 3 3 MP (4 pins) + 1 1 SMP2 (4 pins) + 1 1 SPMN_2_1 (5 pins) + ------ ------ + Total Inst: 7 7 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 10 10 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 3 3 0 0 MP(PHIGHVT) + 1 1 0 0 SMP2 + 1 1 0 0 SPMN_2_1 + ------- ------- --------- --------- + Total Inst: 7 7 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB B1_N A2 A1 VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o21ba/sky130_fd_sc_hdll__o21ba_2.pex.spice b/cells/o21ba/sky130_fd_sc_hdll__o21ba_2.pex.spice index 8dc64ed..a842f95 100644 --- a/cells/o21ba/sky130_fd_sc_hdll__o21ba_2.pex.spice +++ b/cells/o21ba/sky130_fd_sc_hdll__o21ba_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o21ba_2.pex.spice -* Created: Thu Aug 27 19:19:41 2020 +* Created: Wed Sep 2 08:43:53 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o21ba/sky130_fd_sc_hdll__o21ba_2.pxi.spice b/cells/o21ba/sky130_fd_sc_hdll__o21ba_2.pxi.spice index db51059..a73115f 100644 --- a/cells/o21ba/sky130_fd_sc_hdll__o21ba_2.pxi.spice +++ b/cells/o21ba/sky130_fd_sc_hdll__o21ba_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o21ba_2.pxi.spice -* Created: Thu Aug 27 19:19:41 2020 +* Created: Wed Sep 2 08:43:53 2020 * x_PM_SKY130_FD_SC_HDLL__O21BA_2%B1_N N_B1_N_c_70_n N_B1_N_M1011_g N_B1_N_c_71_n + N_B1_N_M1005_g B1_N B1_N B1_N PM_SKY130_FD_SC_HDLL__O21BA_2%B1_N
diff --git a/cells/o21ba/sky130_fd_sc_hdll__o21ba_2.spice b/cells/o21ba/sky130_fd_sc_hdll__o21ba_2.spice index bd76d03..cf7ae7b 100644 --- a/cells/o21ba/sky130_fd_sc_hdll__o21ba_2.spice +++ b/cells/o21ba/sky130_fd_sc_hdll__o21ba_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o21ba_2.spice -* Created: Thu Aug 27 19:19:41 2020 +* Created: Wed Sep 2 08:43:53 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.lvs.report b/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.lvs.report new file mode 100644 index 0000000..76f0910 --- /dev/null +++ b/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.lvs.report
@@ -0,0 +1,503 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o21ba_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o21ba_4.sp ('sky130_fd_sc_hdll__o21ba_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.spice ('sky130_fd_sc_hdll__o21ba_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:43:57 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o21ba_4 sky130_fd_sc_hdll__o21ba_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o21ba_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__o21ba_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 13 12 * + + Instances: 11 11 MN (4 pins) + 11 11 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 24 22 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 10 10 + + Instances: 2 2 MN (4 pins) + 3 3 MP (4 pins) + 1 1 SMP2 (4 pins) + 1 1 SPMN_2_1 (5 pins) + ------ ------ + Total Inst: 7 7 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 10 10 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 3 3 0 0 MP(PHIGHVT) + 1 1 0 0 SMP2 + 1 1 0 0 SPMN_2_1 + ------- ------- --------- --------- + Total Inst: 7 7 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 20 layout mos transistors were reduced to 8. + 12 mos transistors were deleted by parallel reduction. + 20 source mos transistors were reduced to 8. + 12 mos transistors were deleted by parallel reduction. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB B1_N A2 A1 VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.pex.spice b/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.pex.spice index d925b50..3032e84 100644 --- a/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.pex.spice +++ b/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o21ba_4.pex.spice -* Created: Thu Aug 27 19:19:48 2020 +* Created: Wed Sep 2 08:44:00 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.pxi.spice b/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.pxi.spice index aa359b7..209c630 100644 --- a/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.pxi.spice +++ b/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o21ba_4.pxi.spice -* Created: Thu Aug 27 19:19:48 2020 +* Created: Wed Sep 2 08:44:00 2020 * x_PM_SKY130_FD_SC_HDLL__O21BA_4%B1_N N_B1_N_c_103_n N_B1_N_M1004_g + N_B1_N_c_104_n N_B1_N_M1017_g B1_N B1_N N_B1_N_c_106_n
diff --git a/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.spice b/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.spice index a7659bf..a8fc485 100644 --- a/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.spice +++ b/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o21ba_4.spice -* Created: Thu Aug 27 19:19:48 2020 +* Created: Wed Sep 2 08:44:00 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o21bai/sky130_fd_sc_hdll__o21bai_1.lvs.report b/cells/o21bai/sky130_fd_sc_hdll__o21bai_1.lvs.report new file mode 100644 index 0000000..f0a6c24 --- /dev/null +++ b/cells/o21bai/sky130_fd_sc_hdll__o21bai_1.lvs.report
@@ -0,0 +1,484 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_1.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o21bai_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o21bai_1.sp ('sky130_fd_sc_hdll__o21bai_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_1.spice ('sky130_fd_sc_hdll__o21bai_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:44:04 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o21bai_1 sky130_fd_sc_hdll__o21bai_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o21bai_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__o21bai_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 14 11 * + + Instances: 4 4 MN (4 pins) + 4 4 MP (4 pins) + 1 0 * Dpar (2 pins) + 3 0 * Probe (2 pins) + ------ ------ + Total Inst: 12 8 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 9 9 + + Instances: 1 1 MN (4 pins) + 2 2 MP (4 pins) + 1 1 SMP2 (4 pins) + 1 1 SPMN_2_1 (5 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 9 9 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + 1 1 0 0 SMP2 + 1 1 0 0 SPMN_2_1 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 4 layout instances were filtered and their pins removed from adjoining nets. + + 3 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB B1_N A2 A1 VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o21bai/sky130_fd_sc_hdll__o21bai_1.pex.spice b/cells/o21bai/sky130_fd_sc_hdll__o21bai_1.pex.spice index e7d517b..075f56f 100644 --- a/cells/o21bai/sky130_fd_sc_hdll__o21bai_1.pex.spice +++ b/cells/o21bai/sky130_fd_sc_hdll__o21bai_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o21bai_1.pex.spice -* Created: Thu Aug 27 19:19:56 2020 +* Created: Wed Sep 2 08:44:08 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o21bai/sky130_fd_sc_hdll__o21bai_1.pxi.spice b/cells/o21bai/sky130_fd_sc_hdll__o21bai_1.pxi.spice index 31d5da5..64e641f 100644 --- a/cells/o21bai/sky130_fd_sc_hdll__o21bai_1.pxi.spice +++ b/cells/o21bai/sky130_fd_sc_hdll__o21bai_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o21bai_1.pxi.spice -* Created: Thu Aug 27 19:19:56 2020 +* Created: Wed Sep 2 08:44:08 2020 * x_PM_SKY130_FD_SC_HDLL__O21BAI_1%B1_N N_B1_N_c_56_n N_B1_N_M1002_g N_B1_N_c_57_n + N_B1_N_c_58_n N_B1_N_M1006_g N_B1_N_c_53_n N_B1_N_c_54_n B1_N N_B1_N_c_55_n
diff --git a/cells/o21bai/sky130_fd_sc_hdll__o21bai_1.spice b/cells/o21bai/sky130_fd_sc_hdll__o21bai_1.spice index 276664e..ca09e3b 100644 --- a/cells/o21bai/sky130_fd_sc_hdll__o21bai_1.spice +++ b/cells/o21bai/sky130_fd_sc_hdll__o21bai_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o21bai_1.spice -* Created: Thu Aug 27 19:19:56 2020 +* Created: Wed Sep 2 08:44:08 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o21bai/sky130_fd_sc_hdll__o21bai_2.lvs.report b/cells/o21bai/sky130_fd_sc_hdll__o21bai_2.lvs.report new file mode 100644 index 0000000..2b76d64 --- /dev/null +++ b/cells/o21bai/sky130_fd_sc_hdll__o21bai_2.lvs.report
@@ -0,0 +1,495 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_2.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o21bai_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o21bai_2.sp ('sky130_fd_sc_hdll__o21bai_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_2.spice ('sky130_fd_sc_hdll__o21bai_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:44:12 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o21bai_2 sky130_fd_sc_hdll__o21bai_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o21bai_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__o21bai_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 13 11 * + + Instances: 7 7 MN (4 pins) + 7 7 MP (4 pins) + 1 0 * Dpar (2 pins) + 2 0 * Probe (2 pins) + ------ ------ + Total Inst: 17 14 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 9 9 + + Instances: 1 1 MN (4 pins) + 2 2 MP (4 pins) + 1 1 SMP2 (4 pins) + 1 1 SPMN_2_1 (5 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 9 9 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + 1 1 0 0 SMP2 + 1 1 0 0 SPMN_2_1 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 3 layout instances were filtered and their pins removed from adjoining nets. + + 12 layout mos transistors were reduced to 6. + 6 mos transistors were deleted by parallel reduction. + 12 source mos transistors were reduced to 6. + 6 mos transistors were deleted by parallel reduction. + + 2 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB B1_N A2 A1 VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o21bai/sky130_fd_sc_hdll__o21bai_2.pex.spice b/cells/o21bai/sky130_fd_sc_hdll__o21bai_2.pex.spice index 720c5bb..1752c83 100644 --- a/cells/o21bai/sky130_fd_sc_hdll__o21bai_2.pex.spice +++ b/cells/o21bai/sky130_fd_sc_hdll__o21bai_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o21bai_2.pex.spice -* Created: Thu Aug 27 19:20:03 2020 +* Created: Wed Sep 2 08:44:15 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o21bai/sky130_fd_sc_hdll__o21bai_2.pxi.spice b/cells/o21bai/sky130_fd_sc_hdll__o21bai_2.pxi.spice index acd077f..c6100f7 100644 --- a/cells/o21bai/sky130_fd_sc_hdll__o21bai_2.pxi.spice +++ b/cells/o21bai/sky130_fd_sc_hdll__o21bai_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o21bai_2.pxi.spice -* Created: Thu Aug 27 19:20:03 2020 +* Created: Wed Sep 2 08:44:15 2020 * x_PM_SKY130_FD_SC_HDLL__O21BAI_2%B1_N N_B1_N_c_70_n N_B1_N_M1004_g N_B1_N_c_71_n + N_B1_N_M1003_g B1_N B1_N PM_SKY130_FD_SC_HDLL__O21BAI_2%B1_N
diff --git a/cells/o21bai/sky130_fd_sc_hdll__o21bai_2.spice b/cells/o21bai/sky130_fd_sc_hdll__o21bai_2.spice index 2c7fe24..6ea27bf 100644 --- a/cells/o21bai/sky130_fd_sc_hdll__o21bai_2.spice +++ b/cells/o21bai/sky130_fd_sc_hdll__o21bai_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o21bai_2.spice -* Created: Thu Aug 27 19:20:03 2020 +* Created: Wed Sep 2 08:44:15 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.lvs.report b/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.lvs.report new file mode 100644 index 0000000..a85871e --- /dev/null +++ b/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.lvs.report
@@ -0,0 +1,507 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o21bai_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o21bai_4.sp ('sky130_fd_sc_hdll__o21bai_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.spice ('sky130_fd_sc_hdll__o21bai_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:44:19 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o21bai_4 sky130_fd_sc_hdll__o21bai_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o21bai_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__o21bai_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 14 11 * + + Instances: 13 13 MN (4 pins) + 13 13 MP (4 pins) + 1 0 * Dpar (2 pins) + 3 0 * Probe (2 pins) + ------ ------ + Total Inst: 30 26 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 9 9 + + Instances: 1 1 MN (4 pins) + 2 2 MP (4 pins) + 1 1 SMP2 (4 pins) + 1 1 SPMN_2_1 (5 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 9 9 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + 1 1 0 0 SMP2 + 1 1 0 0 SPMN_2_1 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 4 layout instances were filtered and their pins removed from adjoining nets. + + 24 layout mos transistors were reduced to 6. + 18 mos transistors were deleted by parallel reduction. + 24 source mos transistors were reduced to 6. + 18 mos transistors were deleted by parallel reduction. + + 3 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB B1_N A2 A1 VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.pex.spice b/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.pex.spice index cf6a6d9..d339e12 100644 --- a/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.pex.spice +++ b/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o21bai_4.pex.spice -* Created: Thu Aug 27 19:20:10 2020 +* Created: Wed Sep 2 08:44:23 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.pxi.spice b/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.pxi.spice index 5563013..39b7484 100644 --- a/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.pxi.spice +++ b/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o21bai_4.pxi.spice -* Created: Thu Aug 27 19:20:10 2020 +* Created: Wed Sep 2 08:44:23 2020 * x_PM_SKY130_FD_SC_HDLL__O21BAI_4%B1_N N_B1_N_c_107_n N_B1_N_M1008_g + N_B1_N_c_108_n N_B1_N_M1009_g B1_N B1_N PM_SKY130_FD_SC_HDLL__O21BAI_4%B1_N
diff --git a/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.spice b/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.spice index d0f9b6c..be2bc50 100644 --- a/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.spice +++ b/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o21bai_4.spice -* Created: Thu Aug 27 19:20:10 2020 +* Created: Wed Sep 2 08:44:23 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o221a/sky130_fd_sc_hdll__o221a_1.lvs.report b/cells/o221a/sky130_fd_sc_hdll__o221a_1.lvs.report new file mode 100644 index 0000000..f271b29 --- /dev/null +++ b/cells/o221a/sky130_fd_sc_hdll__o221a_1.lvs.report
@@ -0,0 +1,488 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_1.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o221a_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o221a_1.sp ('sky130_fd_sc_hdll__o221a_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_1.spice ('sky130_fd_sc_hdll__o221a_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:44:27 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o221a_1 sky130_fd_sc_hdll__o221a_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o221a_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__o221a_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 17 15 * + + Instances: 6 6 MN (4 pins) + 6 6 MP (4 pins) + 1 0 * Dpar (2 pins) + 2 0 * Probe (2 pins) + ------ ------ + Total Inst: 15 12 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 11 11 + + Instances: 1 1 MN (4 pins) + 2 2 MP (4 pins) + 2 2 SMP2 (4 pins) + 1 1 SPMN_2_2_1 (7 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 10 10 0 0 + + Nets: 11 11 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + 2 2 0 0 SMP2 + 1 1 0 0 SPMN_2_2_1 + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 3 layout instances were filtered and their pins removed from adjoining nets. + + 2 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB C1 B1 B2 A2 A1 VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o221a/sky130_fd_sc_hdll__o221a_1.pex.spice b/cells/o221a/sky130_fd_sc_hdll__o221a_1.pex.spice index cc1ee80..65c6a9c 100644 --- a/cells/o221a/sky130_fd_sc_hdll__o221a_1.pex.spice +++ b/cells/o221a/sky130_fd_sc_hdll__o221a_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o221a_1.pex.spice -* Created: Thu Aug 27 19:20:17 2020 +* Created: Wed Sep 2 08:44:30 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o221a/sky130_fd_sc_hdll__o221a_1.pxi.spice b/cells/o221a/sky130_fd_sc_hdll__o221a_1.pxi.spice index a8275b5..d4ac87d 100644 --- a/cells/o221a/sky130_fd_sc_hdll__o221a_1.pxi.spice +++ b/cells/o221a/sky130_fd_sc_hdll__o221a_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o221a_1.pxi.spice -* Created: Thu Aug 27 19:20:17 2020 +* Created: Wed Sep 2 08:44:30 2020 * x_PM_SKY130_FD_SC_HDLL__O221A_1%C1 N_C1_c_65_n N_C1_M1011_g N_C1_c_62_n + N_C1_M1010_g C1 N_C1_c_64_n PM_SKY130_FD_SC_HDLL__O221A_1%C1
diff --git a/cells/o221a/sky130_fd_sc_hdll__o221a_1.spice b/cells/o221a/sky130_fd_sc_hdll__o221a_1.spice index 66c1a01..295c2fc 100644 --- a/cells/o221a/sky130_fd_sc_hdll__o221a_1.spice +++ b/cells/o221a/sky130_fd_sc_hdll__o221a_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o221a_1.spice -* Created: Thu Aug 27 19:20:17 2020 +* Created: Wed Sep 2 08:44:30 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o221a/sky130_fd_sc_hdll__o221a_2.lvs.report b/cells/o221a/sky130_fd_sc_hdll__o221a_2.lvs.report new file mode 100644 index 0000000..1b89864 --- /dev/null +++ b/cells/o221a/sky130_fd_sc_hdll__o221a_2.lvs.report
@@ -0,0 +1,495 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_2.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o221a_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o221a_2.sp ('sky130_fd_sc_hdll__o221a_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_2.spice ('sky130_fd_sc_hdll__o221a_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:44:34 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o221a_2 sky130_fd_sc_hdll__o221a_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o221a_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__o221a_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 18 15 * + + Instances: 7 7 MN (4 pins) + 7 7 MP (4 pins) + 1 0 * Dpar (2 pins) + 3 0 * Probe (2 pins) + ------ ------ + Total Inst: 18 14 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 11 11 + + Instances: 1 1 MN (4 pins) + 2 2 MP (4 pins) + 2 2 SMP2 (4 pins) + 1 1 SPMN_2_2_1 (7 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 10 10 0 0 + + Nets: 11 11 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + 2 2 0 0 SMP2 + 1 1 0 0 SPMN_2_2_1 + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 4 layout instances were filtered and their pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + 3 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB C1 B1 B2 A2 A1 VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o221a/sky130_fd_sc_hdll__o221a_2.pex.spice b/cells/o221a/sky130_fd_sc_hdll__o221a_2.pex.spice index 88181da..c1733c2 100644 --- a/cells/o221a/sky130_fd_sc_hdll__o221a_2.pex.spice +++ b/cells/o221a/sky130_fd_sc_hdll__o221a_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o221a_2.pex.spice -* Created: Thu Aug 27 19:20:24 2020 +* Created: Wed Sep 2 08:44:37 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o221a/sky130_fd_sc_hdll__o221a_2.pxi.spice b/cells/o221a/sky130_fd_sc_hdll__o221a_2.pxi.spice index 2efd862..ea87d4b 100644 --- a/cells/o221a/sky130_fd_sc_hdll__o221a_2.pxi.spice +++ b/cells/o221a/sky130_fd_sc_hdll__o221a_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o221a_2.pxi.spice -* Created: Thu Aug 27 19:20:24 2020 +* Created: Wed Sep 2 08:44:37 2020 * x_PM_SKY130_FD_SC_HDLL__O221A_2%C1 N_C1_c_77_n N_C1_M1007_g N_C1_c_73_n + N_C1_M1002_g N_C1_c_74_n N_C1_c_75_n C1 C1 PM_SKY130_FD_SC_HDLL__O221A_2%C1
diff --git a/cells/o221a/sky130_fd_sc_hdll__o221a_2.spice b/cells/o221a/sky130_fd_sc_hdll__o221a_2.spice index fe8d0ca..2992667 100644 --- a/cells/o221a/sky130_fd_sc_hdll__o221a_2.spice +++ b/cells/o221a/sky130_fd_sc_hdll__o221a_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o221a_2.spice -* Created: Thu Aug 27 19:20:24 2020 +* Created: Wed Sep 2 08:44:37 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o221a/sky130_fd_sc_hdll__o221a_4.lvs.report b/cells/o221a/sky130_fd_sc_hdll__o221a_4.lvs.report new file mode 100644 index 0000000..9ade82b --- /dev/null +++ b/cells/o221a/sky130_fd_sc_hdll__o221a_4.lvs.report
@@ -0,0 +1,509 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_4.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o221a_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o221a_4.sp ('sky130_fd_sc_hdll__o221a_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221a/sky130_fd_sc_hdll__o221a_4.spice ('sky130_fd_sc_hdll__o221a_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:44:41 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o221a_4 sky130_fd_sc_hdll__o221a_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o221a_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__o221a_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 17 15 * + + Instances: 14 14 MN (4 pins) + 14 14 MP (4 pins) + 1 0 * Dpar (2 pins) + 2 0 * Probe (2 pins) + ------ ------ + Total Inst: 31 28 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 11 11 + + Instances: 1 1 MN (4 pins) + 2 2 MP (4 pins) + 2 2 SMP2 (4 pins) + 1 1 SPMN_2_2_1 (7 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 10 10 0 0 + + Nets: 11 11 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + 2 2 0 0 SMP2 + 1 1 0 0 SPMN_2_2_1 + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 3 layout instances were filtered and their pins removed from adjoining nets. + + 28 layout mos transistors were reduced to 12. + 16 mos transistors were deleted by parallel reduction. + 28 source mos transistors were reduced to 12. + 16 mos transistors were deleted by parallel reduction. + + 2 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB C1 B1 B2 A1 A2 VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o221a/sky130_fd_sc_hdll__o221a_4.pex.spice b/cells/o221a/sky130_fd_sc_hdll__o221a_4.pex.spice index 65e234b..e77e4d6 100644 --- a/cells/o221a/sky130_fd_sc_hdll__o221a_4.pex.spice +++ b/cells/o221a/sky130_fd_sc_hdll__o221a_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o221a_4.pex.spice -* Created: Thu Aug 27 19:20:31 2020 +* Created: Wed Sep 2 08:44:45 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o221a/sky130_fd_sc_hdll__o221a_4.pxi.spice b/cells/o221a/sky130_fd_sc_hdll__o221a_4.pxi.spice index 8bf9393..848f411 100644 --- a/cells/o221a/sky130_fd_sc_hdll__o221a_4.pxi.spice +++ b/cells/o221a/sky130_fd_sc_hdll__o221a_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o221a_4.pxi.spice -* Created: Thu Aug 27 19:20:31 2020 +* Created: Wed Sep 2 08:44:45 2020 * x_PM_SKY130_FD_SC_HDLL__O221A_4%C1 N_C1_c_115_n N_C1_M1001_g N_C1_c_111_n + N_C1_M1002_g N_C1_c_116_n N_C1_M1009_g N_C1_c_112_n N_C1_M1019_g C1
diff --git a/cells/o221a/sky130_fd_sc_hdll__o221a_4.spice b/cells/o221a/sky130_fd_sc_hdll__o221a_4.spice index 2ccdd1e..4c484cc 100644 --- a/cells/o221a/sky130_fd_sc_hdll__o221a_4.spice +++ b/cells/o221a/sky130_fd_sc_hdll__o221a_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o221a_4.spice -* Created: Thu Aug 27 19:20:31 2020 +* Created: Wed Sep 2 08:44:45 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o221ai/sky130_fd_sc_hdll__o221ai_1.lvs.report b/cells/o221ai/sky130_fd_sc_hdll__o221ai_1.lvs.report new file mode 100644 index 0000000..65b7f8a --- /dev/null +++ b/cells/o221ai/sky130_fd_sc_hdll__o221ai_1.lvs.report
@@ -0,0 +1,484 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_1.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o221ai_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o221ai_1.sp ('sky130_fd_sc_hdll__o221ai_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_1.spice ('sky130_fd_sc_hdll__o221ai_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:44:49 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o221ai_1 sky130_fd_sc_hdll__o221ai_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o221ai_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__o221ai_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 15 14 * + + Instances: 5 5 MN (4 pins) + 5 5 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 12 10 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 10 10 + + Instances: 1 1 MP (4 pins) + 2 2 SMP2 (4 pins) + 1 1 SPMN_2_2_1 (7 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 10 10 0 0 + + Nets: 10 10 0 0 + + Instances: 1 1 0 0 MP(PHIGHVT) + 2 2 0 0 SMP2 + 1 1 0 0 SPMN_2_2_1 + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB C1 B1 B2 A2 A1 Y VPWR VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o221ai/sky130_fd_sc_hdll__o221ai_1.pex.spice b/cells/o221ai/sky130_fd_sc_hdll__o221ai_1.pex.spice index bea07d0..c8ebaaa 100644 --- a/cells/o221ai/sky130_fd_sc_hdll__o221ai_1.pex.spice +++ b/cells/o221ai/sky130_fd_sc_hdll__o221ai_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o221ai_1.pex.spice -* Created: Thu Aug 27 19:20:38 2020 +* Created: Wed Sep 2 08:44:52 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o221ai/sky130_fd_sc_hdll__o221ai_1.pxi.spice b/cells/o221ai/sky130_fd_sc_hdll__o221ai_1.pxi.spice index ff844c2..fa0c303 100644 --- a/cells/o221ai/sky130_fd_sc_hdll__o221ai_1.pxi.spice +++ b/cells/o221ai/sky130_fd_sc_hdll__o221ai_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o221ai_1.pxi.spice -* Created: Thu Aug 27 19:20:38 2020 +* Created: Wed Sep 2 08:44:52 2020 * x_PM_SKY130_FD_SC_HDLL__O221AI_1%C1 N_C1_c_49_n N_C1_M1001_g N_C1_c_50_n + N_C1_M1004_g C1 N_C1_c_51_n PM_SKY130_FD_SC_HDLL__O221AI_1%C1
diff --git a/cells/o221ai/sky130_fd_sc_hdll__o221ai_1.spice b/cells/o221ai/sky130_fd_sc_hdll__o221ai_1.spice index 44552e8..bc61b34 100644 --- a/cells/o221ai/sky130_fd_sc_hdll__o221ai_1.spice +++ b/cells/o221ai/sky130_fd_sc_hdll__o221ai_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o221ai_1.spice -* Created: Thu Aug 27 19:20:38 2020 +* Created: Wed Sep 2 08:44:52 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.lvs.report b/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.lvs.report new file mode 100644 index 0000000..0032b35 --- /dev/null +++ b/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.lvs.report
@@ -0,0 +1,499 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o221ai_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o221ai_2.sp ('sky130_fd_sc_hdll__o221ai_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.spice ('sky130_fd_sc_hdll__o221ai_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:44:56 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o221ai_2 sky130_fd_sc_hdll__o221ai_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o221ai_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__o221ai_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 15 14 * + + Instances: 10 10 MN (4 pins) + 10 10 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 22 20 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 10 10 + + Instances: 1 1 MP (4 pins) + 2 2 SMP2 (4 pins) + 1 1 SPMN_2_2_1 (7 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 10 10 0 0 + + Nets: 10 10 0 0 + + Instances: 1 1 0 0 MP(PHIGHVT) + 2 2 0 0 SMP2 + 1 1 0 0 SPMN_2_2_1 + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 20 layout mos transistors were reduced to 10. + 10 mos transistors were deleted by parallel reduction. + 20 source mos transistors were reduced to 10. + 10 mos transistors were deleted by parallel reduction. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB C1 B1 B2 A1 A2 VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.pex.spice b/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.pex.spice index f7d2acc..0ec6e52 100644 --- a/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.pex.spice +++ b/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o221ai_2.pex.spice -* Created: Thu Aug 27 19:20:45 2020 +* Created: Wed Sep 2 08:44:59 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.pxi.spice b/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.pxi.spice index 9092bef..7438822 100644 --- a/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.pxi.spice +++ b/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o221ai_2.pxi.spice -* Created: Thu Aug 27 19:20:45 2020 +* Created: Wed Sep 2 08:44:59 2020 * x_PM_SKY130_FD_SC_HDLL__O221AI_2%C1 N_C1_c_87_n N_C1_M1006_g N_C1_c_83_n + N_C1_M1002_g N_C1_c_88_n N_C1_M1018_g N_C1_c_84_n N_C1_M1013_g C1 N_C1_c_86_n
diff --git a/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.spice b/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.spice index fffaad8..8886956 100644 --- a/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.spice +++ b/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o221ai_2.spice -* Created: Thu Aug 27 19:20:45 2020 +* Created: Wed Sep 2 08:44:59 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.lvs.report b/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.lvs.report new file mode 100644 index 0000000..bbf45ee --- /dev/null +++ b/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.lvs.report
@@ -0,0 +1,519 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 87 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 89 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 91 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 93 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 95 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 97 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o221ai_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o221ai_4.sp ('sky130_fd_sc_hdll__o221ai_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice ('sky130_fd_sc_hdll__o221ai_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:45:03 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o221ai_4 sky130_fd_sc_hdll__o221ai_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o221ai_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__o221ai_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 16 14 * + + Instances: 20 20 MN (4 pins) + 20 20 MP (4 pins) + 1 0 * Dpar (2 pins) + 2 0 * Probe (2 pins) + ------ ------ + Total Inst: 43 40 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 10 10 + + Instances: 1 1 MP (4 pins) + 2 2 SMP2 (4 pins) + 1 1 SPMN_2_2_1 (7 pins) + ------ ------ + Total Inst: 4 4 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 10 10 0 0 + + Nets: 10 10 0 0 + + Instances: 1 1 0 0 MP(PHIGHVT) + 2 2 0 0 SMP2 + 1 1 0 0 SPMN_2_2_1 + ------- ------- --------- --------- + Total Inst: 4 4 0 0 + + +o Statistics: + + 3 layout instances were filtered and their pins removed from adjoining nets. + + 40 layout mos transistors were reduced to 10. + 30 mos transistors were deleted by parallel reduction. + 40 source mos transistors were reduced to 10. + 30 mos transistors were deleted by parallel reduction. + + 2 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB C1 B1 B2 A1 A2 VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.pex.spice b/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.pex.spice index d7cf4b7..e54b3f1 100644 --- a/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.pex.spice +++ b/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o221ai_4.pex.spice -* Created: Thu Aug 27 19:20:52 2020 +* Created: Wed Sep 2 08:45:07 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.pxi.spice b/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.pxi.spice index bce94eb..50373b9 100644 --- a/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.pxi.spice +++ b/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o221ai_4.pxi.spice -* Created: Thu Aug 27 19:20:52 2020 +* Created: Wed Sep 2 08:45:07 2020 * x_PM_SKY130_FD_SC_HDLL__O221AI_4%C1 N_C1_c_128_n N_C1_M1000_g N_C1_c_122_n + N_C1_M1006_g N_C1_c_129_n N_C1_M1008_g N_C1_c_123_n N_C1_M1016_g N_C1_c_130_n
diff --git a/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice b/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice index 8b0c4de..3e90baf 100644 --- a/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice +++ b/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o221ai_4.spice -* Created: Thu Aug 27 19:20:52 2020 +* Created: Wed Sep 2 08:45:07 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o22a/sky130_fd_sc_hdll__o22a_1.lvs.report b/cells/o22a/sky130_fd_sc_hdll__o22a_1.lvs.report new file mode 100644 index 0000000..4d61920 --- /dev/null +++ b/cells/o22a/sky130_fd_sc_hdll__o22a_1.lvs.report
@@ -0,0 +1,483 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_1.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o22a_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o22a_1.sp ('sky130_fd_sc_hdll__o22a_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_1.spice ('sky130_fd_sc_hdll__o22a_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:45:11 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o22a_1 sky130_fd_sc_hdll__o22a_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o22a_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__o22a_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 13 13 + + Instances: 5 5 MN (4 pins) + 5 5 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 11 10 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 10 10 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + 2 2 SMP2 (4 pins) + 1 1 SPMN_2_2 (6 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 10 10 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 2 2 0 0 SMP2 + 1 1 0 0 SPMN_2_2 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB B1 B2 A2 A1 X VPWR VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o22a/sky130_fd_sc_hdll__o22a_1.pex.spice b/cells/o22a/sky130_fd_sc_hdll__o22a_1.pex.spice index 3667931..d6e3b89 100644 --- a/cells/o22a/sky130_fd_sc_hdll__o22a_1.pex.spice +++ b/cells/o22a/sky130_fd_sc_hdll__o22a_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o22a_1.pex.spice -* Created: Thu Aug 27 19:20:59 2020 +* Created: Wed Sep 2 08:45:14 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o22a/sky130_fd_sc_hdll__o22a_1.pxi.spice b/cells/o22a/sky130_fd_sc_hdll__o22a_1.pxi.spice index 2ac73a4..ded793e 100644 --- a/cells/o22a/sky130_fd_sc_hdll__o22a_1.pxi.spice +++ b/cells/o22a/sky130_fd_sc_hdll__o22a_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o22a_1.pxi.spice -* Created: Thu Aug 27 19:20:59 2020 +* Created: Wed Sep 2 08:45:14 2020 * x_PM_SKY130_FD_SC_HDLL__O22A_1%A_83_21# N_A_83_21#_M1008_d N_A_83_21#_M1003_d + N_A_83_21#_c_49_n N_A_83_21#_M1006_g N_A_83_21#_c_50_n N_A_83_21#_M1001_g
diff --git a/cells/o22a/sky130_fd_sc_hdll__o22a_1.spice b/cells/o22a/sky130_fd_sc_hdll__o22a_1.spice index ecf3907..c4a4d7b 100644 --- a/cells/o22a/sky130_fd_sc_hdll__o22a_1.spice +++ b/cells/o22a/sky130_fd_sc_hdll__o22a_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o22a_1.spice -* Created: Thu Aug 27 19:20:59 2020 +* Created: Wed Sep 2 08:45:14 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o22a/sky130_fd_sc_hdll__o22a_2.lvs.report b/cells/o22a/sky130_fd_sc_hdll__o22a_2.lvs.report new file mode 100644 index 0000000..01980eb --- /dev/null +++ b/cells/o22a/sky130_fd_sc_hdll__o22a_2.lvs.report
@@ -0,0 +1,493 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_2.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o22a_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o22a_2.sp ('sky130_fd_sc_hdll__o22a_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_2.spice ('sky130_fd_sc_hdll__o22a_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:45:18 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o22a_2 sky130_fd_sc_hdll__o22a_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o22a_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__o22a_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 14 13 * + + Instances: 6 6 MN (4 pins) + 6 6 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 14 12 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 10 10 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + 2 2 SMP2 (4 pins) + 1 1 SPMN_2_2 (6 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 10 10 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 2 2 0 0 SMP2 + 1 1 0 0 SPMN_2_2 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB B1 B2 A2 A1 VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o22a/sky130_fd_sc_hdll__o22a_2.pex.spice b/cells/o22a/sky130_fd_sc_hdll__o22a_2.pex.spice index 6b93744..067efc5 100644 --- a/cells/o22a/sky130_fd_sc_hdll__o22a_2.pex.spice +++ b/cells/o22a/sky130_fd_sc_hdll__o22a_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o22a_2.pex.spice -* Created: Thu Aug 27 19:21:07 2020 +* Created: Wed Sep 2 08:45:21 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o22a/sky130_fd_sc_hdll__o22a_2.pxi.spice b/cells/o22a/sky130_fd_sc_hdll__o22a_2.pxi.spice index ee5bd39..5179f6c 100644 --- a/cells/o22a/sky130_fd_sc_hdll__o22a_2.pxi.spice +++ b/cells/o22a/sky130_fd_sc_hdll__o22a_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o22a_2.pxi.spice -* Created: Thu Aug 27 19:21:07 2020 +* Created: Wed Sep 2 08:45:21 2020 * x_PM_SKY130_FD_SC_HDLL__O22A_2%A_83_21# N_A_83_21#_M1011_d N_A_83_21#_M1007_d + N_A_83_21#_c_58_n N_A_83_21#_M1006_g N_A_83_21#_c_65_n N_A_83_21#_M1001_g
diff --git a/cells/o22a/sky130_fd_sc_hdll__o22a_2.spice b/cells/o22a/sky130_fd_sc_hdll__o22a_2.spice index d636002..a43e9f6 100644 --- a/cells/o22a/sky130_fd_sc_hdll__o22a_2.spice +++ b/cells/o22a/sky130_fd_sc_hdll__o22a_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o22a_2.spice -* Created: Thu Aug 27 19:21:07 2020 +* Created: Wed Sep 2 08:45:21 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o22a/sky130_fd_sc_hdll__o22a_4.lvs.report b/cells/o22a/sky130_fd_sc_hdll__o22a_4.lvs.report new file mode 100644 index 0000000..290e90c --- /dev/null +++ b/cells/o22a/sky130_fd_sc_hdll__o22a_4.lvs.report
@@ -0,0 +1,505 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_4.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o22a_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o22a_4.sp ('sky130_fd_sc_hdll__o22a_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22a/sky130_fd_sc_hdll__o22a_4.spice ('sky130_fd_sc_hdll__o22a_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:45:25 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o22a_4 sky130_fd_sc_hdll__o22a_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o22a_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__o22a_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 14 13 * + + Instances: 12 12 MN (4 pins) + 12 12 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 26 24 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 10 10 + + Instances: 1 1 MN (4 pins) + 1 1 MP (4 pins) + 2 2 SMP2 (4 pins) + 1 1 SPMN_2_2 (6 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 10 10 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 2 2 0 0 SMP2 + 1 1 0 0 SPMN_2_2 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 24 layout mos transistors were reduced to 10. + 14 mos transistors were deleted by parallel reduction. + 24 source mos transistors were reduced to 10. + 14 mos transistors were deleted by parallel reduction. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB B1 B2 A1 A2 VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o22a/sky130_fd_sc_hdll__o22a_4.pex.spice b/cells/o22a/sky130_fd_sc_hdll__o22a_4.pex.spice index caeb440..ba81a42 100644 --- a/cells/o22a/sky130_fd_sc_hdll__o22a_4.pex.spice +++ b/cells/o22a/sky130_fd_sc_hdll__o22a_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o22a_4.pex.spice -* Created: Thu Aug 27 19:21:14 2020 +* Created: Wed Sep 2 08:45:29 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o22a/sky130_fd_sc_hdll__o22a_4.pxi.spice b/cells/o22a/sky130_fd_sc_hdll__o22a_4.pxi.spice index 199063b..924791a 100644 --- a/cells/o22a/sky130_fd_sc_hdll__o22a_4.pxi.spice +++ b/cells/o22a/sky130_fd_sc_hdll__o22a_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o22a_4.pxi.spice -* Created: Thu Aug 27 19:21:14 2020 +* Created: Wed Sep 2 08:45:29 2020 * x_PM_SKY130_FD_SC_HDLL__O22A_4%A_96_21# N_A_96_21#_M1009_s N_A_96_21#_M1016_d + N_A_96_21#_M1003_s N_A_96_21#_M1017_s N_A_96_21#_c_104_n N_A_96_21#_M1007_g
diff --git a/cells/o22a/sky130_fd_sc_hdll__o22a_4.spice b/cells/o22a/sky130_fd_sc_hdll__o22a_4.spice index fe0c1b6..7966a9c 100644 --- a/cells/o22a/sky130_fd_sc_hdll__o22a_4.spice +++ b/cells/o22a/sky130_fd_sc_hdll__o22a_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o22a_4.spice -* Created: Thu Aug 27 19:21:14 2020 +* Created: Wed Sep 2 08:45:29 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o22ai/sky130_fd_sc_hdll__o22ai_1.lvs.report b/cells/o22ai/sky130_fd_sc_hdll__o22ai_1.lvs.report new file mode 100644 index 0000000..d221e7f --- /dev/null +++ b/cells/o22ai/sky130_fd_sc_hdll__o22ai_1.lvs.report
@@ -0,0 +1,480 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_1.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o22ai_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o22ai_1.sp ('sky130_fd_sc_hdll__o22ai_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_1.spice ('sky130_fd_sc_hdll__o22ai_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:45:33 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o22ai_1 sky130_fd_sc_hdll__o22ai_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o22ai_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__o22ai_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 13 12 * + + Instances: 4 4 MN (4 pins) + 4 4 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 10 8 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 9 9 + + Instances: 2 2 SMP2 (4 pins) + 1 1 SPMN_2_2 (6 pins) + ------ ------ + Total Inst: 3 3 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 9 9 0 0 + + Instances: 2 2 0 0 SMP2 + 1 1 0 0 SPMN_2_2 + ------- ------- --------- --------- + Total Inst: 3 3 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB B1 B2 A2 A1 VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o22ai/sky130_fd_sc_hdll__o22ai_1.pex.spice b/cells/o22ai/sky130_fd_sc_hdll__o22ai_1.pex.spice index f1da002..ea9595a 100644 --- a/cells/o22ai/sky130_fd_sc_hdll__o22ai_1.pex.spice +++ b/cells/o22ai/sky130_fd_sc_hdll__o22ai_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o22ai_1.pex.spice -* Created: Thu Aug 27 19:21:21 2020 +* Created: Wed Sep 2 08:45:36 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o22ai/sky130_fd_sc_hdll__o22ai_1.pxi.spice b/cells/o22ai/sky130_fd_sc_hdll__o22ai_1.pxi.spice index c33bcea..9785d77 100644 --- a/cells/o22ai/sky130_fd_sc_hdll__o22ai_1.pxi.spice +++ b/cells/o22ai/sky130_fd_sc_hdll__o22ai_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o22ai_1.pxi.spice -* Created: Thu Aug 27 19:21:21 2020 +* Created: Wed Sep 2 08:45:36 2020 * x_PM_SKY130_FD_SC_HDLL__O22AI_1%B1 N_B1_c_43_n N_B1_M1004_g N_B1_c_40_n + N_B1_M1005_g B1 N_B1_c_42_n PM_SKY130_FD_SC_HDLL__O22AI_1%B1
diff --git a/cells/o22ai/sky130_fd_sc_hdll__o22ai_1.spice b/cells/o22ai/sky130_fd_sc_hdll__o22ai_1.spice index f9a8a4f..7268c7b 100644 --- a/cells/o22ai/sky130_fd_sc_hdll__o22ai_1.spice +++ b/cells/o22ai/sky130_fd_sc_hdll__o22ai_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o22ai_1.spice -* Created: Thu Aug 27 19:21:21 2020 +* Created: Wed Sep 2 08:45:36 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o22ai/sky130_fd_sc_hdll__o22ai_2.lvs.report b/cells/o22ai/sky130_fd_sc_hdll__o22ai_2.lvs.report new file mode 100644 index 0000000..9ebdaa3 --- /dev/null +++ b/cells/o22ai/sky130_fd_sc_hdll__o22ai_2.lvs.report
@@ -0,0 +1,493 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_2.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o22ai_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o22ai_2.sp ('sky130_fd_sc_hdll__o22ai_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_2.spice ('sky130_fd_sc_hdll__o22ai_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:45:40 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o22ai_2 sky130_fd_sc_hdll__o22ai_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o22ai_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__o22ai_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 15 12 * + + Instances: 8 8 MN (4 pins) + 8 8 MP (4 pins) + 1 0 * Dpar (2 pins) + 3 0 * Probe (2 pins) + ------ ------ + Total Inst: 20 16 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 9 9 + + Instances: 2 2 SMP2 (4 pins) + 1 1 SPMN_2_2 (6 pins) + ------ ------ + Total Inst: 3 3 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 9 9 0 0 + + Instances: 2 2 0 0 SMP2 + 1 1 0 0 SPMN_2_2 + ------- ------- --------- --------- + Total Inst: 3 3 0 0 + + +o Statistics: + + 4 layout instances were filtered and their pins removed from adjoining nets. + + 16 layout mos transistors were reduced to 8. + 8 mos transistors were deleted by parallel reduction. + 16 source mos transistors were reduced to 8. + 8 mos transistors were deleted by parallel reduction. + + 3 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB B1 B2 A2 A1 VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o22ai/sky130_fd_sc_hdll__o22ai_2.pex.spice b/cells/o22ai/sky130_fd_sc_hdll__o22ai_2.pex.spice index c2e6228..cb95dca 100644 --- a/cells/o22ai/sky130_fd_sc_hdll__o22ai_2.pex.spice +++ b/cells/o22ai/sky130_fd_sc_hdll__o22ai_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o22ai_2.pex.spice -* Created: Thu Aug 27 19:21:28 2020 +* Created: Wed Sep 2 08:45:44 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o22ai/sky130_fd_sc_hdll__o22ai_2.pxi.spice b/cells/o22ai/sky130_fd_sc_hdll__o22ai_2.pxi.spice index 7bd6297..c084122 100644 --- a/cells/o22ai/sky130_fd_sc_hdll__o22ai_2.pxi.spice +++ b/cells/o22ai/sky130_fd_sc_hdll__o22ai_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o22ai_2.pxi.spice -* Created: Thu Aug 27 19:21:28 2020 +* Created: Wed Sep 2 08:45:44 2020 * x_PM_SKY130_FD_SC_HDLL__O22AI_2%B1 N_B1_c_66_n N_B1_M1006_g N_B1_c_70_n + N_B1_M1001_g N_B1_c_71_n N_B1_M1011_g N_B1_c_67_n N_B1_M1013_g B1 N_B1_c_68_n
diff --git a/cells/o22ai/sky130_fd_sc_hdll__o22ai_2.spice b/cells/o22ai/sky130_fd_sc_hdll__o22ai_2.spice index e394280..34d46ff 100644 --- a/cells/o22ai/sky130_fd_sc_hdll__o22ai_2.spice +++ b/cells/o22ai/sky130_fd_sc_hdll__o22ai_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o22ai_2.spice -* Created: Thu Aug 27 19:21:28 2020 +* Created: Wed Sep 2 08:45:44 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.lvs.report b/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.lvs.report new file mode 100644 index 0000000..c0cd58a --- /dev/null +++ b/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.lvs.report
@@ -0,0 +1,509 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o22ai_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o22ai_4.sp ('sky130_fd_sc_hdll__o22ai_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.spice ('sky130_fd_sc_hdll__o22ai_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:45:48 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o22ai_4 sky130_fd_sc_hdll__o22ai_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o22ai_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__o22ai_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 16 12 * + + Instances: 16 16 MN (4 pins) + 16 16 MP (4 pins) + 1 0 * Dpar (2 pins) + 4 0 * Probe (2 pins) + ------ ------ + Total Inst: 37 32 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 9 9 + + Instances: 2 2 SMP2 (4 pins) + 1 1 SPMN_2_2 (6 pins) + ------ ------ + Total Inst: 3 3 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 9 9 0 0 + + Instances: 2 2 0 0 SMP2 + 1 1 0 0 SPMN_2_2 + ------- ------- --------- --------- + Total Inst: 3 3 0 0 + + +o Statistics: + + 5 layout instances were filtered and their pins removed from adjoining nets. + + 32 layout mos transistors were reduced to 8. + 24 mos transistors were deleted by parallel reduction. + 32 source mos transistors were reduced to 8. + 24 mos transistors were deleted by parallel reduction. + + 4 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A1 A2 B1 B2 VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.pex.spice b/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.pex.spice index fe1ce43..84b0575 100644 --- a/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.pex.spice +++ b/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o22ai_4.pex.spice -* Created: Thu Aug 27 19:21:35 2020 +* Created: Wed Sep 2 08:45:51 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.pxi.spice b/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.pxi.spice index 8a83869..17ee5eb 100644 --- a/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.pxi.spice +++ b/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o22ai_4.pxi.spice -* Created: Thu Aug 27 19:21:35 2020 +* Created: Wed Sep 2 08:45:51 2020 * x_PM_SKY130_FD_SC_HDLL__O22AI_4%A1 N_A1_c_111_n N_A1_M1007_g N_A1_c_102_n + N_A1_M1005_g N_A1_c_112_n N_A1_M1011_g N_A1_c_103_n N_A1_M1006_g N_A1_c_113_n
diff --git a/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.spice b/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.spice index 7cac400..69e9351 100644 --- a/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.spice +++ b/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o22ai_4.spice -* Created: Thu Aug 27 19:21:35 2020 +* Created: Wed Sep 2 08:45:51 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_1.lvs.report b/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_1.lvs.report new file mode 100644 index 0000000..ad5e92d --- /dev/null +++ b/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_1.lvs.report
@@ -0,0 +1,490 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_1.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_1.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o2bb2a_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o2bb2a_1.sp ('sky130_fd_sc_hdll__o2bb2a_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_1.spice ('sky130_fd_sc_hdll__o2bb2a_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:45:55 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o2bb2a_1 sky130_fd_sc_hdll__o2bb2a_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o2bb2a_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__o2bb2a_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 16 14 * + + Instances: 6 6 MN (4 pins) + 6 6 MP (4 pins) + 1 0 * Dpar (2 pins) + 2 0 * Probe (2 pins) + ------ ------ + Total Inst: 15 12 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 11 11 + + Instances: 1 1 MN (4 pins) + 4 4 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SMP2 (4 pins) + 1 1 SPMN_2_1 (5 pins) + ------ ------ + Total Inst: 8 8 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 11 11 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 4 4 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SMP2 + 1 1 0 0 SPMN_2_1 + ------- ------- --------- --------- + Total Inst: 8 8 0 0 + + +o Statistics: + + 3 layout instances were filtered and their pins removed from adjoining nets. + + 2 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A1_N A2_N B2 B1 X VPWR VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_1.pex.spice b/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_1.pex.spice index 3456875..233aec9 100644 --- a/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_1.pex.spice +++ b/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o2bb2a_1.pex.spice -* Created: Thu Aug 27 19:21:42 2020 +* Created: Wed Sep 2 08:45:59 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_1.pxi.spice b/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_1.pxi.spice index d1c0165..f04a2d5 100644 --- a/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_1.pxi.spice +++ b/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o2bb2a_1.pxi.spice -* Created: Thu Aug 27 19:21:42 2020 +* Created: Wed Sep 2 08:45:59 2020 * x_PM_SKY130_FD_SC_HDLL__O2BB2A_1%A_76_199# N_A_76_199#_M1010_s + N_A_76_199#_M1011_d N_A_76_199#_c_80_n N_A_76_199#_M1002_g N_A_76_199#_c_81_n
diff --git a/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_1.spice b/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_1.spice index 37960b0..2dd8c38 100644 --- a/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_1.spice +++ b/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o2bb2a_1.spice -* Created: Thu Aug 27 19:21:42 2020 +* Created: Wed Sep 2 08:45:59 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_2.lvs.report b/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_2.lvs.report new file mode 100644 index 0000000..1011c6e --- /dev/null +++ b/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_2.lvs.report
@@ -0,0 +1,494 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_2.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o2bb2a_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o2bb2a_2.sp ('sky130_fd_sc_hdll__o2bb2a_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_2.spice ('sky130_fd_sc_hdll__o2bb2a_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:46:03 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o2bb2a_2 sky130_fd_sc_hdll__o2bb2a_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o2bb2a_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__o2bb2a_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 14 14 + + Instances: 7 7 MN (4 pins) + 7 7 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 15 14 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 11 11 + + Instances: 1 1 MN (4 pins) + 4 4 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SMP2 (4 pins) + 1 1 SPMN_2_1 (5 pins) + ------ ------ + Total Inst: 8 8 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 11 11 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 4 4 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SMP2 + 1 1 0 0 SPMN_2_1 + ------- ------- --------- --------- + Total Inst: 8 8 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A1_N A2_N B2 B1 VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_2.pex.spice b/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_2.pex.spice index bda2941..7f22591 100644 --- a/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_2.pex.spice +++ b/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o2bb2a_2.pex.spice -* Created: Thu Aug 27 19:21:49 2020 +* Created: Wed Sep 2 08:46:06 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_2.pxi.spice b/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_2.pxi.spice index e32807b..29a3d9d 100644 --- a/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_2.pxi.spice +++ b/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o2bb2a_2.pxi.spice -* Created: Thu Aug 27 19:21:49 2020 +* Created: Wed Sep 2 08:46:06 2020 * x_PM_SKY130_FD_SC_HDLL__O2BB2A_2%A_84_21# N_A_84_21#_M1004_s N_A_84_21#_M1005_d + N_A_84_21#_c_82_n N_A_84_21#_M1003_g N_A_84_21#_c_90_n N_A_84_21#_M1007_g
diff --git a/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_2.spice b/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_2.spice index 364dd87..d07b873 100644 --- a/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_2.spice +++ b/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o2bb2a_2.spice -* Created: Thu Aug 27 19:21:49 2020 +* Created: Wed Sep 2 08:46:06 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.lvs.report b/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.lvs.report new file mode 100644 index 0000000..a991326 --- /dev/null +++ b/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.lvs.report
@@ -0,0 +1,511 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o2bb2a_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o2bb2a_4.sp ('sky130_fd_sc_hdll__o2bb2a_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.spice ('sky130_fd_sc_hdll__o2bb2a_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:46:10 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o2bb2a_4 sky130_fd_sc_hdll__o2bb2a_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o2bb2a_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__o2bb2a_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 16 14 * + + Instances: 14 14 MN (4 pins) + 14 14 MP (4 pins) + 1 0 * Dpar (2 pins) + 2 0 * Probe (2 pins) + ------ ------ + Total Inst: 31 28 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 11 11 + + Instances: 1 1 MN (4 pins) + 4 4 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SMP2 (4 pins) + 1 1 SPMN_2_1 (5 pins) + ------ ------ + Total Inst: 8 8 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 11 11 0 0 + + Instances: 1 1 0 0 MN(NSHORT) + 4 4 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SMP2 + 1 1 0 0 SPMN_2_1 + ------- ------- --------- --------- + Total Inst: 8 8 0 0 + + +o Statistics: + + 3 layout instances were filtered and their pins removed from adjoining nets. + + 28 layout mos transistors were reduced to 12. + 16 mos transistors were deleted by parallel reduction. + 28 source mos transistors were reduced to 12. + 16 mos transistors were deleted by parallel reduction. + + 2 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB B1 B2 A1_N A2_N VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.pex.spice b/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.pex.spice index e87ecdb..d905039 100644 --- a/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.pex.spice +++ b/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o2bb2a_4.pex.spice -* Created: Thu Aug 27 19:21:56 2020 +* Created: Wed Sep 2 08:46:13 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.pxi.spice b/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.pxi.spice index 7f75513..d9522f1 100644 --- a/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.pxi.spice +++ b/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o2bb2a_4.pxi.spice -* Created: Thu Aug 27 19:21:56 2020 +* Created: Wed Sep 2 08:46:13 2020 * x_PM_SKY130_FD_SC_HDLL__O2BB2A_4%B1 N_B1_c_123_n N_B1_M1009_g N_B1_c_124_n + N_B1_M1017_g N_B1_c_125_n N_B1_M1014_g N_B1_c_126_n N_B1_M1018_g N_B1_c_131_n
diff --git a/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.spice b/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.spice index dabdac7..b709089 100644 --- a/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.spice +++ b/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o2bb2a_4.spice -* Created: Thu Aug 27 19:21:56 2020 +* Created: Wed Sep 2 08:46:13 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_1.lvs.report b/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_1.lvs.report new file mode 100644 index 0000000..e31f784 --- /dev/null +++ b/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_1.lvs.report
@@ -0,0 +1,483 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_1.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o2bb2ai_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o2bb2ai_1.sp ('sky130_fd_sc_hdll__o2bb2ai_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_1.spice ('sky130_fd_sc_hdll__o2bb2ai_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:46:17 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o2bb2ai_1 sky130_fd_sc_hdll__o2bb2ai_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o2bb2ai_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__o2bb2ai_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 13 13 + + Instances: 5 5 MN (4 pins) + 5 5 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 11 10 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 10 10 + + Instances: 3 3 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SMP2 (4 pins) + 1 1 SPMN_2_1 (5 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 10 10 0 0 + + Instances: 3 3 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SMP2 + 1 1 0 0 SPMN_2_1 + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB A1_N A2_N B2 B1 VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_1.pex.spice b/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_1.pex.spice index 63a93ee..c248102 100644 --- a/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_1.pex.spice +++ b/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o2bb2ai_1.pex.spice -* Created: Thu Aug 27 19:22:03 2020 +* Created: Wed Sep 2 08:46:21 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_1.pxi.spice b/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_1.pxi.spice index 6b1b2af..91cf919 100644 --- a/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_1.pxi.spice +++ b/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o2bb2ai_1.pxi.spice -* Created: Thu Aug 27 19:22:03 2020 +* Created: Wed Sep 2 08:46:21 2020 * x_PM_SKY130_FD_SC_HDLL__O2BB2AI_1%A1_N N_A1_N_c_61_n N_A1_N_M1000_g + N_A1_N_c_58_n N_A1_N_M1006_g A1_N N_A1_N_c_60_n
diff --git a/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_1.spice b/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_1.spice index f7627f9..7a5e4fa 100644 --- a/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_1.spice +++ b/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o2bb2ai_1.spice -* Created: Thu Aug 27 19:22:03 2020 +* Created: Wed Sep 2 08:46:21 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.lvs.report b/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.lvs.report new file mode 100644 index 0000000..41d0bea --- /dev/null +++ b/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.lvs.report
@@ -0,0 +1,501 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o2bb2ai_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o2bb2ai_2.sp ('sky130_fd_sc_hdll__o2bb2ai_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.spice ('sky130_fd_sc_hdll__o2bb2ai_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:46:25 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o2bb2ai_2 sky130_fd_sc_hdll__o2bb2ai_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o2bb2ai_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__o2bb2ai_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 16 13 * + + Instances: 10 10 MN (4 pins) + 10 10 MP (4 pins) + 1 0 * Dpar (2 pins) + 3 0 * Probe (2 pins) + ------ ------ + Total Inst: 24 20 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 10 10 + + Instances: 3 3 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SMP2 (4 pins) + 1 1 SPMN_2_1 (5 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 10 10 0 0 + + Instances: 3 3 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SMP2 + 1 1 0 0 SPMN_2_1 + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 4 layout instances were filtered and their pins removed from adjoining nets. + + 20 layout mos transistors were reduced to 10. + 10 mos transistors were deleted by parallel reduction. + 20 source mos transistors were reduced to 10. + 10 mos transistors were deleted by parallel reduction. + + 3 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A1_N A2_N B1 B2 VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.pex.spice b/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.pex.spice index 47538a2..ce246ff 100644 --- a/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.pex.spice +++ b/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o2bb2ai_2.pex.spice -* Created: Thu Aug 27 19:22:11 2020 +* Created: Wed Sep 2 08:46:28 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.pxi.spice b/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.pxi.spice index 6035ee5..044f479 100644 --- a/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.pxi.spice +++ b/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o2bb2ai_2.pxi.spice -* Created: Thu Aug 27 19:22:11 2020 +* Created: Wed Sep 2 08:46:28 2020 * x_PM_SKY130_FD_SC_HDLL__O2BB2AI_2%A1_N N_A1_N_c_88_n N_A1_N_M1000_g + N_A1_N_c_89_n N_A1_N_M1004_g N_A1_N_c_90_n N_A1_N_M1006_g N_A1_N_c_91_n
diff --git a/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.spice b/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.spice index c810f24..169ef3c 100644 --- a/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.spice +++ b/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o2bb2ai_2.spice -* Created: Thu Aug 27 19:22:11 2020 +* Created: Wed Sep 2 08:46:28 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.lvs.report b/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.lvs.report new file mode 100644 index 0000000..abb2a60 --- /dev/null +++ b/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.lvs.report
@@ -0,0 +1,521 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 87 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 89 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 91 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 93 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 95 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 97 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o2bb2ai_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o2bb2ai_4.sp ('sky130_fd_sc_hdll__o2bb2ai_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice ('sky130_fd_sc_hdll__o2bb2ai_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:46:32 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o2bb2ai_4 sky130_fd_sc_hdll__o2bb2ai_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o2bb2ai_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__o2bb2ai_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 15 13 * + + Instances: 20 20 MN (4 pins) + 20 20 MP (4 pins) + 1 0 * Dpar (2 pins) + 2 0 * Probe (2 pins) + ------ ------ + Total Inst: 43 40 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 10 10 + + Instances: 3 3 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SMP2 (4 pins) + 1 1 SPMN_2_1 (5 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 10 10 0 0 + + Instances: 3 3 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SMP2 + 1 1 0 0 SPMN_2_1 + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 3 layout instances were filtered and their pins removed from adjoining nets. + + 40 layout mos transistors were reduced to 10. + 30 mos transistors were deleted by parallel reduction. + 40 source mos transistors were reduced to 10. + 30 mos transistors were deleted by parallel reduction. + + 2 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB A2_N A1_N B2 B1 VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.pex.spice b/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.pex.spice index 5de6bbc..2d75e26 100644 --- a/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.pex.spice +++ b/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o2bb2ai_4.pex.spice -* Created: Thu Aug 27 19:22:18 2020 +* Created: Wed Sep 2 08:46:36 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.pxi.spice b/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.pxi.spice index afe4599..ec25852 100644 --- a/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.pxi.spice +++ b/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o2bb2ai_4.pxi.spice -* Created: Thu Aug 27 19:22:18 2020 +* Created: Wed Sep 2 08:46:36 2020 * x_PM_SKY130_FD_SC_HDLL__O2BB2AI_4%A2_N N_A2_N_c_156_n N_A2_N_M1003_g + N_A2_N_c_162_n N_A2_N_M1002_g N_A2_N_c_157_n N_A2_N_M1021_g N_A2_N_c_163_n
diff --git a/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice b/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice index 788df63..7d6a2bb 100644 --- a/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice +++ b/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o2bb2ai_4.spice -* Created: Thu Aug 27 19:22:18 2020 +* Created: Wed Sep 2 08:46:36 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o31ai/sky130_fd_sc_hdll__o31ai_1.lvs.report b/cells/o31ai/sky130_fd_sc_hdll__o31ai_1.lvs.report new file mode 100644 index 0000000..3980c15 --- /dev/null +++ b/cells/o31ai/sky130_fd_sc_hdll__o31ai_1.lvs.report
@@ -0,0 +1,479 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_1.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o31ai_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o31ai_1.sp ('sky130_fd_sc_hdll__o31ai_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_1.spice ('sky130_fd_sc_hdll__o31ai_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:46:40 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o31ai_1 sky130_fd_sc_hdll__o31ai_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o31ai_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__o31ai_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 12 12 + + Instances: 4 4 MN (4 pins) + 4 4 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 9 8 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 9 9 + + Instances: 1 1 MP (4 pins) + 1 1 SMP3 (5 pins) + 1 1 SPMN_3_1 (6 pins) + ------ ------ + Total Inst: 3 3 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 9 9 0 0 + + Instances: 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMP3 + 1 1 0 0 SPMN_3_1 + ------- ------- --------- --------- + Total Inst: 3 3 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB A1 A2 A3 B1 VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o31ai/sky130_fd_sc_hdll__o31ai_1.pex.spice b/cells/o31ai/sky130_fd_sc_hdll__o31ai_1.pex.spice index 7d0d4df..4423adb 100644 --- a/cells/o31ai/sky130_fd_sc_hdll__o31ai_1.pex.spice +++ b/cells/o31ai/sky130_fd_sc_hdll__o31ai_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o31ai_1.pex.spice -* Created: Thu Aug 27 19:22:25 2020 +* Created: Wed Sep 2 08:46:43 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o31ai/sky130_fd_sc_hdll__o31ai_1.pxi.spice b/cells/o31ai/sky130_fd_sc_hdll__o31ai_1.pxi.spice index 0af8a3d..80b25d4 100644 --- a/cells/o31ai/sky130_fd_sc_hdll__o31ai_1.pxi.spice +++ b/cells/o31ai/sky130_fd_sc_hdll__o31ai_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o31ai_1.pxi.spice -* Created: Thu Aug 27 19:22:25 2020 +* Created: Wed Sep 2 08:46:43 2020 * x_PM_SKY130_FD_SC_HDLL__O31AI_1%A1 N_A1_c_45_n N_A1_M1000_g N_A1_c_42_n + N_A1_M1005_g A1 N_A1_c_44_n PM_SKY130_FD_SC_HDLL__O31AI_1%A1
diff --git a/cells/o31ai/sky130_fd_sc_hdll__o31ai_1.spice b/cells/o31ai/sky130_fd_sc_hdll__o31ai_1.spice index c4fcc7f..d3bba58 100644 --- a/cells/o31ai/sky130_fd_sc_hdll__o31ai_1.spice +++ b/cells/o31ai/sky130_fd_sc_hdll__o31ai_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o31ai_1.spice -* Created: Thu Aug 27 19:22:25 2020 +* Created: Wed Sep 2 08:46:43 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o31ai/sky130_fd_sc_hdll__o31ai_2.lvs.report b/cells/o31ai/sky130_fd_sc_hdll__o31ai_2.lvs.report new file mode 100644 index 0000000..53b3734 --- /dev/null +++ b/cells/o31ai/sky130_fd_sc_hdll__o31ai_2.lvs.report
@@ -0,0 +1,492 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_2.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o31ai_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o31ai_2.sp ('sky130_fd_sc_hdll__o31ai_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_2.spice ('sky130_fd_sc_hdll__o31ai_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:46:47 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o31ai_2 sky130_fd_sc_hdll__o31ai_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o31ai_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__o31ai_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 12 12 + + Instances: 8 8 MN (4 pins) + 8 8 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 17 16 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 9 9 + + Instances: 1 1 MP (4 pins) + 1 1 SMP3 (5 pins) + 1 1 SPMN_3_1 (6 pins) + ------ ------ + Total Inst: 3 3 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 9 9 0 0 + + Instances: 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMP3 + 1 1 0 0 SPMN_3_1 + ------- ------- --------- --------- + Total Inst: 3 3 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 16 layout mos transistors were reduced to 8. + 8 mos transistors were deleted by parallel reduction. + 16 source mos transistors were reduced to 8. + 8 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A1 A2 A3 B1 VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o31ai/sky130_fd_sc_hdll__o31ai_2.pex.spice b/cells/o31ai/sky130_fd_sc_hdll__o31ai_2.pex.spice index 9c6cde5..f7545e5 100644 --- a/cells/o31ai/sky130_fd_sc_hdll__o31ai_2.pex.spice +++ b/cells/o31ai/sky130_fd_sc_hdll__o31ai_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o31ai_2.pex.spice -* Created: Thu Aug 27 19:22:32 2020 +* Created: Wed Sep 2 08:46:51 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o31ai/sky130_fd_sc_hdll__o31ai_2.pxi.spice b/cells/o31ai/sky130_fd_sc_hdll__o31ai_2.pxi.spice index 603148f..23b301d 100644 --- a/cells/o31ai/sky130_fd_sc_hdll__o31ai_2.pxi.spice +++ b/cells/o31ai/sky130_fd_sc_hdll__o31ai_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o31ai_2.pxi.spice -* Created: Thu Aug 27 19:22:32 2020 +* Created: Wed Sep 2 08:46:51 2020 * x_PM_SKY130_FD_SC_HDLL__O31AI_2%A1 N_A1_c_75_n N_A1_M1000_g N_A1_M1004_g + N_A1_c_76_n N_A1_M1013_g N_A1_M1015_g A1 A1 A1 N_A1_c_74_n A1 A1
diff --git a/cells/o31ai/sky130_fd_sc_hdll__o31ai_2.spice b/cells/o31ai/sky130_fd_sc_hdll__o31ai_2.spice index ffd1d33..5d3fe61 100644 --- a/cells/o31ai/sky130_fd_sc_hdll__o31ai_2.spice +++ b/cells/o31ai/sky130_fd_sc_hdll__o31ai_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o31ai_2.spice -* Created: Thu Aug 27 19:22:32 2020 +* Created: Wed Sep 2 08:46:51 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.lvs.report b/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.lvs.report new file mode 100644 index 0000000..bc02f06 --- /dev/null +++ b/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.lvs.report
@@ -0,0 +1,508 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o31ai_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o31ai_4.sp ('sky130_fd_sc_hdll__o31ai_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.spice ('sky130_fd_sc_hdll__o31ai_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:46:55 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o31ai_4 sky130_fd_sc_hdll__o31ai_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o31ai_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__o31ai_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 12 12 + + Instances: 16 16 MN (4 pins) + 16 16 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 33 32 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 9 9 + + Instances: 1 1 MP (4 pins) + 1 1 SMP3 (5 pins) + 1 1 SPMN_3_1 (6 pins) + ------ ------ + Total Inst: 3 3 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 9 9 0 0 + + Instances: 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMP3 + 1 1 0 0 SPMN_3_1 + ------- ------- --------- --------- + Total Inst: 3 3 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 32 layout mos transistors were reduced to 8. + 24 mos transistors were deleted by parallel reduction. + 32 source mos transistors were reduced to 8. + 24 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A1 A2 A3 B1 VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.pex.spice b/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.pex.spice index beec798..a30c519 100644 --- a/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.pex.spice +++ b/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o31ai_4.pex.spice -* Created: Thu Aug 27 19:22:39 2020 +* Created: Wed Sep 2 08:46:58 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.pxi.spice b/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.pxi.spice index 38ead7d..d77b0f0 100644 --- a/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.pxi.spice +++ b/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o31ai_4.pxi.spice -* Created: Thu Aug 27 19:22:39 2020 +* Created: Wed Sep 2 08:46:58 2020 * x_PM_SKY130_FD_SC_HDLL__O31AI_4%A1 N_A1_M1003_g N_A1_c_110_n N_A1_M1002_g + N_A1_M1014_g N_A1_c_111_n N_A1_M1006_g N_A1_M1015_g N_A1_c_112_n N_A1_M1013_g
diff --git a/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.spice b/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.spice index 7ce951b..c877491 100644 --- a/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.spice +++ b/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o31ai_4.spice -* Created: Thu Aug 27 19:22:39 2020 +* Created: Wed Sep 2 08:46:58 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o32ai/sky130_fd_sc_hdll__o32ai_1.lvs.report b/cells/o32ai/sky130_fd_sc_hdll__o32ai_1.lvs.report new file mode 100644 index 0000000..ee0b4e5 --- /dev/null +++ b/cells/o32ai/sky130_fd_sc_hdll__o32ai_1.lvs.report
@@ -0,0 +1,481 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_1.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o32ai_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o32ai_1.sp ('sky130_fd_sc_hdll__o32ai_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_1.spice ('sky130_fd_sc_hdll__o32ai_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:47:02 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o32ai_1 sky130_fd_sc_hdll__o32ai_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o32ai_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__o32ai_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 14 14 + + Instances: 5 5 MN (4 pins) + 5 5 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 11 10 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 10 10 + + Instances: 1 1 SMP2 (4 pins) + 1 1 SMP3 (5 pins) + 1 1 SPMN_3_2 (7 pins) + ------ ------ + Total Inst: 3 3 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 10 10 0 0 + + Nets: 10 10 0 0 + + Instances: 1 1 0 0 SMP2 + 1 1 0 0 SMP3 + 1 1 0 0 SPMN_3_2 + ------- ------- --------- --------- + Total Inst: 3 3 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB B1 B2 A3 A2 A1 VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o32ai/sky130_fd_sc_hdll__o32ai_1.pex.spice b/cells/o32ai/sky130_fd_sc_hdll__o32ai_1.pex.spice index a0ca93e..287cd58 100644 --- a/cells/o32ai/sky130_fd_sc_hdll__o32ai_1.pex.spice +++ b/cells/o32ai/sky130_fd_sc_hdll__o32ai_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o32ai_1.pex.spice -* Created: Thu Aug 27 19:22:46 2020 +* Created: Wed Sep 2 08:47:06 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o32ai/sky130_fd_sc_hdll__o32ai_1.pxi.spice b/cells/o32ai/sky130_fd_sc_hdll__o32ai_1.pxi.spice index 1869838..4b379ff 100644 --- a/cells/o32ai/sky130_fd_sc_hdll__o32ai_1.pxi.spice +++ b/cells/o32ai/sky130_fd_sc_hdll__o32ai_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o32ai_1.pxi.spice -* Created: Thu Aug 27 19:22:46 2020 +* Created: Wed Sep 2 08:47:06 2020 * x_PM_SKY130_FD_SC_HDLL__O32AI_1%B1 N_B1_c_43_n N_B1_M1003_g N_B1_c_44_n + N_B1_M1006_g B1 B1 PM_SKY130_FD_SC_HDLL__O32AI_1%B1
diff --git a/cells/o32ai/sky130_fd_sc_hdll__o32ai_1.spice b/cells/o32ai/sky130_fd_sc_hdll__o32ai_1.spice index fce1c48..622549f 100644 --- a/cells/o32ai/sky130_fd_sc_hdll__o32ai_1.spice +++ b/cells/o32ai/sky130_fd_sc_hdll__o32ai_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o32ai_1.spice -* Created: Thu Aug 27 19:22:46 2020 +* Created: Wed Sep 2 08:47:06 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.lvs.report b/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.lvs.report new file mode 100644 index 0000000..6888d9c --- /dev/null +++ b/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.lvs.report
@@ -0,0 +1,496 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o32ai_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o32ai_2.sp ('sky130_fd_sc_hdll__o32ai_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.spice ('sky130_fd_sc_hdll__o32ai_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:47:10 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o32ai_2 sky130_fd_sc_hdll__o32ai_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o32ai_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__o32ai_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 14 14 + + Instances: 10 10 MN (4 pins) + 10 10 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 21 20 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 10 10 + + Instances: 1 1 SMP2 (4 pins) + 1 1 SMP3 (5 pins) + 1 1 SPMN_3_2 (7 pins) + ------ ------ + Total Inst: 3 3 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 10 10 0 0 + + Nets: 10 10 0 0 + + Instances: 1 1 0 0 SMP2 + 1 1 0 0 SMP3 + 1 1 0 0 SPMN_3_2 + ------- ------- --------- --------- + Total Inst: 3 3 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 20 layout mos transistors were reduced to 10. + 10 mos transistors were deleted by parallel reduction. + 20 source mos transistors were reduced to 10. + 10 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB B2 B1 A3 A2 A1 Y VPWR VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.pex.spice b/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.pex.spice index 307bf76..89564f9 100644 --- a/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.pex.spice +++ b/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o32ai_2.pex.spice -* Created: Thu Aug 27 19:22:53 2020 +* Created: Wed Sep 2 08:47:13 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.pxi.spice b/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.pxi.spice index f7df281..69ff141 100644 --- a/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.pxi.spice +++ b/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o32ai_2.pxi.spice -* Created: Thu Aug 27 19:22:53 2020 +* Created: Wed Sep 2 08:47:13 2020 * x_PM_SKY130_FD_SC_HDLL__O32AI_2%B2 N_B2_c_87_n N_B2_M1003_g N_B2_c_91_n + N_B2_M1001_g N_B2_c_92_n N_B2_M1007_g N_B2_c_88_n N_B2_M1019_g B2 B2
diff --git a/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.spice b/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.spice index d837e21..a95ad33 100644 --- a/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.spice +++ b/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o32ai_2.spice -* Created: Thu Aug 27 19:22:53 2020 +* Created: Wed Sep 2 08:47:13 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.lvs.report b/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.lvs.report new file mode 100644 index 0000000..57f801a --- /dev/null +++ b/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.lvs.report
@@ -0,0 +1,516 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 87 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 89 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 91 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 93 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 95 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" +Warning: Duplicate parameter definition "MULT" at line 97 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__o32ai_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__o32ai_4.sp ('sky130_fd_sc_hdll__o32ai_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice ('sky130_fd_sc_hdll__o32ai_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:47:17 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__o32ai_4 sky130_fd_sc_hdll__o32ai_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__o32ai_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__o32ai_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 14 14 + + Instances: 20 20 MN (4 pins) + 20 20 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 41 40 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 10 10 + + Instances: 1 1 SMP2 (4 pins) + 1 1 SMP3 (5 pins) + 1 1 SPMN_3_2 (7 pins) + ------ ------ + Total Inst: 3 3 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 10 10 0 0 + + Nets: 10 10 0 0 + + Instances: 1 1 0 0 SMP2 + 1 1 0 0 SMP3 + 1 1 0 0 SPMN_3_2 + ------- ------- --------- --------- + Total Inst: 3 3 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 40 layout mos transistors were reduced to 10. + 30 mos transistors were deleted by parallel reduction. + 40 source mos transistors were reduced to 10. + 30 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB B2 B1 A3 A2 A1 Y VPWR VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.pex.spice b/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.pex.spice index f7f7f3f..6e955ce 100644 --- a/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.pex.spice +++ b/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o32ai_4.pex.spice -* Created: Thu Aug 27 19:23:00 2020 +* Created: Wed Sep 2 08:47:20 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.pxi.spice b/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.pxi.spice index ab10d86..93f050e 100644 --- a/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.pxi.spice +++ b/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o32ai_4.pxi.spice -* Created: Thu Aug 27 19:23:00 2020 +* Created: Wed Sep 2 08:47:20 2020 * x_PM_SKY130_FD_SC_HDLL__O32AI_4%B2 N_B2_c_136_n N_B2_M1002_g N_B2_M1004_g + N_B2_c_137_n N_B2_M1016_g N_B2_M1026_g N_B2_c_138_n N_B2_M1025_g N_B2_M1027_g
diff --git a/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice b/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice index 405e005..291d210 100644 --- a/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice +++ b/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__o32ai_4.spice -* Created: Thu Aug 27 19:23:00 2020 +* Created: Wed Sep 2 08:47:20 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/or2/sky130_fd_sc_hdll__or2_1.lvs.report b/cells/or2/sky130_fd_sc_hdll__or2_1.lvs.report new file mode 100644 index 0000000..98db10a --- /dev/null +++ b/cells/or2/sky130_fd_sc_hdll__or2_1.lvs.report
@@ -0,0 +1,480 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_1.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__or2_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__or2_1.sp ('sky130_fd_sc_hdll__or2_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_1.spice ('sky130_fd_sc_hdll__or2_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:47:25 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__or2_1 sky130_fd_sc_hdll__or2_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__or2_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__or2_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 10 9 * + + Instances: 3 3 MN (4 pins) + 3 3 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 8 6 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 3 3 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMP2 (4 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 8 8 0 0 + + Instances: 3 3 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB B A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/or2/sky130_fd_sc_hdll__or2_1.pex.spice b/cells/or2/sky130_fd_sc_hdll__or2_1.pex.spice index 048f388..6294221 100644 --- a/cells/or2/sky130_fd_sc_hdll__or2_1.pex.spice +++ b/cells/or2/sky130_fd_sc_hdll__or2_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or2_1.pex.spice -* Created: Thu Aug 27 19:23:08 2020 +* Created: Wed Sep 2 08:47:28 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/or2/sky130_fd_sc_hdll__or2_1.pxi.spice b/cells/or2/sky130_fd_sc_hdll__or2_1.pxi.spice index ea4b096..e458c6b 100644 --- a/cells/or2/sky130_fd_sc_hdll__or2_1.pxi.spice +++ b/cells/or2/sky130_fd_sc_hdll__or2_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or2_1.pxi.spice -* Created: Thu Aug 27 19:23:08 2020 +* Created: Wed Sep 2 08:47:28 2020 * x_PM_SKY130_FD_SC_HDLL__OR2_1%B N_B_M1002_g N_B_c_40_n N_B_M1001_g B B + N_B_c_39_n PM_SKY130_FD_SC_HDLL__OR2_1%B
diff --git a/cells/or2/sky130_fd_sc_hdll__or2_1.spice b/cells/or2/sky130_fd_sc_hdll__or2_1.spice index f552eb8..a78a4a2 100644 --- a/cells/or2/sky130_fd_sc_hdll__or2_1.spice +++ b/cells/or2/sky130_fd_sc_hdll__or2_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or2_1.spice -* Created: Thu Aug 27 19:23:08 2020 +* Created: Wed Sep 2 08:47:28 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/or2/sky130_fd_sc_hdll__or2_2.lvs.report b/cells/or2/sky130_fd_sc_hdll__or2_2.lvs.report new file mode 100644 index 0000000..9280bd6 --- /dev/null +++ b/cells/or2/sky130_fd_sc_hdll__or2_2.lvs.report
@@ -0,0 +1,484 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_2.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__or2_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__or2_2.sp ('sky130_fd_sc_hdll__or2_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_2.spice ('sky130_fd_sc_hdll__or2_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:47:32 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__or2_2 sky130_fd_sc_hdll__or2_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__or2_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__or2_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 9 9 + + Instances: 4 4 MN (4 pins) + 4 4 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 9 8 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 3 3 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMP2 (4 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 8 8 0 0 + + Instances: 3 3 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB B A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/or2/sky130_fd_sc_hdll__or2_2.pex.spice b/cells/or2/sky130_fd_sc_hdll__or2_2.pex.spice index 1a12bd3..9bf46b8 100644 --- a/cells/or2/sky130_fd_sc_hdll__or2_2.pex.spice +++ b/cells/or2/sky130_fd_sc_hdll__or2_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or2_2.pex.spice -* Created: Thu Aug 27 19:23:15 2020 +* Created: Wed Sep 2 08:47:36 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/or2/sky130_fd_sc_hdll__or2_2.pxi.spice b/cells/or2/sky130_fd_sc_hdll__or2_2.pxi.spice index 9e4a829..859a174 100644 --- a/cells/or2/sky130_fd_sc_hdll__or2_2.pxi.spice +++ b/cells/or2/sky130_fd_sc_hdll__or2_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or2_2.pxi.spice -* Created: Thu Aug 27 19:23:15 2020 +* Created: Wed Sep 2 08:47:36 2020 * x_PM_SKY130_FD_SC_HDLL__OR2_2%B N_B_M1006_g N_B_c_49_n N_B_M1002_g B B + N_B_c_48_n PM_SKY130_FD_SC_HDLL__OR2_2%B
diff --git a/cells/or2/sky130_fd_sc_hdll__or2_2.spice b/cells/or2/sky130_fd_sc_hdll__or2_2.spice index 56b6808..6541f1a 100644 --- a/cells/or2/sky130_fd_sc_hdll__or2_2.spice +++ b/cells/or2/sky130_fd_sc_hdll__or2_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or2_2.spice -* Created: Thu Aug 27 19:23:15 2020 +* Created: Wed Sep 2 08:47:36 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/or2/sky130_fd_sc_hdll__or2_4.lvs.report b/cells/or2/sky130_fd_sc_hdll__or2_4.lvs.report new file mode 100644 index 0000000..ae6410e --- /dev/null +++ b/cells/or2/sky130_fd_sc_hdll__or2_4.lvs.report
@@ -0,0 +1,488 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_4.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__or2_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__or2_4.sp ('sky130_fd_sc_hdll__or2_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_4.spice ('sky130_fd_sc_hdll__or2_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:47:40 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__or2_4 sky130_fd_sc_hdll__or2_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__or2_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__or2_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 9 9 + + Instances: 6 6 MN (4 pins) + 6 6 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 13 12 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 3 3 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMP2 (4 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 8 8 0 0 + + Instances: 3 3 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB B A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/or2/sky130_fd_sc_hdll__or2_4.pex.spice b/cells/or2/sky130_fd_sc_hdll__or2_4.pex.spice index b56972a..ee4bd31 100644 --- a/cells/or2/sky130_fd_sc_hdll__or2_4.pex.spice +++ b/cells/or2/sky130_fd_sc_hdll__or2_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or2_4.pex.spice -* Created: Thu Aug 27 19:23:22 2020 +* Created: Wed Sep 2 08:47:43 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/or2/sky130_fd_sc_hdll__or2_4.pxi.spice b/cells/or2/sky130_fd_sc_hdll__or2_4.pxi.spice index 039f649..d96b7b4 100644 --- a/cells/or2/sky130_fd_sc_hdll__or2_4.pxi.spice +++ b/cells/or2/sky130_fd_sc_hdll__or2_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or2_4.pxi.spice -* Created: Thu Aug 27 19:23:22 2020 +* Created: Wed Sep 2 08:47:43 2020 * x_PM_SKY130_FD_SC_HDLL__OR2_4%B N_B_c_57_n N_B_M1009_g N_B_c_60_n N_B_M1003_g B + B N_B_c_59_n PM_SKY130_FD_SC_HDLL__OR2_4%B
diff --git a/cells/or2/sky130_fd_sc_hdll__or2_4.spice b/cells/or2/sky130_fd_sc_hdll__or2_4.spice index f61ac07..5c25f8e 100644 --- a/cells/or2/sky130_fd_sc_hdll__or2_4.spice +++ b/cells/or2/sky130_fd_sc_hdll__or2_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or2_4.spice -* Created: Thu Aug 27 19:23:22 2020 +* Created: Wed Sep 2 08:47:43 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/or2/sky130_fd_sc_hdll__or2_6.lvs.report b/cells/or2/sky130_fd_sc_hdll__or2_6.lvs.report new file mode 100644 index 0000000..2124266 --- /dev/null +++ b/cells/or2/sky130_fd_sc_hdll__or2_6.lvs.report
@@ -0,0 +1,496 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_6.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_6.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_6.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__or2_6.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__or2_6.sp ('sky130_fd_sc_hdll__or2_6') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_6.spice ('sky130_fd_sc_hdll__or2_6') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:47:47 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__or2_6 sky130_fd_sc_hdll__or2_6 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__or2_6 +SOURCE CELL NAME: sky130_fd_sc_hdll__or2_6 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 9 9 + + Instances: 10 10 MN (4 pins) + 10 10 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 21 20 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 3 3 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMP2 (4 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 8 8 0 0 + + Instances: 3 3 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 20 layout mos transistors were reduced to 6. + 14 mos transistors were deleted by parallel reduction. + 20 source mos transistors were reduced to 6. + 14 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A B VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/or2/sky130_fd_sc_hdll__or2_6.pex.spice b/cells/or2/sky130_fd_sc_hdll__or2_6.pex.spice index 1de7f49..608ee8b 100644 --- a/cells/or2/sky130_fd_sc_hdll__or2_6.pex.spice +++ b/cells/or2/sky130_fd_sc_hdll__or2_6.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or2_6.pex.spice -* Created: Thu Aug 27 19:23:29 2020 +* Created: Wed Sep 2 08:47:50 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/or2/sky130_fd_sc_hdll__or2_6.pxi.spice b/cells/or2/sky130_fd_sc_hdll__or2_6.pxi.spice index 82745d7..f2a6a9f 100644 --- a/cells/or2/sky130_fd_sc_hdll__or2_6.pxi.spice +++ b/cells/or2/sky130_fd_sc_hdll__or2_6.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or2_6.pxi.spice -* Created: Thu Aug 27 19:23:29 2020 +* Created: Wed Sep 2 08:47:50 2020 * x_PM_SKY130_FD_SC_HDLL__OR2_6%A N_A_c_94_n N_A_M1000_g N_A_c_90_n N_A_M1001_g + N_A_c_91_n N_A_M1004_g N_A_c_95_n N_A_M1013_g A N_A_c_92_n N_A_c_93_n A
diff --git a/cells/or2/sky130_fd_sc_hdll__or2_6.spice b/cells/or2/sky130_fd_sc_hdll__or2_6.spice index 592aeab..365443f 100644 --- a/cells/or2/sky130_fd_sc_hdll__or2_6.spice +++ b/cells/or2/sky130_fd_sc_hdll__or2_6.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or2_6.spice -* Created: Thu Aug 27 19:23:29 2020 +* Created: Wed Sep 2 08:47:50 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/or2/sky130_fd_sc_hdll__or2_8.lvs.report b/cells/or2/sky130_fd_sc_hdll__or2_8.lvs.report new file mode 100644 index 0000000..b54483b --- /dev/null +++ b/cells/or2/sky130_fd_sc_hdll__or2_8.lvs.report
@@ -0,0 +1,500 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_8.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_8.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_8.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__or2_8.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__or2_8.sp ('sky130_fd_sc_hdll__or2_8') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2/sky130_fd_sc_hdll__or2_8.spice ('sky130_fd_sc_hdll__or2_8') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:47:54 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__or2_8 sky130_fd_sc_hdll__or2_8 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__or2_8 +SOURCE CELL NAME: sky130_fd_sc_hdll__or2_8 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 9 9 + + Instances: 12 12 MN (4 pins) + 12 12 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 25 24 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 3 3 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMP2 (4 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 8 8 0 0 + + Instances: 3 3 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 24 layout mos transistors were reduced to 6. + 18 mos transistors were deleted by parallel reduction. + 24 source mos transistors were reduced to 6. + 18 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A B VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/or2/sky130_fd_sc_hdll__or2_8.pex.spice b/cells/or2/sky130_fd_sc_hdll__or2_8.pex.spice index 8ae411f..5e3bfa9 100644 --- a/cells/or2/sky130_fd_sc_hdll__or2_8.pex.spice +++ b/cells/or2/sky130_fd_sc_hdll__or2_8.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or2_8.pex.spice -* Created: Thu Aug 27 19:23:36 2020 +* Created: Wed Sep 2 08:47:58 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/or2/sky130_fd_sc_hdll__or2_8.pxi.spice b/cells/or2/sky130_fd_sc_hdll__or2_8.pxi.spice index 918c0b2..a0a8f4b 100644 --- a/cells/or2/sky130_fd_sc_hdll__or2_8.pxi.spice +++ b/cells/or2/sky130_fd_sc_hdll__or2_8.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or2_8.pxi.spice -* Created: Thu Aug 27 19:23:36 2020 +* Created: Wed Sep 2 08:47:58 2020 * x_PM_SKY130_FD_SC_HDLL__OR2_8%A N_A_c_106_n N_A_M1000_g N_A_c_102_n N_A_M1001_g + N_A_c_103_n N_A_M1004_g N_A_c_107_n N_A_M1014_g A N_A_c_104_n N_A_c_105_n A
diff --git a/cells/or2/sky130_fd_sc_hdll__or2_8.spice b/cells/or2/sky130_fd_sc_hdll__or2_8.spice index 37203f9..ed64c3a 100644 --- a/cells/or2/sky130_fd_sc_hdll__or2_8.spice +++ b/cells/or2/sky130_fd_sc_hdll__or2_8.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or2_8.spice -* Created: Thu Aug 27 19:23:36 2020 +* Created: Wed Sep 2 08:47:58 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/or2b/sky130_fd_sc_hdll__or2b_1.lvs.report b/cells/or2b/sky130_fd_sc_hdll__or2b_1.lvs.report new file mode 100644 index 0000000..274fd13 --- /dev/null +++ b/cells/or2b/sky130_fd_sc_hdll__or2b_1.lvs.report
@@ -0,0 +1,479 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2b/sky130_fd_sc_hdll__or2b_1.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2b/sky130_fd_sc_hdll__or2b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2b/sky130_fd_sc_hdll__or2b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2b/sky130_fd_sc_hdll__or2b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2b/sky130_fd_sc_hdll__or2b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2b/sky130_fd_sc_hdll__or2b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2b/sky130_fd_sc_hdll__or2b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2b/sky130_fd_sc_hdll__or2b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2b/sky130_fd_sc_hdll__or2b_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__or2b_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__or2b_1.sp ('sky130_fd_sc_hdll__or2b_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2b/sky130_fd_sc_hdll__or2b_1.spice ('sky130_fd_sc_hdll__or2b_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:48:02 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__or2b_1 sky130_fd_sc_hdll__or2b_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__or2b_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__or2b_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 10 10 + + Instances: 4 4 MN (4 pins) + 4 4 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 9 8 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 9 9 + + Instances: 4 4 MN (4 pins) + 2 2 MP (4 pins) + 1 1 SMP2 (4 pins) + ------ ------ + Total Inst: 7 7 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 9 9 0 0 + + Instances: 4 4 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + 1 1 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 7 7 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB B_N A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/or2b/sky130_fd_sc_hdll__or2b_1.pex.spice b/cells/or2b/sky130_fd_sc_hdll__or2b_1.pex.spice index f3cec21..75dd71d 100644 --- a/cells/or2b/sky130_fd_sc_hdll__or2b_1.pex.spice +++ b/cells/or2b/sky130_fd_sc_hdll__or2b_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or2b_1.pex.spice -* Created: Thu Aug 27 19:23:43 2020 +* Created: Wed Sep 2 08:48:05 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/or2b/sky130_fd_sc_hdll__or2b_1.pxi.spice b/cells/or2b/sky130_fd_sc_hdll__or2b_1.pxi.spice index 6337459..02f8528 100644 --- a/cells/or2b/sky130_fd_sc_hdll__or2b_1.pxi.spice +++ b/cells/or2b/sky130_fd_sc_hdll__or2b_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or2b_1.pxi.spice -* Created: Thu Aug 27 19:23:43 2020 +* Created: Wed Sep 2 08:48:05 2020 * x_PM_SKY130_FD_SC_HDLL__OR2B_1%B_N N_B_N_c_58_n N_B_N_M1002_g N_B_N_M1000_g B_N + N_B_N_c_57_n B_N PM_SKY130_FD_SC_HDLL__OR2B_1%B_N
diff --git a/cells/or2b/sky130_fd_sc_hdll__or2b_1.spice b/cells/or2b/sky130_fd_sc_hdll__or2b_1.spice index 3f75280..bb7f198 100644 --- a/cells/or2b/sky130_fd_sc_hdll__or2b_1.spice +++ b/cells/or2b/sky130_fd_sc_hdll__or2b_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or2b_1.spice -* Created: Thu Aug 27 19:23:43 2020 +* Created: Wed Sep 2 08:48:05 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/or2b/sky130_fd_sc_hdll__or2b_2.lvs.report b/cells/or2b/sky130_fd_sc_hdll__or2b_2.lvs.report new file mode 100644 index 0000000..e49c120 --- /dev/null +++ b/cells/or2b/sky130_fd_sc_hdll__or2b_2.lvs.report
@@ -0,0 +1,486 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2b/sky130_fd_sc_hdll__or2b_2.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2b/sky130_fd_sc_hdll__or2b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2b/sky130_fd_sc_hdll__or2b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2b/sky130_fd_sc_hdll__or2b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2b/sky130_fd_sc_hdll__or2b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2b/sky130_fd_sc_hdll__or2b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2b/sky130_fd_sc_hdll__or2b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2b/sky130_fd_sc_hdll__or2b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2b/sky130_fd_sc_hdll__or2b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2b/sky130_fd_sc_hdll__or2b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2b/sky130_fd_sc_hdll__or2b_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__or2b_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__or2b_2.sp ('sky130_fd_sc_hdll__or2b_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2b/sky130_fd_sc_hdll__or2b_2.spice ('sky130_fd_sc_hdll__or2b_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:48:09 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__or2b_2 sky130_fd_sc_hdll__or2b_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__or2b_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__or2b_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 10 10 + + Instances: 5 5 MN (4 pins) + 5 5 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 11 10 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 9 9 + + Instances: 4 4 MN (4 pins) + 2 2 MP (4 pins) + 1 1 SMP2 (4 pins) + ------ ------ + Total Inst: 7 7 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 9 9 0 0 + + Instances: 4 4 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + 1 1 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 7 7 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB B_N A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/or2b/sky130_fd_sc_hdll__or2b_2.pex.spice b/cells/or2b/sky130_fd_sc_hdll__or2b_2.pex.spice index 0f78842..5d57ae2 100644 --- a/cells/or2b/sky130_fd_sc_hdll__or2b_2.pex.spice +++ b/cells/or2b/sky130_fd_sc_hdll__or2b_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or2b_2.pex.spice -* Created: Thu Aug 27 19:23:50 2020 +* Created: Wed Sep 2 08:48:12 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/or2b/sky130_fd_sc_hdll__or2b_2.pxi.spice b/cells/or2b/sky130_fd_sc_hdll__or2b_2.pxi.spice index 62926ee..12d17e6 100644 --- a/cells/or2b/sky130_fd_sc_hdll__or2b_2.pxi.spice +++ b/cells/or2b/sky130_fd_sc_hdll__or2b_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or2b_2.pxi.spice -* Created: Thu Aug 27 19:23:50 2020 +* Created: Wed Sep 2 08:48:12 2020 * x_PM_SKY130_FD_SC_HDLL__OR2B_2%B_N N_B_N_c_66_n N_B_N_M1003_g N_B_N_M1000_g B_N + N_B_N_c_65_n B_N PM_SKY130_FD_SC_HDLL__OR2B_2%B_N
diff --git a/cells/or2b/sky130_fd_sc_hdll__or2b_2.spice b/cells/or2b/sky130_fd_sc_hdll__or2b_2.spice index 90b9209..2869127 100644 --- a/cells/or2b/sky130_fd_sc_hdll__or2b_2.spice +++ b/cells/or2b/sky130_fd_sc_hdll__or2b_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or2b_2.spice -* Created: Thu Aug 27 19:23:50 2020 +* Created: Wed Sep 2 08:48:12 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/or2b/sky130_fd_sc_hdll__or2b_4.lvs.report b/cells/or2b/sky130_fd_sc_hdll__or2b_4.lvs.report new file mode 100644 index 0000000..8dfd874 --- /dev/null +++ b/cells/or2b/sky130_fd_sc_hdll__or2b_4.lvs.report
@@ -0,0 +1,493 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2b/sky130_fd_sc_hdll__or2b_4.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2b/sky130_fd_sc_hdll__or2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2b/sky130_fd_sc_hdll__or2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2b/sky130_fd_sc_hdll__or2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2b/sky130_fd_sc_hdll__or2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2b/sky130_fd_sc_hdll__or2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2b/sky130_fd_sc_hdll__or2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2b/sky130_fd_sc_hdll__or2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2b/sky130_fd_sc_hdll__or2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2b/sky130_fd_sc_hdll__or2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2b/sky130_fd_sc_hdll__or2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2b/sky130_fd_sc_hdll__or2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2b/sky130_fd_sc_hdll__or2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2b/sky130_fd_sc_hdll__or2b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2b/sky130_fd_sc_hdll__or2b_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__or2b_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__or2b_4.sp ('sky130_fd_sc_hdll__or2b_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or2b/sky130_fd_sc_hdll__or2b_4.spice ('sky130_fd_sc_hdll__or2b_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:48:16 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__or2b_4 sky130_fd_sc_hdll__or2b_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__or2b_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__or2b_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 11 10 * + + Instances: 7 7 MN (4 pins) + 7 7 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 16 14 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 9 9 + + Instances: 4 4 MN (4 pins) + 2 2 MP (4 pins) + 1 1 SMP2 (4 pins) + ------ ------ + Total Inst: 7 7 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 9 9 0 0 + + Instances: 4 4 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + 1 1 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 7 7 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB B_N A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/or2b/sky130_fd_sc_hdll__or2b_4.pex.spice b/cells/or2b/sky130_fd_sc_hdll__or2b_4.pex.spice index 43463c3..6b479bd 100644 --- a/cells/or2b/sky130_fd_sc_hdll__or2b_4.pex.spice +++ b/cells/or2b/sky130_fd_sc_hdll__or2b_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or2b_4.pex.spice -* Created: Thu Aug 27 19:23:58 2020 +* Created: Wed Sep 2 08:48:20 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/or2b/sky130_fd_sc_hdll__or2b_4.pxi.spice b/cells/or2b/sky130_fd_sc_hdll__or2b_4.pxi.spice index 7f6db66..0b5d39f 100644 --- a/cells/or2b/sky130_fd_sc_hdll__or2b_4.pxi.spice +++ b/cells/or2b/sky130_fd_sc_hdll__or2b_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or2b_4.pxi.spice -* Created: Thu Aug 27 19:23:58 2020 +* Created: Wed Sep 2 08:48:20 2020 * x_PM_SKY130_FD_SC_HDLL__OR2B_4%B_N N_B_N_c_79_n N_B_N_c_80_n N_B_N_M1001_g + N_B_N_M1000_g B_N B_N B_N N_B_N_c_78_n PM_SKY130_FD_SC_HDLL__OR2B_4%B_N
diff --git a/cells/or2b/sky130_fd_sc_hdll__or2b_4.spice b/cells/or2b/sky130_fd_sc_hdll__or2b_4.spice index 3b0c9ff..357d84b 100644 --- a/cells/or2b/sky130_fd_sc_hdll__or2b_4.spice +++ b/cells/or2b/sky130_fd_sc_hdll__or2b_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or2b_4.spice -* Created: Thu Aug 27 19:23:58 2020 +* Created: Wed Sep 2 08:48:20 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/or3/sky130_fd_sc_hdll__or3_1.lvs.report b/cells/or3/sky130_fd_sc_hdll__or3_1.lvs.report new file mode 100644 index 0000000..44df362 --- /dev/null +++ b/cells/or3/sky130_fd_sc_hdll__or3_1.lvs.report
@@ -0,0 +1,482 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3/sky130_fd_sc_hdll__or3_1.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3/sky130_fd_sc_hdll__or3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3/sky130_fd_sc_hdll__or3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3/sky130_fd_sc_hdll__or3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3/sky130_fd_sc_hdll__or3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3/sky130_fd_sc_hdll__or3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3/sky130_fd_sc_hdll__or3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3/sky130_fd_sc_hdll__or3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3/sky130_fd_sc_hdll__or3_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__or3_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__or3_1.sp ('sky130_fd_sc_hdll__or3_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3/sky130_fd_sc_hdll__or3_1.spice ('sky130_fd_sc_hdll__or3_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:48:24 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__or3_1 sky130_fd_sc_hdll__or3_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__or3_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__or3_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 12 11 * + + Instances: 4 4 MN (4 pins) + 4 4 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 10 8 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 9 9 + + Instances: 4 4 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMP3 (5 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 9 9 0 0 + + Instances: 4 4 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMP3 + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB C B A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/or3/sky130_fd_sc_hdll__or3_1.pex.spice b/cells/or3/sky130_fd_sc_hdll__or3_1.pex.spice index 23124ca..7cbe47e 100644 --- a/cells/or3/sky130_fd_sc_hdll__or3_1.pex.spice +++ b/cells/or3/sky130_fd_sc_hdll__or3_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or3_1.pex.spice -* Created: Thu Aug 27 19:24:05 2020 +* Created: Wed Sep 2 08:48:27 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/or3/sky130_fd_sc_hdll__or3_1.pxi.spice b/cells/or3/sky130_fd_sc_hdll__or3_1.pxi.spice index 1492af9..f8a233b 100644 --- a/cells/or3/sky130_fd_sc_hdll__or3_1.pxi.spice +++ b/cells/or3/sky130_fd_sc_hdll__or3_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or3_1.pxi.spice -* Created: Thu Aug 27 19:24:05 2020 +* Created: Wed Sep 2 08:48:27 2020 * x_PM_SKY130_FD_SC_HDLL__OR3_1%C N_C_c_56_n N_C_M1002_g N_C_M1001_g C N_C_c_55_n + PM_SKY130_FD_SC_HDLL__OR3_1%C
diff --git a/cells/or3/sky130_fd_sc_hdll__or3_1.spice b/cells/or3/sky130_fd_sc_hdll__or3_1.spice index 6f3abd0..0d53288 100644 --- a/cells/or3/sky130_fd_sc_hdll__or3_1.spice +++ b/cells/or3/sky130_fd_sc_hdll__or3_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or3_1.spice -* Created: Thu Aug 27 19:24:05 2020 +* Created: Wed Sep 2 08:48:27 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/or3/sky130_fd_sc_hdll__or3_2.lvs.report b/cells/or3/sky130_fd_sc_hdll__or3_2.lvs.report new file mode 100644 index 0000000..07f8baf --- /dev/null +++ b/cells/or3/sky130_fd_sc_hdll__or3_2.lvs.report
@@ -0,0 +1,486 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3/sky130_fd_sc_hdll__or3_2.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3/sky130_fd_sc_hdll__or3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3/sky130_fd_sc_hdll__or3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3/sky130_fd_sc_hdll__or3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3/sky130_fd_sc_hdll__or3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3/sky130_fd_sc_hdll__or3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3/sky130_fd_sc_hdll__or3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3/sky130_fd_sc_hdll__or3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3/sky130_fd_sc_hdll__or3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3/sky130_fd_sc_hdll__or3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3/sky130_fd_sc_hdll__or3_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__or3_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__or3_2.sp ('sky130_fd_sc_hdll__or3_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3/sky130_fd_sc_hdll__or3_2.spice ('sky130_fd_sc_hdll__or3_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:48:31 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__or3_2 sky130_fd_sc_hdll__or3_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__or3_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__or3_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 11 11 + + Instances: 5 5 MN (4 pins) + 5 5 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 11 10 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 9 9 + + Instances: 4 4 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMP3 (5 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 9 9 0 0 + + Instances: 4 4 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMP3 + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB C B A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/or3/sky130_fd_sc_hdll__or3_2.pex.spice b/cells/or3/sky130_fd_sc_hdll__or3_2.pex.spice index d348ec3..8aac609 100644 --- a/cells/or3/sky130_fd_sc_hdll__or3_2.pex.spice +++ b/cells/or3/sky130_fd_sc_hdll__or3_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or3_2.pex.spice -* Created: Thu Aug 27 19:24:12 2020 +* Created: Wed Sep 2 08:48:35 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/or3/sky130_fd_sc_hdll__or3_2.pxi.spice b/cells/or3/sky130_fd_sc_hdll__or3_2.pxi.spice index 7fd6677..ecfa010 100644 --- a/cells/or3/sky130_fd_sc_hdll__or3_2.pxi.spice +++ b/cells/or3/sky130_fd_sc_hdll__or3_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or3_2.pxi.spice -* Created: Thu Aug 27 19:24:12 2020 +* Created: Wed Sep 2 08:48:35 2020 * x_PM_SKY130_FD_SC_HDLL__OR3_2%C N_C_c_62_n N_C_M1001_g N_C_M1008_g C N_C_c_61_n + PM_SKY130_FD_SC_HDLL__OR3_2%C
diff --git a/cells/or3/sky130_fd_sc_hdll__or3_2.spice b/cells/or3/sky130_fd_sc_hdll__or3_2.spice index 10ae574..62bb209 100644 --- a/cells/or3/sky130_fd_sc_hdll__or3_2.spice +++ b/cells/or3/sky130_fd_sc_hdll__or3_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or3_2.spice -* Created: Thu Aug 27 19:24:12 2020 +* Created: Wed Sep 2 08:48:35 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/or3/sky130_fd_sc_hdll__or3_4.lvs.report b/cells/or3/sky130_fd_sc_hdll__or3_4.lvs.report new file mode 100644 index 0000000..1b74817 --- /dev/null +++ b/cells/or3/sky130_fd_sc_hdll__or3_4.lvs.report
@@ -0,0 +1,490 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3/sky130_fd_sc_hdll__or3_4.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3/sky130_fd_sc_hdll__or3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3/sky130_fd_sc_hdll__or3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3/sky130_fd_sc_hdll__or3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3/sky130_fd_sc_hdll__or3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3/sky130_fd_sc_hdll__or3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3/sky130_fd_sc_hdll__or3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3/sky130_fd_sc_hdll__or3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3/sky130_fd_sc_hdll__or3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3/sky130_fd_sc_hdll__or3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3/sky130_fd_sc_hdll__or3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3/sky130_fd_sc_hdll__or3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3/sky130_fd_sc_hdll__or3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3/sky130_fd_sc_hdll__or3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3/sky130_fd_sc_hdll__or3_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__or3_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__or3_4.sp ('sky130_fd_sc_hdll__or3_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3/sky130_fd_sc_hdll__or3_4.spice ('sky130_fd_sc_hdll__or3_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:48:39 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__or3_4 sky130_fd_sc_hdll__or3_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__or3_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__or3_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 11 11 + + Instances: 7 7 MN (4 pins) + 7 7 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 15 14 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 9 9 + + Instances: 4 4 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMP3 (5 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 9 9 0 0 + + Instances: 4 4 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMP3 + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB C B A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/or3/sky130_fd_sc_hdll__or3_4.pex.spice b/cells/or3/sky130_fd_sc_hdll__or3_4.pex.spice index 21455c6..9c517ce 100644 --- a/cells/or3/sky130_fd_sc_hdll__or3_4.pex.spice +++ b/cells/or3/sky130_fd_sc_hdll__or3_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or3_4.pex.spice -* Created: Thu Aug 27 19:24:19 2020 +* Created: Wed Sep 2 08:48:42 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/or3/sky130_fd_sc_hdll__or3_4.pxi.spice b/cells/or3/sky130_fd_sc_hdll__or3_4.pxi.spice index afee978..0c50b6d 100644 --- a/cells/or3/sky130_fd_sc_hdll__or3_4.pxi.spice +++ b/cells/or3/sky130_fd_sc_hdll__or3_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or3_4.pxi.spice -* Created: Thu Aug 27 19:24:19 2020 +* Created: Wed Sep 2 08:48:42 2020 * x_PM_SKY130_FD_SC_HDLL__OR3_4%C N_C_c_80_n N_C_M1005_g N_C_c_77_n N_C_M1010_g C + N_C_c_79_n PM_SKY130_FD_SC_HDLL__OR3_4%C
diff --git a/cells/or3/sky130_fd_sc_hdll__or3_4.spice b/cells/or3/sky130_fd_sc_hdll__or3_4.spice index b888cd0..c927afa 100644 --- a/cells/or3/sky130_fd_sc_hdll__or3_4.spice +++ b/cells/or3/sky130_fd_sc_hdll__or3_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or3_4.spice -* Created: Thu Aug 27 19:24:19 2020 +* Created: Wed Sep 2 08:48:42 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/or3b/sky130_fd_sc_hdll__or3b_1.lvs.report b/cells/or3b/sky130_fd_sc_hdll__or3b_1.lvs.report new file mode 100644 index 0000000..ac1839d --- /dev/null +++ b/cells/or3b/sky130_fd_sc_hdll__or3b_1.lvs.report
@@ -0,0 +1,484 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_1.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__or3b_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__or3b_1.sp ('sky130_fd_sc_hdll__or3b_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_1.spice ('sky130_fd_sc_hdll__or3b_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:48:46 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__or3b_1 sky130_fd_sc_hdll__or3b_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__or3b_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__or3b_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 14 12 * + + Instances: 5 5 MN (4 pins) + 5 5 MP (4 pins) + 1 0 * Dpar (2 pins) + 2 0 * Probe (2 pins) + ------ ------ + Total Inst: 13 10 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 10 10 + + Instances: 5 5 MN (4 pins) + 2 2 MP (4 pins) + 1 1 SMP3 (5 pins) + ------ ------ + Total Inst: 8 8 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 10 10 0 0 + + Instances: 5 5 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + 1 1 0 0 SMP3 + ------- ------- --------- --------- + Total Inst: 8 8 0 0 + + +o Statistics: + + 3 layout instances were filtered and their pins removed from adjoining nets. + + 2 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB C_N B A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/or3b/sky130_fd_sc_hdll__or3b_1.pex.spice b/cells/or3b/sky130_fd_sc_hdll__or3b_1.pex.spice index 85a4675..39bc03d 100644 --- a/cells/or3b/sky130_fd_sc_hdll__or3b_1.pex.spice +++ b/cells/or3b/sky130_fd_sc_hdll__or3b_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or3b_1.pex.spice -* Created: Thu Aug 27 19:24:26 2020 +* Created: Wed Sep 2 08:48:50 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/or3b/sky130_fd_sc_hdll__or3b_1.pxi.spice b/cells/or3b/sky130_fd_sc_hdll__or3b_1.pxi.spice index 40895b3..0f88494 100644 --- a/cells/or3b/sky130_fd_sc_hdll__or3b_1.pxi.spice +++ b/cells/or3b/sky130_fd_sc_hdll__or3b_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or3b_1.pxi.spice -* Created: Thu Aug 27 19:24:26 2020 +* Created: Wed Sep 2 08:48:50 2020 * x_PM_SKY130_FD_SC_HDLL__OR3B_1%C_N N_C_N_c_70_n N_C_N_M1003_g N_C_N_c_67_n + N_C_N_M1006_g C_N N_C_N_c_69_n C_N PM_SKY130_FD_SC_HDLL__OR3B_1%C_N
diff --git a/cells/or3b/sky130_fd_sc_hdll__or3b_1.spice b/cells/or3b/sky130_fd_sc_hdll__or3b_1.spice index 54f9464..1f9273f 100644 --- a/cells/or3b/sky130_fd_sc_hdll__or3b_1.spice +++ b/cells/or3b/sky130_fd_sc_hdll__or3b_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or3b_1.spice -* Created: Thu Aug 27 19:24:26 2020 +* Created: Wed Sep 2 08:48:50 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/or3b/sky130_fd_sc_hdll__or3b_2.lvs.report b/cells/or3b/sky130_fd_sc_hdll__or3b_2.lvs.report new file mode 100644 index 0000000..633a244 --- /dev/null +++ b/cells/or3b/sky130_fd_sc_hdll__or3b_2.lvs.report
@@ -0,0 +1,491 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_2.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__or3b_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__or3b_2.sp ('sky130_fd_sc_hdll__or3b_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_2.spice ('sky130_fd_sc_hdll__or3b_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:48:54 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__or3b_2 sky130_fd_sc_hdll__or3b_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__or3b_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__or3b_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 15 12 * + + Instances: 6 6 MN (4 pins) + 6 6 MP (4 pins) + 1 0 * Dpar (2 pins) + 3 0 * Probe (2 pins) + ------ ------ + Total Inst: 16 12 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 10 10 + + Instances: 5 5 MN (4 pins) + 2 2 MP (4 pins) + 1 1 SMP3 (5 pins) + ------ ------ + Total Inst: 8 8 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 10 10 0 0 + + Instances: 5 5 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + 1 1 0 0 SMP3 + ------- ------- --------- --------- + Total Inst: 8 8 0 0 + + +o Statistics: + + 4 layout instances were filtered and their pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + 3 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB C_N A B VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/or3b/sky130_fd_sc_hdll__or3b_2.pex.spice b/cells/or3b/sky130_fd_sc_hdll__or3b_2.pex.spice index 1f70ab6..3346a8c 100644 --- a/cells/or3b/sky130_fd_sc_hdll__or3b_2.pex.spice +++ b/cells/or3b/sky130_fd_sc_hdll__or3b_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or3b_2.pex.spice -* Created: Thu Aug 27 19:24:33 2020 +* Created: Wed Sep 2 08:48:57 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/or3b/sky130_fd_sc_hdll__or3b_2.pxi.spice b/cells/or3b/sky130_fd_sc_hdll__or3b_2.pxi.spice index bfb63b6..c9967d7 100644 --- a/cells/or3b/sky130_fd_sc_hdll__or3b_2.pxi.spice +++ b/cells/or3b/sky130_fd_sc_hdll__or3b_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or3b_2.pxi.spice -* Created: Thu Aug 27 19:24:33 2020 +* Created: Wed Sep 2 08:48:57 2020 * x_PM_SKY130_FD_SC_HDLL__OR3B_2%C_N N_C_N_c_77_n N_C_N_c_78_n N_C_N_M1006_g + N_C_N_M1009_g C_N C_N N_C_N_c_76_n PM_SKY130_FD_SC_HDLL__OR3B_2%C_N
diff --git a/cells/or3b/sky130_fd_sc_hdll__or3b_2.spice b/cells/or3b/sky130_fd_sc_hdll__or3b_2.spice index f48913b..a3cdd85 100644 --- a/cells/or3b/sky130_fd_sc_hdll__or3b_2.spice +++ b/cells/or3b/sky130_fd_sc_hdll__or3b_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or3b_2.spice -* Created: Thu Aug 27 19:24:33 2020 +* Created: Wed Sep 2 08:48:57 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/or3b/sky130_fd_sc_hdll__or3b_4.lvs.report b/cells/or3b/sky130_fd_sc_hdll__or3b_4.lvs.report new file mode 100644 index 0000000..bab2467 --- /dev/null +++ b/cells/or3b/sky130_fd_sc_hdll__or3b_4.lvs.report
@@ -0,0 +1,492 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_4.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__or3b_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__or3b_4.sp ('sky130_fd_sc_hdll__or3b_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or3b/sky130_fd_sc_hdll__or3b_4.spice ('sky130_fd_sc_hdll__or3b_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:49:01 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__or3b_4 sky130_fd_sc_hdll__or3b_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__or3b_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__or3b_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 12 12 + + Instances: 8 8 MN (4 pins) + 8 8 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 17 16 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 10 10 + + Instances: 5 5 MN (4 pins) + 2 2 MP (4 pins) + 1 1 SMP3 (5 pins) + ------ ------ + Total Inst: 8 8 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 10 10 0 0 + + Instances: 5 5 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + 1 1 0 0 SMP3 + ------- ------- --------- --------- + Total Inst: 8 8 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB C_N A B VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/or3b/sky130_fd_sc_hdll__or3b_4.pex.spice b/cells/or3b/sky130_fd_sc_hdll__or3b_4.pex.spice index 3e21f92..e60f5df 100644 --- a/cells/or3b/sky130_fd_sc_hdll__or3b_4.pex.spice +++ b/cells/or3b/sky130_fd_sc_hdll__or3b_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or3b_4.pex.spice -* Created: Thu Aug 27 19:24:40 2020 +* Created: Wed Sep 2 08:49:05 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/or3b/sky130_fd_sc_hdll__or3b_4.pxi.spice b/cells/or3b/sky130_fd_sc_hdll__or3b_4.pxi.spice index 5b5355c..329be35 100644 --- a/cells/or3b/sky130_fd_sc_hdll__or3b_4.pxi.spice +++ b/cells/or3b/sky130_fd_sc_hdll__or3b_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or3b_4.pxi.spice -* Created: Thu Aug 27 19:24:40 2020 +* Created: Wed Sep 2 08:49:05 2020 * x_PM_SKY130_FD_SC_HDLL__OR3B_4%C_N N_C_N_c_77_n N_C_N_c_78_n N_C_N_M1009_g + N_C_N_M1010_g C_N C_N N_C_N_c_76_n PM_SKY130_FD_SC_HDLL__OR3B_4%C_N
diff --git a/cells/or3b/sky130_fd_sc_hdll__or3b_4.spice b/cells/or3b/sky130_fd_sc_hdll__or3b_4.spice index aeb0e98..92de2f3 100644 --- a/cells/or3b/sky130_fd_sc_hdll__or3b_4.spice +++ b/cells/or3b/sky130_fd_sc_hdll__or3b_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or3b_4.spice -* Created: Thu Aug 27 19:24:40 2020 +* Created: Wed Sep 2 08:49:05 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/or4/sky130_fd_sc_hdll__or4_1.lvs.report b/cells/or4/sky130_fd_sc_hdll__or4_1.lvs.report new file mode 100644 index 0000000..de92978 --- /dev/null +++ b/cells/or4/sky130_fd_sc_hdll__or4_1.lvs.report
@@ -0,0 +1,484 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_1.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__or4_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__or4_1.sp ('sky130_fd_sc_hdll__or4_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_1.spice ('sky130_fd_sc_hdll__or4_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:49:09 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__or4_1 sky130_fd_sc_hdll__or4_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__or4_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__or4_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 17 13 * + + Instances: 5 5 MN (4 pins) + 5 5 MP (4 pins) + 1 0 * Dpar (2 pins) + 4 0 * Probe (2 pins) + ------ ------ + Total Inst: 15 10 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 10 10 + + Instances: 5 5 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMP4 (6 pins) + ------ ------ + Total Inst: 7 7 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 10 10 0 0 + + Instances: 5 5 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMP4 + ------- ------- --------- --------- + Total Inst: 7 7 0 0 + + +o Statistics: + + 5 layout instances were filtered and their pins removed from adjoining nets. + + 4 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB D C B A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/or4/sky130_fd_sc_hdll__or4_1.pex.spice b/cells/or4/sky130_fd_sc_hdll__or4_1.pex.spice index 9048893..da3e320 100644 --- a/cells/or4/sky130_fd_sc_hdll__or4_1.pex.spice +++ b/cells/or4/sky130_fd_sc_hdll__or4_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or4_1.pex.spice -* Created: Thu Aug 27 19:24:48 2020 +* Created: Wed Sep 2 08:49:12 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/or4/sky130_fd_sc_hdll__or4_1.pxi.spice b/cells/or4/sky130_fd_sc_hdll__or4_1.pxi.spice index 8ba034e..d407987 100644 --- a/cells/or4/sky130_fd_sc_hdll__or4_1.pxi.spice +++ b/cells/or4/sky130_fd_sc_hdll__or4_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or4_1.pxi.spice -* Created: Thu Aug 27 19:24:48 2020 +* Created: Wed Sep 2 08:49:12 2020 * x_PM_SKY130_FD_SC_HDLL__OR4_1%D N_D_c_61_n N_D_M1003_g N_D_M1000_g D D + N_D_c_60_n PM_SKY130_FD_SC_HDLL__OR4_1%D
diff --git a/cells/or4/sky130_fd_sc_hdll__or4_1.spice b/cells/or4/sky130_fd_sc_hdll__or4_1.spice index 2b5b6b0..2b8ff40 100644 --- a/cells/or4/sky130_fd_sc_hdll__or4_1.spice +++ b/cells/or4/sky130_fd_sc_hdll__or4_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or4_1.spice -* Created: Thu Aug 27 19:24:48 2020 +* Created: Wed Sep 2 08:49:12 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/or4/sky130_fd_sc_hdll__or4_2.lvs.report b/cells/or4/sky130_fd_sc_hdll__or4_2.lvs.report new file mode 100644 index 0000000..a4c28f2 --- /dev/null +++ b/cells/or4/sky130_fd_sc_hdll__or4_2.lvs.report
@@ -0,0 +1,491 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_2.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__or4_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__or4_2.sp ('sky130_fd_sc_hdll__or4_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_2.spice ('sky130_fd_sc_hdll__or4_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:49:16 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__or4_2 sky130_fd_sc_hdll__or4_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__or4_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__or4_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 14 13 * + + Instances: 6 6 MN (4 pins) + 6 6 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 14 12 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 10 10 + + Instances: 5 5 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMP4 (6 pins) + ------ ------ + Total Inst: 7 7 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 10 10 0 0 + + Instances: 5 5 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMP4 + ------- ------- --------- --------- + Total Inst: 7 7 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB D C B A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/or4/sky130_fd_sc_hdll__or4_2.pex.spice b/cells/or4/sky130_fd_sc_hdll__or4_2.pex.spice index 54066f6..b1537dd 100644 --- a/cells/or4/sky130_fd_sc_hdll__or4_2.pex.spice +++ b/cells/or4/sky130_fd_sc_hdll__or4_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or4_2.pex.spice -* Created: Thu Aug 27 19:24:55 2020 +* Created: Wed Sep 2 08:49:19 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/or4/sky130_fd_sc_hdll__or4_2.pxi.spice b/cells/or4/sky130_fd_sc_hdll__or4_2.pxi.spice index dd489b0..a7011a1 100644 --- a/cells/or4/sky130_fd_sc_hdll__or4_2.pxi.spice +++ b/cells/or4/sky130_fd_sc_hdll__or4_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or4_2.pxi.spice -* Created: Thu Aug 27 19:24:55 2020 +* Created: Wed Sep 2 08:49:19 2020 * x_PM_SKY130_FD_SC_HDLL__OR4_2%D N_D_c_70_n N_D_M1003_g N_D_M1000_g D D + N_D_c_69_n PM_SKY130_FD_SC_HDLL__OR4_2%D
diff --git a/cells/or4/sky130_fd_sc_hdll__or4_2.spice b/cells/or4/sky130_fd_sc_hdll__or4_2.spice index 3f749b1..6190026 100644 --- a/cells/or4/sky130_fd_sc_hdll__or4_2.spice +++ b/cells/or4/sky130_fd_sc_hdll__or4_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or4_2.spice -* Created: Thu Aug 27 19:24:55 2020 +* Created: Wed Sep 2 08:49:19 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/or4/sky130_fd_sc_hdll__or4_4.lvs.report b/cells/or4/sky130_fd_sc_hdll__or4_4.lvs.report new file mode 100644 index 0000000..6de567b --- /dev/null +++ b/cells/or4/sky130_fd_sc_hdll__or4_4.lvs.report
@@ -0,0 +1,492 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_4.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__or4_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__or4_4.sp ('sky130_fd_sc_hdll__or4_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4/sky130_fd_sc_hdll__or4_4.spice ('sky130_fd_sc_hdll__or4_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:49:23 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__or4_4 sky130_fd_sc_hdll__or4_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__or4_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__or4_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 13 13 + + Instances: 8 8 MN (4 pins) + 8 8 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 17 16 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 10 10 + + Instances: 5 5 MN (4 pins) + 1 1 MP (4 pins) + 1 1 SMP4 (6 pins) + ------ ------ + Total Inst: 7 7 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 10 10 0 0 + + Instances: 5 5 0 0 MN(NSHORT) + 1 1 0 0 MP(PHIGHVT) + 1 1 0 0 SMP4 + ------- ------- --------- --------- + Total Inst: 7 7 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB D C B A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/or4/sky130_fd_sc_hdll__or4_4.pex.spice b/cells/or4/sky130_fd_sc_hdll__or4_4.pex.spice index 4b2536b..aa2f6d7 100644 --- a/cells/or4/sky130_fd_sc_hdll__or4_4.pex.spice +++ b/cells/or4/sky130_fd_sc_hdll__or4_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or4_4.pex.spice -* Created: Thu Aug 27 19:25:02 2020 +* Created: Wed Sep 2 08:49:27 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/or4/sky130_fd_sc_hdll__or4_4.pxi.spice b/cells/or4/sky130_fd_sc_hdll__or4_4.pxi.spice index 0e0bb16..a1c8374 100644 --- a/cells/or4/sky130_fd_sc_hdll__or4_4.pxi.spice +++ b/cells/or4/sky130_fd_sc_hdll__or4_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or4_4.pxi.spice -* Created: Thu Aug 27 19:25:02 2020 +* Created: Wed Sep 2 08:49:27 2020 * x_PM_SKY130_FD_SC_HDLL__OR4_4%D N_D_c_79_n N_D_M1014_g N_D_c_76_n N_D_M1013_g D + D N_D_c_78_n PM_SKY130_FD_SC_HDLL__OR4_4%D
diff --git a/cells/or4/sky130_fd_sc_hdll__or4_4.spice b/cells/or4/sky130_fd_sc_hdll__or4_4.spice index 66e9f70..02619a0 100644 --- a/cells/or4/sky130_fd_sc_hdll__or4_4.spice +++ b/cells/or4/sky130_fd_sc_hdll__or4_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or4_4.spice -* Created: Thu Aug 27 19:25:02 2020 +* Created: Wed Sep 2 08:49:27 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/or4b/sky130_fd_sc_hdll__or4b_1.lvs.report b/cells/or4b/sky130_fd_sc_hdll__or4b_1.lvs.report new file mode 100644 index 0000000..08a06d8 --- /dev/null +++ b/cells/or4b/sky130_fd_sc_hdll__or4b_1.lvs.report
@@ -0,0 +1,486 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_1.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_1.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__or4b_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__or4b_1.sp ('sky130_fd_sc_hdll__or4b_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_1.spice ('sky130_fd_sc_hdll__or4b_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:49:31 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__or4b_1 sky130_fd_sc_hdll__or4b_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__or4b_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__or4b_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 19 14 * + + Instances: 6 6 MN (4 pins) + 6 6 MP (4 pins) + 1 0 * Dpar (2 pins) + 5 0 * Probe (2 pins) + ------ ------ + Total Inst: 18 12 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 11 11 + + Instances: 6 6 MN (4 pins) + 2 2 MP (4 pins) + 1 1 SMP4 (6 pins) + ------ ------ + Total Inst: 9 9 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 11 11 0 0 + + Instances: 6 6 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + 1 1 0 0 SMP4 + ------- ------- --------- --------- + Total Inst: 9 9 0 0 + + +o Statistics: + + 6 layout instances were filtered and their pins removed from adjoining nets. + + 5 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB D_N C B A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/or4b/sky130_fd_sc_hdll__or4b_1.pex.spice b/cells/or4b/sky130_fd_sc_hdll__or4b_1.pex.spice index 5e74d81..b9841f0 100644 --- a/cells/or4b/sky130_fd_sc_hdll__or4b_1.pex.spice +++ b/cells/or4b/sky130_fd_sc_hdll__or4b_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or4b_1.pex.spice -* Created: Thu Aug 27 19:25:09 2020 +* Created: Wed Sep 2 08:49:34 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/or4b/sky130_fd_sc_hdll__or4b_1.pxi.spice b/cells/or4b/sky130_fd_sc_hdll__or4b_1.pxi.spice index 7af2c9a..4f83195 100644 --- a/cells/or4b/sky130_fd_sc_hdll__or4b_1.pxi.spice +++ b/cells/or4b/sky130_fd_sc_hdll__or4b_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or4b_1.pxi.spice -* Created: Thu Aug 27 19:25:09 2020 +* Created: Wed Sep 2 08:49:34 2020 * x_PM_SKY130_FD_SC_HDLL__OR4B_1%D_N N_D_N_c_74_n N_D_N_M1004_g N_D_N_M1000_g D_N + D_N N_D_N_c_73_n PM_SKY130_FD_SC_HDLL__OR4B_1%D_N
diff --git a/cells/or4b/sky130_fd_sc_hdll__or4b_1.spice b/cells/or4b/sky130_fd_sc_hdll__or4b_1.spice index af00d5b..00c8c26 100644 --- a/cells/or4b/sky130_fd_sc_hdll__or4b_1.spice +++ b/cells/or4b/sky130_fd_sc_hdll__or4b_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or4b_1.spice -* Created: Thu Aug 27 19:25:09 2020 +* Created: Wed Sep 2 08:49:34 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/or4b/sky130_fd_sc_hdll__or4b_2.lvs.report b/cells/or4b/sky130_fd_sc_hdll__or4b_2.lvs.report new file mode 100644 index 0000000..4e3683e --- /dev/null +++ b/cells/or4b/sky130_fd_sc_hdll__or4b_2.lvs.report
@@ -0,0 +1,493 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_2.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__or4b_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__or4b_2.sp ('sky130_fd_sc_hdll__or4b_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_2.spice ('sky130_fd_sc_hdll__or4b_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:49:38 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__or4b_2 sky130_fd_sc_hdll__or4b_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__or4b_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__or4b_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 17 14 * + + Instances: 7 7 MN (4 pins) + 7 7 MP (4 pins) + 1 0 * Dpar (2 pins) + 3 0 * Probe (2 pins) + ------ ------ + Total Inst: 18 14 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 11 11 + + Instances: 6 6 MN (4 pins) + 2 2 MP (4 pins) + 1 1 SMP4 (6 pins) + ------ ------ + Total Inst: 9 9 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 11 11 0 0 + + Instances: 6 6 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + 1 1 0 0 SMP4 + ------- ------- --------- --------- + Total Inst: 9 9 0 0 + + +o Statistics: + + 4 layout instances were filtered and their pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + 3 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB D_N A B C VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/or4b/sky130_fd_sc_hdll__or4b_2.pex.spice b/cells/or4b/sky130_fd_sc_hdll__or4b_2.pex.spice index 5cb07ab..7b09f35 100644 --- a/cells/or4b/sky130_fd_sc_hdll__or4b_2.pex.spice +++ b/cells/or4b/sky130_fd_sc_hdll__or4b_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or4b_2.pex.spice -* Created: Thu Aug 27 19:25:16 2020 +* Created: Wed Sep 2 08:49:42 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/or4b/sky130_fd_sc_hdll__or4b_2.pxi.spice b/cells/or4b/sky130_fd_sc_hdll__or4b_2.pxi.spice index 23ff6fa..173a624 100644 --- a/cells/or4b/sky130_fd_sc_hdll__or4b_2.pxi.spice +++ b/cells/or4b/sky130_fd_sc_hdll__or4b_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or4b_2.pxi.spice -* Created: Thu Aug 27 19:25:16 2020 +* Created: Wed Sep 2 08:49:42 2020 * x_PM_SKY130_FD_SC_HDLL__OR4B_2%D_N N_D_N_c_75_n N_D_N_M1004_g N_D_N_M1010_g D_N + N_D_N_c_74_n PM_SKY130_FD_SC_HDLL__OR4B_2%D_N
diff --git a/cells/or4b/sky130_fd_sc_hdll__or4b_2.spice b/cells/or4b/sky130_fd_sc_hdll__or4b_2.spice index 487b6c0..2b2e237 100644 --- a/cells/or4b/sky130_fd_sc_hdll__or4b_2.spice +++ b/cells/or4b/sky130_fd_sc_hdll__or4b_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or4b_2.spice -* Created: Thu Aug 27 19:25:16 2020 +* Created: Wed Sep 2 08:49:42 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/or4b/sky130_fd_sc_hdll__or4b_4.lvs.report b/cells/or4b/sky130_fd_sc_hdll__or4b_4.lvs.report new file mode 100644 index 0000000..94eac2f --- /dev/null +++ b/cells/or4b/sky130_fd_sc_hdll__or4b_4.lvs.report
@@ -0,0 +1,497 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_4.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__or4b_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__or4b_4.sp ('sky130_fd_sc_hdll__or4b_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4b/sky130_fd_sc_hdll__or4b_4.spice ('sky130_fd_sc_hdll__or4b_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:49:46 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__or4b_4 sky130_fd_sc_hdll__or4b_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__or4b_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__or4b_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 15 14 * + + Instances: 9 9 MN (4 pins) + 9 9 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 20 18 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 11 11 + + Instances: 6 6 MN (4 pins) + 2 2 MP (4 pins) + 1 1 SMP4 (6 pins) + ------ ------ + Total Inst: 9 9 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 11 11 0 0 + + Instances: 6 6 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + 1 1 0 0 SMP4 + ------- ------- --------- --------- + Total Inst: 9 9 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB D_N C B A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/or4b/sky130_fd_sc_hdll__or4b_4.pex.spice b/cells/or4b/sky130_fd_sc_hdll__or4b_4.pex.spice index 9cce8ff..8426400 100644 --- a/cells/or4b/sky130_fd_sc_hdll__or4b_4.pex.spice +++ b/cells/or4b/sky130_fd_sc_hdll__or4b_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or4b_4.pex.spice -* Created: Thu Aug 27 19:25:23 2020 +* Created: Wed Sep 2 08:49:49 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/or4b/sky130_fd_sc_hdll__or4b_4.pxi.spice b/cells/or4b/sky130_fd_sc_hdll__or4b_4.pxi.spice index 77429a9..f5a2d1f 100644 --- a/cells/or4b/sky130_fd_sc_hdll__or4b_4.pxi.spice +++ b/cells/or4b/sky130_fd_sc_hdll__or4b_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or4b_4.pxi.spice -* Created: Thu Aug 27 19:25:23 2020 +* Created: Wed Sep 2 08:49:49 2020 * x_PM_SKY130_FD_SC_HDLL__OR4B_4%D_N N_D_N_c_94_n N_D_N_c_95_n N_D_N_M1003_g + N_D_N_M1013_g D_N D_N D_N N_D_N_c_91_n N_D_N_c_92_n N_D_N_c_93_n
diff --git a/cells/or4b/sky130_fd_sc_hdll__or4b_4.spice b/cells/or4b/sky130_fd_sc_hdll__or4b_4.spice index e7ffcb0..77ec274 100644 --- a/cells/or4b/sky130_fd_sc_hdll__or4b_4.spice +++ b/cells/or4b/sky130_fd_sc_hdll__or4b_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or4b_4.spice -* Created: Thu Aug 27 19:25:23 2020 +* Created: Wed Sep 2 08:49:49 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/or4bb/sky130_fd_sc_hdll__or4bb_1.lvs.report b/cells/or4bb/sky130_fd_sc_hdll__or4bb_1.lvs.report new file mode 100644 index 0000000..b6cc6d4 --- /dev/null +++ b/cells/or4bb/sky130_fd_sc_hdll__or4bb_1.lvs.report
@@ -0,0 +1,488 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_1.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_1.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__or4bb_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__or4bb_1.sp ('sky130_fd_sc_hdll__or4bb_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_1.spice ('sky130_fd_sc_hdll__or4bb_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:49:53 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__or4bb_1 sky130_fd_sc_hdll__or4bb_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__or4bb_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__or4bb_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 18 15 * + + Instances: 7 7 MN (4 pins) + 7 7 MP (4 pins) + 1 0 * Dpar (2 pins) + 3 0 * Probe (2 pins) + ------ ------ + Total Inst: 18 14 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 12 12 + + Instances: 7 7 MN (4 pins) + 3 3 MP (4 pins) + 1 1 SMP4 (6 pins) + ------ ------ + Total Inst: 11 11 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 12 12 0 0 + + Instances: 7 7 0 0 MN(NSHORT) + 3 3 0 0 MP(PHIGHVT) + 1 1 0 0 SMP4 + ------- ------- --------- --------- + Total Inst: 11 11 0 0 + + +o Statistics: + + 4 layout instances were filtered and their pins removed from adjoining nets. + + 3 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB C_N D_N B A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/or4bb/sky130_fd_sc_hdll__or4bb_1.pex.spice b/cells/or4bb/sky130_fd_sc_hdll__or4bb_1.pex.spice index 3a00cd2..ab175ca 100644 --- a/cells/or4bb/sky130_fd_sc_hdll__or4bb_1.pex.spice +++ b/cells/or4bb/sky130_fd_sc_hdll__or4bb_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or4bb_1.pex.spice -* Created: Thu Aug 27 19:25:31 2020 +* Created: Wed Sep 2 08:49:57 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/or4bb/sky130_fd_sc_hdll__or4bb_1.pxi.spice b/cells/or4bb/sky130_fd_sc_hdll__or4bb_1.pxi.spice index 2417dad..6a70cba 100644 --- a/cells/or4bb/sky130_fd_sc_hdll__or4bb_1.pxi.spice +++ b/cells/or4bb/sky130_fd_sc_hdll__or4bb_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or4bb_1.pxi.spice -* Created: Thu Aug 27 19:25:31 2020 +* Created: Wed Sep 2 08:49:57 2020 * x_PM_SKY130_FD_SC_HDLL__OR4BB_1%C_N N_C_N_c_96_n N_C_N_c_97_n N_C_N_M1011_g + N_C_N_M1006_g C_N C_N N_C_N_c_94_n N_C_N_c_95_n
diff --git a/cells/or4bb/sky130_fd_sc_hdll__or4bb_1.spice b/cells/or4bb/sky130_fd_sc_hdll__or4bb_1.spice index 5206f56..c558e3b 100644 --- a/cells/or4bb/sky130_fd_sc_hdll__or4bb_1.spice +++ b/cells/or4bb/sky130_fd_sc_hdll__or4bb_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or4bb_1.spice -* Created: Thu Aug 27 19:25:31 2020 +* Created: Wed Sep 2 08:49:57 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/or4bb/sky130_fd_sc_hdll__or4bb_2.lvs.report b/cells/or4bb/sky130_fd_sc_hdll__or4bb_2.lvs.report new file mode 100644 index 0000000..73f74e1 --- /dev/null +++ b/cells/or4bb/sky130_fd_sc_hdll__or4bb_2.lvs.report
@@ -0,0 +1,495 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_2.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_2.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__or4bb_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__or4bb_2.sp ('sky130_fd_sc_hdll__or4bb_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_2.spice ('sky130_fd_sc_hdll__or4bb_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:50:01 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__or4bb_2 sky130_fd_sc_hdll__or4bb_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__or4bb_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__or4bb_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 18 15 * + + Instances: 8 8 MN (4 pins) + 8 8 MP (4 pins) + 1 0 * Dpar (2 pins) + 3 0 * Probe (2 pins) + ------ ------ + Total Inst: 20 16 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 12 12 + + Instances: 7 7 MN (4 pins) + 3 3 MP (4 pins) + 1 1 SMP4 (6 pins) + ------ ------ + Total Inst: 11 11 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 12 12 0 0 + + Instances: 7 7 0 0 MN(NSHORT) + 3 3 0 0 MP(PHIGHVT) + 1 1 0 0 SMP4 + ------- ------- --------- --------- + Total Inst: 11 11 0 0 + + +o Statistics: + + 4 layout instances were filtered and their pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + 3 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB C_N D_N B A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/or4bb/sky130_fd_sc_hdll__or4bb_2.pex.spice b/cells/or4bb/sky130_fd_sc_hdll__or4bb_2.pex.spice index 7aa31af..7b3bf42 100644 --- a/cells/or4bb/sky130_fd_sc_hdll__or4bb_2.pex.spice +++ b/cells/or4bb/sky130_fd_sc_hdll__or4bb_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or4bb_2.pex.spice -* Created: Thu Aug 27 19:25:38 2020 +* Created: Wed Sep 2 08:50:04 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/or4bb/sky130_fd_sc_hdll__or4bb_2.pxi.spice b/cells/or4bb/sky130_fd_sc_hdll__or4bb_2.pxi.spice index 2d0d948..cdaf3fa 100644 --- a/cells/or4bb/sky130_fd_sc_hdll__or4bb_2.pxi.spice +++ b/cells/or4bb/sky130_fd_sc_hdll__or4bb_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or4bb_2.pxi.spice -* Created: Thu Aug 27 19:25:38 2020 +* Created: Wed Sep 2 08:50:04 2020 * x_PM_SKY130_FD_SC_HDLL__OR4BB_2%C_N N_C_N_c_99_n N_C_N_c_100_n N_C_N_M1010_g + N_C_N_M1001_g C_N C_N N_C_N_c_96_n N_C_N_c_97_n N_C_N_c_98_n
diff --git a/cells/or4bb/sky130_fd_sc_hdll__or4bb_2.spice b/cells/or4bb/sky130_fd_sc_hdll__or4bb_2.spice index 87c55dc..12cbeca 100644 --- a/cells/or4bb/sky130_fd_sc_hdll__or4bb_2.spice +++ b/cells/or4bb/sky130_fd_sc_hdll__or4bb_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or4bb_2.spice -* Created: Thu Aug 27 19:25:38 2020 +* Created: Wed Sep 2 08:50:04 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.lvs.report b/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.lvs.report new file mode 100644 index 0000000..dbea58e --- /dev/null +++ b/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.lvs.report
@@ -0,0 +1,496 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__or4bb_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__or4bb_4.sp ('sky130_fd_sc_hdll__or4bb_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.spice ('sky130_fd_sc_hdll__or4bb_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:50:08 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__or4bb_4 sky130_fd_sc_hdll__or4bb_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__or4bb_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__or4bb_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 15 15 + + Instances: 10 10 MN (4 pins) + 10 10 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 21 20 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 12 12 + + Instances: 7 7 MN (4 pins) + 3 3 MP (4 pins) + 1 1 SMP4 (6 pins) + ------ ------ + Total Inst: 11 11 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 12 12 0 0 + + Instances: 7 7 0 0 MN(NSHORT) + 3 3 0 0 MP(PHIGHVT) + 1 1 0 0 SMP4 + ------- ------- --------- --------- + Total Inst: 11 11 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB C_N D_N B A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.pex.spice b/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.pex.spice index 446e145..cf97e62 100644 --- a/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.pex.spice +++ b/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or4bb_4.pex.spice -* Created: Thu Aug 27 19:25:45 2020 +* Created: Wed Sep 2 08:50:12 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.pxi.spice b/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.pxi.spice index 5d7eb77..0187f72 100644 --- a/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.pxi.spice +++ b/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or4bb_4.pxi.spice -* Created: Thu Aug 27 19:25:45 2020 +* Created: Wed Sep 2 08:50:12 2020 * x_PM_SKY130_FD_SC_HDLL__OR4BB_4%C_N N_C_N_c_112_n N_C_N_c_113_n N_C_N_M1014_g + N_C_N_M1008_g C_N C_N N_C_N_c_109_n N_C_N_c_110_n N_C_N_c_111_n
diff --git a/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.spice b/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.spice index 1b844ca..34cf2d7 100644 --- a/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.spice +++ b/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__or4bb_4.spice -* Created: Thu Aug 27 19:25:45 2020 +* Created: Wed Sep 2 08:50:12 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.lvs.report b/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.lvs.report new file mode 100644 index 0000000..5f8384f --- /dev/null +++ b/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.lvs.report
@@ -0,0 +1,500 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 54 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 56 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 58 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 60 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 62 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__probe_p_8.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__probe_p_8.sp ('sky130_fd_sc_hdll__probe_p_8') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.spice ('sky130_fd_sc_hdll__probe_p_8') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:50:23 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__probe_p_8 sky130_fd_sc_hdll__probe_p_8 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__probe_p_8 +SOURCE CELL NAME: sky130_fd_sc_hdll__probe_p_8 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 8 8 + + Instances: 11 11 MN (4 pins) + 11 11 MP (4 pins) + 1 1 R (2 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 24 23 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 8 8 + + Instances: 2 2 MN (4 pins) + 2 2 MP (4 pins) + 1 1 R (2 pins) + ------ ------ + Total Inst: 5 5 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 6 6 0 0 + + Nets: 8 8 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + 1 1 0 0 R(SHORT) + ------- ------- --------- --------- + Total Inst: 5 5 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 22 layout mos transistors were reduced to 4. + 18 mos transistors were deleted by parallel reduction. + 22 source mos transistors were reduced to 4. + 18 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A VPWR VGND X + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.pex.spice b/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.pex.spice index 12cc411..e33f177 100644 --- a/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.pex.spice +++ b/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__probe_p_8.pex.spice -* Created: Thu Aug 27 19:25:59 2020 +* Created: Wed Sep 2 08:50:27 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.pxi.spice b/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.pxi.spice index a3a1012..5da88fd 100644 --- a/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.pxi.spice +++ b/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__probe_p_8.pxi.spice -* Created: Thu Aug 27 19:25:59 2020 +* Created: Wed Sep 2 08:50:27 2020 * x_PM_SKY130_FD_SC_HDLL__PROBE_P_8%A N_A_c_106_n N_A_M1001_g N_A_M1002_g + N_A_c_107_n N_A_M1009_g N_A_M1006_g N_A_M1015_g N_A_c_108_n N_A_M1019_g A
diff --git a/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.spice b/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.spice index 45c71eb..75d60fb 100644 --- a/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.spice +++ b/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__probe_p_8.spice -* Created: Thu Aug 27 19:25:59 2020 +* Created: Wed Sep 2 08:50:27 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.lvs.report b/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.lvs.report new file mode 100644 index 0000000..c678bf0 --- /dev/null +++ b/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.lvs.report
@@ -0,0 +1,502 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 28 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 30 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 32 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 34 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 36 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 38 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 40 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 42 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 44 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 46 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 48 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 50 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 52 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 54 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 56 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 58 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 60 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 62 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.spice" +Warning: Duplicate parameter definition "MULT" at line 64 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__probec_p_8.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__probec_p_8.sp ('sky130_fd_sc_hdll__probec_p_8') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.spice ('sky130_fd_sc_hdll__probec_p_8') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:50:16 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__probec_p_8 sky130_fd_sc_hdll__probec_p_8 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__probec_p_8 +SOURCE CELL NAME: sky130_fd_sc_hdll__probec_p_8 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 10 10 + + Instances: 11 11 MN (4 pins) + 11 11 MP (4 pins) + 3 3 R (2 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 26 25 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 6 6 + + Nets: 10 10 + + Instances: 2 2 MN (4 pins) + 2 2 MP (4 pins) + 3 3 R (2 pins) + ------ ------ + Total Inst: 7 7 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 6 6 0 0 + + Nets: 10 10 0 0 + + Instances: 2 2 0 0 MN(NSHORT) + 2 2 0 0 MP(PHIGHVT) + 3 3 0 0 R(SHORT) + ------- ------- --------- --------- + Total Inst: 7 7 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 22 layout mos transistors were reduced to 4. + 18 mos transistors were deleted by parallel reduction. + 22 source mos transistors were reduced to 4. + 18 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A VPWR VGND X + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.pex.spice b/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.pex.spice index 47a28df..f8d22a6 100644 --- a/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.pex.spice +++ b/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__probec_p_8.pex.spice -* Created: Thu Aug 27 19:25:52 2020 +* Created: Wed Sep 2 08:50:19 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.pxi.spice b/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.pxi.spice index 38c6647..994bd16 100644 --- a/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.pxi.spice +++ b/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__probec_p_8.pxi.spice -* Created: Thu Aug 27 19:25:52 2020 +* Created: Wed Sep 2 08:50:19 2020 * x_PM_SKY130_FD_SC_HDLL__PROBEC_P_8%A N_A_c_118_n N_A_M1001_g N_A_M1002_g + N_A_c_119_n N_A_M1009_g N_A_M1006_g N_A_M1015_g N_A_c_120_n N_A_M1019_g A
diff --git a/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.spice b/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.spice index a9e31a3..0496156 100644 --- a/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.spice +++ b/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__probec_p_8.spice -* Created: Thu Aug 27 19:25:52 2020 +* Created: Wed Sep 2 08:50:19 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.lvs.report b/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.lvs.report new file mode 100644 index 0000000..5eca84f --- /dev/null +++ b/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.lvs.report
@@ -0,0 +1,523 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 20 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 22 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 24 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 26 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 28 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 30 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 32 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 34 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 36 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 38 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 40 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 42 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 44 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 46 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 48 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 50 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 52 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 54 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 56 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 58 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 60 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 62 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 64 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 66 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 68 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 70 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 72 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 74 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 76 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 78 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 80 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 82 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 84 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 86 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 88 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 90 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 92 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 94 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 96 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 98 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 100 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 102 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 104 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 106 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 108 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 110 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 112 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 114 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__sdfbbp_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__sdfbbp_1.sp ('sky130_fd_sc_hdll__sdfbbp_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice ('sky130_fd_sc_hdll__sdfbbp_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:50:31 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__sdfbbp_1 sky130_fd_sc_hdll__sdfbbp_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__sdfbbp_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__sdfbbp_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 12 12 + + Nets: 36 36 + + Instances: 24 24 MN (4 pins) + 24 24 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 49 48 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 12 12 + + Nets: 22 22 + + Instances: 8 8 MN (4 pins) + 10 10 MP (4 pins) + 5 5 SMN2 (4 pins) + 7 7 SMP2 (4 pins) + 2 2 SPMN_2_1 (5 pins) + ------ ------ + Total Inst: 32 32 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 12 12 0 0 + + Nets: 22 22 0 0 + + Instances: 8 8 0 0 MN(NSHORT) + 10 10 0 0 MP(PHIGHVT) + 5 5 0 0 SMN2 + 7 7 0 0 SMP2 + 2 2 0 0 SPMN_2_1 + ------- ------- --------- --------- + Total Inst: 32 32 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB CLK SCD SCE D SET_B RESET_B VPWR Q_N Q VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.pex.spice b/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.pex.spice index 0d55f52..655e215 100644 --- a/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.pex.spice +++ b/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfbbp_1.pex.spice -* Created: Thu Aug 27 19:26:07 2020 +* Created: Wed Sep 2 08:50:34 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.pxi.spice b/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.pxi.spice index 3297bcd..f87bf94 100644 --- a/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.pxi.spice +++ b/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfbbp_1.pxi.spice -* Created: Thu Aug 27 19:26:07 2020 +* Created: Wed Sep 2 08:50:34 2020 * x_PM_SKY130_FD_SC_HDLL__SDFBBP_1%CLK N_CLK_c_297_n N_CLK_c_298_n N_CLK_M1008_g + N_CLK_c_292_n N_CLK_M1033_g N_CLK_c_293_n CLK CLK N_CLK_c_295_n N_CLK_c_296_n
diff --git a/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice b/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice index a15e55a..d8199b7 100644 --- a/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice +++ b/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfbbp_1.spice -* Created: Thu Aug 27 19:26:07 2020 +* Created: Wed Sep 2 08:50:34 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.lvs.report b/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.lvs.report new file mode 100644 index 0000000..ee254d5 --- /dev/null +++ b/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.lvs.report
@@ -0,0 +1,517 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 87 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 89 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 91 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 93 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 95 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 97 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__sdfrbp_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__sdfrbp_1.sp ('sky130_fd_sc_hdll__sdfrbp_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice ('sky130_fd_sc_hdll__sdfrbp_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:50:38 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__sdfrbp_1 sky130_fd_sc_hdll__sdfrbp_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__sdfrbp_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__sdfrbp_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 11 11 + + Nets: 30 30 + + Instances: 20 20 MN (4 pins) + 20 20 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 41 40 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 11 11 + + Nets: 20 20 + + Instances: 9 9 MN (4 pins) + 11 11 MP (4 pins) + 4 4 SMN2 (4 pins) + 1 1 SMN3 (5 pins) + 3 3 SMP2 (4 pins) + 1 1 SPMP_2_1 (5 pins) + ------ ------ + Total Inst: 29 29 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 11 11 0 0 + + Nets: 20 20 0 0 + + Instances: 9 9 0 0 MN(NSHORT) + 11 11 0 0 MP(PHIGHVT) + 4 4 0 0 SMN2 + 1 1 0 0 SMN3 + 3 3 0 0 SMP2 + 1 1 0 0 SPMP_2_1 + ------- ------- --------- --------- + Total Inst: 29 29 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB CLK D SCE SCD RESET_B VPWR Q Q_N VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.pex.spice b/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.pex.spice index 8564447..736a56b 100644 --- a/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.pex.spice +++ b/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfrbp_1.pex.spice -* Created: Thu Aug 27 19:26:14 2020 +* Created: Wed Sep 2 08:50:42 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.pxi.spice b/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.pxi.spice index 7f131d7..fd6ffa3 100644 --- a/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.pxi.spice +++ b/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfrbp_1.pxi.spice -* Created: Thu Aug 27 19:26:14 2020 +* Created: Wed Sep 2 08:50:42 2020 * x_PM_SKY130_FD_SC_HDLL__SDFRBP_1%CLK N_CLK_c_275_n N_CLK_M1015_g N_CLK_c_272_n + N_CLK_M1028_g CLK CLK N_CLK_c_274_n PM_SKY130_FD_SC_HDLL__SDFRBP_1%CLK
diff --git a/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice b/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice index 72239e3..a614915 100644 --- a/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice +++ b/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfrbp_1.spice -* Created: Thu Aug 27 19:26:14 2020 +* Created: Wed Sep 2 08:50:42 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.lvs.report b/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.lvs.report new file mode 100644 index 0000000..3d6dca4 --- /dev/null +++ b/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.lvs.report
@@ -0,0 +1,526 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 87 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 89 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 91 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 93 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 95 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 97 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 99 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 101 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 103 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 105 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__sdfrbp_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__sdfrbp_2.sp ('sky130_fd_sc_hdll__sdfrbp_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice ('sky130_fd_sc_hdll__sdfrbp_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:50:46 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__sdfrbp_2 sky130_fd_sc_hdll__sdfrbp_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__sdfrbp_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__sdfrbp_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 11 11 + + Nets: 30 30 + + Instances: 22 22 MN (4 pins) + 22 22 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 45 44 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 11 11 + + Nets: 20 20 + + Instances: 9 9 MN (4 pins) + 11 11 MP (4 pins) + 4 4 SMN2 (4 pins) + 1 1 SMN3 (5 pins) + 3 3 SMP2 (4 pins) + 1 1 SPMP_2_1 (5 pins) + ------ ------ + Total Inst: 29 29 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 11 11 0 0 + + Nets: 20 20 0 0 + + Instances: 9 9 0 0 MN(NSHORT) + 11 11 0 0 MP(PHIGHVT) + 4 4 0 0 SMN2 + 1 1 0 0 SMN3 + 3 3 0 0 SMP2 + 1 1 0 0 SPMP_2_1 + ------- ------- --------- --------- + Total Inst: 29 29 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 4. + 4 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 4. + 4 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB CLK D SCE SCD RESET_B VPWR Q Q_N VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.pex.spice b/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.pex.spice index 1a9c98f..35c9d57 100644 --- a/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.pex.spice +++ b/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfrbp_2.pex.spice -* Created: Thu Aug 27 19:26:21 2020 +* Created: Wed Sep 2 08:50:50 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.pxi.spice b/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.pxi.spice index 79f0e4c..29ce9f1 100644 --- a/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.pxi.spice +++ b/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfrbp_2.pxi.spice -* Created: Thu Aug 27 19:26:21 2020 +* Created: Wed Sep 2 08:50:50 2020 * x_PM_SKY130_FD_SC_HDLL__SDFRBP_2%CLK N_CLK_c_275_n N_CLK_M1013_g N_CLK_c_272_n + N_CLK_M1029_g CLK CLK N_CLK_c_274_n PM_SKY130_FD_SC_HDLL__SDFRBP_2%CLK
diff --git a/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice b/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice index 36d8ed4..c308dd1 100644 --- a/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice +++ b/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfrbp_2.spice -* Created: Thu Aug 27 19:26:21 2020 +* Created: Wed Sep 2 08:50:50 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.lvs.report b/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.lvs.report new file mode 100644 index 0000000..7ae28b4 --- /dev/null +++ b/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.lvs.report
@@ -0,0 +1,513 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 87 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice" +Warning: Duplicate parameter definition "MULT" at line 89 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__sdfrtn_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__sdfrtn_1.sp ('sky130_fd_sc_hdll__sdfrtn_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice ('sky130_fd_sc_hdll__sdfrtn_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:50:54 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__sdfrtn_1 sky130_fd_sc_hdll__sdfrtn_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__sdfrtn_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__sdfrtn_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 28 28 + + Instances: 18 18 MN (4 pins) + 18 18 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 37 36 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 18 18 + + Instances: 7 7 MN (4 pins) + 9 9 MP (4 pins) + 4 4 SMN2 (4 pins) + 1 1 SMN3 (5 pins) + 3 3 SMP2 (4 pins) + 1 1 SPMP_2_1 (5 pins) + ------ ------ + Total Inst: 25 25 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 10 10 0 0 + + Nets: 18 18 0 0 + + Instances: 7 7 0 0 MN(NSHORT) + 9 9 0 0 MP(PHIGHVT) + 4 4 0 0 SMN2 + 1 1 0 0 SMN3 + 3 3 0 0 SMP2 + 1 1 0 0 SPMP_2_1 + ------- ------- --------- --------- + Total Inst: 25 25 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB CLK_N D SCE SCD RESET_B VPWR Q VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.pex.spice b/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.pex.spice index b1c1bb7..f824b04 100644 --- a/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.pex.spice +++ b/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfrtn_1.pex.spice -* Created: Thu Aug 27 19:26:29 2020 +* Created: Wed Sep 2 08:50:57 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.pxi.spice b/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.pxi.spice index b90f499..2a51a2f 100644 --- a/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.pxi.spice +++ b/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfrtn_1.pxi.spice -* Created: Thu Aug 27 19:26:29 2020 +* Created: Wed Sep 2 08:50:57 2020 * x_PM_SKY130_FD_SC_HDLL__SDFRTN_1%CLK_N N_CLK_N_c_245_n N_CLK_N_M1014_g + N_CLK_N_c_242_n N_CLK_N_M1026_g CLK_N CLK_N N_CLK_N_c_244_n
diff --git a/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice b/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice index 775991e..210874f 100644 --- a/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice +++ b/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfrtn_1.spice -* Created: Thu Aug 27 19:26:29 2020 +* Created: Wed Sep 2 08:50:57 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.lvs.report b/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.lvs.report new file mode 100644 index 0000000..71d8bf3 --- /dev/null +++ b/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.lvs.report
@@ -0,0 +1,513 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 87 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 89 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__sdfrtp_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__sdfrtp_1.sp ('sky130_fd_sc_hdll__sdfrtp_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice ('sky130_fd_sc_hdll__sdfrtp_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:51:01 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__sdfrtp_1 sky130_fd_sc_hdll__sdfrtp_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__sdfrtp_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__sdfrtp_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 28 28 + + Instances: 18 18 MN (4 pins) + 18 18 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 37 36 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 18 18 + + Instances: 7 7 MN (4 pins) + 9 9 MP (4 pins) + 4 4 SMN2 (4 pins) + 1 1 SMN3 (5 pins) + 3 3 SMP2 (4 pins) + 1 1 SPMP_2_1 (5 pins) + ------ ------ + Total Inst: 25 25 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 10 10 0 0 + + Nets: 18 18 0 0 + + Instances: 7 7 0 0 MN(NSHORT) + 9 9 0 0 MP(PHIGHVT) + 4 4 0 0 SMN2 + 1 1 0 0 SMN3 + 3 3 0 0 SMP2 + 1 1 0 0 SPMP_2_1 + ------- ------- --------- --------- + Total Inst: 25 25 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB CLK D SCE SCD RESET_B VPWR Q VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.pex.spice b/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.pex.spice index 6dfef6c..c78e30f 100644 --- a/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.pex.spice +++ b/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfrtp_1.pex.spice -* Created: Thu Aug 27 19:26:36 2020 +* Created: Wed Sep 2 08:51:05 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.pxi.spice b/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.pxi.spice index 76a44b9..9c38025 100644 --- a/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.pxi.spice +++ b/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfrtp_1.pxi.spice -* Created: Thu Aug 27 19:26:36 2020 +* Created: Wed Sep 2 08:51:05 2020 * x_PM_SKY130_FD_SC_HDLL__SDFRTP_1%CLK N_CLK_c_244_n N_CLK_M1014_g N_CLK_c_241_n + N_CLK_M1026_g CLK CLK N_CLK_c_243_n PM_SKY130_FD_SC_HDLL__SDFRTP_1%CLK
diff --git a/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice b/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice index 16af5fa..1dfe546 100644 --- a/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice +++ b/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfrtp_1.spice -* Created: Thu Aug 27 19:26:36 2020 +* Created: Wed Sep 2 08:51:05 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.lvs.report b/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.lvs.report new file mode 100644 index 0000000..bf5565c --- /dev/null +++ b/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.lvs.report
@@ -0,0 +1,520 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 87 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 89 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 91 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 93 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__sdfrtp_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__sdfrtp_2.sp ('sky130_fd_sc_hdll__sdfrtp_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice ('sky130_fd_sc_hdll__sdfrtp_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:51:09 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__sdfrtp_2 sky130_fd_sc_hdll__sdfrtp_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__sdfrtp_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__sdfrtp_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 28 28 + + Instances: 19 19 MN (4 pins) + 19 19 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 39 38 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 18 18 + + Instances: 7 7 MN (4 pins) + 9 9 MP (4 pins) + 4 4 SMN2 (4 pins) + 1 1 SMN3 (5 pins) + 3 3 SMP2 (4 pins) + 1 1 SPMP_2_1 (5 pins) + ------ ------ + Total Inst: 25 25 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 10 10 0 0 + + Nets: 18 18 0 0 + + Instances: 7 7 0 0 MN(NSHORT) + 9 9 0 0 MP(PHIGHVT) + 4 4 0 0 SMN2 + 1 1 0 0 SMN3 + 3 3 0 0 SMP2 + 1 1 0 0 SPMP_2_1 + ------- ------- --------- --------- + Total Inst: 25 25 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB CLK D SCE SCD RESET_B VPWR Q VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.pex.spice b/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.pex.spice index 61ad255..ab1878a 100644 --- a/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.pex.spice +++ b/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfrtp_2.pex.spice -* Created: Thu Aug 27 19:26:43 2020 +* Created: Wed Sep 2 08:51:12 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.pxi.spice b/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.pxi.spice index 87b6442..29dd041 100644 --- a/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.pxi.spice +++ b/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfrtp_2.pxi.spice -* Created: Thu Aug 27 19:26:43 2020 +* Created: Wed Sep 2 08:51:12 2020 * x_PM_SKY130_FD_SC_HDLL__SDFRTP_2%CLK N_CLK_c_250_n N_CLK_M1013_g N_CLK_c_247_n + N_CLK_M1027_g CLK CLK N_CLK_c_249_n PM_SKY130_FD_SC_HDLL__SDFRTP_2%CLK
diff --git a/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice b/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice index 9e6231a..8dc35e1 100644 --- a/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice +++ b/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfrtp_2.spice -* Created: Thu Aug 27 19:26:43 2020 +* Created: Wed Sep 2 08:51:12 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.lvs.report b/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.lvs.report new file mode 100644 index 0000000..b649f7e --- /dev/null +++ b/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.lvs.report
@@ -0,0 +1,524 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 87 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 89 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 91 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 93 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 95 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 97 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 99 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 101 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__sdfrtp_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__sdfrtp_4.sp ('sky130_fd_sc_hdll__sdfrtp_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice ('sky130_fd_sc_hdll__sdfrtp_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:51:16 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__sdfrtp_4 sky130_fd_sc_hdll__sdfrtp_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__sdfrtp_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__sdfrtp_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 28 28 + + Instances: 21 21 MN (4 pins) + 21 21 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 43 42 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 18 18 + + Instances: 7 7 MN (4 pins) + 9 9 MP (4 pins) + 4 4 SMN2 (4 pins) + 1 1 SMN3 (5 pins) + 3 3 SMP2 (4 pins) + 1 1 SPMP_2_1 (5 pins) + ------ ------ + Total Inst: 25 25 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 10 10 0 0 + + Nets: 18 18 0 0 + + Instances: 7 7 0 0 MN(NSHORT) + 9 9 0 0 MP(PHIGHVT) + 4 4 0 0 SMN2 + 1 1 0 0 SMN3 + 3 3 0 0 SMP2 + 1 1 0 0 SPMP_2_1 + ------- ------- --------- --------- + Total Inst: 25 25 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB CLK D SCE SCD RESET_B VPWR Q VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.pex.spice b/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.pex.spice index f99f237..1bed395 100644 --- a/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.pex.spice +++ b/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfrtp_4.pex.spice -* Created: Thu Aug 27 19:26:50 2020 +* Created: Wed Sep 2 08:51:20 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.pxi.spice b/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.pxi.spice index effdfd4..144c4a9 100644 --- a/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.pxi.spice +++ b/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfrtp_4.pxi.spice -* Created: Thu Aug 27 19:26:50 2020 +* Created: Wed Sep 2 08:51:20 2020 * x_PM_SKY130_FD_SC_HDLL__SDFRTP_4%CLK N_CLK_c_269_n N_CLK_M1016_g N_CLK_c_266_n + N_CLK_M1031_g CLK CLK N_CLK_c_268_n PM_SKY130_FD_SC_HDLL__SDFRTP_4%CLK
diff --git a/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice b/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice index 573efc7..4a0f640 100644 --- a/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice +++ b/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfrtp_4.spice -* Created: Thu Aug 27 19:26:50 2020 +* Created: Wed Sep 2 08:51:20 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.lvs.report b/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.lvs.report new file mode 100644 index 0000000..b15c91c --- /dev/null +++ b/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.lvs.report
@@ -0,0 +1,517 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 87 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 89 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 91 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 93 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 95 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 97 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 99 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 101 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__sdfsbp_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__sdfsbp_1.sp ('sky130_fd_sc_hdll__sdfsbp_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice ('sky130_fd_sc_hdll__sdfsbp_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:51:24 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__sdfsbp_1 sky130_fd_sc_hdll__sdfsbp_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__sdfsbp_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__sdfsbp_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 11 11 + + Nets: 32 32 + + Instances: 21 21 MN (4 pins) + 21 21 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 43 42 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 11 11 + + Nets: 20 20 + + Instances: 8 8 MN (4 pins) + 11 11 MP (4 pins) + 5 5 SMN2 (4 pins) + 1 1 SMN3 (5 pins) + 5 5 SMP2 (4 pins) + ------ ------ + Total Inst: 30 30 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 11 11 0 0 + + Nets: 20 20 0 0 + + Instances: 8 8 0 0 MN(NSHORT) + 11 11 0 0 MP(PHIGHVT) + 5 5 0 0 SMN2 + 1 1 0 0 SMN3 + 5 5 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 30 30 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB SCD SCE D CLK SET_B VPWR Q_N Q VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.pex.spice b/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.pex.spice index 0c05636..c6e19bf 100644 --- a/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.pex.spice +++ b/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfsbp_1.pex.spice -* Created: Thu Aug 27 19:26:58 2020 +* Created: Wed Sep 2 08:51:27 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.pxi.spice b/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.pxi.spice index 8ed1814..476519b 100644 --- a/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.pxi.spice +++ b/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfsbp_1.pxi.spice -* Created: Thu Aug 27 19:26:58 2020 +* Created: Wed Sep 2 08:51:27 2020 * x_PM_SKY130_FD_SC_HDLL__SDFSBP_1%SCD N_SCD_c_284_n N_SCD_c_288_n N_SCD_c_285_n + N_SCD_M1033_g N_SCD_c_289_n N_SCD_M1007_g SCD SCD
diff --git a/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice b/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice index adf5a57..9d240aa 100644 --- a/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice +++ b/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfsbp_1.spice -* Created: Thu Aug 27 19:26:58 2020 +* Created: Wed Sep 2 08:51:27 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.lvs.report b/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.lvs.report new file mode 100644 index 0000000..b6ba513 --- /dev/null +++ b/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.lvs.report
@@ -0,0 +1,526 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 87 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 89 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 91 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 93 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 95 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 97 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 99 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 101 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 103 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 105 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 107 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 109 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__sdfsbp_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__sdfsbp_2.sp ('sky130_fd_sc_hdll__sdfsbp_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice ('sky130_fd_sc_hdll__sdfsbp_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:51:31 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__sdfsbp_2 sky130_fd_sc_hdll__sdfsbp_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__sdfsbp_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__sdfsbp_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 11 11 + + Nets: 32 32 + + Instances: 23 23 MN (4 pins) + 23 23 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 47 46 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 11 11 + + Nets: 20 20 + + Instances: 8 8 MN (4 pins) + 11 11 MP (4 pins) + 5 5 SMN2 (4 pins) + 1 1 SMN3 (5 pins) + 5 5 SMP2 (4 pins) + ------ ------ + Total Inst: 30 30 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 11 11 0 0 + + Nets: 20 20 0 0 + + Instances: 8 8 0 0 MN(NSHORT) + 11 11 0 0 MP(PHIGHVT) + 5 5 0 0 SMN2 + 1 1 0 0 SMN3 + 5 5 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 30 30 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 4. + 4 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 4. + 4 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB SCD SCE D CLK SET_B VPWR Q_N Q VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.pex.spice b/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.pex.spice index bd514f7..ab7eaee 100644 --- a/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.pex.spice +++ b/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfsbp_2.pex.spice -* Created: Thu Aug 27 19:27:05 2020 +* Created: Wed Sep 2 08:51:35 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.pxi.spice b/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.pxi.spice index fe62633..dfcd960 100644 --- a/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.pxi.spice +++ b/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfsbp_2.pxi.spice -* Created: Thu Aug 27 19:27:05 2020 +* Created: Wed Sep 2 08:51:35 2020 * x_PM_SKY130_FD_SC_HDLL__SDFSBP_2%SCD N_SCD_c_294_n N_SCD_c_298_n N_SCD_c_295_n + N_SCD_M1038_g N_SCD_c_299_n N_SCD_M1007_g SCD SCD
diff --git a/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice b/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice index 85e5ca4..6fc8ef6 100644 --- a/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice +++ b/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfsbp_2.spice -* Created: Thu Aug 27 19:27:05 2020 +* Created: Wed Sep 2 08:51:35 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.lvs.report b/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.lvs.report new file mode 100644 index 0000000..682670d --- /dev/null +++ b/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.lvs.report
@@ -0,0 +1,515 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 87 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 89 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 91 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 93 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 95 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 97 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__sdfstp_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__sdfstp_1.sp ('sky130_fd_sc_hdll__sdfstp_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice ('sky130_fd_sc_hdll__sdfstp_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:51:39 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__sdfstp_1 sky130_fd_sc_hdll__sdfstp_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__sdfstp_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__sdfstp_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 31 31 + + Instances: 20 20 MN (4 pins) + 20 20 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 41 40 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 19 19 + + Instances: 7 7 MN (4 pins) + 10 10 MP (4 pins) + 5 5 SMN2 (4 pins) + 1 1 SMN3 (5 pins) + 5 5 SMP2 (4 pins) + ------ ------ + Total Inst: 28 28 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 10 10 0 0 + + Nets: 19 19 0 0 + + Instances: 7 7 0 0 MN(NSHORT) + 10 10 0 0 MP(PHIGHVT) + 5 5 0 0 SMN2 + 1 1 0 0 SMN3 + 5 5 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 28 28 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB SCD SCE D CLK SET_B VPWR Q VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.pex.spice b/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.pex.spice index 151dbe1..9610b03 100644 --- a/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.pex.spice +++ b/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfstp_1.pex.spice -* Created: Thu Aug 27 19:27:12 2020 +* Created: Wed Sep 2 08:51:42 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.pxi.spice b/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.pxi.spice index 826fe59..f852eec 100644 --- a/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.pxi.spice +++ b/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfstp_1.pxi.spice -* Created: Thu Aug 27 19:27:12 2020 +* Created: Wed Sep 2 08:51:42 2020 * x_PM_SKY130_FD_SC_HDLL__SDFSTP_1%SCD N_SCD_c_263_n N_SCD_c_267_n N_SCD_c_268_n + N_SCD_M1008_g N_SCD_c_264_n N_SCD_M1022_g SCD SCD
diff --git a/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice b/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice index cb76b84..7639e3a 100644 --- a/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice +++ b/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfstp_1.spice -* Created: Thu Aug 27 19:27:12 2020 +* Created: Wed Sep 2 08:51:42 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.lvs.report b/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.lvs.report new file mode 100644 index 0000000..ee02ff7 --- /dev/null +++ b/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.lvs.report
@@ -0,0 +1,522 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 87 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 89 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 91 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 93 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 95 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 97 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 99 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 101 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__sdfstp_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__sdfstp_2.sp ('sky130_fd_sc_hdll__sdfstp_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice ('sky130_fd_sc_hdll__sdfstp_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:51:46 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__sdfstp_2 sky130_fd_sc_hdll__sdfstp_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__sdfstp_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__sdfstp_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 31 31 + + Instances: 21 21 MN (4 pins) + 21 21 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 43 42 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 19 19 + + Instances: 7 7 MN (4 pins) + 10 10 MP (4 pins) + 5 5 SMN2 (4 pins) + 1 1 SMN3 (5 pins) + 5 5 SMP2 (4 pins) + ------ ------ + Total Inst: 28 28 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 10 10 0 0 + + Nets: 19 19 0 0 + + Instances: 7 7 0 0 MN(NSHORT) + 10 10 0 0 MP(PHIGHVT) + 5 5 0 0 SMN2 + 1 1 0 0 SMN3 + 5 5 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 28 28 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB SCD SCE D CLK SET_B VPWR Q VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.pex.spice b/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.pex.spice index a0242b6..cff9108 100644 --- a/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.pex.spice +++ b/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfstp_2.pex.spice -* Created: Thu Aug 27 19:27:19 2020 +* Created: Wed Sep 2 08:51:50 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.pxi.spice b/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.pxi.spice index 6095f06..2423b6e 100644 --- a/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.pxi.spice +++ b/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfstp_2.pxi.spice -* Created: Thu Aug 27 19:27:19 2020 +* Created: Wed Sep 2 08:51:50 2020 * x_PM_SKY130_FD_SC_HDLL__SDFSTP_2%SCD N_SCD_c_271_n N_SCD_c_275_n N_SCD_c_276_n + N_SCD_M1009_g N_SCD_c_272_n N_SCD_M1024_g SCD SCD
diff --git a/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice b/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice index 5abfb3a..6a5b3b5 100644 --- a/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice +++ b/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfstp_2.spice -* Created: Thu Aug 27 19:27:19 2020 +* Created: Wed Sep 2 08:51:50 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.lvs.report b/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.lvs.report new file mode 100644 index 0000000..4e6f57f --- /dev/null +++ b/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.lvs.report
@@ -0,0 +1,526 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file 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"/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 87 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 89 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 91 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 93 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 95 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 97 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 99 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 101 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 103 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 105 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 107 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 109 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__sdfstp_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__sdfstp_4.sp ('sky130_fd_sc_hdll__sdfstp_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice ('sky130_fd_sc_hdll__sdfstp_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:51:54 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__sdfstp_4 sky130_fd_sc_hdll__sdfstp_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__sdfstp_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__sdfstp_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 31 31 + + Instances: 23 23 MN (4 pins) + 23 23 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 47 46 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 19 19 + + Instances: 7 7 MN (4 pins) + 10 10 MP (4 pins) + 5 5 SMN2 (4 pins) + 1 1 SMN3 (5 pins) + 5 5 SMP2 (4 pins) + ------ ------ + Total Inst: 28 28 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 10 10 0 0 + + Nets: 19 19 0 0 + + Instances: 7 7 0 0 MN(NSHORT) + 10 10 0 0 MP(PHIGHVT) + 5 5 0 0 SMN2 + 1 1 0 0 SMN3 + 5 5 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 28 28 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB SCD SCE D CLK SET_B VPWR Q VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.pex.spice b/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.pex.spice index ad08469..08f392b 100644 --- a/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.pex.spice +++ b/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfstp_4.pex.spice -* Created: Thu Aug 27 19:27:27 2020 +* Created: Wed Sep 2 08:51:58 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.pxi.spice b/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.pxi.spice index 695a9d6..71ce178 100644 --- a/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.pxi.spice +++ b/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfstp_4.pxi.spice -* Created: Thu Aug 27 19:27:27 2020 +* Created: Wed Sep 2 08:51:58 2020 * x_PM_SKY130_FD_SC_HDLL__SDFSTP_4%SCD N_SCD_c_280_n N_SCD_c_284_n N_SCD_c_285_n + N_SCD_M1010_g N_SCD_c_281_n N_SCD_M1027_g SCD SCD
diff --git a/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice b/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice index cc8d41e..9b66cd7 100644 --- a/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice +++ b/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfstp_4.spice -* Created: Thu Aug 27 19:27:27 2020 +* Created: Wed Sep 2 08:51:58 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.lvs.report b/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.lvs.report new file mode 100644 index 0000000..e4653f3 --- /dev/null +++ b/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.lvs.report
@@ -0,0 +1,509 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 87 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 89 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__sdfxbp_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__sdfxbp_1.sp ('sky130_fd_sc_hdll__sdfxbp_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice ('sky130_fd_sc_hdll__sdfxbp_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:52:02 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__sdfxbp_1 sky130_fd_sc_hdll__sdfxbp_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__sdfxbp_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__sdfxbp_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 27 27 + + Instances: 18 18 MN (4 pins) + 18 18 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 37 36 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 19 19 + + Instances: 10 10 MN (4 pins) + 10 10 MP (4 pins) + 4 4 SMN2 (4 pins) + 4 4 SMP2 (4 pins) + ------ ------ + Total Inst: 28 28 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 10 10 0 0 + + Nets: 19 19 0 0 + + Instances: 10 10 0 0 MN(NSHORT) + 10 10 0 0 MP(PHIGHVT) + 4 4 0 0 SMN2 + 4 4 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 28 28 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB CLK SCE D SCD VPWR Q Q_N VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.pex.spice b/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.pex.spice index 512bba7..5bf0e56 100644 --- a/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.pex.spice +++ b/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfxbp_1.pex.spice -* Created: Thu Aug 27 19:27:34 2020 +* Created: Wed Sep 2 08:52:05 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.pxi.spice b/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.pxi.spice index 863239f..bb4d5de 100644 --- a/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.pxi.spice +++ b/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfxbp_1.pxi.spice -* Created: Thu Aug 27 19:27:34 2020 +* Created: Wed Sep 2 08:52:05 2020 * x_PM_SKY130_FD_SC_HDLL__SDFXBP_1%CLK N_CLK_c_226_n N_CLK_c_230_n N_CLK_c_231_n + N_CLK_M1007_g N_CLK_c_227_n N_CLK_M1023_g CLK
diff --git a/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice b/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice index 63d7fe9..524952d 100644 --- a/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice +++ b/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfxbp_1.spice -* Created: Thu Aug 27 19:27:34 2020 +* Created: Wed Sep 2 08:52:05 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.lvs.report b/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.lvs.report new file mode 100644 index 0000000..6d6c1e5 --- /dev/null +++ b/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.lvs.report
@@ -0,0 +1,518 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 87 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 89 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 91 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 93 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 95 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 97 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__sdfxbp_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__sdfxbp_2.sp ('sky130_fd_sc_hdll__sdfxbp_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice ('sky130_fd_sc_hdll__sdfxbp_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:52:09 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__sdfxbp_2 sky130_fd_sc_hdll__sdfxbp_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__sdfxbp_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__sdfxbp_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 27 27 + + Instances: 20 20 MN (4 pins) + 20 20 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 41 40 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 10 10 + + Nets: 19 19 + + Instances: 10 10 MN (4 pins) + 10 10 MP (4 pins) + 4 4 SMN2 (4 pins) + 4 4 SMP2 (4 pins) + ------ ------ + Total Inst: 28 28 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 10 10 0 0 + + Nets: 19 19 0 0 + + Instances: 10 10 0 0 MN(NSHORT) + 10 10 0 0 MP(PHIGHVT) + 4 4 0 0 SMN2 + 4 4 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 28 28 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 4. + 4 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 4. + 4 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB CLK SCE D SCD VPWR Q Q_N VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.pex.spice b/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.pex.spice index c2032de..a7476c3 100644 --- a/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.pex.spice +++ b/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfxbp_2.pex.spice -* Created: Thu Aug 27 19:27:41 2020 +* Created: Wed Sep 2 08:52:13 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.pxi.spice b/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.pxi.spice index 8bf2231..6eaefb8 100644 --- a/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.pxi.spice +++ b/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfxbp_2.pxi.spice -* Created: Thu Aug 27 19:27:41 2020 +* Created: Wed Sep 2 08:52:13 2020 * x_PM_SKY130_FD_SC_HDLL__SDFXBP_2%CLK N_CLK_c_241_n N_CLK_c_245_n N_CLK_c_246_n + N_CLK_M1010_g N_CLK_c_242_n N_CLK_M1029_g CLK
diff --git a/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice b/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice index 74bfa53..802077e 100644 --- a/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice +++ b/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfxbp_2.spice -* Created: Thu Aug 27 19:27:41 2020 +* Created: Wed Sep 2 08:52:13 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.lvs.report b/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.lvs.report new file mode 100644 index 0000000..6652dc7 --- /dev/null +++ b/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.lvs.report
@@ -0,0 +1,505 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__sdfxtp_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__sdfxtp_1.sp ('sky130_fd_sc_hdll__sdfxtp_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.spice ('sky130_fd_sc_hdll__sdfxtp_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:52:17 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__sdfxtp_1 sky130_fd_sc_hdll__sdfxtp_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__sdfxtp_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__sdfxtp_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 25 25 + + Instances: 16 16 MN (4 pins) + 16 16 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 33 32 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 17 17 + + Instances: 8 8 MN (4 pins) + 8 8 MP (4 pins) + 4 4 SMN2 (4 pins) + 4 4 SMP2 (4 pins) + ------ ------ + Total Inst: 24 24 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 17 17 0 0 + + Instances: 8 8 0 0 MN(NSHORT) + 8 8 0 0 MP(PHIGHVT) + 4 4 0 0 SMN2 + 4 4 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 24 24 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB CLK SCE D SCD VPWR Q VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.pex.spice b/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.pex.spice index 1ec948b..f2a23c9 100644 --- a/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.pex.spice +++ b/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfxtp_1.pex.spice -* Created: Thu Aug 27 19:27:48 2020 +* Created: Wed Sep 2 08:52:21 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.pxi.spice b/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.pxi.spice index 406130c..1a85c07 100644 --- a/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.pxi.spice +++ b/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfxtp_1.pxi.spice -* Created: Thu Aug 27 19:27:48 2020 +* Created: Wed Sep 2 08:52:21 2020 * x_PM_SKY130_FD_SC_HDLL__SDFXTP_1%CLK N_CLK_c_194_n N_CLK_c_198_n N_CLK_c_195_n + N_CLK_M1028_g N_CLK_c_199_n N_CLK_M1002_g CLK
diff --git a/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.spice b/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.spice index 0ce35cf..93312cb 100644 --- a/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.spice +++ b/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfxtp_1.spice -* Created: Thu Aug 27 19:27:48 2020 +* Created: Wed Sep 2 08:52:21 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.lvs.report b/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.lvs.report new file mode 100644 index 0000000..d631f3f --- /dev/null +++ b/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.lvs.report
@@ -0,0 +1,512 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__sdfxtp_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__sdfxtp_2.sp ('sky130_fd_sc_hdll__sdfxtp_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.spice ('sky130_fd_sc_hdll__sdfxtp_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:52:25 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__sdfxtp_2 sky130_fd_sc_hdll__sdfxtp_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__sdfxtp_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__sdfxtp_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 25 25 + + Instances: 17 17 MN (4 pins) + 17 17 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 35 34 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 17 17 + + Instances: 8 8 MN (4 pins) + 8 8 MP (4 pins) + 4 4 SMN2 (4 pins) + 4 4 SMP2 (4 pins) + ------ ------ + Total Inst: 24 24 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 17 17 0 0 + + Instances: 8 8 0 0 MN(NSHORT) + 8 8 0 0 MP(PHIGHVT) + 4 4 0 0 SMN2 + 4 4 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 24 24 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB CLK SCE D SCD VPWR Q VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.pex.spice b/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.pex.spice index 78ad33e..d7fb025 100644 --- a/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.pex.spice +++ b/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfxtp_2.pex.spice -* Created: Thu Aug 27 19:27:56 2020 +* Created: Wed Sep 2 08:52:28 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.pxi.spice b/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.pxi.spice index 9b5970e..2772467 100644 --- a/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.pxi.spice +++ b/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfxtp_2.pxi.spice -* Created: Thu Aug 27 19:27:56 2020 +* Created: Wed Sep 2 08:52:28 2020 * x_PM_SKY130_FD_SC_HDLL__SDFXTP_2%CLK N_CLK_c_203_n N_CLK_c_207_n N_CLK_c_204_n + N_CLK_M1031_g N_CLK_c_208_n N_CLK_M1001_g CLK
diff --git a/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.spice b/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.spice index 8528a31..2b73269 100644 --- a/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.spice +++ b/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfxtp_2.spice -* Created: Thu Aug 27 19:27:56 2020 +* Created: Wed Sep 2 08:52:28 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.lvs.report b/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.lvs.report new file mode 100644 index 0000000..40febbc --- /dev/null +++ b/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.lvs.report
@@ -0,0 +1,516 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice" +------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 87 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 89 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 91 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 93 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__sdfxtp_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__sdfxtp_4.sp ('sky130_fd_sc_hdll__sdfxtp_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice ('sky130_fd_sc_hdll__sdfxtp_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:52:32 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__sdfxtp_4 sky130_fd_sc_hdll__sdfxtp_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__sdfxtp_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__sdfxtp_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 25 25 + + Instances: 19 19 MN (4 pins) + 19 19 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 39 38 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 9 9 + + Nets: 17 17 + + Instances: 8 8 MN (4 pins) + 8 8 MP (4 pins) + 4 4 SMN2 (4 pins) + 4 4 SMP2 (4 pins) + ------ ------ + Total Inst: 24 24 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 9 9 0 0 + + Nets: 17 17 0 0 + + Instances: 8 8 0 0 MN(NSHORT) + 8 8 0 0 MP(PHIGHVT) + 4 4 0 0 SMN2 + 4 4 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 24 24 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB CLK SCE D SCD VPWR Q VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.pex.spice b/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.pex.spice index 750dddc..eecd1ef 100644 --- a/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.pex.spice +++ b/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfxtp_4.pex.spice -* Created: Thu Aug 27 19:28:03 2020 +* Created: Wed Sep 2 08:52:36 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.pxi.spice b/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.pxi.spice index dcc19d9..8a76fb0 100644 --- a/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.pxi.spice +++ b/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfxtp_4.pxi.spice -* Created: Thu Aug 27 19:28:03 2020 +* Created: Wed Sep 2 08:52:36 2020 * x_PM_SKY130_FD_SC_HDLL__SDFXTP_4%CLK N_CLK_c_218_n N_CLK_c_222_n N_CLK_c_219_n + N_CLK_M1035_g N_CLK_c_223_n N_CLK_M1001_g CLK
diff --git a/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice b/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice index 27eaac5..b18d69c 100644 --- a/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice +++ b/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdfxtp_4.spice -* Created: Thu Aug 27 19:28:03 2020 +* Created: Wed Sep 2 08:52:36 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.lvs.report b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.lvs.report new file mode 100644 index 0000000..c77f1aa --- /dev/null +++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.lvs.report
@@ -0,0 +1,495 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__sdlclkp_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__sdlclkp_1.sp ('sky130_fd_sc_hdll__sdlclkp_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.spice ('sky130_fd_sc_hdll__sdlclkp_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:52:40 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__sdlclkp_1 sky130_fd_sc_hdll__sdlclkp_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__sdlclkp_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__sdlclkp_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 18 18 + + Instances: 11 11 MN (4 pins) + 11 11 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 23 22 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 14 14 + + Instances: 7 7 MN (4 pins) + 7 7 MP (4 pins) + 2 2 SMN2 (4 pins) + 2 2 SMP2 (4 pins) + ------ ------ + Total Inst: 18 18 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 14 14 0 0 + + Instances: 7 7 0 0 MN(NSHORT) + 7 7 0 0 MP(PHIGHVT) + 2 2 0 0 SMN2 + 2 2 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 18 18 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + +o Initial Correspondence Points: + + Ports: VNB VPB SCE GATE CLK VPWR GCLK VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.pex.spice b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.pex.spice index b1518ff..1394b0b 100644 --- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.pex.spice +++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdlclkp_1.pex.spice -* Created: Thu Aug 27 19:28:10 2020 +* Created: Wed Sep 2 08:52:43 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.pxi.spice b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.pxi.spice index 81924dc..a90ed99 100644 --- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.pxi.spice +++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdlclkp_1.pxi.spice -* Created: Thu Aug 27 19:28:10 2020 +* Created: Wed Sep 2 08:52:43 2020 * x_PM_SKY130_FD_SC_HDLL__SDLCLKP_1%SCE N_SCE_c_142_n N_SCE_c_143_n N_SCE_M1005_g + N_SCE_M1015_g SCE SCE N_SCE_c_141_n PM_SKY130_FD_SC_HDLL__SDLCLKP_1%SCE
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.spice b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.spice index 60ef95d..73bbe4e 100644 --- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.spice +++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdlclkp_1.spice -* Created: Thu Aug 27 19:28:10 2020 +* Created: Wed Sep 2 08:52:43 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.lvs.report b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.lvs.report new file mode 100644 index 0000000..2d62e01 --- /dev/null +++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.lvs.report
@@ -0,0 +1,502 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__sdlclkp_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__sdlclkp_2.sp ('sky130_fd_sc_hdll__sdlclkp_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.spice ('sky130_fd_sc_hdll__sdlclkp_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:52:47 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__sdlclkp_2 sky130_fd_sc_hdll__sdlclkp_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__sdlclkp_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__sdlclkp_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 18 18 + + Instances: 12 12 MN (4 pins) + 12 12 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 25 24 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 14 14 + + Instances: 7 7 MN (4 pins) + 7 7 MP (4 pins) + 2 2 SMN2 (4 pins) + 2 2 SMP2 (4 pins) + ------ ------ + Total Inst: 18 18 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 14 14 0 0 + + Instances: 7 7 0 0 MN(NSHORT) + 7 7 0 0 MP(PHIGHVT) + 2 2 0 0 SMN2 + 2 2 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 18 18 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB SCE GATE CLK VPWR GCLK VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.pex.spice b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.pex.spice index 7752183..20ced26 100644 --- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.pex.spice +++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdlclkp_2.pex.spice -* Created: Thu Aug 27 19:28:17 2020 +* Created: Wed Sep 2 08:52:51 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.pxi.spice b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.pxi.spice index e9e0f4f..f9bbe3b 100644 --- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.pxi.spice +++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdlclkp_2.pxi.spice -* Created: Thu Aug 27 19:28:17 2020 +* Created: Wed Sep 2 08:52:51 2020 * x_PM_SKY130_FD_SC_HDLL__SDLCLKP_2%SCE N_SCE_c_158_n N_SCE_c_159_n N_SCE_M1007_g + N_SCE_M1020_g SCE SCE N_SCE_c_157_n PM_SKY130_FD_SC_HDLL__SDLCLKP_2%SCE
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.spice b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.spice index d244e84..0ddc201 100644 --- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.spice +++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdlclkp_2.spice -* Created: Thu Aug 27 19:28:17 2020 +* Created: Wed Sep 2 08:52:51 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.lvs.report b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.lvs.report new file mode 100644 index 0000000..bb198f0 --- /dev/null +++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.lvs.report
@@ -0,0 +1,506 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__sdlclkp_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__sdlclkp_4.sp ('sky130_fd_sc_hdll__sdlclkp_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.spice ('sky130_fd_sc_hdll__sdlclkp_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:52:55 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__sdlclkp_4 sky130_fd_sc_hdll__sdlclkp_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__sdlclkp_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__sdlclkp_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 18 18 + + Instances: 14 14 MN (4 pins) + 14 14 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 29 28 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 14 14 + + Instances: 7 7 MN (4 pins) + 7 7 MP (4 pins) + 2 2 SMN2 (4 pins) + 2 2 SMP2 (4 pins) + ------ ------ + Total Inst: 18 18 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 14 14 0 0 + + Instances: 7 7 0 0 MN(NSHORT) + 7 7 0 0 MP(PHIGHVT) + 2 2 0 0 SMN2 + 2 2 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 18 18 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB SCE GATE CLK VPWR GCLK VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.pex.spice b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.pex.spice index 3cb6c90..05a5dc0 100644 --- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.pex.spice +++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdlclkp_4.pex.spice -* Created: Thu Aug 27 19:28:25 2020 +* Created: Wed Sep 2 08:52:58 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.pxi.spice b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.pxi.spice index 86a18ad..f4b8c85 100644 --- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.pxi.spice +++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdlclkp_4.pxi.spice -* Created: Thu Aug 27 19:28:25 2020 +* Created: Wed Sep 2 08:52:58 2020 * x_PM_SKY130_FD_SC_HDLL__SDLCLKP_4%SCE N_SCE_c_160_n N_SCE_c_161_n N_SCE_M1007_g + N_SCE_M1016_g SCE SCE N_SCE_c_159_n PM_SKY130_FD_SC_HDLL__SDLCLKP_4%SCE
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.spice b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.spice index 5d3bb11..50a8c82 100644 --- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.spice +++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sdlclkp_4.spice -* Created: Thu Aug 27 19:28:25 2020 +* Created: Wed Sep 2 08:52:58 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.lvs.report b/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.lvs.report new file mode 100644 index 0000000..b52e25b --- /dev/null +++ b/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.lvs.report
@@ -0,0 +1,520 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 87 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 89 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 91 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 93 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 95 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 97 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 99 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 101 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 103 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" +Warning: Duplicate parameter definition "MULT" at line 105 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__sedfxbp_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__sedfxbp_1.sp ('sky130_fd_sc_hdll__sedfxbp_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice ('sky130_fd_sc_hdll__sedfxbp_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:53:03 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__sedfxbp_1 sky130_fd_sc_hdll__sedfxbp_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__sedfxbp_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__sedfxbp_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 11 11 + + Nets: 34 33 * + + Instances: 22 22 MN (4 pins) + 22 22 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 46 44 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 11 11 + + Nets: 21 21 + + Instances: 10 10 MN (4 pins) + 10 10 MP (4 pins) + 6 6 SMN2 (4 pins) + 6 6 SMP2 (4 pins) + ------ ------ + Total Inst: 32 32 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 11 11 0 0 + + Nets: 21 21 0 0 + + Instances: 10 10 0 0 MN(NSHORT) + 10 10 0 0 MP(PHIGHVT) + 6 6 0 0 SMN2 + 6 6 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 32 32 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB CLK D DE SCD SCE VPWR Q_N Q VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.pex.spice b/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.pex.spice index 3ef3af4..01f9bf7 100644 --- a/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.pex.spice +++ b/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sedfxbp_1.pex.spice -* Created: Thu Aug 27 19:28:32 2020 +* Created: Wed Sep 2 08:53:06 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.pxi.spice b/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.pxi.spice index cebb21c..15f072d 100644 --- a/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.pxi.spice +++ b/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sedfxbp_1.pxi.spice -* Created: Thu Aug 27 19:28:32 2020 +* Created: Wed Sep 2 08:53:06 2020 * x_PM_SKY130_FD_SC_HDLL__SEDFXBP_1%CLK N_CLK_c_281_n N_CLK_c_285_n N_CLK_c_286_n + N_CLK_M1006_g N_CLK_c_282_n N_CLK_M1033_g CLK
diff --git a/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice b/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice index 25e72f9..2b34a12 100644 --- a/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice +++ b/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sedfxbp_1.spice -* Created: Thu Aug 27 19:28:32 2020 +* Created: Wed Sep 2 08:53:06 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.lvs.report b/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.lvs.report new file mode 100644 index 0000000..9bf0e06 --- /dev/null +++ b/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.lvs.report
@@ -0,0 +1,529 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 87 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 89 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 91 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 93 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 95 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 97 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 99 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 101 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 103 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 105 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 107 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 109 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 111 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" +Warning: Duplicate parameter definition "MULT" at line 113 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__sedfxbp_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__sedfxbp_2.sp ('sky130_fd_sc_hdll__sedfxbp_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice ('sky130_fd_sc_hdll__sedfxbp_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:53:10 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__sedfxbp_2 sky130_fd_sc_hdll__sedfxbp_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__sedfxbp_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__sedfxbp_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 11 11 + + Nets: 34 33 * + + Instances: 24 24 MN (4 pins) + 24 24 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 50 48 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 11 11 + + Nets: 21 21 + + Instances: 10 10 MN (4 pins) + 10 10 MP (4 pins) + 6 6 SMN2 (4 pins) + 6 6 SMP2 (4 pins) + ------ ------ + Total Inst: 32 32 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 11 11 0 0 + + Nets: 21 21 0 0 + + Instances: 10 10 0 0 MN(NSHORT) + 10 10 0 0 MP(PHIGHVT) + 6 6 0 0 SMN2 + 6 6 0 0 SMP2 + ------- ------- --------- --------- + Total Inst: 32 32 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 4. + 4 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 4. + 4 mos transistors were deleted by parallel reduction. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB CLK D DE SCD SCE VPWR Q_N Q VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.pex.spice b/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.pex.spice index de42a9b..7b3e2d7 100644 --- a/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.pex.spice +++ b/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sedfxbp_2.pex.spice -* Created: Thu Aug 27 19:28:39 2020 +* Created: Wed Sep 2 08:53:14 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.pxi.spice b/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.pxi.spice index 95dd658..8c58f32 100644 --- a/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.pxi.spice +++ b/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sedfxbp_2.pxi.spice -* Created: Thu Aug 27 19:28:39 2020 +* Created: Wed Sep 2 08:53:14 2020 * x_PM_SKY130_FD_SC_HDLL__SEDFXBP_2%CLK N_CLK_c_298_n N_CLK_c_302_n N_CLK_c_303_n + N_CLK_M1007_g N_CLK_c_299_n N_CLK_M1037_g CLK
diff --git a/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice b/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice index 2a05fae..fdc522b 100644 --- a/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice +++ b/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__sedfxbp_2.spice -* Created: Thu Aug 27 19:28:39 2020 +* Created: Wed Sep 2 08:53:14 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/tap/sky130_fd_sc_hdll__tap_1.lvs.report b/cells/tap/sky130_fd_sc_hdll__tap_1.lvs.report new file mode 100644 index 0000000..4e23779 --- /dev/null +++ b/cells/tap/sky130_fd_sc_hdll__tap_1.lvs.report
@@ -0,0 +1,375 @@ + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__tap_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__tap_1.sp ('sky130_fd_sc_hdll__tap_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/tap/sky130_fd_sc_hdll__tap_1.spice ('sky130_fd_sc_hdll__tap_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:53:18 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # # ######################## + # # # # + # # NOT COMPARED # + # # # # + # # ######################## + + + Error: Nothing in source. + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/tapvgnd/sky130_fd_sc_hdll__tapvgnd_1.lvs.report b/cells/tapvgnd/sky130_fd_sc_hdll__tapvgnd_1.lvs.report new file mode 100644 index 0000000..57ff1cd --- /dev/null +++ b/cells/tapvgnd/sky130_fd_sc_hdll__tapvgnd_1.lvs.report
@@ -0,0 +1,375 @@ + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__tapvgnd_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__tapvgnd_1.sp ('sky130_fd_sc_hdll__tapvgnd_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/tapvgnd/sky130_fd_sc_hdll__tapvgnd_1.spice ('sky130_fd_sc_hdll__tapvgnd_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:53:22 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # # ######################## + # # # # + # # NOT COMPARED # + # # # # + # # ######################## + + + Error: Nothing in source. + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/tapvgnd2/sky130_fd_sc_hdll__tapvgnd2_1.lvs.report b/cells/tapvgnd2/sky130_fd_sc_hdll__tapvgnd2_1.lvs.report new file mode 100644 index 0000000..baf8e1a --- /dev/null +++ b/cells/tapvgnd2/sky130_fd_sc_hdll__tapvgnd2_1.lvs.report
@@ -0,0 +1,375 @@ + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__tapvgnd2_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__tapvgnd2_1.sp ('sky130_fd_sc_hdll__tapvgnd2_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/tapvgnd2/sky130_fd_sc_hdll__tapvgnd2_1.spice ('sky130_fd_sc_hdll__tapvgnd2_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:53:26 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # # ######################## + # # # # + # # NOT COMPARED # + # # # # + # # ######################## + + + Error: Nothing in source. + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/tapvpwrvgnd/sky130_fd_sc_hdll__tapvpwrvgnd_1.lvs.report b/cells/tapvpwrvgnd/sky130_fd_sc_hdll__tapvpwrvgnd_1.lvs.report new file mode 100644 index 0000000..35484e8 --- /dev/null +++ b/cells/tapvpwrvgnd/sky130_fd_sc_hdll__tapvpwrvgnd_1.lvs.report
@@ -0,0 +1,375 @@ + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__tapvpwrvgnd_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__tapvpwrvgnd_1.sp ('sky130_fd_sc_hdll__tapvpwrvgnd_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/tapvpwrvgnd/sky130_fd_sc_hdll__tapvpwrvgnd_1.spice ('sky130_fd_sc_hdll__tapvpwrvgnd_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:53:29 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # # ######################## + # # # # + # # NOT COMPARED # + # # # # + # # ######################## + + + Error: Nothing in source. + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/xnor2/sky130_fd_sc_hdll__xnor2_1.lvs.report b/cells/xnor2/sky130_fd_sc_hdll__xnor2_1.lvs.report new file mode 100644 index 0000000..ff8de06 --- /dev/null +++ b/cells/xnor2/sky130_fd_sc_hdll__xnor2_1.lvs.report
@@ -0,0 +1,486 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_1.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__xnor2_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__xnor2_1.sp ('sky130_fd_sc_hdll__xnor2_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_1.spice ('sky130_fd_sc_hdll__xnor2_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:53:33 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__xnor2_1 sky130_fd_sc_hdll__xnor2_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__xnor2_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__xnor2_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 12 11 * + + Instances: 5 5 MN (4 pins) + 5 5 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 12 10 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 3 3 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SMP2 (4 pins) + 1 1 SPMN_2_1 (5 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 8 8 0 0 + + Instances: 3 3 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SMP2 + 1 1 0 0 SPMN_2_1 + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB B A VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/xnor2/sky130_fd_sc_hdll__xnor2_1.pex.spice b/cells/xnor2/sky130_fd_sc_hdll__xnor2_1.pex.spice index daae249..cb40731 100644 --- a/cells/xnor2/sky130_fd_sc_hdll__xnor2_1.pex.spice +++ b/cells/xnor2/sky130_fd_sc_hdll__xnor2_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__xnor2_1.pex.spice -* Created: Thu Aug 27 19:29:01 2020 +* Created: Wed Sep 2 08:53:36 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/xnor2/sky130_fd_sc_hdll__xnor2_1.pxi.spice b/cells/xnor2/sky130_fd_sc_hdll__xnor2_1.pxi.spice index 9450a77..6f6ccab 100644 --- a/cells/xnor2/sky130_fd_sc_hdll__xnor2_1.pxi.spice +++ b/cells/xnor2/sky130_fd_sc_hdll__xnor2_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__xnor2_1.pxi.spice -* Created: Thu Aug 27 19:29:01 2020 +* Created: Wed Sep 2 08:53:36 2020 * x_PM_SKY130_FD_SC_HDLL__XNOR2_1%B N_B_c_54_n N_B_M1008_g N_B_c_55_n N_B_M1002_g + N_B_c_56_n N_B_M1000_g N_B_c_57_n N_B_M1006_g N_B_c_64_n N_B_c_58_n N_B_c_59_n
diff --git a/cells/xnor2/sky130_fd_sc_hdll__xnor2_1.spice b/cells/xnor2/sky130_fd_sc_hdll__xnor2_1.spice index 3aa85ac..7f53750 100644 --- a/cells/xnor2/sky130_fd_sc_hdll__xnor2_1.spice +++ b/cells/xnor2/sky130_fd_sc_hdll__xnor2_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__xnor2_1.spice -* Created: Thu Aug 27 19:29:01 2020 +* Created: Wed Sep 2 08:53:36 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.lvs.report b/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.lvs.report new file mode 100644 index 0000000..1800c22 --- /dev/null +++ b/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.lvs.report
@@ -0,0 +1,498 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__xnor2_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__xnor2_2.sp ('sky130_fd_sc_hdll__xnor2_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.spice ('sky130_fd_sc_hdll__xnor2_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:53:40 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__xnor2_2 sky130_fd_sc_hdll__xnor2_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__xnor2_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__xnor2_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 11 11 + + Instances: 10 10 MN (4 pins) + 10 10 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 21 20 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 3 3 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SMP2 (4 pins) + 1 1 SPMN_2_1 (5 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 8 8 0 0 + + Instances: 3 3 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SMP2 + 1 1 0 0 SPMN_2_1 + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 20 layout mos transistors were reduced to 10. + 10 mos transistors were deleted by parallel reduction. + 20 source mos transistors were reduced to 10. + 10 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB B A VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.pex.spice b/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.pex.spice index ce2df9d..fc7d0fc 100644 --- a/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.pex.spice +++ b/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__xnor2_2.pex.spice -* Created: Thu Aug 27 19:29:08 2020 +* Created: Wed Sep 2 08:53:44 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.pxi.spice b/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.pxi.spice index a5ca55d..0ba8643 100644 --- a/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.pxi.spice +++ b/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__xnor2_2.pxi.spice -* Created: Thu Aug 27 19:29:08 2020 +* Created: Wed Sep 2 08:53:44 2020 * x_PM_SKY130_FD_SC_HDLL__XNOR2_2%B N_B_c_95_n N_B_M1007_g N_B_c_102_n N_B_M1005_g + N_B_c_103_n N_B_M1016_g N_B_c_96_n N_B_M1017_g N_B_c_97_n N_B_M1004_g
diff --git a/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.spice b/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.spice index 4bc63b0..afbb2d2 100644 --- a/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.spice +++ b/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__xnor2_2.spice -* Created: Thu Aug 27 19:29:08 2020 +* Created: Wed Sep 2 08:53:44 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.lvs.report b/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.lvs.report new file mode 100644 index 0000000..d002aaf --- /dev/null +++ b/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.lvs.report
@@ -0,0 +1,518 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 87 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 89 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 91 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 93 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 95 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 97 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__xnor2_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__xnor2_4.sp ('sky130_fd_sc_hdll__xnor2_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice ('sky130_fd_sc_hdll__xnor2_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:53:48 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__xnor2_4 sky130_fd_sc_hdll__xnor2_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__xnor2_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__xnor2_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 11 11 + + Instances: 20 20 MN (4 pins) + 20 20 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 41 40 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 3 3 MP (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SMP2 (4 pins) + 1 1 SPMN_2_1 (5 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 8 8 0 0 + + Instances: 3 3 0 0 MP(PHIGHVT) + 1 1 0 0 SMN2 + 1 1 0 0 SMP2 + 1 1 0 0 SPMN_2_1 + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 40 layout mos transistors were reduced to 10. + 30 mos transistors were deleted by parallel reduction. + 40 source mos transistors were reduced to 10. + 30 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB B A VPWR Y VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.pex.spice b/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.pex.spice index cac455c..cd679e9 100644 --- a/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.pex.spice +++ b/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__xnor2_4.pex.spice -* Created: Thu Aug 27 19:29:15 2020 +* Created: Wed Sep 2 08:53:51 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.pxi.spice b/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.pxi.spice index 211aa35..777b91f 100644 --- a/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.pxi.spice +++ b/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__xnor2_4.pxi.spice -* Created: Thu Aug 27 19:29:15 2020 +* Created: Wed Sep 2 08:53:51 2020 * x_PM_SKY130_FD_SC_HDLL__XNOR2_4%B N_B_c_153_n N_B_M1007_g N_B_c_164_n + N_B_M1005_g N_B_c_154_n N_B_M1021_g N_B_c_165_n N_B_M1012_g N_B_c_155_n
diff --git a/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice b/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice index 6d7517b..b79e67f 100644 --- a/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice +++ b/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__xnor2_4.spice -* Created: Thu Aug 27 19:29:15 2020 +* Created: Wed Sep 2 08:53:51 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.lvs.report b/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.lvs.report new file mode 100644 index 0000000..142953b --- /dev/null +++ b/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.lvs.report
@@ -0,0 +1,494 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__xnor3_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__xnor3_1.sp ('sky130_fd_sc_hdll__xnor3_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.spice ('sky130_fd_sc_hdll__xnor3_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:53:56 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__xnor3_1 sky130_fd_sc_hdll__xnor3_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__xnor3_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__xnor3_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 16 15 * + + Instances: 11 11 MN (4 pins) + 11 11 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 24 22 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 15 15 + + Instances: 11 11 MN (4 pins) + 11 11 MP (4 pins) + ------ ------ + Total Inst: 22 22 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 15 15 0 0 + + Instances: 11 11 0 0 MN(NSHORT) + 11 11 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 22 22 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB C B A X VPWR VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.pex.spice b/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.pex.spice index 740e8c1..2176c6e 100644 --- a/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.pex.spice +++ b/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__xnor3_1.pex.spice -* Created: Thu Aug 27 19:29:23 2020 +* Created: Wed Sep 2 08:53:59 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.pxi.spice b/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.pxi.spice index a1fed2c..e47ffba 100644 --- a/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.pxi.spice +++ b/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__xnor3_1.pxi.spice -* Created: Thu Aug 27 19:29:23 2020 +* Created: Wed Sep 2 08:53:59 2020 * x_PM_SKY130_FD_SC_HDLL__XNOR3_1%A_83_21# N_A_83_21#_M1002_d N_A_83_21#_M1015_d + N_A_83_21#_c_152_n N_A_83_21#_M1012_g N_A_83_21#_c_153_n N_A_83_21#_M1000_g
diff --git a/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.spice b/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.spice index 7eadc8c..274ec83 100644 --- a/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.spice +++ b/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__xnor3_1.spice -* Created: Thu Aug 27 19:29:23 2020 +* Created: Wed Sep 2 08:53:59 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.lvs.report b/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.lvs.report new file mode 100644 index 0000000..2319a42 --- /dev/null +++ b/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.lvs.report
@@ -0,0 +1,498 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__xnor3_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__xnor3_2.sp ('sky130_fd_sc_hdll__xnor3_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.spice ('sky130_fd_sc_hdll__xnor3_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:54:03 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__xnor3_2 sky130_fd_sc_hdll__xnor3_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__xnor3_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__xnor3_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 15 15 + + Instances: 12 12 MN (4 pins) + 12 12 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 25 24 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 15 15 + + Instances: 11 11 MN (4 pins) + 11 11 MP (4 pins) + ------ ------ + Total Inst: 22 22 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 15 15 0 0 + + Instances: 11 11 0 0 MN(NSHORT) + 11 11 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 22 22 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB C B A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.pex.spice b/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.pex.spice index 0c922a8..b1674fc 100644 --- a/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.pex.spice +++ b/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__xnor3_2.pex.spice -* Created: Thu Aug 27 19:29:30 2020 +* Created: Wed Sep 2 08:54:07 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.pxi.spice b/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.pxi.spice index 5f231b6..a0e340c 100644 --- a/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.pxi.spice +++ b/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__xnor3_2.pxi.spice -* Created: Thu Aug 27 19:29:30 2020 +* Created: Wed Sep 2 08:54:07 2020 * x_PM_SKY130_FD_SC_HDLL__XNOR3_2%A_79_21# N_A_79_21#_M1007_d N_A_79_21#_M1016_d + N_A_79_21#_c_158_n N_A_79_21#_M1002_g N_A_79_21#_c_165_n N_A_79_21#_M1013_g
diff --git a/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.spice b/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.spice index 06c4234..88848e4 100644 --- a/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.spice +++ b/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__xnor3_2.spice -* Created: Thu Aug 27 19:29:30 2020 +* Created: Wed Sep 2 08:54:07 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.lvs.report b/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.lvs.report new file mode 100644 index 0000000..11777a3 --- /dev/null +++ b/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.lvs.report
@@ -0,0 +1,505 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.spice" +----------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__xnor3_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__xnor3_4.sp ('sky130_fd_sc_hdll__xnor3_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.spice ('sky130_fd_sc_hdll__xnor3_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:54:11 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__xnor3_4 sky130_fd_sc_hdll__xnor3_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__xnor3_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__xnor3_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 16 15 * + + Instances: 14 14 MN (4 pins) + 14 14 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 30 28 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 15 15 + + Instances: 11 11 MN (4 pins) + 11 11 MP (4 pins) + ------ ------ + Total Inst: 22 22 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 15 15 0 0 + + Instances: 11 11 0 0 MN(NSHORT) + 11 11 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 22 22 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB C B A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.pex.spice b/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.pex.spice index bc90880..5b146d1 100644 --- a/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.pex.spice +++ b/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__xnor3_4.pex.spice -* Created: Thu Aug 27 19:29:37 2020 +* Created: Wed Sep 2 08:54:14 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.pxi.spice b/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.pxi.spice index e1d1f2d..315d982 100644 --- a/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.pxi.spice +++ b/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__xnor3_4.pxi.spice -* Created: Thu Aug 27 19:29:37 2020 +* Created: Wed Sep 2 08:54:14 2020 * x_PM_SKY130_FD_SC_HDLL__XNOR3_4%A_101_21# N_A_101_21#_M1023_d + N_A_101_21#_M1019_d N_A_101_21#_c_168_n N_A_101_21#_M1005_g
diff --git a/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.spice b/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.spice index 4df869c..839571f 100644 --- a/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.spice +++ b/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__xnor3_4.spice -* Created: Thu Aug 27 19:29:37 2020 +* Created: Wed Sep 2 08:54:14 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/xor2/sky130_fd_sc_hdll__xor2_1.lvs.report b/cells/xor2/sky130_fd_sc_hdll__xor2_1.lvs.report new file mode 100644 index 0000000..71121fc --- /dev/null +++ b/cells/xor2/sky130_fd_sc_hdll__xor2_1.lvs.report
@@ -0,0 +1,486 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_1.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__xor2_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__xor2_1.sp ('sky130_fd_sc_hdll__xor2_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_1.spice ('sky130_fd_sc_hdll__xor2_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:54:18 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__xor2_1 sky130_fd_sc_hdll__xor2_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__xor2_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__xor2_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 12 11 * + + Instances: 5 5 MN (4 pins) + 5 5 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 12 10 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 3 3 MN (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SMP2 (4 pins) + 1 1 SPMP_2_1 (5 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 8 8 0 0 + + Instances: 3 3 0 0 MN(NSHORT) + 1 1 0 0 SMN2 + 1 1 0 0 SMP2 + 1 1 0 0 SPMP_2_1 + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB B A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/xor2/sky130_fd_sc_hdll__xor2_1.pex.spice b/cells/xor2/sky130_fd_sc_hdll__xor2_1.pex.spice index ccf3d0b..a69d113 100644 --- a/cells/xor2/sky130_fd_sc_hdll__xor2_1.pex.spice +++ b/cells/xor2/sky130_fd_sc_hdll__xor2_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__xor2_1.pex.spice -* Created: Thu Aug 27 19:29:45 2020 +* Created: Wed Sep 2 08:54:22 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/xor2/sky130_fd_sc_hdll__xor2_1.pxi.spice b/cells/xor2/sky130_fd_sc_hdll__xor2_1.pxi.spice index c452cff..71065b5 100644 --- a/cells/xor2/sky130_fd_sc_hdll__xor2_1.pxi.spice +++ b/cells/xor2/sky130_fd_sc_hdll__xor2_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__xor2_1.pxi.spice -* Created: Thu Aug 27 19:29:45 2020 +* Created: Wed Sep 2 08:54:22 2020 * x_PM_SKY130_FD_SC_HDLL__XOR2_1%B N_B_c_55_n N_B_M1006_g N_B_c_56_n N_B_M1002_g + N_B_c_57_n N_B_M1005_g N_B_c_58_n N_B_M1008_g N_B_c_59_n N_B_c_60_n N_B_c_65_n
diff --git a/cells/xor2/sky130_fd_sc_hdll__xor2_1.spice b/cells/xor2/sky130_fd_sc_hdll__xor2_1.spice index a430ee3..d2b9189 100644 --- a/cells/xor2/sky130_fd_sc_hdll__xor2_1.spice +++ b/cells/xor2/sky130_fd_sc_hdll__xor2_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__xor2_1.spice -* Created: Thu Aug 27 19:29:45 2020 +* Created: Wed Sep 2 08:54:22 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/xor2/sky130_fd_sc_hdll__xor2_2.lvs.report b/cells/xor2/sky130_fd_sc_hdll__xor2_2.lvs.report new file mode 100644 index 0000000..5c79dad --- /dev/null +++ b/cells/xor2/sky130_fd_sc_hdll__xor2_2.lvs.report
@@ -0,0 +1,498 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_2.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_2.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__xor2_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__xor2_2.sp ('sky130_fd_sc_hdll__xor2_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_2.spice ('sky130_fd_sc_hdll__xor2_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:54:26 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__xor2_2 sky130_fd_sc_hdll__xor2_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__xor2_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__xor2_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 11 11 + + Instances: 10 10 MN (4 pins) + 10 10 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 21 20 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 3 3 MN (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SMP2 (4 pins) + 1 1 SPMP_2_1 (5 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 8 8 0 0 + + Instances: 3 3 0 0 MN(NSHORT) + 1 1 0 0 SMN2 + 1 1 0 0 SMP2 + 1 1 0 0 SPMP_2_1 + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 20 layout mos transistors were reduced to 10. + 10 mos transistors were deleted by parallel reduction. + 20 source mos transistors were reduced to 10. + 10 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A B VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/xor2/sky130_fd_sc_hdll__xor2_2.pex.spice b/cells/xor2/sky130_fd_sc_hdll__xor2_2.pex.spice index 28410f1..0804edf 100644 --- a/cells/xor2/sky130_fd_sc_hdll__xor2_2.pex.spice +++ b/cells/xor2/sky130_fd_sc_hdll__xor2_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__xor2_2.pex.spice -* Created: Thu Aug 27 19:29:52 2020 +* Created: Wed Sep 2 08:54:29 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/xor2/sky130_fd_sc_hdll__xor2_2.pxi.spice b/cells/xor2/sky130_fd_sc_hdll__xor2_2.pxi.spice index ba829fb..5541a97 100644 --- a/cells/xor2/sky130_fd_sc_hdll__xor2_2.pxi.spice +++ b/cells/xor2/sky130_fd_sc_hdll__xor2_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__xor2_2.pxi.spice -* Created: Thu Aug 27 19:29:52 2020 +* Created: Wed Sep 2 08:54:29 2020 * x_PM_SKY130_FD_SC_HDLL__XOR2_2%A N_A_c_104_n N_A_M1002_g N_A_c_113_n N_A_M1001_g + N_A_c_114_n N_A_M1013_g N_A_c_105_n N_A_M1015_g N_A_c_115_n N_A_M1018_g
diff --git a/cells/xor2/sky130_fd_sc_hdll__xor2_2.spice b/cells/xor2/sky130_fd_sc_hdll__xor2_2.spice index ca5a32c..de17865 100644 --- a/cells/xor2/sky130_fd_sc_hdll__xor2_2.spice +++ b/cells/xor2/sky130_fd_sc_hdll__xor2_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__xor2_2.spice -* Created: Thu Aug 27 19:29:52 2020 +* Created: Wed Sep 2 08:54:29 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/xor2/sky130_fd_sc_hdll__xor2_4.lvs.report b/cells/xor2/sky130_fd_sc_hdll__xor2_4.lvs.report new file mode 100644 index 0000000..bdaeb03 --- /dev/null +++ b/cells/xor2/sky130_fd_sc_hdll__xor2_4.lvs.report
@@ -0,0 +1,518 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 75 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 77 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 79 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 81 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 83 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 85 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 87 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 89 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 91 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 93 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 95 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" +Warning: Duplicate parameter definition "MULT" at line 97 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__xor2_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__xor2_4.sp ('sky130_fd_sc_hdll__xor2_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice ('sky130_fd_sc_hdll__xor2_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:54:33 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__xor2_4 sky130_fd_sc_hdll__xor2_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__xor2_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__xor2_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 11 11 + + Instances: 20 20 MN (4 pins) + 20 20 MP (4 pins) + 1 0 * Dpar (2 pins) + ------ ------ + Total Inst: 41 40 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 7 7 + + Nets: 8 8 + + Instances: 3 3 MN (4 pins) + 1 1 SMN2 (4 pins) + 1 1 SMP2 (4 pins) + 1 1 SPMP_2_1 (5 pins) + ------ ------ + Total Inst: 6 6 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 7 7 0 0 + + Nets: 8 8 0 0 + + Instances: 3 3 0 0 MN(NSHORT) + 1 1 0 0 SMN2 + 1 1 0 0 SMP2 + 1 1 0 0 SPMP_2_1 + ------- ------- --------- --------- + Total Inst: 6 6 0 0 + + +o Statistics: + + 1 layout instance was filtered and its pins removed from adjoining nets. + + 40 layout mos transistors were reduced to 10. + 30 mos transistors were deleted by parallel reduction. + 40 source mos transistors were reduced to 10. + 30 mos transistors were deleted by parallel reduction. + + +o Initial Correspondence Points: + + Ports: VNB VPB A B VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/xor2/sky130_fd_sc_hdll__xor2_4.pex.spice b/cells/xor2/sky130_fd_sc_hdll__xor2_4.pex.spice index 76de092..480be3e 100644 --- a/cells/xor2/sky130_fd_sc_hdll__xor2_4.pex.spice +++ b/cells/xor2/sky130_fd_sc_hdll__xor2_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__xor2_4.pex.spice -* Created: Thu Aug 27 19:29:59 2020 +* Created: Wed Sep 2 08:54:37 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/xor2/sky130_fd_sc_hdll__xor2_4.pxi.spice b/cells/xor2/sky130_fd_sc_hdll__xor2_4.pxi.spice index 927bcd5..409fea1 100644 --- a/cells/xor2/sky130_fd_sc_hdll__xor2_4.pxi.spice +++ b/cells/xor2/sky130_fd_sc_hdll__xor2_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__xor2_4.pxi.spice -* Created: Thu Aug 27 19:29:59 2020 +* Created: Wed Sep 2 08:54:37 2020 * x_PM_SKY130_FD_SC_HDLL__XOR2_4%A N_A_c_158_n N_A_M1003_g N_A_c_169_n N_A_M1005_g + N_A_c_159_n N_A_M1014_g N_A_c_170_n N_A_M1012_g N_A_c_160_n N_A_M1030_g
diff --git a/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice b/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice index 512bdf0..95a5dc0 100644 --- a/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice +++ b/cells/xor2/sky130_fd_sc_hdll__xor2_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__xor2_4.spice -* Created: Thu Aug 27 19:29:59 2020 +* Created: Wed Sep 2 08:54:37 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/xor3/sky130_fd_sc_hdll__xor3_1.lvs.report b/cells/xor3/sky130_fd_sc_hdll__xor3_1.lvs.report new file mode 100644 index 0000000..c28c84b --- /dev/null +++ b/cells/xor3/sky130_fd_sc_hdll__xor3_1.lvs.report
@@ -0,0 +1,494 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_1.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_1.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_1.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__xor3_1.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__xor3_1.sp ('sky130_fd_sc_hdll__xor3_1') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_1.spice ('sky130_fd_sc_hdll__xor3_1') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:54:41 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__xor3_1 sky130_fd_sc_hdll__xor3_1 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__xor3_1 +SOURCE CELL NAME: sky130_fd_sc_hdll__xor3_1 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 16 15 * + + Instances: 11 11 MN (4 pins) + 11 11 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 24 22 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 15 15 + + Instances: 11 11 MN (4 pins) + 11 11 MP (4 pins) + ------ ------ + Total Inst: 22 22 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 15 15 0 0 + + Instances: 11 11 0 0 MN(NSHORT) + 11 11 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 22 22 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB C B A X VPWR VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/xor3/sky130_fd_sc_hdll__xor3_1.pex.spice b/cells/xor3/sky130_fd_sc_hdll__xor3_1.pex.spice index ffd8cdd..46fa869 100644 --- a/cells/xor3/sky130_fd_sc_hdll__xor3_1.pex.spice +++ b/cells/xor3/sky130_fd_sc_hdll__xor3_1.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__xor3_1.pex.spice -* Created: Thu Aug 27 19:30:06 2020 +* Created: Wed Sep 2 08:54:45 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/xor3/sky130_fd_sc_hdll__xor3_1.pxi.spice b/cells/xor3/sky130_fd_sc_hdll__xor3_1.pxi.spice index b1fdbf7..8618746 100644 --- a/cells/xor3/sky130_fd_sc_hdll__xor3_1.pxi.spice +++ b/cells/xor3/sky130_fd_sc_hdll__xor3_1.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__xor3_1.pxi.spice -* Created: Thu Aug 27 19:30:06 2020 +* Created: Wed Sep 2 08:54:45 2020 * x_PM_SKY130_FD_SC_HDLL__XOR3_1%A_116_21# N_A_116_21#_M1007_d N_A_116_21#_M1005_d + N_A_116_21#_c_158_n N_A_116_21#_M1018_g N_A_116_21#_c_159_n
diff --git a/cells/xor3/sky130_fd_sc_hdll__xor3_1.spice b/cells/xor3/sky130_fd_sc_hdll__xor3_1.spice index d2e2363..1b838e0 100644 --- a/cells/xor3/sky130_fd_sc_hdll__xor3_1.spice +++ b/cells/xor3/sky130_fd_sc_hdll__xor3_1.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__xor3_1.spice -* Created: Thu Aug 27 19:30:06 2020 +* Created: Wed Sep 2 08:54:45 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/xor3/sky130_fd_sc_hdll__xor3_2.lvs.report b/cells/xor3/sky130_fd_sc_hdll__xor3_2.lvs.report new file mode 100644 index 0000000..dce81c9 --- /dev/null +++ b/cells/xor3/sky130_fd_sc_hdll__xor3_2.lvs.report
@@ -0,0 +1,501 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_2.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_2.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_2.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__xor3_2.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__xor3_2.sp ('sky130_fd_sc_hdll__xor3_2') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_2.spice ('sky130_fd_sc_hdll__xor3_2') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:54:49 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__xor3_2 sky130_fd_sc_hdll__xor3_2 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__xor3_2 +SOURCE CELL NAME: sky130_fd_sc_hdll__xor3_2 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 16 15 * + + Instances: 12 12 MN (4 pins) + 12 12 MP (4 pins) + 1 0 * Dpar (2 pins) + 1 0 * Probe (2 pins) + ------ ------ + Total Inst: 26 24 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 15 15 + + Instances: 11 11 MN (4 pins) + 11 11 MP (4 pins) + ------ ------ + Total Inst: 22 22 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 15 15 0 0 + + Instances: 11 11 0 0 MN(NSHORT) + 11 11 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 22 22 0 0 + + +o Statistics: + + 2 layout instances were filtered and their pins removed from adjoining nets. + + 4 layout mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + 4 source mos transistors were reduced to 2. + 2 mos transistors were deleted by parallel reduction. + + 1 layout net had all its pins removed and was deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB C B A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/xor3/sky130_fd_sc_hdll__xor3_2.pex.spice b/cells/xor3/sky130_fd_sc_hdll__xor3_2.pex.spice index 822763d..6962763 100644 --- a/cells/xor3/sky130_fd_sc_hdll__xor3_2.pex.spice +++ b/cells/xor3/sky130_fd_sc_hdll__xor3_2.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__xor3_2.pex.spice -* Created: Thu Aug 27 19:30:14 2020 +* Created: Wed Sep 2 08:54:52 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/xor3/sky130_fd_sc_hdll__xor3_2.pxi.spice b/cells/xor3/sky130_fd_sc_hdll__xor3_2.pxi.spice index 9a050aa..5d35ad3 100644 --- a/cells/xor3/sky130_fd_sc_hdll__xor3_2.pxi.spice +++ b/cells/xor3/sky130_fd_sc_hdll__xor3_2.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__xor3_2.pxi.spice -* Created: Thu Aug 27 19:30:14 2020 +* Created: Wed Sep 2 08:54:52 2020 * x_PM_SKY130_FD_SC_HDLL__XOR3_2%A_81_21# N_A_81_21#_M1002_d N_A_81_21#_M1013_d + N_A_81_21#_c_165_n N_A_81_21#_M1001_g N_A_81_21#_c_172_n N_A_81_21#_M1007_g
diff --git a/cells/xor3/sky130_fd_sc_hdll__xor3_2.spice b/cells/xor3/sky130_fd_sc_hdll__xor3_2.spice index f76a74a..c12743b 100644 --- a/cells/xor3/sky130_fd_sc_hdll__xor3_2.spice +++ b/cells/xor3/sky130_fd_sc_hdll__xor3_2.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__xor3_2.spice -* Created: Thu Aug 27 19:30:14 2020 +* Created: Wed Sep 2 08:54:52 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *
diff --git a/cells/xor3/sky130_fd_sc_hdll__xor3_4.lvs.report b/cells/xor3/sky130_fd_sc_hdll__xor3_4.lvs.report new file mode 100644 index 0000000..5ea6883 --- /dev/null +++ b/cells/xor3/sky130_fd_sc_hdll__xor3_4.lvs.report
@@ -0,0 +1,505 @@ + +LVS Netlist Compiler - Errors and Warnings for "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_4.spice" +--------------------------------------------------------------------------------------------------------------------------------------------------------------------- + +Warning: Duplicate parameter definition "MULT" at line 19 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 21 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 23 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 25 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 27 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 29 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 31 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 33 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 35 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 37 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 39 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 41 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 43 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 45 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 47 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 49 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 51 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 53 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 55 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 57 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 59 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 61 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 63 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 65 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 67 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 69 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 71 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_4.spice" +Warning: Duplicate parameter definition "MULT" at line 73 in file "/home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_4.spice" + + + + + ################################################## + ## ## + ## C A L I B R E S Y S T E M ## + ## ## + ## L V S R E P O R T ## + ## ## + ################################################## + + + +REPORT FILE NAME: sky130_fd_sc_hdll__xor3_4.lvs.report +LAYOUT NAME: svdb/sky130_fd_sc_hdll__xor3_4.sp ('sky130_fd_sc_hdll__xor3_4') +SOURCE NAME: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./../../sky130_fd_sc_hdll/cells/xor3/sky130_fd_sc_hdll__xor3_4.spice ('sky130_fd_sc_hdll__xor3_4') +RULE FILE: /home/hlusk/repos/SkyWater/osugooglelib/calibre/./_xrcControlFile_s8_ +CREATION TIME: Wed Sep 2 08:54:56 2020 +CURRENT DIRECTORY: /home/hlusk/repos/SkyWater/osugooglelib/calibre +USER NAME: hlusk +CALIBRE VERSION: v2018.4_34.26 Mon Dec 3 14:40:54 PST 2018 + + + + OVERALL COMPARISON RESULTS + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + + +************************************************************************************************************** + CELL SUMMARY +************************************************************************************************************** + + Result Layout Source + ----------- ----------- -------------- + CORRECT sky130_fd_sc_hdll__xor3_4 sky130_fd_sc_hdll__xor3_4 + + + +************************************************************************************************************** + LVS PARAMETERS +************************************************************************************************************** + + +o LVS Setup: + + // LVS COMPONENT TYPE PROPERTY + // LVS COMPONENT SUBTYPE PROPERTY + // LVS PIN NAME PROPERTY + // LVS POWER NAME + // LVS GROUND NAME + LVS CELL SUPPLY NO + LVS RECOGNIZE GATES ALL + LVS IGNORE PORTS NO + LVS CHECK PORT NAMES YES + LVS IGNORE TRIVIAL NAMED PORTS NO + LVS BUILTIN DEVICE PIN SWAP YES + LVS ALL CAPACITOR PINS SWAPPABLE NO + LVS DISCARD PINS BY DEVICE YES + LVS SOFT SUBSTRATE PINS NO + LVS INJECT LOGIC NO + LVS EXPAND UNBALANCED CELLS YES + LVS FLATTEN INSIDE CELL NO + LVS EXPAND SEED PROMOTIONS NO + LVS PRESERVE PARAMETERIZED CELLS NO + LVS GLOBALS ARE PORTS YES + LVS REVERSE WL NO + LVS SPICE PREFER PINS YES + LVS SPICE SLASH IS SPACE NO + LVS SPICE ALLOW FLOATING PINS YES + LVS SPICE ALLOW INLINE PARAMETERS NO + LVS SPICE ALLOW UNQUOTED STRINGS YES + LVS SPICE CONDITIONAL LDD NO + LVS SPICE CULL PRIMITIVE SUBCIRCUITS NO + // LVS SPICE EXCLUDE CELL SOURCE + // LVS SPICE EXCLUDE CELL LAYOUT + LVS SPICE IMPLIED MOS AREA NO + // LVS SPICE MULTIPLIER NAME + LVS SPICE OVERRIDE GLOBALS YES + LVS SPICE REDEFINE PARAM YES + LVS SPICE REPLICATE DEVICES YES + LVS SPICE SCALE X PARAMETERS NO + LVS SPICE STRICT WL YES + // LVS SPICE OPTION + LVS STRICT SUBTYPES YES + LVS EXACT SUBTYPES NO + LAYOUT CASE NO + SOURCE CASE NO + LVS COMPARE CASE NO + LVS DOWNCASE DEVICE NO + LVS REPORT MAXIMUM 50 + LVS PROPERTY RESOLUTION MAXIMUM ALL + LVS SIGNATURE MAXIMUM ALL + // LVS FILTER UNUSED OPTION + // LVS REPORT OPTION + LVS REPORT UNITS YES + // LVS NON USER NAME PORT + LVS NON USER NAME NET "^n[0-9]*$" "^net[0-9]*$" + // LVS NON USER NAME INSTANCE + // LVS IGNORE DEVICE PIN + // LVS PREFER NETS FILTER SOURCE + // LVS PREFER NETS FILTER LAYOUT + + // Device Type Map + + LVS DEVICE TYPE RESISTOR "xhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p35" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_0p69" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_1p41" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xhrpoly_2p85" SOURCE LAYOUT + LVS DEVICE TYPE RESISTOR "xuhrpoly_2p85" SOURCE LAYOUT + + // Reduction + + LVS REDUCE SERIES MOS NO + LVS REDUCE PARALLEL MOS NO + LVS REDUCE SEMI SERIES MOS NO + LVS REDUCE SPLIT GATES YES [ TOLERANCE l 1 w 1 ] + LVS REDUCE PARALLEL BIPOLAR NO + LVS REDUCE SERIES CAPACITORS NO + LVS REDUCE PARALLEL CAPACITORS NO + LVS REDUCE SERIES RESISTORS NO + LVS REDUCE PARALLEL RESISTORS NO + LVS REDUCE PARALLEL DIODES NO + + LVS REDUCE condiode PARALLEL + LVS REDUCE condiodeHvPsub PARALLEL + LVS REDUCE p20vhv1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE n20vhviso1 PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE nvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE pvhv PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MP PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE M PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE MN PARALLEL [ TOLERANCE l 1 w 1 ] + LVS REDUCE Q(npnpar1x1) PARALLEL + LVS REDUCE Q(npnpar1x2) PARALLEL + LVS REDUCE Q(npn_1x1_2p0_hv) PARALLEL + LVS REDUCE Q(pnppar) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE Q(pnppar5x) PARALLEL [ TOLERANCE bArea 1 bPeri 1 eArea 1 ePeri 1 ] + LVS REDUCE D PARALLEL [ TOLERANCE a 1 p 1 ] + LVS REDUCE D SERIES POS NEG NO + LVS REDUCE C(xcmimc1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE C(xcmimc2) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R(mrp1) PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R PARALLEL [ TOLERANCE w 1 l 1 ] + LVS REDUCE R SERIES POS NEG NO + LVS REDUCE R(short) PARALLEL + LVS REDUCE R(short) SERIES POS NEG NO + LVS REDUCE R(fuse) PARALLEL NO + LVS REDUCE R(fuse) SERIES POS NEG NO + LVS REDUCE R(metop) PARALLEL [ TOLERANCE metopNumber 0 ] + LVS REDUCE R(metop) SERIES POS NEG NO + LVS REDUCTION PRIORITY PARALLEL + + LVS SHORT EQUIVALENT NODES NO + + // Filter + + LVS FILTER R(cds_thru) SHORT SOURCE + LVS FILTER R(cds_thru) SHORT LAYOUT + LVS FILTER Dpar OPEN SOURCE + LVS FILTER Dpar OPEN LAYOUT + LVS FILTER Probe OPEN SOURCE + LVS FILTER Probe OPEN LAYOUT + LVS FILTER icecap OPEN SOURCE + LVS FILTER s8fmlt_iref_termx OPEN SOURCE + LVS FILTER s8fmlt_neg_termx OPEN SOURCE + LVS FILTER s8fmlt_termx OPEN SOURCE + LVS FILTER s8fmlt_vdac_termx OPEN SOURCE + LVS FILTER D OPEN SOURCE + LVS FILTER diff_dev OPEN SOURCE + LVS FILTER diff_dev OPEN LAYOUT + LVS FILTER tap_dev OPEN SOURCE + LVS FILTER tap_dev OPEN LAYOUT + LVS FILTER cad_dummy_open_device OPEN SOURCE + LVS FILTER cad_dummy_open_device OPEN LAYOUT + + // Trace Property + + TRACE PROPERTY xcnwvc m m 0 + TRACE PROPERTY xcnwvc w w 0 + TRACE PROPERTY xcnwvc l l 0 + TRACE PROPERTY xcnwvc2 m m 0 + TRACE PROPERTY xcnwvc2 w w 0 + TRACE PROPERTY xcnwvc2 l l 0 + TRACE PROPERTY xchvnwc m m 0 + TRACE PROPERTY q(npnpar1x1) m m 0 + TRACE PROPERTY q(npnpar1x2) m m 0 + TRACE PROPERTY q(npn_1x1_2p0_hv) m m 0 + TRACE PROPERTY q(pnppar) barea barea 0 + TRACE PROPERTY q(pnppar) bperi bperi 0 + TRACE PROPERTY q(pnppar) earea earea 0 + TRACE PROPERTY q(pnppar) eperi eperi 0 + TRACE PROPERTY q(pnppar) m m 0 + TRACE PROPERTY q(pnppar5x) barea barea 0 + TRACE PROPERTY q(pnppar5x) bperi bperi 0 + TRACE PROPERTY q(pnppar5x) earea earea 0 + TRACE PROPERTY q(pnppar5x) eperi eperi 0 + TRACE PROPERTY q(pnppar5x) m m 0 + TRACE PROPERTY d(ndiode) a a 1 + TRACE PROPERTY d(ndiode) p p 1 + TRACE PROPERTY d(ndiode) m m 0 + TRACE PROPERTY d(ndiode_h) a a 1 + TRACE PROPERTY d(ndiode_h) p p 1 + TRACE PROPERTY d(ndiode_h) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_300) m m 0 + TRACE PROPERTY d(pdiode) a a 1 + TRACE PROPERTY d(pdiode) p p 1 + TRACE PROPERTY d(pdiode) m m 0 + TRACE PROPERTY d(pdiode_h) a a 1 + TRACE PROPERTY d(pdiode_h) p p 1 + TRACE PROPERTY d(pdiode_h) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_100) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_100) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_100) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_200) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_200) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_200) m m 0 + TRACE PROPERTY d(xesd_pdiode_h_300) a a 1 + TRACE PROPERTY d(xesd_pdiode_h_300) p p 1 + TRACE PROPERTY d(xesd_pdiode_h_300) m m 0 + TRACE PROPERTY d(dnwdiode_psub) a a 1 + TRACE PROPERTY d(dnwdiode_psub) p p 1 + TRACE PROPERTY d(dnwdiode_psub) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_100) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_200) m m 0 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) a a 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) p p 1 + TRACE PROPERTY d(xesd_ndiode_h_dnwl_300) m m 0 + TRACE PROPERTY xcmvpp m m 0 + TRACE PROPERTY xcmvpp_2 m m 0 + TRACE PROPERTY xcmvpp2_nhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp2_phv5x4 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap2_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap2 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_wafflecap1 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l40 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l20 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l10 m m 0 + TRACE PROPERTY xcmvpp_hd5_atlas_fingercap_l5 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1_met5pullin m m 0 + TRACE PROPERTY xcmvpp_hd5_5x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_4x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_3x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_2x1 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x2 m m 0 + TRACE PROPERTY xcmvpp_hd5_1x1 m m 0 + TRACE PROPERTY xcmvppx4_2xnhvnative10x4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym50p4shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_lim5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m5shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_lim4shield m m 0 + TRACE PROPERTY xcmvpp6p8x6p1_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_polym4shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m4shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3_lishield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3_lishield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m3shield m m 0 + TRACE PROPERTY xcmvpp8p6x7p9_m3shield m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m3shield m m 0 + TRACE PROPERTY xcmvpp1p8x1p8_m3shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4m5shield m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m4 m m 0 + TRACE PROPERTY xcmvpp11p5x11p7_m1m2 m m 0 + TRACE PROPERTY xcmvpp4p4x4p6_m1m2 m m 0 + TRACE PROPERTY xcmvpp5 m m 0 + TRACE PROPERTY xcmvpp4 m m 0 + TRACE PROPERTY xcmvpp3 m m 0 + TRACE PROPERTY r(mrdn) w w 1 + TRACE PROPERTY r(mrdn) l l 1 + TRACE PROPERTY r(mrdn) m m 0 + TRACE PROPERTY r(mrdn_hv) w w 1 + TRACE PROPERTY r(mrdn_hv) l l 1 + TRACE PROPERTY r(mrdn_hv) m m 0 + TRACE PROPERTY r(mrdp) w w 1 + TRACE PROPERTY r(mrdp) l l 1 + TRACE PROPERTY r(mrdp) m m 0 + TRACE PROPERTY r(mrdp_hv) w w 1 + TRACE PROPERTY r(mrdp_hv) l l 1 + TRACE PROPERTY r(mrdp_hv) m m 0 + TRACE PROPERTY r(mrl1) w w 1 + TRACE PROPERTY r(mrl1) l l 1 + TRACE PROPERTY r(mrl1) m m 0 + TRACE PROPERTY r(xpwres) w w 1 + TRACE PROPERTY r(xpwres) l l 1 + TRACE PROPERTY r(xpwres) m m 0 + TRACE PROPERTY r(short) m m 0 + TRACE PROPERTY r(fuse) w w 1 + TRACE PROPERTY r(fuse) l l 1 + TRACE PROPERTY r(fuse) m m 0 + TRACE PROPERTY r(metop) metopnumber metopnumber 0 + TRACE PROPERTY d(dnwdiode_psub_victim) a a 10 + TRACE PROPERTY d(dnwdiode_psub_victim) p p 10 + TRACE PROPERTY d(dnwdiode_psub_victim) m m 0 + TRACE PROPERTY d(nwdiode_victim) a a 10 + TRACE PROPERTY d(nwdiode_victim) p p 10 + TRACE PROPERTY d(nwdiode_victim) m m 0 + TRACE PROPERTY d(dnwdiode_psub_aggressor) a a 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) p p 10 + TRACE PROPERTY d(dnwdiode_psub_aggressor) m m 0 + TRACE PROPERTY d(nwdiode_aggressor) a a 10 + TRACE PROPERTY d(nwdiode_aggressor) p p 10 + TRACE PROPERTY d(nwdiode_aggressor) m m 0 + + // User Trace Property + + TRACE PROPERTY mn(nshort) m mult w l + TRACE PROPERTY mn(npass) m mult w l + TRACE PROPERTY mn(nlowvt) m mult w l + TRACE PROPERTY m(sonos_e) m mult w l + TRACE PROPERTY m m mult w l + TRACE PROPERTY m(fnpass) m mult w l + TRACE PROPERTY mn(nhv) m mult w l + TRACE PROPERTY mn(nhvnative) m mult w l + TRACE PROPERTY mn(ntvnative) m mult w l + TRACE PROPERTY mp(pshort) m mult w l + TRACE PROPERTY mp m mult w l + TRACE PROPERTY mp(phighvt) m mult w l + TRACE PROPERTY mp(plowvt) m mult w l + TRACE PROPERTY mp(phv) m mult w l + TRACE PROPERTY mn(nshortesd) m mult w l + TRACE PROPERTY mn(nhvesd) m mult w l + TRACE PROPERTY mn(nhvnativeesd) m mult w l + TRACE PROPERTY mp(phvesd) m mult w l + TRACE PROPERTY nvhv m mult w l + TRACE PROPERTY n20vhv1 m mult w l + TRACE PROPERTY n20nativevhv1 m mult w l + TRACE PROPERTY n20vhviso1 m mult w l + TRACE PROPERTY n20nativevhviso1 m mult w l + TRACE PROPERTY pvhv m mult w l + TRACE PROPERTY p20vhv1 m mult w l + TRACE PROPERTY c(xcmimc1) w l m + TRACE PROPERTY c(xcmimc2) w l m + TRACE PROPERTY r(mrp1) m w l + TRACE PROPERTY xhrpoly_0p35 m w l + TRACE PROPERTY xuhrpoly_0p35 m w l + TRACE PROPERTY xhrpoly_0p69 m w l + TRACE PROPERTY xuhrpoly_0p69 m w l + TRACE PROPERTY xhrpoly_1p41 m w l + TRACE PROPERTY xuhrpoly_1p41 m w l + TRACE PROPERTY xhrpoly_2p85 m w l + TRACE PROPERTY xuhrpoly_2p85 m w l + + + + CELL COMPARISON RESULTS ( TOP LEVEL ) + + + + # ################### _ _ + # # # * * + # # # CORRECT # | + # # # # \___/ + # ################### + + + +LAYOUT CELL NAME: sky130_fd_sc_hdll__xor3_4 +SOURCE CELL NAME: sky130_fd_sc_hdll__xor3_4 + +-------------------------------------------------------------------------------------------------------------- + +INITIAL NUMBERS OF OBJECTS +-------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 18 15 * + + Instances: 14 14 MN (4 pins) + 14 14 MP (4 pins) + 1 0 * Dpar (2 pins) + 3 0 * Probe (2 pins) + ------ ------ + Total Inst: 32 28 + + +NUMBERS OF OBJECTS AFTER TRANSFORMATION +--------------------------------------- + + Layout Source Component Type + ------ ------ -------------- + Ports: 8 8 + + Nets: 15 15 + + Instances: 11 11 MN (4 pins) + 11 11 MP (4 pins) + ------ ------ + Total Inst: 22 22 + + + * = Number of objects in layout different from number in source. + + + +************************************************************************************************************** + INFORMATION AND WARNINGS +************************************************************************************************************** + + + Matched Matched Unmatched Unmatched Component + Layout Source Layout Source Type + ------- ------- --------- --------- --------- + Ports: 8 8 0 0 + + Nets: 15 15 0 0 + + Instances: 11 11 0 0 MN(NSHORT) + 11 11 0 0 MP(PHIGHVT) + ------- ------- --------- --------- + Total Inst: 22 22 0 0 + + +o Statistics: + + 4 layout instances were filtered and their pins removed from adjoining nets. + + 8 layout mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + 8 source mos transistors were reduced to 2. + 6 mos transistors were deleted by parallel reduction. + + 3 layout nets had all their pins removed and were deleted. + + +o Initial Correspondence Points: + + Ports: VNB VPB C B A VPWR X VGND + + +************************************************************************************************************** + SUMMARY +************************************************************************************************************** + +Total CPU Time: 0 sec +Total Elapsed Time: 0 sec
diff --git a/cells/xor3/sky130_fd_sc_hdll__xor3_4.pex.spice b/cells/xor3/sky130_fd_sc_hdll__xor3_4.pex.spice index f9c8cce..2b848c0 100644 --- a/cells/xor3/sky130_fd_sc_hdll__xor3_4.pex.spice +++ b/cells/xor3/sky130_fd_sc_hdll__xor3_4.pex.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__xor3_4.pex.spice -* Created: Thu Aug 27 19:30:21 2020 +* Created: Wed Sep 2 08:55:00 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" * Nominal Temperature: 27C
diff --git a/cells/xor3/sky130_fd_sc_hdll__xor3_4.pxi.spice b/cells/xor3/sky130_fd_sc_hdll__xor3_4.pxi.spice index 4290d46..96a0a8f 100644 --- a/cells/xor3/sky130_fd_sc_hdll__xor3_4.pxi.spice +++ b/cells/xor3/sky130_fd_sc_hdll__xor3_4.pxi.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__xor3_4.pxi.spice -* Created: Thu Aug 27 19:30:21 2020 +* Created: Wed Sep 2 08:55:00 2020 * x_PM_SKY130_FD_SC_HDLL__XOR3_4%A_80_207# N_A_80_207#_M1005_d N_A_80_207#_M1007_d + N_A_80_207#_c_177_n N_A_80_207#_M1002_g N_A_80_207#_c_188_n
diff --git a/cells/xor3/sky130_fd_sc_hdll__xor3_4.spice b/cells/xor3/sky130_fd_sc_hdll__xor3_4.spice index d260545..d893cc6 100644 --- a/cells/xor3/sky130_fd_sc_hdll__xor3_4.spice +++ b/cells/xor3/sky130_fd_sc_hdll__xor3_4.spice
@@ -1,5 +1,5 @@ * File: sky130_fd_sc_hdll__xor3_4.spice -* Created: Thu Aug 27 19:30:21 2020 +* Created: Wed Sep 2 08:55:00 2020 * Program "Calibre xRC" * Version "v2018.4_34.26" *