| { |
| "area": 25.024, |
| "cell_footprint": "sky130_fd_sc_hdll__sdlclkp", |
| "cell_leakage_power": 0.0, |
| "clock_gating_integrated_cell": "latch_posedge_precontrol", |
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| "pg_type": "primary_ground", |
| "related_bias_pin": "VPB", |
| "voltage_name": "VGND" |
| }, |
| "pg_pin,VNB": { |
| "pg_type": "nwell", |
| "physical_connection": "device_layer", |
| "voltage_name": "VNB" |
| }, |
| "pg_pin,VPB": { |
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| "physical_connection": "device_layer", |
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| }, |
| "pg_pin,VPWR": { |
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| "related_bias_pin": "VNB", |
| "voltage_name": "VPWR" |
| }, |
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| "clock_gate_clock_pin": "true", |
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| "clock_gate_enable_pin": "true", |
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| }, |
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| }, |
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| }, |
| "related_pin": "CLK", |
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| ] |
| }, |
| "sdf_cond": "GATE==1'b1&&SCE==1'b1", |
| "timing_sense": "positive_unate", |
| "timing_type": "combinational", |
| "when": "(GATE&SCE)" |
| }, |
| { |
| "cell_fall,del_1_7_7": { |
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| ] |
| }, |
| "fall_transition,del_1_7_7": { |
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| [ |
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| [ |
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| [ |
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| }, |
| "related_pin": "CLK", |
| "sdf_cond": "GATE==1'b0&&SCE==1'b0", |
| "timing_sense": "positive_unate", |
| "timing_type": "combinational_fall", |
| "when": "(!GATE&!SCE)" |
| } |
| ] |
| }, |
| "pin,M0": { |
| "direction": "internal", |
| "internal_node": "M0", |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR" |
| }, |
| "pin,SCE": { |
| "capacitance": 0.001502, |
| "clock": "false", |
| "clock_gate_test_pin": "true", |
| "direction": "input", |
| "fall_capacitance": 0.001428, |
| "internal_power": { |
| "fall_power,power_inputs_1": { |
| "index_1": [ |
| 0.01, |
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| ] |
| }, |
| "rise_power,power_inputs_1": { |
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| 0.01, |
| 0.0281727, |
| 0.0793701, |
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| 0.629961, |
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| 0.0078829 |
| ] |
| } |
| }, |
| "max_transition": 5.0, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
| "rise_capacitance": 0.001575, |
| "timing": [ |
| { |
| "fall_constraint,vio_3_3_1": { |
| "index_1": [ |
| 0.01, |
| 2.5, |
| 5.0 |
| ], |
| "index_2": [ |
| 0.01, |
| 2.5, |
| 5.0 |
| ], |
| "values": [ |
| [ |
| 2.5581524, |
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| ], |
| [ |
| 1.422752, |
| 2.6405498, |
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| ], |
| [ |
| 0.4876934, |
| 1.6999981, |
| 2.9207013 |
| ] |
| ] |
| }, |
| "related_pin": "CLK", |
| "rise_constraint,vio_3_3_1": { |
| "index_1": [ |
| 0.01, |
| 2.5, |
| 5.0 |
| ], |
| "index_2": [ |
| 0.01, |
| 2.5, |
| 5.0 |
| ], |
| "values": [ |
| [ |
| 0.6739971, |
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| ], |
| [ |
| -0.3332295, |
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| ], |
| [ |
| -0.9679951, |
| 0.0959941, |
| 1.0347148 |
| ] |
| ] |
| }, |
| "sim_opt": "runlvl=5 accurate=1", |
| "timing_type": "setup_rising", |
| "violation_delay_degrade_pct": 10.0 |
| }, |
| { |
| "fall_constraint,vio_3_3_1": { |
| "index_1": [ |
| 0.01, |
| 2.5, |
| 5.0 |
| ], |
| "index_2": [ |
| 0.01, |
| 2.5, |
| 5.0 |
| ], |
| "values": [ |
| [ |
| -2.4699238, |
| -3.6877216, |
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| ], |
| [ |
| -1.3088886, |
| -2.5266866, |
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| ], |
| [ |
| -0.3903096, |
| -1.6026142, |
| -2.8214863 |
| ] |
| ] |
| }, |
| "related_pin": "CLK", |
| "rise_constraint,vio_3_3_1": { |
| "index_1": [ |
| 0.01, |
| 2.5, |
| 5.0 |
| ], |
| "index_2": [ |
| 0.01, |
| 2.5, |
| 5.0 |
| ], |
| "values": [ |
| [ |
| -0.2708272, |
| -1.3384785, |
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| ], |
| [ |
| 0.4818828, |
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| ], |
| [ |
| 1.0800273, |
| 0.0233623, |
| -0.8933858 |
| ] |
| ] |
| }, |
| "sim_opt": "runlvl=5 accurate=1", |
| "timing_type": "hold_rising", |
| "violation_delay_degrade_pct": 10.0 |
| } |
| ] |
| }, |
| "statetable,CLK GATE SCE,M0": { |
| "table": [ |
| "L L L : - : L", |
| "L L H : - : H", |
| "L H L : - : H", |
| "L H H : - : H", |
| "H - - : - : N" |
| ] |
| } |
| } |
