models/udp_dlatch_pr/definition.json

{
 "description": "D-latch, gated clear direct / gate active high (Q output UDP)",
 "file_prefix": "sky130_fd_sc_hdll__udp_dlatch_pr",
 "library": "sky130_fd_sc_hdll",
 "name": "udp_dlatch$PR",
 "parameters": [],
 "ports": [
  [
   "signal",
   "Q",
   "output",
   ""
  ],
  [
   "signal",
   "D",
   "input",
   ""
  ],
  [
   "signal",
   "GATE",
   "input",
   ""
  ],
  [
   "signal",
   "RESET",
   "input",
   ""
  ]
 ],
 "type": "primitive",
 "verilog_name": "sky130_fd_sc_hdll__udp_dlatch$PR"
}