blob: f1709a455d492cc90597435e617b30627e9fa94c [file] [log] [blame]
# Copyright 2020 The SkyWater PDK Authors
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# https://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
# SPDX-License-Identifier: Apache-2.0
VERSION 5.7 ;
NOWIREEXTENSIONATPIN ON ;
DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;
PROPERTYDEFINITIONS
MACRO maskLayoutSubType STRING ;
MACRO prCellType STRING ;
MACRO originalViewName STRING ;
END PROPERTYDEFINITIONS
MACRO sky130_fd_sc_hdll__mux2_2
CLASS CORE ;
FOREIGN sky130_fd_sc_hdll__mux2_2 ;
ORIGIN 0.000000 0.000000 ;
SIZE 4.600000 BY 2.720000 ;
SYMMETRY X Y R90 ;
SITE unithd ;
PIN A0
ANTENNAGATEAREA 0.178200 ;
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER li1 ;
RECT 1.920000 0.765000 2.295000 1.280000 ;
RECT 1.920000 1.280000 3.075000 1.325000 ;
RECT 2.125000 1.325000 3.075000 1.410000 ;
RECT 2.135000 1.410000 3.075000 1.625000 ;
END
END A0
PIN A1
ANTENNAGATEAREA 0.178200 ;
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER li1 ;
RECT 2.530000 0.775000 3.075000 1.105000 ;
RECT 2.870000 0.420000 3.075000 0.775000 ;
END
END A1
PIN S
ANTENNAGATEAREA 0.356400 ;
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER li1 ;
RECT 3.355000 0.755000 3.545000 1.625000 ;
END
END S
PIN VGND
ANTENNADIFFAREA 0.555100 ;
DIRECTION INOUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.000000 -0.240000 4.600000 0.240000 ;
END
END VGND
PIN VPWR
ANTENNADIFFAREA 0.776400 ;
DIRECTION INOUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.000000 2.480000 4.600000 2.960000 ;
END
END VPWR
PIN X
ANTENNADIFFAREA 0.498000 ;
DIRECTION OUTPUT ;
USE SIGNAL ;
PORT
LAYER li1 ;
RECT 0.515000 0.255000 0.800000 1.595000 ;
RECT 0.515000 1.595000 0.875000 2.465000 ;
END
END X
PIN VNB
DIRECTION INOUT ;
USE GROUND ;
PORT
LAYER pwell ;
RECT 0.150000 -0.085000 0.320000 0.085000 ;
END
END VNB
PIN VPB
DIRECTION INOUT ;
USE POWER ;
PORT
LAYER nwell ;
RECT -0.190000 1.305000 4.790000 2.910000 ;
END
END VPB
OBS
LAYER li1 ;
RECT 0.000000 -0.085000 4.600000 0.085000 ;
RECT 0.000000 2.635000 4.600000 2.805000 ;
RECT 0.090000 0.085000 0.345000 0.885000 ;
RECT 0.090000 1.495000 0.345000 2.635000 ;
RECT 0.970000 0.995000 1.265000 1.325000 ;
RECT 0.985000 0.085000 1.365000 0.465000 ;
RECT 1.095000 0.635000 1.705000 0.805000 ;
RECT 1.095000 0.805000 1.265000 0.995000 ;
RECT 1.095000 1.325000 1.265000 1.835000 ;
RECT 1.095000 1.835000 1.625000 2.005000 ;
RECT 1.115000 2.175000 1.285000 2.635000 ;
RECT 1.435000 0.995000 1.655000 1.495000 ;
RECT 1.435000 1.495000 1.965000 1.665000 ;
RECT 1.455000 2.005000 1.625000 2.255000 ;
RECT 1.455000 2.255000 2.860000 2.425000 ;
RECT 1.535000 0.265000 2.250000 0.595000 ;
RECT 1.535000 0.595000 1.705000 0.635000 ;
RECT 1.795000 1.665000 1.965000 1.835000 ;
RECT 1.795000 1.835000 4.235000 2.005000 ;
RECT 3.460000 2.175000 3.680000 2.635000 ;
RECT 3.485000 0.085000 3.685000 0.585000 ;
RECT 3.850000 2.005000 4.235000 2.465000 ;
RECT 3.985000 0.255000 4.235000 1.835000 ;
LAYER mcon ;
RECT 0.145000 -0.085000 0.315000 0.085000 ;
RECT 0.145000 2.635000 0.315000 2.805000 ;
RECT 0.605000 -0.085000 0.775000 0.085000 ;
RECT 0.605000 2.635000 0.775000 2.805000 ;
RECT 1.065000 -0.085000 1.235000 0.085000 ;
RECT 1.065000 2.635000 1.235000 2.805000 ;
RECT 1.525000 -0.085000 1.695000 0.085000 ;
RECT 1.525000 2.635000 1.695000 2.805000 ;
RECT 1.985000 -0.085000 2.155000 0.085000 ;
RECT 1.985000 2.635000 2.155000 2.805000 ;
RECT 2.445000 -0.085000 2.615000 0.085000 ;
RECT 2.445000 2.635000 2.615000 2.805000 ;
RECT 2.905000 -0.085000 3.075000 0.085000 ;
RECT 2.905000 2.635000 3.075000 2.805000 ;
RECT 3.365000 -0.085000 3.535000 0.085000 ;
RECT 3.365000 2.635000 3.535000 2.805000 ;
RECT 3.825000 -0.085000 3.995000 0.085000 ;
RECT 3.825000 2.635000 3.995000 2.805000 ;
RECT 4.285000 -0.085000 4.455000 0.085000 ;
RECT 4.285000 2.635000 4.455000 2.805000 ;
END
PROPERTY maskLayoutSubType "abstract" ;
PROPERTY prCellType "standard" ;
PROPERTY originalViewName "layout" ;
END sky130_fd_sc_hdll__mux2_2
END LIBRARY