lef: Fixing VNB/VPB properties in .magic.lef files.
Both the `PIN VNB` and `PIN VPB` are now marked with `DIRECTION INOUT`.
The `PIN VNB` is marked with `USE GROUND` and the `PIN VPB` is marked
with `USE POWER`.
This should fix the `.magic.lef` file usage with OpenROAD (and hopefully other
tools too).
Fixes https://github.com/google/skywater-pdk/issues/172
Signed-off-by: Tim 'mithro' Ansell <tansell@google.com>
diff --git a/cells/a211o/sky130_fd_sc_hdll__a211o_1.magic.lef b/cells/a211o/sky130_fd_sc_hdll__a211o_1.magic.lef
index a50a054..2e402c3 100644
--- a/cells/a211o/sky130_fd_sc_hdll__a211o_1.magic.lef
+++ b/cells/a211o/sky130_fd_sc_hdll__a211o_1.magic.lef
@@ -66,18 +66,6 @@
RECT 3.305000 0.995000 3.585000 1.325000 ;
END
END C1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.135000 -0.085000 0.305000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.870000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.447250 ;
DIRECTION OUTPUT ;
@@ -96,6 +84,22 @@
RECT 0.000000 -0.240000 3.680000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.135000 -0.085000 0.305000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.870000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a211o/sky130_fd_sc_hdll__a211o_2.magic.lef b/cells/a211o/sky130_fd_sc_hdll__a211o_2.magic.lef
index c405e9b..479698e 100644
--- a/cells/a211o/sky130_fd_sc_hdll__a211o_2.magic.lef
+++ b/cells/a211o/sky130_fd_sc_hdll__a211o_2.magic.lef
@@ -66,18 +66,6 @@
RECT 3.365000 1.045000 3.735000 1.275000 ;
END
END C1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.330000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.504500 ;
DIRECTION OUTPUT ;
@@ -95,6 +83,22 @@
RECT 0.000000 -0.240000 4.140000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.330000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a211o/sky130_fd_sc_hdll__a211o_4.magic.lef b/cells/a211o/sky130_fd_sc_hdll__a211o_4.magic.lef
index 0eccec3..18ddf72 100644
--- a/cells/a211o/sky130_fd_sc_hdll__a211o_4.magic.lef
+++ b/cells/a211o/sky130_fd_sc_hdll__a211o_4.magic.lef
@@ -72,18 +72,6 @@
RECT 3.275000 0.985000 4.045000 1.275000 ;
END
END C1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 7.550000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 1.071250 ;
DIRECTION OUTPUT ;
@@ -108,6 +96,22 @@
RECT 0.000000 -0.240000 7.360000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 7.550000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.magic.lef b/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.magic.lef
index c729dfa..0f68b82 100644
--- a/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.magic.lef
+++ b/cells/a211oi/sky130_fd_sc_hdll__a211oi_1.magic.lef
@@ -67,18 +67,6 @@
RECT 1.980000 0.995000 2.265000 1.615000 ;
END
END C1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.950000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.870250 ;
DIRECTION OUTPUT ;
@@ -100,6 +88,22 @@
RECT 0.000000 -0.240000 2.760000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.950000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.magic.lef b/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.magic.lef
index 83ba3c0..6cab124 100644
--- a/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.magic.lef
+++ b/cells/a211oi/sky130_fd_sc_hdll__a211oi_2.magic.lef
@@ -68,18 +68,6 @@
RECT 0.100000 0.995000 0.405000 1.615000 ;
END
END C1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.125000 -0.085000 0.295000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 5.250000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 1.008500 ;
DIRECTION OUTPUT ;
@@ -99,6 +87,22 @@
RECT 0.000000 -0.240000 5.060000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.125000 -0.085000 0.295000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 5.250000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.magic.lef b/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.magic.lef
index b98dc10..85106f0 100644
--- a/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.magic.lef
+++ b/cells/a211oi/sky130_fd_sc_hdll__a211oi_4.magic.lef
@@ -73,18 +73,6 @@
RECT 6.830000 1.275000 7.050000 1.695000 ;
END
END C1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 8.470000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 1.985000 ;
DIRECTION OUTPUT ;
@@ -113,6 +101,22 @@
RECT 0.000000 -0.240000 8.280000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 8.470000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.magic.lef b/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.magic.lef
index d5548e4..7c6c9a4 100644
--- a/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.magic.lef
+++ b/cells/a21bo/sky130_fd_sc_hdll__a21bo_1.magic.lef
@@ -57,18 +57,6 @@
RECT 0.105000 0.325000 0.335000 1.665000 ;
END
END B1_N
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.330000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.628750 ;
DIRECTION OUTPUT ;
@@ -86,6 +74,22 @@
RECT 0.000000 -0.240000 4.140000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.330000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.magic.lef b/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.magic.lef
index 7ef851d..821d4c6 100644
--- a/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.magic.lef
+++ b/cells/a21bo/sky130_fd_sc_hdll__a21bo_2.magic.lef
@@ -57,18 +57,6 @@
RECT 1.225000 0.995000 1.695000 1.325000 ;
END
END B1_N
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.330000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.547000 ;
DIRECTION OUTPUT ;
@@ -90,6 +78,22 @@
RECT 0.000000 -0.240000 4.140000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.330000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.magic.lef b/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.magic.lef
index 9ce6936..e9e2e7c 100644
--- a/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.magic.lef
+++ b/cells/a21bo/sky130_fd_sc_hdll__a21bo_4.magic.lef
@@ -61,18 +61,6 @@
RECT 0.470000 1.010000 0.850000 1.625000 ;
END
END B1_N
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 6.630000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 1.029000 ;
DIRECTION OUTPUT ;
@@ -92,6 +80,22 @@
RECT 0.000000 -0.240000 6.440000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 6.630000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.magic.lef b/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.magic.lef
index 0062666..305164d 100644
--- a/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.magic.lef
+++ b/cells/a21boi/sky130_fd_sc_hdll__a21boi_1.magic.lef
@@ -57,18 +57,6 @@
RECT 0.105000 0.975000 0.335000 1.665000 ;
END
END B1_N
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.410000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.676000 ;
DIRECTION OUTPUT ;
@@ -88,6 +76,22 @@
RECT 0.000000 -0.240000 3.220000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.410000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.magic.lef b/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.magic.lef
index abcc3b5..cffec18 100644
--- a/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.magic.lef
+++ b/cells/a21boi/sky130_fd_sc_hdll__a21boi_2.magic.lef
@@ -60,18 +60,6 @@
RECT 0.120000 0.765000 0.425000 1.805000 ;
END
END B1_N
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.790000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.712500 ;
DIRECTION OUTPUT ;
@@ -92,6 +80,22 @@
RECT 0.000000 -0.240000 4.600000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.790000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.magic.lef b/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.magic.lef
index 47e6cf4..6ce8fe5 100644
--- a/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.magic.lef
+++ b/cells/a21boi/sky130_fd_sc_hdll__a21boi_4.magic.lef
@@ -60,18 +60,6 @@
RECT 0.450000 0.995000 0.670000 1.075000 ;
END
END B1_N
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 7.550000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 1.490500 ;
DIRECTION OUTPUT ;
@@ -97,6 +85,22 @@
RECT 0.000000 -0.240000 7.360000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 7.550000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_1.magic.lef b/cells/a21o/sky130_fd_sc_hdll__a21o_1.magic.lef
index 2abc7d8..453f399 100644
--- a/cells/a21o/sky130_fd_sc_hdll__a21o_1.magic.lef
+++ b/cells/a21o/sky130_fd_sc_hdll__a21o_1.magic.lef
@@ -58,18 +58,6 @@
RECT 1.065000 1.015000 1.610000 1.325000 ;
END
END B1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.410000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.439000 ;
DIRECTION OUTPUT ;
@@ -87,6 +75,22 @@
RECT 0.000000 -0.240000 3.220000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.410000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_2.magic.lef b/cells/a21o/sky130_fd_sc_hdll__a21o_2.magic.lef
index 05d0654..6558086 100644
--- a/cells/a21o/sky130_fd_sc_hdll__a21o_2.magic.lef
+++ b/cells/a21o/sky130_fd_sc_hdll__a21o_2.magic.lef
@@ -57,18 +57,6 @@
RECT 1.865000 0.995000 2.240000 1.410000 ;
END
END B1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.870000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.629500 ;
DIRECTION OUTPUT ;
@@ -86,6 +74,22 @@
RECT 0.000000 -0.240000 3.680000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.870000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_4.magic.lef b/cells/a21o/sky130_fd_sc_hdll__a21o_4.magic.lef
index b8bc617..bed1da4 100644
--- a/cells/a21o/sky130_fd_sc_hdll__a21o_4.magic.lef
+++ b/cells/a21o/sky130_fd_sc_hdll__a21o_4.magic.lef
@@ -61,18 +61,6 @@
RECT 2.500000 0.995000 2.905000 1.525000 ;
END
END B1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 6.170000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 1.029000 ;
DIRECTION OUTPUT ;
@@ -94,6 +82,22 @@
RECT 0.000000 -0.240000 5.980000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 6.170000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_6.magic.lef b/cells/a21o/sky130_fd_sc_hdll__a21o_6.magic.lef
index 59a3c57..d252ad3 100644
--- a/cells/a21o/sky130_fd_sc_hdll__a21o_6.magic.lef
+++ b/cells/a21o/sky130_fd_sc_hdll__a21o_6.magic.lef
@@ -61,18 +61,6 @@
RECT 2.865000 1.055000 3.195000 1.615000 ;
END
END B1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 7.090000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 1.396500 ;
DIRECTION OUTPUT ;
@@ -98,6 +86,22 @@
RECT 0.000000 -0.240000 6.900000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 7.090000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a21o/sky130_fd_sc_hdll__a21o_8.magic.lef b/cells/a21o/sky130_fd_sc_hdll__a21o_8.magic.lef
index c6b71e3..176c68f 100644
--- a/cells/a21o/sky130_fd_sc_hdll__a21o_8.magic.lef
+++ b/cells/a21o/sky130_fd_sc_hdll__a21o_8.magic.lef
@@ -61,18 +61,6 @@
RECT 2.865000 1.055000 3.195000 1.615000 ;
END
END B1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 8.010000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 1.862000 ;
DIRECTION OUTPUT ;
@@ -100,6 +88,22 @@
RECT 0.000000 -0.240000 7.820000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 8.010000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.magic.lef b/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.magic.lef
index 588764f..e7b9a5c 100644
--- a/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.magic.lef
+++ b/cells/a21oi/sky130_fd_sc_hdll__a21oi_1.magic.lef
@@ -58,18 +58,6 @@
RECT 0.095000 0.675000 0.335000 1.325000 ;
END
END B1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.490000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.489500 ;
DIRECTION OUTPUT ;
@@ -91,6 +79,22 @@
RECT 0.000000 -0.240000 2.300000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.490000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.magic.lef b/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.magic.lef
index 3b126fa..66b9ac9 100644
--- a/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.magic.lef
+++ b/cells/a21oi/sky130_fd_sc_hdll__a21oi_2.magic.lef
@@ -59,18 +59,6 @@
RECT 3.035000 0.995000 3.535000 1.625000 ;
END
END B1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.870000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.745000 ;
DIRECTION OUTPUT ;
@@ -92,6 +80,22 @@
RECT 0.000000 -0.240000 3.680000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.870000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.magic.lef b/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.magic.lef
index 70bde60..127e931 100644
--- a/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.magic.lef
+++ b/cells/a21oi/sky130_fd_sc_hdll__a21oi_4.magic.lef
@@ -60,18 +60,6 @@
RECT 0.090000 1.035000 1.580000 1.415000 ;
END
END B1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 6.630000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 1.523000 ;
DIRECTION OUTPUT ;
@@ -97,6 +85,22 @@
RECT 0.000000 -0.240000 6.440000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 6.630000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.magic.lef b/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.magic.lef
index a4fc008..f9d53c4 100644
--- a/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.magic.lef
+++ b/cells/a221oi/sky130_fd_sc_hdll__a221oi_1.magic.lef
@@ -77,18 +77,6 @@
RECT 0.085000 1.075000 0.435000 1.285000 ;
END
END C1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.870000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.874500 ;
DIRECTION OUTPUT ;
@@ -116,6 +104,22 @@
RECT 0.000000 -0.240000 3.680000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.870000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.magic.lef b/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.magic.lef
index 9676767..ff9875f 100644
--- a/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.magic.lef
+++ b/cells/a221oi/sky130_fd_sc_hdll__a221oi_2.magic.lef
@@ -80,18 +80,6 @@
RECT 0.090000 1.075000 0.420000 1.615000 ;
END
END C1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 6.170000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.979000 ;
DIRECTION OUTPUT ;
@@ -114,6 +102,22 @@
RECT 0.000000 -0.240000 5.980000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 6.170000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.magic.lef b/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.magic.lef
index 54d7a3e..68802a5 100644
--- a/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.magic.lef
+++ b/cells/a221oi/sky130_fd_sc_hdll__a221oi_4.magic.lef
@@ -81,18 +81,6 @@
RECT 0.090000 1.075000 1.435000 1.275000 ;
END
END C1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 10.770000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 1.893000 ;
DIRECTION OUTPUT ;
@@ -123,6 +111,22 @@
RECT 0.000000 -0.240000 10.580000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 10.770000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a222oi/sky130_fd_sc_hdll__a222oi_1.magic.lef b/cells/a222oi/sky130_fd_sc_hdll__a222oi_1.magic.lef
index 7c06e3f..5a3d651 100644
--- a/cells/a222oi/sky130_fd_sc_hdll__a222oi_1.magic.lef
+++ b/cells/a222oi/sky130_fd_sc_hdll__a222oi_1.magic.lef
@@ -84,18 +84,6 @@
RECT 0.765000 1.000000 1.235000 1.315000 ;
END
END C2
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.330000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.981600 ;
DIRECTION OUTPUT ;
@@ -118,6 +106,22 @@
RECT 0.000000 -0.240000 4.140000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.330000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a22o/sky130_fd_sc_hdll__a22o_1.magic.lef b/cells/a22o/sky130_fd_sc_hdll__a22o_1.magic.lef
index e74939f..b725ceb 100644
--- a/cells/a22o/sky130_fd_sc_hdll__a22o_1.magic.lef
+++ b/cells/a22o/sky130_fd_sc_hdll__a22o_1.magic.lef
@@ -68,18 +68,6 @@
RECT 0.085000 1.075000 0.625000 1.275000 ;
END
END B2
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.870000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.670000 ;
DIRECTION OUTPUT ;
@@ -99,6 +87,22 @@
RECT 0.000000 -0.240000 3.680000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.870000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a22o/sky130_fd_sc_hdll__a22o_2.magic.lef b/cells/a22o/sky130_fd_sc_hdll__a22o_2.magic.lef
index a12c8ca..2cd67a3 100644
--- a/cells/a22o/sky130_fd_sc_hdll__a22o_2.magic.lef
+++ b/cells/a22o/sky130_fd_sc_hdll__a22o_2.magic.lef
@@ -68,18 +68,6 @@
RECT 0.090000 1.075000 0.625000 1.275000 ;
END
END B2
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.330000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.498000 ;
DIRECTION OUTPUT ;
@@ -99,6 +87,22 @@
RECT 0.000000 -0.240000 4.140000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.330000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a22o/sky130_fd_sc_hdll__a22o_4.magic.lef b/cells/a22o/sky130_fd_sc_hdll__a22o_4.magic.lef
index e315289..85f7afc 100644
--- a/cells/a22o/sky130_fd_sc_hdll__a22o_4.magic.lef
+++ b/cells/a22o/sky130_fd_sc_hdll__a22o_4.magic.lef
@@ -71,18 +71,6 @@
RECT 4.200000 1.075000 4.580000 1.445000 ;
END
END B2
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 7.090000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 1.028500 ;
DIRECTION OUTPUT ;
@@ -106,6 +94,22 @@
RECT 0.000000 -0.240000 6.900000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 7.090000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a22oi/sky130_fd_sc_hdll__a22oi_1.magic.lef b/cells/a22oi/sky130_fd_sc_hdll__a22oi_1.magic.lef
index 50c4777..97b686c 100644
--- a/cells/a22oi/sky130_fd_sc_hdll__a22oi_1.magic.lef
+++ b/cells/a22oi/sky130_fd_sc_hdll__a22oi_1.magic.lef
@@ -68,18 +68,6 @@
RECT 0.125000 0.765000 0.625000 1.275000 ;
END
END B2
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.410000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.917000 ;
DIRECTION OUTPUT ;
@@ -104,6 +92,22 @@
RECT 0.000000 -0.240000 3.220000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.410000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a22oi/sky130_fd_sc_hdll__a22oi_2.magic.lef b/cells/a22oi/sky130_fd_sc_hdll__a22oi_2.magic.lef
index cf45386..d7c50bf 100644
--- a/cells/a22oi/sky130_fd_sc_hdll__a22oi_2.magic.lef
+++ b/cells/a22oi/sky130_fd_sc_hdll__a22oi_2.magic.lef
@@ -66,18 +66,6 @@
RECT 0.150000 1.075000 0.830000 1.275000 ;
END
END B2
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 5.250000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 1.278500 ;
DIRECTION OUTPUT ;
@@ -118,6 +106,22 @@
RECT 0.000000 -0.240000 5.060000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 5.250000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.magic.lef b/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.magic.lef
index f12e9de..655f81b 100644
--- a/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.magic.lef
+++ b/cells/a22oi/sky130_fd_sc_hdll__a22oi_4.magic.lef
@@ -66,18 +66,6 @@
RECT 0.090000 1.075000 2.095000 1.275000 ;
END
END B2
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 8.930000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 2.024500 ;
DIRECTION OUTPUT ;
@@ -101,6 +89,22 @@
RECT 0.000000 -0.240000 8.740000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 8.930000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_1.magic.lef b/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_1.magic.lef
index 79c6a12..36212c4 100644
--- a/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_1.magic.lef
+++ b/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_1.magic.lef
@@ -66,18 +66,6 @@
RECT 2.895000 1.040000 3.155000 1.655000 ;
END
END B2
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.330000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.439000 ;
DIRECTION OUTPUT ;
@@ -112,6 +100,22 @@
RECT 0.000000 -0.240000 4.140000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.330000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_2.magic.lef b/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_2.magic.lef
index d4243fd..6451700 100644
--- a/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_2.magic.lef
+++ b/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_2.magic.lef
@@ -66,18 +66,6 @@
RECT 3.300000 1.050000 3.760000 1.655000 ;
END
END B2
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.125000 -0.085000 0.295000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.790000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.498000 ;
DIRECTION OUTPUT ;
@@ -116,6 +104,22 @@
RECT 0.000000 -0.240000 4.600000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.125000 -0.085000 0.295000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.790000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.magic.lef b/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.magic.lef
index 823855b..c07c0dc 100644
--- a/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.magic.lef
+++ b/cells/a2bb2o/sky130_fd_sc_hdll__a2bb2o_4.magic.lef
@@ -72,18 +72,6 @@
RECT 0.855000 1.075000 1.445000 1.275000 ;
END
END B2
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 8.010000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 1.028500 ;
DIRECTION OUTPUT ;
@@ -109,6 +97,22 @@
RECT 0.000000 -0.240000 7.820000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 8.010000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_1.magic.lef b/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_1.magic.lef
index 18fcf1d..e731825 100644
--- a/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_1.magic.lef
+++ b/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_1.magic.lef
@@ -67,18 +67,6 @@
RECT 2.445000 0.425000 2.615000 0.995000 ;
END
END B2
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.870000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.530000 ;
DIRECTION OUTPUT ;
@@ -115,6 +103,22 @@
RECT 0.000000 -0.240000 3.680000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.870000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.magic.lef b/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.magic.lef
index 5ae0a6e..2f620e5 100644
--- a/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.magic.lef
+++ b/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_2.magic.lef
@@ -68,18 +68,6 @@
RECT 0.855000 1.075000 1.445000 1.275000 ;
END
END B2
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.325000 1.305000 6.170000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.738500 ;
DIRECTION OUTPUT ;
@@ -100,6 +88,22 @@
RECT 0.000000 -0.240000 5.980000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.325000 1.305000 6.170000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.magic.lef b/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.magic.lef
index bb64ac7..6ea34c8 100644
--- a/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.magic.lef
+++ b/cells/a2bb2oi/sky130_fd_sc_hdll__a2bb2oi_4.magic.lef
@@ -69,18 +69,6 @@
RECT 1.875000 1.075000 3.425000 1.275000 ;
END
END B2
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 10.770000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 1.477000 ;
DIRECTION OUTPUT ;
@@ -105,6 +93,22 @@
RECT 0.000000 -0.240000 10.580000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 10.770000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a31o/sky130_fd_sc_hdll__a31o_1.magic.lef b/cells/a31o/sky130_fd_sc_hdll__a31o_1.magic.lef
index a6ed012..199c402 100644
--- a/cells/a31o/sky130_fd_sc_hdll__a31o_1.magic.lef
+++ b/cells/a31o/sky130_fd_sc_hdll__a31o_1.magic.lef
@@ -67,18 +67,6 @@
RECT 2.445000 0.995000 2.745000 1.655000 ;
END
END B1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.410000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.447250 ;
DIRECTION OUTPUT ;
@@ -98,6 +86,22 @@
RECT 0.000000 -0.240000 3.220000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.410000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a31o/sky130_fd_sc_hdll__a31o_2.magic.lef b/cells/a31o/sky130_fd_sc_hdll__a31o_2.magic.lef
index 96092b1..0afbd5a 100644
--- a/cells/a31o/sky130_fd_sc_hdll__a31o_2.magic.lef
+++ b/cells/a31o/sky130_fd_sc_hdll__a31o_2.magic.lef
@@ -67,18 +67,6 @@
RECT 3.195000 0.755000 3.535000 1.325000 ;
END
END B1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.870000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.530500 ;
DIRECTION OUTPUT ;
@@ -100,6 +88,22 @@
RECT 0.000000 -0.240000 3.680000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.870000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a31o/sky130_fd_sc_hdll__a31o_4.magic.lef b/cells/a31o/sky130_fd_sc_hdll__a31o_4.magic.lef
index 62a8191..c3f65ba 100644
--- a/cells/a31o/sky130_fd_sc_hdll__a31o_4.magic.lef
+++ b/cells/a31o/sky130_fd_sc_hdll__a31o_4.magic.lef
@@ -72,18 +72,6 @@
RECT 4.215000 0.745000 4.455000 1.075000 ;
END
END B1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 7.090000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.996000 ;
DIRECTION OUTPUT ;
@@ -105,6 +93,22 @@
RECT 0.000000 -0.240000 6.900000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 7.090000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a31oi/sky130_fd_sc_hdll__a31oi_1.magic.lef b/cells/a31oi/sky130_fd_sc_hdll__a31oi_1.magic.lef
index e5e3db2..86eb25d 100644
--- a/cells/a31oi/sky130_fd_sc_hdll__a31oi_1.magic.lef
+++ b/cells/a31oi/sky130_fd_sc_hdll__a31oi_1.magic.lef
@@ -67,18 +67,6 @@
RECT 2.325000 0.995000 2.650000 1.325000 ;
END
END B1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.950000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.523750 ;
DIRECTION OUTPUT ;
@@ -98,6 +86,22 @@
RECT 0.000000 -0.240000 2.760000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.950000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a31oi/sky130_fd_sc_hdll__a31oi_2.magic.lef b/cells/a31oi/sky130_fd_sc_hdll__a31oi_2.magic.lef
index 8d13db4..84a7877 100644
--- a/cells/a31oi/sky130_fd_sc_hdll__a31oi_2.magic.lef
+++ b/cells/a31oi/sky130_fd_sc_hdll__a31oi_2.magic.lef
@@ -67,18 +67,6 @@
RECT 4.715000 1.275000 4.940000 1.625000 ;
END
END B1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 5.250000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 1.007000 ;
DIRECTION OUTPUT ;
@@ -102,6 +90,22 @@
RECT 0.000000 -0.240000 5.060000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 5.250000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.magic.lef b/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.magic.lef
index 39d42dc..9bf2678 100644
--- a/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.magic.lef
+++ b/cells/a31oi/sky130_fd_sc_hdll__a31oi_4.magic.lef
@@ -66,18 +66,6 @@
RECT 6.270000 0.995000 7.605000 1.630000 ;
END
END B1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 8.930000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 1.613500 ;
DIRECTION OUTPUT ;
@@ -99,6 +87,22 @@
RECT 0.000000 -0.240000 8.740000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 8.930000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a32o/sky130_fd_sc_hdll__a32o_1.magic.lef b/cells/a32o/sky130_fd_sc_hdll__a32o_1.magic.lef
index 33f5eb4..bda2f74 100644
--- a/cells/a32o/sky130_fd_sc_hdll__a32o_1.magic.lef
+++ b/cells/a32o/sky130_fd_sc_hdll__a32o_1.magic.lef
@@ -77,18 +77,6 @@
RECT 3.790000 1.325000 4.030000 1.615000 ;
END
END B2
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.330000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.554500 ;
DIRECTION OUTPUT ;
@@ -108,6 +96,22 @@
RECT 0.000000 -0.240000 4.140000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.330000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a32o/sky130_fd_sc_hdll__a32o_2.magic.lef b/cells/a32o/sky130_fd_sc_hdll__a32o_2.magic.lef
index 779624d..647f85d 100644
--- a/cells/a32o/sky130_fd_sc_hdll__a32o_2.magic.lef
+++ b/cells/a32o/sky130_fd_sc_hdll__a32o_2.magic.lef
@@ -76,18 +76,6 @@
RECT 1.065000 0.745000 1.630000 1.275000 ;
END
END B2
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.790000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.748000 ;
DIRECTION OUTPUT ;
@@ -109,6 +97,22 @@
RECT 0.000000 -0.240000 4.600000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.790000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a32o/sky130_fd_sc_hdll__a32o_4.magic.lef b/cells/a32o/sky130_fd_sc_hdll__a32o_4.magic.lef
index 9292d83..5b4af7c 100644
--- a/cells/a32o/sky130_fd_sc_hdll__a32o_4.magic.lef
+++ b/cells/a32o/sky130_fd_sc_hdll__a32o_4.magic.lef
@@ -76,18 +76,6 @@
RECT 7.440000 1.295000 7.635000 1.635000 ;
END
END B2
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 8.470000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 1.028500 ;
DIRECTION OUTPUT ;
@@ -111,6 +99,22 @@
RECT 0.000000 -0.240000 8.280000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 8.470000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a32oi/sky130_fd_sc_hdll__a32oi_1.magic.lef b/cells/a32oi/sky130_fd_sc_hdll__a32oi_1.magic.lef
index cd86564..af6f911 100644
--- a/cells/a32oi/sky130_fd_sc_hdll__a32oi_1.magic.lef
+++ b/cells/a32oi/sky130_fd_sc_hdll__a32oi_1.magic.lef
@@ -75,18 +75,6 @@
RECT 0.085000 0.995000 0.345000 1.325000 ;
END
END B2
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.410000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.634500 ;
DIRECTION OUTPUT ;
@@ -107,6 +95,22 @@
RECT 0.000000 -0.240000 3.220000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.410000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.magic.lef b/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.magic.lef
index 8027fea..809aba4 100644
--- a/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.magic.lef
+++ b/cells/a32oi/sky130_fd_sc_hdll__a32oi_2.magic.lef
@@ -76,18 +76,6 @@
RECT 0.145000 1.285000 0.325000 1.625000 ;
END
END B2
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.195000 1.305000 6.630000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.996000 ;
DIRECTION OUTPUT ;
@@ -109,6 +97,22 @@
RECT 0.000000 -0.240000 6.440000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.195000 1.305000 6.630000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.magic.lef b/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.magic.lef
index c160117..923f3bc 100644
--- a/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.magic.lef
+++ b/cells/a32oi/sky130_fd_sc_hdll__a32oi_4.magic.lef
@@ -77,18 +77,6 @@
RECT 0.110000 1.305000 0.330000 1.965000 ;
END
END B2
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 11.690000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 2.024500 ;
DIRECTION OUTPUT ;
@@ -147,6 +135,22 @@
RECT 0.000000 -0.240000 11.500000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 11.690000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/and2/sky130_fd_sc_hdll__and2_1.magic.lef b/cells/and2/sky130_fd_sc_hdll__and2_1.magic.lef
index 8f613d6..f92f23f 100644
--- a/cells/and2/sky130_fd_sc_hdll__and2_1.magic.lef
+++ b/cells/and2/sky130_fd_sc_hdll__and2_1.magic.lef
@@ -49,18 +49,6 @@
RECT 0.885000 1.075000 1.235000 1.325000 ;
END
END B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.490000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.757250 ;
DIRECTION OUTPUT ;
@@ -80,6 +68,22 @@
RECT 0.000000 -0.240000 2.300000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.490000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/and2/sky130_fd_sc_hdll__and2_2.magic.lef b/cells/and2/sky130_fd_sc_hdll__and2_2.magic.lef
index 8896f5a..e1f5cf4 100644
--- a/cells/and2/sky130_fd_sc_hdll__and2_2.magic.lef
+++ b/cells/and2/sky130_fd_sc_hdll__and2_2.magic.lef
@@ -49,18 +49,6 @@
RECT 0.885000 1.075000 1.265000 1.325000 ;
END
END B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.950000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.728500 ;
DIRECTION OUTPUT ;
@@ -80,6 +68,22 @@
RECT 0.000000 -0.240000 2.760000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.950000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/and2/sky130_fd_sc_hdll__and2_4.magic.lef b/cells/and2/sky130_fd_sc_hdll__and2_4.magic.lef
index 00c4c86..46fca6f 100644
--- a/cells/and2/sky130_fd_sc_hdll__and2_4.magic.lef
+++ b/cells/and2/sky130_fd_sc_hdll__and2_4.magic.lef
@@ -48,18 +48,6 @@
RECT 0.605000 0.995000 1.080000 1.325000 ;
END
END B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.870000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 1.061500 ;
DIRECTION OUTPUT ;
@@ -84,6 +72,22 @@
RECT 0.000000 -0.240000 3.680000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.870000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/and2/sky130_fd_sc_hdll__and2_6.magic.lef b/cells/and2/sky130_fd_sc_hdll__and2_6.magic.lef
index 6dbd9d9..08de95c 100644
--- a/cells/and2/sky130_fd_sc_hdll__and2_6.magic.lef
+++ b/cells/and2/sky130_fd_sc_hdll__and2_6.magic.lef
@@ -52,18 +52,6 @@
RECT 1.705000 1.325000 1.885000 1.465000 ;
END
END B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 5.710000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 1.396500 ;
DIRECTION OUTPUT ;
@@ -89,6 +77,22 @@
RECT 0.000000 -0.240000 5.520000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 5.710000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/and2/sky130_fd_sc_hdll__and2_8.magic.lef b/cells/and2/sky130_fd_sc_hdll__and2_8.magic.lef
index 598987f..435441a 100644
--- a/cells/and2/sky130_fd_sc_hdll__and2_8.magic.lef
+++ b/cells/and2/sky130_fd_sc_hdll__and2_8.magic.lef
@@ -52,18 +52,6 @@
RECT 1.705000 1.325000 1.885000 1.465000 ;
END
END B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 6.630000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 1.862000 ;
DIRECTION OUTPUT ;
@@ -91,6 +79,22 @@
RECT 0.000000 -0.240000 6.440000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 6.630000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/and2b/sky130_fd_sc_hdll__and2b_1.magic.lef b/cells/and2b/sky130_fd_sc_hdll__and2b_1.magic.lef
index d091cbf..25c6fa0 100644
--- a/cells/and2b/sky130_fd_sc_hdll__and2b_1.magic.lef
+++ b/cells/and2b/sky130_fd_sc_hdll__and2b_1.magic.lef
@@ -48,18 +48,6 @@
RECT 1.630000 1.645000 2.275000 1.955000 ;
END
END B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.410000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.505000 ;
DIRECTION OUTPUT ;
@@ -79,6 +67,22 @@
RECT 0.000000 -0.240000 3.220000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.410000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/and2b/sky130_fd_sc_hdll__and2b_2.magic.lef b/cells/and2b/sky130_fd_sc_hdll__and2b_2.magic.lef
index 765abd0..2631d0c 100644
--- a/cells/and2b/sky130_fd_sc_hdll__and2b_2.magic.lef
+++ b/cells/and2b/sky130_fd_sc_hdll__and2b_2.magic.lef
@@ -48,18 +48,6 @@
RECT 1.655000 1.645000 2.400000 1.955000 ;
END
END B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.870000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.762000 ;
DIRECTION OUTPUT ;
@@ -79,6 +67,22 @@
RECT 0.000000 -0.240000 3.680000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.870000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/and2b/sky130_fd_sc_hdll__and2b_4.magic.lef b/cells/and2b/sky130_fd_sc_hdll__and2b_4.magic.lef
index fd11f14..ff872d3 100644
--- a/cells/and2b/sky130_fd_sc_hdll__and2b_4.magic.lef
+++ b/cells/and2b/sky130_fd_sc_hdll__and2b_4.magic.lef
@@ -48,18 +48,6 @@
RECT 0.605000 0.995000 1.075000 1.325000 ;
END
END B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.330000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 1.071500 ;
DIRECTION OUTPUT ;
@@ -80,6 +68,22 @@
RECT 0.000000 -0.240000 4.140000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.330000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/and3/sky130_fd_sc_hdll__and3_1.magic.lef b/cells/and3/sky130_fd_sc_hdll__and3_1.magic.lef
index febcd13..5b214b4 100644
--- a/cells/and3/sky130_fd_sc_hdll__and3_1.magic.lef
+++ b/cells/and3/sky130_fd_sc_hdll__and3_1.magic.lef
@@ -57,18 +57,6 @@
RECT 1.390000 0.305000 1.760000 1.200000 ;
END
END C
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.950000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.439000 ;
DIRECTION OUTPUT ;
@@ -88,6 +76,22 @@
RECT 0.000000 -0.240000 2.760000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.950000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/and3/sky130_fd_sc_hdll__and3_2.magic.lef b/cells/and3/sky130_fd_sc_hdll__and3_2.magic.lef
index 67d5139..5fd53d0 100644
--- a/cells/and3/sky130_fd_sc_hdll__and3_2.magic.lef
+++ b/cells/and3/sky130_fd_sc_hdll__and3_2.magic.lef
@@ -58,18 +58,6 @@
RECT 1.065000 0.750000 1.625000 1.245000 ;
END
END C
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.410000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.511000 ;
DIRECTION OUTPUT ;
@@ -105,6 +93,22 @@
RECT 0.000000 -0.240000 3.220000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.410000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/and3/sky130_fd_sc_hdll__and3_4.magic.lef b/cells/and3/sky130_fd_sc_hdll__and3_4.magic.lef
index d541251..cbd2344 100644
--- a/cells/and3/sky130_fd_sc_hdll__and3_4.magic.lef
+++ b/cells/and3/sky130_fd_sc_hdll__and3_4.magic.lef
@@ -58,18 +58,6 @@
RECT 1.525000 0.995000 2.050000 1.325000 ;
END
END C
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.790000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 1.061500 ;
DIRECTION OUTPUT ;
@@ -94,6 +82,22 @@
RECT 0.000000 -0.240000 4.600000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.790000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/and3b/sky130_fd_sc_hdll__and3b_1.magic.lef b/cells/and3b/sky130_fd_sc_hdll__and3b_1.magic.lef
index 22ffa42..4288212 100644
--- a/cells/and3b/sky130_fd_sc_hdll__and3b_1.magic.lef
+++ b/cells/and3b/sky130_fd_sc_hdll__and3b_1.magic.lef
@@ -57,18 +57,6 @@
RECT 2.280000 0.305000 2.645000 1.255000 ;
END
END C
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.870000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.439000 ;
DIRECTION OUTPUT ;
@@ -88,6 +76,22 @@
RECT 0.000000 -0.240000 3.680000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.870000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/and3b/sky130_fd_sc_hdll__and3b_2.magic.lef b/cells/and3b/sky130_fd_sc_hdll__and3b_2.magic.lef
index 55e7583..8d43e10 100644
--- a/cells/and3b/sky130_fd_sc_hdll__and3b_2.magic.lef
+++ b/cells/and3b/sky130_fd_sc_hdll__and3b_2.magic.lef
@@ -58,18 +58,6 @@
RECT 1.985000 0.765000 2.620000 1.245000 ;
END
END C
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.330000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.498000 ;
DIRECTION OUTPUT ;
@@ -91,6 +79,22 @@
RECT 0.000000 -0.240000 4.140000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.330000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/and3b/sky130_fd_sc_hdll__and3b_4.magic.lef b/cells/and3b/sky130_fd_sc_hdll__and3b_4.magic.lef
index d6cba40..e26d07e 100644
--- a/cells/and3b/sky130_fd_sc_hdll__and3b_4.magic.lef
+++ b/cells/and3b/sky130_fd_sc_hdll__and3b_4.magic.lef
@@ -57,18 +57,6 @@
RECT 1.490000 0.995000 1.865000 1.340000 ;
END
END C
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 5.250000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 1.071500 ;
DIRECTION OUTPUT ;
@@ -90,6 +78,22 @@
RECT 0.000000 -0.240000 5.060000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 5.250000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/and4/sky130_fd_sc_hdll__and4_1.magic.lef b/cells/and4/sky130_fd_sc_hdll__and4_1.magic.lef
index f5eeb69..b4afd31 100644
--- a/cells/and4/sky130_fd_sc_hdll__and4_1.magic.lef
+++ b/cells/and4/sky130_fd_sc_hdll__and4_1.magic.lef
@@ -66,18 +66,6 @@
RECT 1.885000 0.715000 2.165000 1.325000 ;
END
END D
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.410000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.752500 ;
DIRECTION OUTPUT ;
@@ -97,6 +85,22 @@
RECT 0.000000 -0.240000 3.220000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.410000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/and4/sky130_fd_sc_hdll__and4_2.magic.lef b/cells/and4/sky130_fd_sc_hdll__and4_2.magic.lef
index 720f0f9..1b13fc7 100644
--- a/cells/and4/sky130_fd_sc_hdll__and4_2.magic.lef
+++ b/cells/and4/sky130_fd_sc_hdll__and4_2.magic.lef
@@ -66,18 +66,6 @@
RECT 1.885000 0.740000 2.155000 1.325000 ;
END
END D
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.870000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.629500 ;
DIRECTION OUTPUT ;
@@ -97,6 +85,22 @@
RECT 0.000000 -0.240000 3.680000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.870000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/and4/sky130_fd_sc_hdll__and4_4.magic.lef b/cells/and4/sky130_fd_sc_hdll__and4_4.magic.lef
index bca4a92..b944e33 100644
--- a/cells/and4/sky130_fd_sc_hdll__and4_4.magic.lef
+++ b/cells/and4/sky130_fd_sc_hdll__and4_4.magic.lef
@@ -66,18 +66,6 @@
RECT 1.985000 0.730000 2.275000 1.325000 ;
END
END D
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.790000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 1.028500 ;
DIRECTION OUTPUT ;
@@ -102,6 +90,22 @@
RECT 0.000000 -0.240000 4.600000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.790000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/and4b/sky130_fd_sc_hdll__and4b_1.magic.lef b/cells/and4b/sky130_fd_sc_hdll__and4b_1.magic.lef
index 83ce28c..cec5297 100644
--- a/cells/and4b/sky130_fd_sc_hdll__and4b_1.magic.lef
+++ b/cells/and4b/sky130_fd_sc_hdll__and4b_1.magic.lef
@@ -66,18 +66,6 @@
RECT 2.785000 0.665000 3.075000 1.695000 ;
END
END D
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.330000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.439000 ;
DIRECTION OUTPUT ;
@@ -97,6 +85,22 @@
RECT 0.000000 -0.240000 4.140000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.330000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/and4b/sky130_fd_sc_hdll__and4b_2.magic.lef b/cells/and4b/sky130_fd_sc_hdll__and4b_2.magic.lef
index 4cf9e39..5843090 100644
--- a/cells/and4b/sky130_fd_sc_hdll__and4b_2.magic.lef
+++ b/cells/and4b/sky130_fd_sc_hdll__and4b_2.magic.lef
@@ -66,18 +66,6 @@
RECT 2.785000 0.645000 3.115000 1.615000 ;
END
END D
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.790000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.555750 ;
DIRECTION OUTPUT ;
@@ -99,6 +87,22 @@
RECT 0.000000 -0.240000 4.600000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.790000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/and4b/sky130_fd_sc_hdll__and4b_4.magic.lef b/cells/and4b/sky130_fd_sc_hdll__and4b_4.magic.lef
index 7ccee8a..a0a1c4e 100644
--- a/cells/and4b/sky130_fd_sc_hdll__and4b_4.magic.lef
+++ b/cells/and4b/sky130_fd_sc_hdll__and4b_4.magic.lef
@@ -66,18 +66,6 @@
RECT 2.870000 0.995000 3.120000 1.325000 ;
END
END D
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 5.250000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.996000 ;
DIRECTION OUTPUT ;
@@ -99,6 +87,22 @@
RECT 0.000000 -0.240000 5.060000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 5.250000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/and4bb/sky130_fd_sc_hdll__and4bb_1.magic.lef b/cells/and4bb/sky130_fd_sc_hdll__and4bb_1.magic.lef
index 41faafa..cfb9b48 100644
--- a/cells/and4bb/sky130_fd_sc_hdll__and4bb_1.magic.lef
+++ b/cells/and4bb/sky130_fd_sc_hdll__and4bb_1.magic.lef
@@ -67,18 +67,6 @@
RECT 3.345000 0.420000 3.640000 1.635000 ;
END
END D
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.790000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.439000 ;
DIRECTION OUTPUT ;
@@ -98,6 +86,22 @@
RECT 0.000000 -0.240000 4.600000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.790000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/and4bb/sky130_fd_sc_hdll__and4bb_2.magic.lef b/cells/and4bb/sky130_fd_sc_hdll__and4bb_2.magic.lef
index e4819db..2baa02a 100644
--- a/cells/and4bb/sky130_fd_sc_hdll__and4bb_2.magic.lef
+++ b/cells/and4bb/sky130_fd_sc_hdll__and4bb_2.magic.lef
@@ -66,18 +66,6 @@
RECT 3.705000 0.425000 4.005000 1.405000 ;
END
END D
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 5.250000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.498000 ;
DIRECTION OUTPUT ;
@@ -96,6 +84,22 @@
RECT 0.000000 -0.240000 5.060000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 5.250000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.magic.lef b/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.magic.lef
index 6cdf76b..ebb9d03 100644
--- a/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.magic.lef
+++ b/cells/and4bb/sky130_fd_sc_hdll__and4bb_4.magic.lef
@@ -66,18 +66,6 @@
RECT 2.905000 0.995000 3.195000 1.325000 ;
END
END D
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 6.630000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.996000 ;
DIRECTION OUTPUT ;
@@ -99,6 +87,22 @@
RECT 0.000000 -0.240000 6.440000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 6.630000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/buf/sky130_fd_sc_hdll__buf_1.magic.lef b/cells/buf/sky130_fd_sc_hdll__buf_1.magic.lef
index 7193264..822d6cd 100644
--- a/cells/buf/sky130_fd_sc_hdll__buf_1.magic.lef
+++ b/cells/buf/sky130_fd_sc_hdll__buf_1.magic.lef
@@ -39,18 +39,6 @@
RECT 0.105000 0.985000 0.545000 1.355000 ;
END
END A
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.155000 -0.085000 0.325000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.030000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.348500 ;
DIRECTION OUTPUT ;
@@ -80,6 +68,22 @@
RECT 0.000000 -0.240000 1.840000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.155000 -0.085000 0.325000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.030000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/buf/sky130_fd_sc_hdll__buf_12.magic.lef b/cells/buf/sky130_fd_sc_hdll__buf_12.magic.lef
index dc43a2c..96e4007 100644
--- a/cells/buf/sky130_fd_sc_hdll__buf_12.magic.lef
+++ b/cells/buf/sky130_fd_sc_hdll__buf_12.magic.lef
@@ -39,18 +39,6 @@
RECT 0.135000 1.075000 1.810000 1.275000 ;
END
END A
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.620000 -0.085000 0.790000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 8.470000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 3.020500 ;
DIRECTION OUTPUT ;
@@ -114,6 +102,22 @@
RECT 0.000000 -0.240000 8.280000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.620000 -0.085000 0.790000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 8.470000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/buf/sky130_fd_sc_hdll__buf_16.magic.lef b/cells/buf/sky130_fd_sc_hdll__buf_16.magic.lef
index 117ccaf..577627e 100644
--- a/cells/buf/sky130_fd_sc_hdll__buf_16.magic.lef
+++ b/cells/buf/sky130_fd_sc_hdll__buf_16.magic.lef
@@ -39,18 +39,6 @@
RECT 0.085000 1.075000 2.735000 1.275000 ;
END
END A
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 11.690000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 4.016500 ;
DIRECTION OUTPUT ;
@@ -91,6 +79,22 @@
RECT 0.000000 -0.240000 11.500000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 11.690000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/buf/sky130_fd_sc_hdll__buf_2.magic.lef b/cells/buf/sky130_fd_sc_hdll__buf_2.magic.lef
index cfb91a4..966dbf8 100644
--- a/cells/buf/sky130_fd_sc_hdll__buf_2.magic.lef
+++ b/cells/buf/sky130_fd_sc_hdll__buf_2.magic.lef
@@ -39,18 +39,6 @@
RECT 0.085000 0.985000 0.440000 1.355000 ;
END
END A
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.490000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.703750 ;
DIRECTION OUTPUT ;
@@ -80,6 +68,22 @@
RECT 0.000000 -0.240000 2.300000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.490000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/buf/sky130_fd_sc_hdll__buf_4.magic.lef b/cells/buf/sky130_fd_sc_hdll__buf_4.magic.lef
index dd18b39..a01738e 100644
--- a/cells/buf/sky130_fd_sc_hdll__buf_4.magic.lef
+++ b/cells/buf/sky130_fd_sc_hdll__buf_4.magic.lef
@@ -39,18 +39,6 @@
RECT 0.090000 1.075000 0.470000 1.315000 ;
END
END A
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.410000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.996000 ;
DIRECTION OUTPUT ;
@@ -89,6 +77,22 @@
RECT 0.000000 -0.240000 3.220000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.410000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/buf/sky130_fd_sc_hdll__buf_6.magic.lef b/cells/buf/sky130_fd_sc_hdll__buf_6.magic.lef
index 5c3c44e..53a2b54 100644
--- a/cells/buf/sky130_fd_sc_hdll__buf_6.magic.lef
+++ b/cells/buf/sky130_fd_sc_hdll__buf_6.magic.lef
@@ -39,18 +39,6 @@
RECT 0.280000 1.075000 1.265000 1.315000 ;
END
END A
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.790000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 1.526500 ;
DIRECTION OUTPUT ;
@@ -96,6 +84,22 @@
RECT 0.000000 -0.240000 4.600000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.790000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/buf/sky130_fd_sc_hdll__buf_8.magic.lef b/cells/buf/sky130_fd_sc_hdll__buf_8.magic.lef
index 8830465..d977e80 100644
--- a/cells/buf/sky130_fd_sc_hdll__buf_8.magic.lef
+++ b/cells/buf/sky130_fd_sc_hdll__buf_8.magic.lef
@@ -39,18 +39,6 @@
RECT 0.140000 1.075000 1.340000 1.275000 ;
END
END A
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 6.170000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 2.024500 ;
DIRECTION OUTPUT ;
@@ -102,6 +90,22 @@
RECT 0.000000 -0.240000 5.980000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 6.170000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.magic.lef b/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.magic.lef
index c04b624..63f0ab9 100644
--- a/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.magic.lef
+++ b/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_16.magic.lef
@@ -39,18 +39,6 @@
RECT 0.110000 1.075000 0.440000 1.275000 ;
END
END A
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 13.530000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 4.016500 ;
DIRECTION OUTPUT ;
@@ -89,6 +77,22 @@
RECT 0.000000 -0.240000 13.340000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 13.530000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.magic.lef b/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.magic.lef
index d4b162b..948705c 100644
--- a/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.magic.lef
+++ b/cells/bufbuf/sky130_fd_sc_hdll__bufbuf_8.magic.lef
@@ -39,18 +39,6 @@
RECT 0.110000 1.075000 0.440000 1.275000 ;
END
END A
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 7.550000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 2.024500 ;
DIRECTION OUTPUT ;
@@ -78,6 +66,22 @@
RECT 0.000000 -0.240000 7.360000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 7.550000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.magic.lef b/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.magic.lef
index 0adb13b..daec2b7 100644
--- a/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.magic.lef
+++ b/cells/bufinv/sky130_fd_sc_hdll__bufinv_16.magic.lef
@@ -39,18 +39,6 @@
RECT 0.090000 1.075000 1.365000 1.275000 ;
END
END A
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 12.610000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 4.016500 ;
DIRECTION OUTPUT ;
@@ -89,6 +77,22 @@
RECT 0.000000 -0.240000 12.420000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 12.610000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.magic.lef b/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.magic.lef
index 7a09720..f38df3f 100644
--- a/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.magic.lef
+++ b/cells/bufinv/sky130_fd_sc_hdll__bufinv_8.magic.lef
@@ -39,18 +39,6 @@
RECT 0.085000 1.075000 0.505000 1.275000 ;
END
END A
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 7.090000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 2.024500 ;
DIRECTION OUTPUT ;
@@ -78,6 +66,22 @@
RECT 0.000000 -0.240000 6.900000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 7.090000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_1.magic.lef b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_1.magic.lef
index 51d454f..ca28745 100644
--- a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_1.magic.lef
+++ b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_1.magic.lef
@@ -39,12 +39,6 @@
RECT 1.365000 0.985000 1.745000 1.355000 ;
END
END A
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.030000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.374500 ;
DIRECTION OUTPUT ;
@@ -64,6 +58,14 @@
RECT 0.000000 -0.240000 1.840000 0.240000 ;
END
END VGND
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.030000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.magic.lef b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.magic.lef
index f3e0fea..8b43c79 100644
--- a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.magic.lef
+++ b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_12.magic.lef
@@ -39,18 +39,6 @@
RECT 0.525000 1.075000 1.320000 1.305000 ;
END
END A
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 8.470000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 2.420400 ;
DIRECTION OUTPUT ;
@@ -82,6 +70,22 @@
RECT 0.000000 -0.240000 8.280000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 8.470000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.magic.lef b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.magic.lef
index c64703b..5561eb1 100644
--- a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.magic.lef
+++ b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_16.magic.lef
@@ -39,18 +39,6 @@
RECT 0.085000 0.765000 0.400000 1.325000 ;
END
END A
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 10.310000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 3.529800 ;
DIRECTION OUTPUT ;
@@ -87,6 +75,22 @@
RECT 0.000000 -0.240000 10.120000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 10.310000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_2.magic.lef b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_2.magic.lef
index ad378f1..74b7599 100644
--- a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_2.magic.lef
+++ b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_2.magic.lef
@@ -39,18 +39,6 @@
RECT 0.425000 0.745000 0.835000 1.325000 ;
END
END A
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.490000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.445400 ;
DIRECTION OUTPUT ;
@@ -72,6 +60,22 @@
RECT 0.000000 -0.240000 2.300000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.490000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_4.magic.lef b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_4.magic.lef
index 4d670ba..f2ef400 100644
--- a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_4.magic.lef
+++ b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_4.magic.lef
@@ -39,18 +39,6 @@
RECT 0.425000 0.755000 0.825000 1.325000 ;
END
END A
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.410000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.898200 ;
DIRECTION OUTPUT ;
@@ -76,6 +64,22 @@
RECT 0.000000 -0.240000 3.220000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.410000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_6.magic.lef b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_6.magic.lef
index cef78c5..413ad2e 100644
--- a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_6.magic.lef
+++ b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_6.magic.lef
@@ -39,18 +39,6 @@
RECT 0.085000 0.715000 0.395000 1.325000 ;
END
END A
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.790000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 1.212300 ;
DIRECTION OUTPUT ;
@@ -76,6 +64,22 @@
RECT 0.000000 -0.240000 4.600000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.790000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.magic.lef b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.magic.lef
index 1ce17c9..f6efc6a 100644
--- a/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.magic.lef
+++ b/cells/clkbuf/sky130_fd_sc_hdll__clkbuf_8.magic.lef
@@ -39,18 +39,6 @@
RECT 0.085000 0.715000 0.400000 1.325000 ;
END
END A
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 5.710000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 1.775400 ;
DIRECTION OUTPUT ;
@@ -78,6 +66,22 @@
RECT 0.000000 -0.240000 5.520000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 5.710000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/clkinv/sky130_fd_sc_hdll__clkinv_1.magic.lef b/cells/clkinv/sky130_fd_sc_hdll__clkinv_1.magic.lef
index f2a4464..ca77a71 100644
--- a/cells/clkinv/sky130_fd_sc_hdll__clkinv_1.magic.lef
+++ b/cells/clkinv/sky130_fd_sc_hdll__clkinv_1.magic.lef
@@ -39,18 +39,6 @@
RECT 0.085000 0.375000 0.325000 1.325000 ;
END
END A
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.030000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.375900 ;
DIRECTION OUTPUT ;
@@ -70,6 +58,22 @@
RECT 0.000000 -0.240000 1.840000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.030000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.magic.lef b/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.magic.lef
index d85d3ce..70f40fe 100644
--- a/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.magic.lef
+++ b/cells/clkinv/sky130_fd_sc_hdll__clkinv_12.magic.lef
@@ -39,18 +39,6 @@
RECT 0.455000 1.035000 7.925000 1.290000 ;
END
END A
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 9.390000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 3.290400 ;
DIRECTION OUTPUT ;
@@ -86,6 +74,22 @@
RECT 0.000000 -0.240000 9.200000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 9.390000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.magic.lef b/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.magic.lef
index cb88931..2abd4f3 100644
--- a/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.magic.lef
+++ b/cells/clkinv/sky130_fd_sc_hdll__clkinv_16.magic.lef
@@ -43,18 +43,6 @@
RECT 10.285000 1.260000 11.135000 1.305000 ;
END
END A
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 12.610000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 4.928900 ;
DIRECTION OUTPUT ;
@@ -93,6 +81,22 @@
RECT 0.000000 -0.240000 12.420000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 12.610000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/clkinv/sky130_fd_sc_hdll__clkinv_2.magic.lef b/cells/clkinv/sky130_fd_sc_hdll__clkinv_2.magic.lef
index 829f7a6..1dd7356 100644
--- a/cells/clkinv/sky130_fd_sc_hdll__clkinv_2.magic.lef
+++ b/cells/clkinv/sky130_fd_sc_hdll__clkinv_2.magic.lef
@@ -39,18 +39,6 @@
RECT 0.085000 1.065000 1.335000 1.290000 ;
END
END A
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.490000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.728600 ;
DIRECTION OUTPUT ;
@@ -73,6 +61,22 @@
RECT 0.000000 -0.240000 2.300000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.490000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/clkinv/sky130_fd_sc_hdll__clkinv_4.magic.lef b/cells/clkinv/sky130_fd_sc_hdll__clkinv_4.magic.lef
index 1185c26..0c442ff 100644
--- a/cells/clkinv/sky130_fd_sc_hdll__clkinv_4.magic.lef
+++ b/cells/clkinv/sky130_fd_sc_hdll__clkinv_4.magic.lef
@@ -39,18 +39,6 @@
RECT 0.445000 1.065000 2.910000 1.290000 ;
END
END A
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.870000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 1.177200 ;
DIRECTION OUTPUT ;
@@ -76,6 +64,22 @@
RECT 0.000000 -0.240000 3.680000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.870000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.magic.lef b/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.magic.lef
index 0d1948e..2f3c03e 100644
--- a/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.magic.lef
+++ b/cells/clkinv/sky130_fd_sc_hdll__clkinv_8.magic.lef
@@ -39,18 +39,6 @@
RECT 0.455000 1.035000 5.565000 1.290000 ;
END
END A
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 6.630000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 2.386400 ;
DIRECTION OUTPUT ;
@@ -81,6 +69,22 @@
RECT 0.000000 -0.240000 6.440000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 6.630000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_2.magic.lef b/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_2.magic.lef
index d8b04fc..7467911 100644
--- a/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_2.magic.lef
+++ b/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_2.magic.lef
@@ -39,18 +39,6 @@
RECT 0.145000 0.995000 0.600000 1.665000 ;
END
END A
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.030000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.436750 ;
DIRECTION OUTPUT ;
@@ -69,6 +57,22 @@
RECT 0.000000 -0.240000 1.840000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.030000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_4.magic.lef b/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_4.magic.lef
index abd4e69..a207147 100644
--- a/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_4.magic.lef
+++ b/cells/clkinvlp/sky130_fd_sc_hdll__clkinvlp_4.magic.lef
@@ -39,18 +39,6 @@
RECT 0.085000 0.745000 0.425000 1.325000 ;
END
END A
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.950000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.694000 ;
DIRECTION OUTPUT ;
@@ -72,6 +60,22 @@
RECT 0.000000 -0.240000 2.760000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.950000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_1.magic.lef b/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_1.magic.lef
index 6be7343..1800927 100644
--- a/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_1.magic.lef
+++ b/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_1.magic.lef
@@ -64,18 +64,6 @@
RECT 3.805000 1.055000 3.995000 1.440000 ;
END
END S
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.420000 -0.085000 0.640000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.790000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.405200 ;
DIRECTION OUTPUT ;
@@ -94,6 +82,22 @@
RECT 0.000000 -0.240000 4.600000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.420000 -0.085000 0.640000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.790000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_2.magic.lef b/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_2.magic.lef
index e6198f3..47da938 100644
--- a/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_2.magic.lef
+++ b/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_2.magic.lef
@@ -64,18 +64,6 @@
RECT 4.265000 1.055000 4.455000 1.440000 ;
END
END S
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.880000 -0.085000 1.100000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 5.250000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.430400 ;
DIRECTION OUTPUT ;
@@ -94,6 +82,22 @@
RECT 0.000000 -0.240000 5.060000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.880000 -0.085000 1.100000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 5.250000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_4.magic.lef b/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_4.magic.lef
index b2de467..fd60dd9 100644
--- a/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_4.magic.lef
+++ b/cells/clkmux2/sky130_fd_sc_hdll__clkmux2_4.magic.lef
@@ -64,18 +64,6 @@
RECT 5.185000 1.055000 5.375000 1.440000 ;
END
END S
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 1.800000 -0.085000 2.020000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 6.170000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.860800 ;
DIRECTION OUTPUT ;
@@ -99,6 +87,22 @@
RECT 0.000000 -0.240000 5.980000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 1.800000 -0.085000 2.020000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 6.170000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/conb/sky130_fd_sc_hdll__conb_1.magic.lef b/cells/conb/sky130_fd_sc_hdll__conb_1.magic.lef
index a661b37..73eda62 100644
--- a/cells/conb/sky130_fd_sc_hdll__conb_1.magic.lef
+++ b/cells/conb/sky130_fd_sc_hdll__conb_1.magic.lef
@@ -46,18 +46,6 @@
RECT 0.775000 0.915000 1.295000 2.465000 ;
END
END LO
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 1.570000 2.910000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -66,6 +54,22 @@
RECT 0.000000 -0.240000 1.380000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 1.570000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/decap/sky130_fd_sc_hdll__decap_12.magic.lef b/cells/decap/sky130_fd_sc_hdll__decap_12.magic.lef
index a08a0ac..e088b12 100644
--- a/cells/decap/sky130_fd_sc_hdll__decap_12.magic.lef
+++ b/cells/decap/sky130_fd_sc_hdll__decap_12.magic.lef
@@ -30,18 +30,6 @@
SIZE 5.520000 BY 2.720000 ;
SYMMETRY X Y R90 ;
SITE unithd ;
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 5.710000 2.910000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -50,6 +38,22 @@
RECT 0.000000 -0.240000 5.520000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 5.710000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/decap/sky130_fd_sc_hdll__decap_3.magic.lef b/cells/decap/sky130_fd_sc_hdll__decap_3.magic.lef
index 3f93d36..57fbab2 100644
--- a/cells/decap/sky130_fd_sc_hdll__decap_3.magic.lef
+++ b/cells/decap/sky130_fd_sc_hdll__decap_3.magic.lef
@@ -30,18 +30,6 @@
SIZE 1.380000 BY 2.720000 ;
SYMMETRY X Y R90 ;
SITE unithd ;
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 1.570000 2.910000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -50,6 +38,22 @@
RECT 0.000000 -0.240000 1.380000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 1.570000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/decap/sky130_fd_sc_hdll__decap_4.magic.lef b/cells/decap/sky130_fd_sc_hdll__decap_4.magic.lef
index 3973802..d4755fe 100644
--- a/cells/decap/sky130_fd_sc_hdll__decap_4.magic.lef
+++ b/cells/decap/sky130_fd_sc_hdll__decap_4.magic.lef
@@ -30,18 +30,6 @@
SIZE 1.840000 BY 2.720000 ;
SYMMETRY X Y R90 ;
SITE unithd ;
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.030000 2.910000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -50,6 +38,22 @@
RECT 0.000000 -0.240000 1.840000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.030000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/decap/sky130_fd_sc_hdll__decap_6.magic.lef b/cells/decap/sky130_fd_sc_hdll__decap_6.magic.lef
index dc9ea64..5c366f0 100644
--- a/cells/decap/sky130_fd_sc_hdll__decap_6.magic.lef
+++ b/cells/decap/sky130_fd_sc_hdll__decap_6.magic.lef
@@ -30,18 +30,6 @@
SIZE 2.760000 BY 2.720000 ;
SYMMETRY X Y R90 ;
SITE unithd ;
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.950000 2.910000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -50,6 +38,22 @@
RECT 0.000000 -0.240000 2.760000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.950000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/decap/sky130_fd_sc_hdll__decap_8.magic.lef b/cells/decap/sky130_fd_sc_hdll__decap_8.magic.lef
index dac6c91..3dd1ac1 100644
--- a/cells/decap/sky130_fd_sc_hdll__decap_8.magic.lef
+++ b/cells/decap/sky130_fd_sc_hdll__decap_8.magic.lef
@@ -30,18 +30,6 @@
SIZE 3.680000 BY 2.720000 ;
SYMMETRY X Y R90 ;
SITE unithd ;
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.870000 2.910000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -50,6 +38,22 @@
RECT 0.000000 -0.240000 3.680000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.870000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.magic.lef b/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.magic.lef
index 00c43d2..21bf935 100644
--- a/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.magic.lef
+++ b/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_1.magic.lef
@@ -71,18 +71,6 @@
RECT 7.575000 0.920000 7.865000 0.965000 ;
END
END RESET_B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 9.850000 2.910000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -91,6 +79,22 @@
RECT 0.000000 -0.240000 9.660000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 9.850000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.magic.lef b/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.magic.lef
index e3e11e4..0e00dfe 100644
--- a/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.magic.lef
+++ b/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_2.magic.lef
@@ -75,18 +75,6 @@
RECT 7.575000 0.920000 7.865000 0.965000 ;
END
END RESET_B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 10.310000 2.910000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -95,6 +83,22 @@
RECT 0.000000 -0.240000 10.120000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 10.310000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.magic.lef b/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.magic.lef
index 0aa59f4..aeaabf0 100644
--- a/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.magic.lef
+++ b/cells/dfrtp/sky130_fd_sc_hdll__dfrtp_4.magic.lef
@@ -77,18 +77,6 @@
RECT 8.105000 0.735000 8.395000 0.780000 ;
END
END RESET_B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 11.690000 2.910000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -97,6 +85,22 @@
RECT 0.000000 -0.240000 11.500000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 11.690000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.magic.lef b/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.magic.lef
index 7357395..17418bb 100644
--- a/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.magic.lef
+++ b/cells/dfstp/sky130_fd_sc_hdll__dfstp_1.magic.lef
@@ -72,18 +72,6 @@
RECT 7.445000 0.920000 7.735000 0.965000 ;
END
END SET_B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 10.310000 2.910000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -125,6 +113,22 @@
RECT 0.000000 -0.240000 10.120000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 10.310000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.magic.lef b/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.magic.lef
index fbe9bdd..a115b46 100644
--- a/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.magic.lef
+++ b/cells/dfstp/sky130_fd_sc_hdll__dfstp_2.magic.lef
@@ -74,18 +74,6 @@
RECT 7.445000 0.920000 7.735000 0.965000 ;
END
END SET_B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 10.770000 2.910000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -129,6 +117,22 @@
RECT 0.000000 -0.240000 10.580000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 10.770000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.magic.lef b/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.magic.lef
index e0115c9..cab4c75 100644
--- a/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.magic.lef
+++ b/cells/dfstp/sky130_fd_sc_hdll__dfstp_4.magic.lef
@@ -78,18 +78,6 @@
RECT 7.445000 0.920000 7.735000 0.965000 ;
END
END SET_B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 12.150000 2.910000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -137,6 +125,22 @@
RECT 0.000000 -0.240000 11.960000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 12.150000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/diode/sky130_fd_sc_hdll__diode_2.magic.lef b/cells/diode/sky130_fd_sc_hdll__diode_2.magic.lef
index 98d44c4..a9c7712 100644
--- a/cells/diode/sky130_fd_sc_hdll__diode_2.magic.lef
+++ b/cells/diode/sky130_fd_sc_hdll__diode_2.magic.lef
@@ -40,26 +40,32 @@
RECT 0.085000 0.255000 0.835000 2.465000 ;
END
END DIODE
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 1.110000 2.910000 ;
- END
- END VPB
PIN VGND
+ DIRECTION INPUT ;
USE GROUND ;
PORT
LAYER met1 ;
RECT 0.000000 -0.240000 0.920000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 1.110000 2.910000 ;
+ END
+ END VPB
PIN VPWR
+ DIRECTION INPUT ;
USE POWER ;
PORT
LAYER met1 ;
diff --git a/cells/diode/sky130_fd_sc_hdll__diode_4.magic.lef b/cells/diode/sky130_fd_sc_hdll__diode_4.magic.lef
index bad0693..b2deafa 100644
--- a/cells/diode/sky130_fd_sc_hdll__diode_4.magic.lef
+++ b/cells/diode/sky130_fd_sc_hdll__diode_4.magic.lef
@@ -40,26 +40,32 @@
RECT 0.085000 0.255000 1.755000 2.465000 ;
END
END DIODE
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.030000 2.910000 ;
- END
- END VPB
PIN VGND
+ DIRECTION INPUT ;
USE GROUND ;
PORT
LAYER met1 ;
RECT 0.000000 -0.240000 1.840000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.030000 2.910000 ;
+ END
+ END VPB
PIN VPWR
+ DIRECTION INPUT ;
USE POWER ;
PORT
LAYER met1 ;
diff --git a/cells/diode/sky130_fd_sc_hdll__diode_6.magic.lef b/cells/diode/sky130_fd_sc_hdll__diode_6.magic.lef
index 500ed29..932c87e 100644
--- a/cells/diode/sky130_fd_sc_hdll__diode_6.magic.lef
+++ b/cells/diode/sky130_fd_sc_hdll__diode_6.magic.lef
@@ -40,13 +40,25 @@
RECT 0.085000 0.255000 2.675000 2.465000 ;
END
END DIODE
+ PIN VGND
+ DIRECTION INPUT ;
+ USE GROUND ;
+ PORT
+ LAYER met1 ;
+ RECT 0.000000 -0.240000 2.760000 0.240000 ;
+ END
+ END VGND
PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
PORT
LAYER pwell ;
RECT 0.145000 -0.085000 0.315000 0.085000 ;
END
END VNB
PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
PORT
LAYER nwell ;
RECT -0.190000 1.305000 0.650000 2.070000 ;
@@ -54,14 +66,8 @@
RECT 2.110000 1.305000 2.950000 2.070000 ;
END
END VPB
- PIN VGND
- USE GROUND ;
- PORT
- LAYER met1 ;
- RECT 0.000000 -0.240000 2.760000 0.240000 ;
- END
- END VGND
PIN VPWR
+ DIRECTION INPUT ;
USE POWER ;
PORT
LAYER met1 ;
diff --git a/cells/diode/sky130_fd_sc_hdll__diode_8.magic.lef b/cells/diode/sky130_fd_sc_hdll__diode_8.magic.lef
index 9e0a91e..f5b6d5e 100644
--- a/cells/diode/sky130_fd_sc_hdll__diode_8.magic.lef
+++ b/cells/diode/sky130_fd_sc_hdll__diode_8.magic.lef
@@ -40,13 +40,25 @@
RECT 0.085000 0.255000 3.595000 2.465000 ;
END
END DIODE
+ PIN VGND
+ DIRECTION INPUT ;
+ USE GROUND ;
+ PORT
+ LAYER met1 ;
+ RECT 0.000000 -0.240000 3.680000 0.240000 ;
+ END
+ END VGND
PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
PORT
LAYER pwell ;
RECT 0.145000 -0.085000 0.315000 0.085000 ;
END
END VNB
PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
PORT
LAYER nwell ;
RECT -0.190000 1.305000 0.650000 2.070000 ;
@@ -54,14 +66,8 @@
RECT 3.030000 1.305000 3.870000 2.070000 ;
END
END VPB
- PIN VGND
- USE GROUND ;
- PORT
- LAYER met1 ;
- RECT 0.000000 -0.240000 3.680000 0.240000 ;
- END
- END VGND
PIN VPWR
+ DIRECTION INPUT ;
USE POWER ;
PORT
LAYER met1 ;
diff --git a/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.magic.lef b/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.magic.lef
index 7abc35a..19b49b3 100644
--- a/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.magic.lef
+++ b/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_1.magic.lef
@@ -70,18 +70,6 @@
RECT 4.890000 0.995000 5.385000 1.325000 ;
END
END RESET_B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 6.630000 2.910000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -90,6 +78,22 @@
RECT 0.000000 -0.240000 6.440000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 6.630000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.magic.lef b/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.magic.lef
index a7a9865..562fec4 100644
--- a/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.magic.lef
+++ b/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_2.magic.lef
@@ -71,18 +71,6 @@
RECT 4.890000 0.995000 5.385000 1.325000 ;
END
END RESET_B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 7.090000 2.910000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -91,6 +79,22 @@
RECT 0.000000 -0.240000 6.900000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 7.090000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.magic.lef b/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.magic.lef
index 144beaa..5d265ae 100644
--- a/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.magic.lef
+++ b/cells/dlrtn/sky130_fd_sc_hdll__dlrtn_4.magic.lef
@@ -76,18 +76,6 @@
RECT 4.890000 0.995000 5.385000 1.325000 ;
END
END RESET_B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 8.010000 2.910000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -96,6 +84,22 @@
RECT 0.000000 -0.240000 7.820000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 8.010000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.magic.lef b/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.magic.lef
index 9f4dd1f..802b0a7 100644
--- a/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.magic.lef
+++ b/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_1.magic.lef
@@ -70,18 +70,6 @@
RECT 4.890000 0.995000 5.385000 1.325000 ;
END
END RESET_B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 6.630000 2.910000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -90,6 +78,22 @@
RECT 0.000000 -0.240000 6.440000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 6.630000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.magic.lef b/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.magic.lef
index 0e60a14..55d6f28 100644
--- a/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.magic.lef
+++ b/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_2.magic.lef
@@ -71,18 +71,6 @@
RECT 4.890000 0.995000 5.385000 1.325000 ;
END
END RESET_B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 7.090000 2.910000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -91,6 +79,22 @@
RECT 0.000000 -0.240000 6.900000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 7.090000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.magic.lef b/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.magic.lef
index d6feb64..44174ca 100644
--- a/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.magic.lef
+++ b/cells/dlrtp/sky130_fd_sc_hdll__dlrtp_4.magic.lef
@@ -76,18 +76,6 @@
RECT 4.890000 0.995000 5.385000 1.325000 ;
END
END RESET_B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 8.010000 2.910000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -96,6 +84,22 @@
RECT 0.000000 -0.240000 7.820000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 8.010000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_1.magic.lef b/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_1.magic.lef
index 8d83249..d3cb9be 100644
--- a/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_1.magic.lef
+++ b/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_1.magic.lef
@@ -57,18 +57,6 @@
RECT 5.590000 0.415000 5.875000 2.455000 ;
END
END Q
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 6.170000 2.910000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -77,6 +65,22 @@
RECT 0.000000 -0.240000 5.980000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 6.170000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.magic.lef b/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.magic.lef
index 35c3a23..5c23919 100644
--- a/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.magic.lef
+++ b/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_2.magic.lef
@@ -61,18 +61,6 @@
RECT 5.740000 1.325000 5.910000 1.495000 ;
END
END Q
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 6.630000 2.910000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -81,6 +69,22 @@
RECT 0.000000 -0.240000 6.440000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 6.630000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.magic.lef b/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.magic.lef
index 6c73b63..ea9aa5d 100644
--- a/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.magic.lef
+++ b/cells/dlxtn/sky130_fd_sc_hdll__dlxtn_4.magic.lef
@@ -63,18 +63,6 @@
RECT 6.535000 1.325000 6.805000 2.455000 ;
END
END Q
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 7.550000 2.910000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -83,6 +71,22 @@
RECT 0.000000 -0.240000 7.360000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 7.550000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/dlygate4sd1/sky130_fd_sc_hdll__dlygate4sd1_1.magic.lef b/cells/dlygate4sd1/sky130_fd_sc_hdll__dlygate4sd1_1.magic.lef
index 4acf5af..3205e24 100644
--- a/cells/dlygate4sd1/sky130_fd_sc_hdll__dlygate4sd1_1.magic.lef
+++ b/cells/dlygate4sd1/sky130_fd_sc_hdll__dlygate4sd1_1.magic.lef
@@ -39,18 +39,6 @@
RECT 0.085000 1.055000 0.605000 1.615000 ;
END
END A
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.140000 -0.085000 0.310000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.410000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.449000 ;
DIRECTION OUTPUT ;
@@ -70,6 +58,22 @@
RECT 0.000000 -0.240000 3.220000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.140000 -0.085000 0.310000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.410000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/dlygate4sd2/sky130_fd_sc_hdll__dlygate4sd2_1.magic.lef b/cells/dlygate4sd2/sky130_fd_sc_hdll__dlygate4sd2_1.magic.lef
index 25de2be..43e9ce9 100644
--- a/cells/dlygate4sd2/sky130_fd_sc_hdll__dlygate4sd2_1.magic.lef
+++ b/cells/dlygate4sd2/sky130_fd_sc_hdll__dlygate4sd2_1.magic.lef
@@ -39,18 +39,6 @@
RECT 0.085000 1.055000 0.605000 1.615000 ;
END
END A
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.140000 -0.085000 0.310000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.410000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.464000 ;
DIRECTION OUTPUT ;
@@ -70,6 +58,22 @@
RECT 0.000000 -0.240000 3.220000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.140000 -0.085000 0.310000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.410000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/dlygate4sd3/sky130_fd_sc_hdll__dlygate4sd3_1.magic.lef b/cells/dlygate4sd3/sky130_fd_sc_hdll__dlygate4sd3_1.magic.lef
index d039a13..e80df89 100644
--- a/cells/dlygate4sd3/sky130_fd_sc_hdll__dlygate4sd3_1.magic.lef
+++ b/cells/dlygate4sd3/sky130_fd_sc_hdll__dlygate4sd3_1.magic.lef
@@ -39,18 +39,6 @@
RECT 0.085000 1.055000 0.605000 1.615000 ;
END
END A
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.140000 -0.085000 0.310000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.870000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.445500 ;
DIRECTION OUTPUT ;
@@ -70,6 +58,22 @@
RECT 0.000000 -0.240000 3.680000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.140000 -0.085000 0.310000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.870000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/ebufn/sky130_fd_sc_hdll__ebufn_1.magic.lef b/cells/ebufn/sky130_fd_sc_hdll__ebufn_1.magic.lef
index d2d6130..3c3a6f0 100644
--- a/cells/ebufn/sky130_fd_sc_hdll__ebufn_1.magic.lef
+++ b/cells/ebufn/sky130_fd_sc_hdll__ebufn_1.magic.lef
@@ -48,18 +48,6 @@
RECT 0.960000 1.075000 1.290000 1.630000 ;
END
END TE_B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.870000 2.910000 ;
- END
- END VPB
PIN Z
ANTENNADIFFAREA 0.700500 ;
DIRECTION OUTPUT ;
@@ -79,6 +67,22 @@
RECT 0.000000 -0.240000 3.680000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.870000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/ebufn/sky130_fd_sc_hdll__ebufn_2.magic.lef b/cells/ebufn/sky130_fd_sc_hdll__ebufn_2.magic.lef
index b5c73ca..a1e9f71 100644
--- a/cells/ebufn/sky130_fd_sc_hdll__ebufn_2.magic.lef
+++ b/cells/ebufn/sky130_fd_sc_hdll__ebufn_2.magic.lef
@@ -48,18 +48,6 @@
RECT 0.945000 0.765000 1.300000 1.275000 ;
END
END TE_B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.790000 2.910000 ;
- END
- END VPB
PIN Z
ANTENNADIFFAREA 0.530500 ;
DIRECTION OUTPUT ;
@@ -81,6 +69,22 @@
RECT 0.000000 -0.240000 4.600000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.790000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.magic.lef b/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.magic.lef
index 29d7e8a..f43c785 100644
--- a/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.magic.lef
+++ b/cells/ebufn/sky130_fd_sc_hdll__ebufn_4.magic.lef
@@ -48,18 +48,6 @@
RECT 1.000000 0.765000 1.380000 1.425000 ;
END
END TE_B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 6.630000 2.910000 ;
- END
- END VPB
PIN Z
ANTENNADIFFAREA 1.028500 ;
DIRECTION OUTPUT ;
@@ -79,6 +67,22 @@
RECT 0.000000 -0.240000 6.440000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 6.630000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.magic.lef b/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.magic.lef
index b9d3435..f573919 100644
--- a/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.magic.lef
+++ b/cells/ebufn/sky130_fd_sc_hdll__ebufn_8.magic.lef
@@ -50,18 +50,6 @@
RECT 1.020000 1.325000 1.405000 1.695000 ;
END
END TE_B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 11.230000 2.910000 ;
- END
- END VPB
PIN Z
ANTENNADIFFAREA 2.024500 ;
DIRECTION OUTPUT ;
@@ -81,6 +69,22 @@
RECT 0.000000 -0.240000 11.040000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 11.230000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/einvn/sky130_fd_sc_hdll__einvn_1.magic.lef b/cells/einvn/sky130_fd_sc_hdll__einvn_1.magic.lef
index 366a5a1..6c34c27 100644
--- a/cells/einvn/sky130_fd_sc_hdll__einvn_1.magic.lef
+++ b/cells/einvn/sky130_fd_sc_hdll__einvn_1.magic.lef
@@ -48,18 +48,6 @@
RECT 0.085000 0.955000 0.510000 1.725000 ;
END
END TE_B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.950000 2.910000 ;
- END
- END VPB
PIN Z
ANTENNADIFFAREA 0.471500 ;
DIRECTION OUTPUT ;
@@ -79,6 +67,22 @@
RECT 0.000000 -0.240000 2.760000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.950000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/einvn/sky130_fd_sc_hdll__einvn_2.magic.lef b/cells/einvn/sky130_fd_sc_hdll__einvn_2.magic.lef
index 340d159..853faf2 100644
--- a/cells/einvn/sky130_fd_sc_hdll__einvn_2.magic.lef
+++ b/cells/einvn/sky130_fd_sc_hdll__einvn_2.magic.lef
@@ -48,18 +48,6 @@
RECT 0.085000 0.995000 0.325000 1.385000 ;
END
END TE_B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.870000 2.910000 ;
- END
- END VPB
PIN Z
ANTENNADIFFAREA 0.768000 ;
DIRECTION OUTPUT ;
@@ -79,6 +67,22 @@
RECT 0.000000 -0.240000 3.680000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.870000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/einvn/sky130_fd_sc_hdll__einvn_4.magic.lef b/cells/einvn/sky130_fd_sc_hdll__einvn_4.magic.lef
index 063d124..0768064 100644
--- a/cells/einvn/sky130_fd_sc_hdll__einvn_4.magic.lef
+++ b/cells/einvn/sky130_fd_sc_hdll__einvn_4.magic.lef
@@ -48,18 +48,6 @@
RECT 0.085000 0.995000 0.345000 1.325000 ;
END
END TE_B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 5.710000 2.910000 ;
- END
- END VPB
PIN Z
ANTENNADIFFAREA 0.996000 ;
DIRECTION OUTPUT ;
@@ -79,6 +67,22 @@
RECT 0.000000 -0.240000 5.520000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 5.710000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/einvn/sky130_fd_sc_hdll__einvn_8.magic.lef b/cells/einvn/sky130_fd_sc_hdll__einvn_8.magic.lef
index 4999022..d353faa 100644
--- a/cells/einvn/sky130_fd_sc_hdll__einvn_8.magic.lef
+++ b/cells/einvn/sky130_fd_sc_hdll__einvn_8.magic.lef
@@ -48,18 +48,6 @@
RECT 0.090000 0.995000 0.345000 1.325000 ;
END
END TE_B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 9.390000 2.910000 ;
- END
- END VPB
PIN Z
ANTENNADIFFAREA 2.024500 ;
DIRECTION OUTPUT ;
@@ -83,6 +71,22 @@
RECT 0.000000 -0.240000 9.200000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 9.390000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/einvp/sky130_fd_sc_hdll__einvp_1.magic.lef b/cells/einvp/sky130_fd_sc_hdll__einvp_1.magic.lef
index 22f0c5b..a2acafa 100644
--- a/cells/einvp/sky130_fd_sc_hdll__einvp_1.magic.lef
+++ b/cells/einvp/sky130_fd_sc_hdll__einvp_1.magic.lef
@@ -48,18 +48,6 @@
RECT 0.085000 0.995000 0.595000 1.725000 ;
END
END TE
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.950000 2.910000 ;
- END
- END VPB
PIN Z
ANTENNADIFFAREA 0.488000 ;
DIRECTION OUTPUT ;
@@ -79,6 +67,22 @@
RECT 0.000000 -0.240000 2.760000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.950000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/einvp/sky130_fd_sc_hdll__einvp_2.magic.lef b/cells/einvp/sky130_fd_sc_hdll__einvp_2.magic.lef
index 69c26d1..3022bef 100644
--- a/cells/einvp/sky130_fd_sc_hdll__einvp_2.magic.lef
+++ b/cells/einvp/sky130_fd_sc_hdll__einvp_2.magic.lef
@@ -48,18 +48,6 @@
RECT 0.085000 0.995000 0.330000 1.615000 ;
END
END TE
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.870000 2.910000 ;
- END
- END VPB
PIN Z
ANTENNADIFFAREA 0.530500 ;
DIRECTION OUTPUT ;
@@ -77,6 +65,22 @@
RECT 0.000000 -0.240000 3.680000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.870000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/einvp/sky130_fd_sc_hdll__einvp_4.magic.lef b/cells/einvp/sky130_fd_sc_hdll__einvp_4.magic.lef
index 2ee6b0d..6ccf964 100644
--- a/cells/einvp/sky130_fd_sc_hdll__einvp_4.magic.lef
+++ b/cells/einvp/sky130_fd_sc_hdll__einvp_4.magic.lef
@@ -48,18 +48,6 @@
RECT 0.085000 0.995000 0.330000 1.615000 ;
END
END TE
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 5.710000 2.910000 ;
- END
- END VPB
PIN Z
ANTENNADIFFAREA 0.996000 ;
DIRECTION OUTPUT ;
@@ -81,6 +69,22 @@
RECT 0.000000 -0.240000 5.520000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 5.710000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/einvp/sky130_fd_sc_hdll__einvp_8.magic.lef b/cells/einvp/sky130_fd_sc_hdll__einvp_8.magic.lef
index df8a391..188326b 100644
--- a/cells/einvp/sky130_fd_sc_hdll__einvp_8.magic.lef
+++ b/cells/einvp/sky130_fd_sc_hdll__einvp_8.magic.lef
@@ -48,18 +48,6 @@
RECT 0.085000 0.995000 0.330000 1.615000 ;
END
END TE
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 9.390000 2.910000 ;
- END
- END VPB
PIN Z
ANTENNADIFFAREA 1.992000 ;
DIRECTION OUTPUT ;
@@ -83,6 +71,22 @@
RECT 0.000000 -0.240000 9.200000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 9.390000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/fill/sky130_fd_sc_hdll__fill_1.magic.lef b/cells/fill/sky130_fd_sc_hdll__fill_1.magic.lef
index 445db14..7fbee64 100644
--- a/cells/fill/sky130_fd_sc_hdll__fill_1.magic.lef
+++ b/cells/fill/sky130_fd_sc_hdll__fill_1.magic.lef
@@ -30,18 +30,6 @@
SIZE 0.460000 BY 2.720000 ;
SYMMETRY X Y R90 ;
SITE unithd ;
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.140000 -0.055000 0.260000 0.055000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 0.650000 2.910000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -50,6 +38,22 @@
RECT 0.000000 -0.240000 0.460000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.140000 -0.055000 0.260000 0.055000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 0.650000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/fill/sky130_fd_sc_hdll__fill_2.magic.lef b/cells/fill/sky130_fd_sc_hdll__fill_2.magic.lef
index bafd4d4..8194c6c 100644
--- a/cells/fill/sky130_fd_sc_hdll__fill_2.magic.lef
+++ b/cells/fill/sky130_fd_sc_hdll__fill_2.magic.lef
@@ -30,18 +30,6 @@
SIZE 0.920000 BY 2.720000 ;
SYMMETRY X Y R90 ;
SITE unithd ;
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.155000 -0.050000 0.315000 0.060000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 1.110000 2.910000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -50,6 +38,22 @@
RECT 0.000000 -0.240000 0.920000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.155000 -0.050000 0.315000 0.060000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 1.110000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/fill/sky130_fd_sc_hdll__fill_4.magic.lef b/cells/fill/sky130_fd_sc_hdll__fill_4.magic.lef
index 9e5d407..cc22525 100644
--- a/cells/fill/sky130_fd_sc_hdll__fill_4.magic.lef
+++ b/cells/fill/sky130_fd_sc_hdll__fill_4.magic.lef
@@ -30,18 +30,6 @@
SIZE 1.840000 BY 2.720000 ;
SYMMETRY X Y R90 ;
SITE unithd ;
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.175000 -0.060000 0.285000 0.060000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.030000 2.910000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -50,6 +38,22 @@
RECT 0.000000 -0.240000 1.840000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.175000 -0.060000 0.285000 0.060000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.030000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/fill/sky130_fd_sc_hdll__fill_8.magic.lef b/cells/fill/sky130_fd_sc_hdll__fill_8.magic.lef
index d2d87d0..12c3262 100644
--- a/cells/fill/sky130_fd_sc_hdll__fill_8.magic.lef
+++ b/cells/fill/sky130_fd_sc_hdll__fill_8.magic.lef
@@ -30,18 +30,6 @@
SIZE 3.680000 BY 2.720000 ;
SYMMETRY X Y R90 ;
SITE unithd ;
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.130000 -0.120000 0.350000 0.050000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.870000 2.910000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -50,6 +38,22 @@
RECT 0.000000 -0.240000 3.680000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.130000 -0.120000 0.350000 0.050000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.870000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/inputiso0n/sky130_fd_sc_hdll__inputiso0n_1.magic.lef b/cells/inputiso0n/sky130_fd_sc_hdll__inputiso0n_1.magic.lef
index e98faea..5b5115b 100644
--- a/cells/inputiso0n/sky130_fd_sc_hdll__inputiso0n_1.magic.lef
+++ b/cells/inputiso0n/sky130_fd_sc_hdll__inputiso0n_1.magic.lef
@@ -49,18 +49,6 @@
RECT 0.855000 1.075000 1.275000 1.325000 ;
END
END SLEEP_B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.490000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.539000 ;
DIRECTION OUTPUT ;
@@ -80,6 +68,22 @@
RECT 0.000000 -0.240000 2.300000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.490000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/inputiso0p/sky130_fd_sc_hdll__inputiso0p_1.magic.lef b/cells/inputiso0p/sky130_fd_sc_hdll__inputiso0p_1.magic.lef
index 26f8e50..e838810 100644
--- a/cells/inputiso0p/sky130_fd_sc_hdll__inputiso0p_1.magic.lef
+++ b/cells/inputiso0p/sky130_fd_sc_hdll__inputiso0p_1.magic.lef
@@ -48,18 +48,6 @@
RECT 0.145000 0.765000 0.445000 1.615000 ;
END
END SLEEP
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.410000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.439000 ;
DIRECTION OUTPUT ;
@@ -79,6 +67,22 @@
RECT 0.000000 -0.240000 3.220000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.410000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/inputiso1n/sky130_fd_sc_hdll__inputiso1n_1.magic.lef b/cells/inputiso1n/sky130_fd_sc_hdll__inputiso1n_1.magic.lef
index cfcbc21..6f73659 100644
--- a/cells/inputiso1n/sky130_fd_sc_hdll__inputiso1n_1.magic.lef
+++ b/cells/inputiso1n/sky130_fd_sc_hdll__inputiso1n_1.magic.lef
@@ -48,18 +48,6 @@
RECT 0.090000 1.075000 0.425000 1.325000 ;
END
END SLEEP_B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.410000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.472000 ;
DIRECTION OUTPUT ;
@@ -79,6 +67,22 @@
RECT 0.000000 -0.240000 3.220000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.410000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/inputiso1p/sky130_fd_sc_hdll__inputiso1p_1.magic.lef b/cells/inputiso1p/sky130_fd_sc_hdll__inputiso1p_1.magic.lef
index 084ce86..ea4f41f 100644
--- a/cells/inputiso1p/sky130_fd_sc_hdll__inputiso1p_1.magic.lef
+++ b/cells/inputiso1p/sky130_fd_sc_hdll__inputiso1p_1.magic.lef
@@ -48,18 +48,6 @@
RECT 1.000000 0.765000 1.315000 1.325000 ;
END
END SLEEP
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.490000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.650500 ;
DIRECTION OUTPUT ;
@@ -79,6 +67,22 @@
RECT 0.000000 -0.240000 2.300000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.490000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/inv/sky130_fd_sc_hdll__inv_1.magic.lef b/cells/inv/sky130_fd_sc_hdll__inv_1.magic.lef
index 9831a33..a41f4eb 100644
--- a/cells/inv/sky130_fd_sc_hdll__inv_1.magic.lef
+++ b/cells/inv/sky130_fd_sc_hdll__inv_1.magic.lef
@@ -39,18 +39,6 @@
RECT 0.095000 1.075000 0.650000 1.315000 ;
END
END A
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 1.570000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.439000 ;
DIRECTION OUTPUT ;
@@ -70,6 +58,22 @@
RECT 0.000000 -0.240000 1.380000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 1.570000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/inv/sky130_fd_sc_hdll__inv_12.magic.lef b/cells/inv/sky130_fd_sc_hdll__inv_12.magic.lef
index 557ab43..bca6957 100644
--- a/cells/inv/sky130_fd_sc_hdll__inv_12.magic.lef
+++ b/cells/inv/sky130_fd_sc_hdll__inv_12.magic.lef
@@ -39,18 +39,6 @@
RECT 0.680000 1.075000 5.800000 1.325000 ;
END
END A
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 6.630000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 3.020500 ;
DIRECTION OUTPUT ;
@@ -83,6 +71,22 @@
RECT 0.000000 -0.240000 6.440000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 6.630000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/inv/sky130_fd_sc_hdll__inv_16.magic.lef b/cells/inv/sky130_fd_sc_hdll__inv_16.magic.lef
index afe1a22..b031cf0 100644
--- a/cells/inv/sky130_fd_sc_hdll__inv_16.magic.lef
+++ b/cells/inv/sky130_fd_sc_hdll__inv_16.magic.lef
@@ -39,18 +39,6 @@
RECT 0.085000 1.075000 6.125000 1.315000 ;
END
END A
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 8.470000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 3.984000 ;
DIRECTION OUTPUT ;
@@ -86,6 +74,22 @@
RECT 0.000000 -0.240000 8.280000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 8.470000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/inv/sky130_fd_sc_hdll__inv_2.magic.lef b/cells/inv/sky130_fd_sc_hdll__inv_2.magic.lef
index 25c29d7..f0d8a52 100644
--- a/cells/inv/sky130_fd_sc_hdll__inv_2.magic.lef
+++ b/cells/inv/sky130_fd_sc_hdll__inv_2.magic.lef
@@ -39,18 +39,6 @@
RECT 0.105000 1.075000 0.435000 1.325000 ;
END
END A
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.030000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.498000 ;
DIRECTION OUTPUT ;
@@ -70,6 +58,22 @@
RECT 0.000000 -0.240000 1.840000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.030000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/inv/sky130_fd_sc_hdll__inv_4.magic.lef b/cells/inv/sky130_fd_sc_hdll__inv_4.magic.lef
index 7e4ee70..c949e9b 100644
--- a/cells/inv/sky130_fd_sc_hdll__inv_4.magic.lef
+++ b/cells/inv/sky130_fd_sc_hdll__inv_4.magic.lef
@@ -39,18 +39,6 @@
RECT 0.105000 1.075000 1.885000 1.325000 ;
END
END A
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.950000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.996000 ;
DIRECTION OUTPUT ;
@@ -75,6 +63,22 @@
RECT 0.000000 -0.240000 2.760000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.950000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/inv/sky130_fd_sc_hdll__inv_6.magic.lef b/cells/inv/sky130_fd_sc_hdll__inv_6.magic.lef
index 8c35537..980e149 100644
--- a/cells/inv/sky130_fd_sc_hdll__inv_6.magic.lef
+++ b/cells/inv/sky130_fd_sc_hdll__inv_6.magic.lef
@@ -39,18 +39,6 @@
RECT 0.285000 1.075000 2.695000 1.325000 ;
END
END A
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.870000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 1.494000 ;
DIRECTION OUTPUT ;
@@ -77,6 +65,22 @@
RECT 0.000000 -0.240000 3.680000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.870000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/inv/sky130_fd_sc_hdll__inv_8.magic.lef b/cells/inv/sky130_fd_sc_hdll__inv_8.magic.lef
index db8bff0..b2c93ce 100644
--- a/cells/inv/sky130_fd_sc_hdll__inv_8.magic.lef
+++ b/cells/inv/sky130_fd_sc_hdll__inv_8.magic.lef
@@ -39,18 +39,6 @@
RECT 0.680000 1.075000 3.885000 1.325000 ;
END
END A
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.790000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 2.024500 ;
DIRECTION OUTPUT ;
@@ -79,6 +67,22 @@
RECT 0.000000 -0.240000 4.600000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.790000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_1.magic.lef b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_1.magic.lef
index edc0383..19d67d5 100644
--- a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_1.magic.lef
+++ b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_1.magic.lef
@@ -48,18 +48,6 @@
RECT 1.010000 1.065000 1.425000 1.325000 ;
END
END SLEEP
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.490000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.478000 ;
DIRECTION OUTPUT ;
@@ -80,6 +68,22 @@
RECT 0.000000 -0.240000 2.300000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.490000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.magic.lef b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.magic.lef
index 4234efa..e9e079d 100644
--- a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.magic.lef
+++ b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_16.magic.lef
@@ -49,18 +49,6 @@
RECT 10.650000 1.075000 17.600000 1.285000 ;
END
END SLEEP
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 18.590000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 5.713000 ;
DIRECTION OUTPUT ;
@@ -104,6 +92,22 @@
RECT 0.000000 -0.240000 18.400000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 18.590000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_2.magic.lef b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_2.magic.lef
index 2e03592..c0a5054 100644
--- a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_2.magic.lef
+++ b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_2.magic.lef
@@ -49,18 +49,6 @@
RECT 0.480000 1.065000 0.970000 1.275000 ;
END
END SLEEP
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.870000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.771000 ;
DIRECTION OUTPUT ;
@@ -81,6 +69,22 @@
RECT 0.000000 -0.240000 3.680000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.870000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_4.magic.lef b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_4.magic.lef
index 3cf5edb..65c5e3a 100644
--- a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_4.magic.lef
+++ b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_4.magic.lef
@@ -48,18 +48,6 @@
RECT 0.360000 1.075000 1.950000 1.275000 ;
END
END SLEEP
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 5.710000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 1.477000 ;
DIRECTION OUTPUT ;
@@ -85,6 +73,22 @@
RECT 0.000000 -0.240000 5.520000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 5.710000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.magic.lef b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.magic.lef
index 6bbce67..774b7c7 100644
--- a/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.magic.lef
+++ b/cells/isobufsrc/sky130_fd_sc_hdll__isobufsrc_8.magic.lef
@@ -49,18 +49,6 @@
RECT 5.790000 1.075000 8.880000 1.275000 ;
END
END SLEEP
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 9.850000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 2.889000 ;
DIRECTION OUTPUT ;
@@ -92,6 +80,22 @@
RECT 0.000000 -0.240000 9.660000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 9.850000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/mux2/sky130_fd_sc_hdll__mux2_1.magic.lef b/cells/mux2/sky130_fd_sc_hdll__mux2_1.magic.lef
index f3cb704..1bb1142 100644
--- a/cells/mux2/sky130_fd_sc_hdll__mux2_1.magic.lef
+++ b/cells/mux2/sky130_fd_sc_hdll__mux2_1.magic.lef
@@ -63,18 +63,6 @@
RECT 3.245000 1.630000 3.415000 2.295000 ;
END
END S
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.420000 -0.085000 0.640000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.790000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.439000 ;
DIRECTION OUTPUT ;
@@ -93,6 +81,22 @@
RECT 0.000000 -0.240000 4.600000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.420000 -0.085000 0.640000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.790000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/mux2/sky130_fd_sc_hdll__mux2_12.magic.lef b/cells/mux2/sky130_fd_sc_hdll__mux2_12.magic.lef
index 9d500fc..3a065a8 100644
--- a/cells/mux2/sky130_fd_sc_hdll__mux2_12.magic.lef
+++ b/cells/mux2/sky130_fd_sc_hdll__mux2_12.magic.lef
@@ -57,18 +57,6 @@
RECT 2.925000 1.075000 4.275000 1.325000 ;
END
END S
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 16.750000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 2.793000 ;
DIRECTION OUTPUT ;
@@ -100,6 +88,22 @@
RECT 0.000000 -0.240000 16.560000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 16.750000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/mux2/sky130_fd_sc_hdll__mux2_16.magic.lef b/cells/mux2/sky130_fd_sc_hdll__mux2_16.magic.lef
index 086ba7a..fd7bbfe 100644
--- a/cells/mux2/sky130_fd_sc_hdll__mux2_16.magic.lef
+++ b/cells/mux2/sky130_fd_sc_hdll__mux2_16.magic.lef
@@ -57,18 +57,6 @@
RECT 2.925000 1.075000 4.275000 1.325000 ;
END
END S
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 18.590000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 3.724000 ;
DIRECTION OUTPUT ;
@@ -104,6 +92,22 @@
RECT 0.000000 -0.240000 18.400000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 18.590000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/mux2/sky130_fd_sc_hdll__mux2_2.magic.lef b/cells/mux2/sky130_fd_sc_hdll__mux2_2.magic.lef
index 2fdbd7e..0ccb1fe 100644
--- a/cells/mux2/sky130_fd_sc_hdll__mux2_2.magic.lef
+++ b/cells/mux2/sky130_fd_sc_hdll__mux2_2.magic.lef
@@ -61,18 +61,6 @@
RECT 3.355000 0.755000 3.545000 1.625000 ;
END
END S
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.790000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.498000 ;
DIRECTION OUTPUT ;
@@ -91,6 +79,22 @@
RECT 0.000000 -0.240000 4.600000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.790000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/mux2/sky130_fd_sc_hdll__mux2_4.magic.lef b/cells/mux2/sky130_fd_sc_hdll__mux2_4.magic.lef
index 9118212..dd5f503 100644
--- a/cells/mux2/sky130_fd_sc_hdll__mux2_4.magic.lef
+++ b/cells/mux2/sky130_fd_sc_hdll__mux2_4.magic.lef
@@ -61,18 +61,6 @@
RECT 2.880000 0.995000 3.595000 1.325000 ;
END
END S
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 6.170000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.996000 ;
DIRECTION OUTPUT ;
@@ -96,6 +84,22 @@
RECT 0.000000 -0.240000 5.980000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 6.170000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/mux2/sky130_fd_sc_hdll__mux2_8.magic.lef b/cells/mux2/sky130_fd_sc_hdll__mux2_8.magic.lef
index 19d888e..5d2fbde 100644
--- a/cells/mux2/sky130_fd_sc_hdll__mux2_8.magic.lef
+++ b/cells/mux2/sky130_fd_sc_hdll__mux2_8.magic.lef
@@ -70,18 +70,6 @@
RECT 9.745000 1.600000 10.035000 1.645000 ;
END
END S
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 10.770000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 2.024500 ;
DIRECTION OUTPUT ;
@@ -109,6 +97,22 @@
RECT 0.000000 -0.240000 10.580000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 10.770000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/mux2i/sky130_fd_sc_hdll__mux2i_1.magic.lef b/cells/mux2i/sky130_fd_sc_hdll__mux2i_1.magic.lef
index 09a49b4..c133016 100644
--- a/cells/mux2i/sky130_fd_sc_hdll__mux2i_1.magic.lef
+++ b/cells/mux2i/sky130_fd_sc_hdll__mux2i_1.magic.lef
@@ -58,18 +58,6 @@
RECT 3.365000 0.760000 3.750000 1.620000 ;
END
END S
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.330000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.465500 ;
DIRECTION OUTPUT ;
@@ -88,6 +76,22 @@
RECT 0.000000 -0.240000 4.140000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.330000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/mux2i/sky130_fd_sc_hdll__mux2i_2.magic.lef b/cells/mux2i/sky130_fd_sc_hdll__mux2i_2.magic.lef
index ce46d9e..d215e02 100644
--- a/cells/mux2i/sky130_fd_sc_hdll__mux2i_2.magic.lef
+++ b/cells/mux2i/sky130_fd_sc_hdll__mux2i_2.magic.lef
@@ -58,18 +58,6 @@
RECT 0.630000 0.725000 0.830000 0.995000 ;
END
END S
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 5.710000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 1.796250 ;
DIRECTION OUTPUT ;
@@ -90,6 +78,22 @@
RECT 0.000000 -0.240000 5.520000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 5.710000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.magic.lef b/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.magic.lef
index 9454cd5..692dec6 100644
--- a/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.magic.lef
+++ b/cells/mux2i/sky130_fd_sc_hdll__mux2i_4.magic.lef
@@ -60,18 +60,6 @@
RECT 8.480000 0.995000 8.650000 1.425000 ;
END
END S
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 9.390000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 2.339500 ;
DIRECTION OUTPUT ;
@@ -91,6 +79,22 @@
RECT 0.000000 -0.240000 9.200000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 9.390000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/muxb/sky130_fd_sc_hdll__muxb.magic.lef b/cells/muxb/sky130_fd_sc_hdll__muxb.magic.lef
index 1ef0601..13aa0de 100644
--- a/cells/muxb/sky130_fd_sc_hdll__muxb.magic.lef
+++ b/cells/muxb/sky130_fd_sc_hdll__muxb.magic.lef
@@ -4590,6 +4590,86 @@
RECT 224.525000 2.295000 224.815000 2.340000 ;
RECT 224.525000 3.100000 224.815000 3.145000 ;
RECT 224.525000 3.285000 224.815000 3.330000 ;
+ LAYER nwell ;
+ RECT -0.190000 1.305000 225.590000 2.910000 ;
+ RECT 105.610000 2.910000 225.590000 4.135000 ;
+ LAYER pwell ;
+ RECT 0.420000 -0.085000 0.640000 0.085000 ;
+ RECT 5.480000 -0.085000 5.700000 0.085000 ;
+ RECT 11.460000 -0.085000 11.680000 0.085000 ;
+ RECT 15.785000 -0.085000 15.955000 0.085000 ;
+ RECT 24.525000 -0.085000 24.695000 0.085000 ;
+ RECT 30.505000 -0.085000 30.675000 0.085000 ;
+ RECT 30.965000 -0.085000 31.135000 0.085000 ;
+ RECT 36.945000 -0.085000 37.115000 0.085000 ;
+ RECT 37.405000 -0.085000 37.575000 0.085000 ;
+ RECT 49.825000 -0.085000 49.995000 0.085000 ;
+ RECT 50.285000 -0.085000 50.455000 0.085000 ;
+ RECT 62.705000 -0.085000 62.875000 0.085000 ;
+ RECT 63.165000 -0.085000 63.335000 0.085000 ;
+ RECT 67.305000 -0.085000 67.475000 0.085000 ;
+ RECT 71.445000 -0.085000 71.615000 0.085000 ;
+ RECT 75.585000 -0.085000 75.755000 0.085000 ;
+ RECT 79.725000 -0.085000 79.895000 0.085000 ;
+ RECT 80.185000 -0.085000 80.355000 0.085000 ;
+ RECT 86.165000 -0.085000 86.335000 0.085000 ;
+ RECT 86.625000 -0.085000 86.795000 0.085000 ;
+ RECT 92.605000 -0.085000 92.775000 0.085000 ;
+ RECT 93.065000 -0.085000 93.235000 0.085000 ;
+ RECT 99.045000 -0.085000 99.215000 0.085000 ;
+ RECT 99.505000 -0.085000 99.675000 0.085000 ;
+ RECT 105.485000 -0.085000 105.655000 0.085000 ;
+ RECT 105.945000 -0.085000 106.115000 0.085000 ;
+ RECT 111.925000 -0.085000 112.095000 0.085000 ;
+ RECT 124.345000 -0.085000 124.515000 0.085000 ;
+ RECT 130.785000 -0.085000 130.955000 0.085000 ;
+ RECT 134.925000 -0.085000 135.095000 0.085000 ;
+ RECT 139.065000 -0.085000 139.235000 0.085000 ;
+ RECT 143.205000 -0.085000 143.375000 0.085000 ;
+ RECT 147.345000 -0.085000 147.515000 0.085000 ;
+ RECT 147.805000 -0.085000 147.975000 0.085000 ;
+ RECT 153.785000 -0.085000 153.955000 0.085000 ;
+ RECT 154.245000 -0.085000 154.415000 0.085000 ;
+ RECT 160.225000 -0.085000 160.395000 0.085000 ;
+ RECT 160.685000 -0.085000 160.855000 0.085000 ;
+ RECT 166.665000 -0.085000 166.835000 0.085000 ;
+ RECT 167.125000 -0.085000 167.295000 0.085000 ;
+ RECT 173.105000 -0.085000 173.275000 0.085000 ;
+ RECT 173.565000 -0.085000 173.735000 0.085000 ;
+ RECT 185.985000 -0.085000 186.155000 0.085000 ;
+ RECT 186.445000 -0.085000 186.615000 0.085000 ;
+ RECT 198.865000 -0.085000 199.035000 0.085000 ;
+ RECT 199.325000 0.320000 199.495000 0.845000 ;
+ RECT 199.785000 -0.085000 199.955000 0.085000 ;
+ RECT 212.205000 -0.085000 212.375000 0.085000 ;
+ RECT 212.665000 -0.085000 212.835000 0.085000 ;
+ RECT 225.085000 -0.085000 225.255000 0.085000 ;
+ LAYER pwell ;
+ RECT 105.945000 5.355000 106.115000 5.525000 ;
+ RECT 111.925000 5.355000 112.095000 5.525000 ;
+ RECT 124.345000 5.355000 124.515000 5.525000 ;
+ RECT 130.785000 5.355000 130.955000 5.525000 ;
+ RECT 134.925000 5.355000 135.095000 5.525000 ;
+ RECT 139.065000 5.355000 139.235000 5.525000 ;
+ RECT 143.205000 5.355000 143.375000 5.525000 ;
+ RECT 147.345000 5.355000 147.515000 5.525000 ;
+ RECT 147.805000 5.355000 147.975000 5.525000 ;
+ RECT 153.785000 5.355000 153.955000 5.525000 ;
+ RECT 154.245000 5.355000 154.415000 5.525000 ;
+ RECT 160.225000 5.355000 160.395000 5.525000 ;
+ RECT 160.685000 5.355000 160.855000 5.525000 ;
+ RECT 166.665000 5.355000 166.835000 5.525000 ;
+ RECT 167.125000 5.355000 167.295000 5.525000 ;
+ RECT 173.105000 5.355000 173.275000 5.525000 ;
+ RECT 173.565000 5.355000 173.735000 5.525000 ;
+ RECT 185.985000 5.355000 186.155000 5.525000 ;
+ RECT 186.445000 5.355000 186.615000 5.525000 ;
+ RECT 198.865000 5.355000 199.035000 5.525000 ;
+ RECT 199.325000 4.595000 199.495000 5.120000 ;
+ RECT 199.785000 5.355000 199.955000 5.525000 ;
+ RECT 212.205000 5.355000 212.375000 5.525000 ;
+ RECT 212.665000 5.355000 212.835000 5.525000 ;
+ RECT 225.085000 5.355000 225.255000 5.525000 ;
END
END sky130_fd_sc_hdll__muxb
END LIBRARY
diff --git a/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.magic.lef b/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.magic.lef
index 18ee42d..cdbcc19 100644
--- a/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.magic.lef
+++ b/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_1.magic.lef
@@ -350,54 +350,6 @@
RECT 14.815000 4.145000 15.215000 4.495000 ;
END
END S[15]
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 0.145000 5.355000 0.315000 5.525000 ;
- END
- PORT
- LAYER pwell ;
- RECT 12.565000 -0.085000 12.735000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 12.565000 5.355000 12.735000 5.525000 ;
- END
- PORT
- LAYER pwell ;
- RECT 16.705000 -0.085000 16.875000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 16.705000 5.355000 16.875000 5.525000 ;
- END
- PORT
- LAYER pwell ;
- RECT 4.285000 -0.085000 4.455000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 4.285000 5.355000 4.455000 5.525000 ;
- END
- PORT
- LAYER pwell ;
- RECT 8.425000 -0.085000 8.595000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 8.425000 5.355000 8.595000 5.525000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 17.210000 4.135000 ;
- END
- END VPB
PIN Z
ANTENNADIFFAREA 5.705600 ;
DIRECTION OUTPUT ;
@@ -706,6 +658,58 @@
RECT 0.000000 5.200000 17.020000 5.680000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 5.355000 0.315000 5.525000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 12.565000 -0.085000 12.735000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 12.565000 5.355000 12.735000 5.525000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 16.705000 -0.085000 16.875000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 16.705000 5.355000 16.875000 5.525000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 4.285000 -0.085000 4.455000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 4.285000 5.355000 4.455000 5.525000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 8.425000 -0.085000 8.595000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 8.425000 5.355000 8.595000 5.525000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 17.210000 4.135000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.magic.lef b/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.magic.lef
index 83e8867..98e0a58 100644
--- a/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.magic.lef
+++ b/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_2.magic.lef
@@ -318,78 +318,6 @@
RECT 22.635000 4.145000 22.970000 4.415000 ;
END
END S[15]
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 0.145000 5.355000 0.315000 5.525000 ;
- END
- PORT
- LAYER pwell ;
- RECT 12.565000 -0.085000 12.735000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 12.565000 5.355000 12.735000 5.525000 ;
- END
- PORT
- LAYER pwell ;
- RECT 13.025000 -0.085000 13.195000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 13.025000 5.355000 13.195000 5.525000 ;
- END
- PORT
- LAYER pwell ;
- RECT 19.005000 -0.085000 19.175000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 19.005000 5.355000 19.175000 5.525000 ;
- END
- PORT
- LAYER pwell ;
- RECT 19.465000 -0.085000 19.635000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 19.465000 5.355000 19.635000 5.525000 ;
- END
- PORT
- LAYER pwell ;
- RECT 25.445000 -0.085000 25.615000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 25.445000 5.355000 25.615000 5.525000 ;
- END
- PORT
- LAYER pwell ;
- RECT 6.125000 -0.085000 6.295000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 6.125000 5.355000 6.295000 5.525000 ;
- END
- PORT
- LAYER pwell ;
- RECT 6.585000 -0.085000 6.755000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 6.585000 5.355000 6.755000 5.525000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 25.950000 4.135000 ;
- END
- END VPB
PIN Z
ANTENNADIFFAREA 6.051200 ;
DIRECTION OUTPUT ;
@@ -603,6 +531,82 @@
RECT 0.000000 5.200000 25.760000 5.680000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 5.355000 0.315000 5.525000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 12.565000 -0.085000 12.735000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 12.565000 5.355000 12.735000 5.525000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 13.025000 -0.085000 13.195000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 13.025000 5.355000 13.195000 5.525000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 19.005000 -0.085000 19.175000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 19.005000 5.355000 19.175000 5.525000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 19.465000 -0.085000 19.635000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 19.465000 5.355000 19.635000 5.525000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 25.445000 -0.085000 25.615000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 25.445000 5.355000 25.615000 5.525000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 6.125000 -0.085000 6.295000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 6.125000 5.355000 6.295000 5.525000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 6.585000 -0.085000 6.755000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 6.585000 5.355000 6.755000 5.525000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 25.950000 4.135000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_4.magic.lef b/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_4.magic.lef
index 00a6bb0..cd32b26 100644
--- a/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_4.magic.lef
+++ b/cells/muxb16to1/sky130_fd_sc_hdll__muxb16to1_4.magic.lef
@@ -318,92 +318,6 @@
RECT 45.625000 4.115000 46.220000 4.445000 ;
END
END S[15]
- PIN VNB
- PORT
- LAYER li1 ;
- RECT 25.845000 0.265000 26.135000 0.810000 ;
- END
- PORT
- LAYER li1 ;
- RECT 25.845000 4.630000 26.135000 5.175000 ;
- END
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 0.145000 5.355000 0.315000 5.525000 ;
- END
- PORT
- LAYER pwell ;
- RECT 12.565000 -0.085000 12.735000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 12.565000 5.355000 12.735000 5.525000 ;
- END
- PORT
- LAYER pwell ;
- RECT 13.025000 -0.085000 13.195000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 13.025000 5.355000 13.195000 5.525000 ;
- END
- PORT
- LAYER pwell ;
- RECT 25.445000 -0.085000 25.615000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 25.445000 5.355000 25.615000 5.525000 ;
- END
- PORT
- LAYER pwell ;
- RECT 26.365000 -0.085000 26.535000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 26.365000 5.355000 26.535000 5.525000 ;
- END
- PORT
- LAYER pwell ;
- RECT 38.785000 -0.085000 38.955000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 38.785000 5.355000 38.955000 5.525000 ;
- END
- PORT
- LAYER pwell ;
- RECT 39.245000 -0.085000 39.415000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 39.245000 5.355000 39.415000 5.525000 ;
- END
- PORT
- LAYER pwell ;
- RECT 51.665000 -0.085000 51.835000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 51.665000 5.355000 51.835000 5.525000 ;
- END
- END VNB
- PIN VPB
- ANTENNADIFFAREA 0.297500 ;
- PORT
- LAYER li1 ;
- RECT 25.845000 1.470000 26.135000 2.455000 ;
- RECT 25.845000 2.985000 26.135000 3.970000 ;
- END
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 52.170000 4.135000 ;
- END
- END VPB
PIN Z
ANTENNADIFFAREA 12.10240 ;
DIRECTION OUTPUT ;
@@ -824,6 +738,97 @@
RECT 0.000000 5.200000 51.980000 5.680000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER li1 ;
+ RECT 25.845000 0.265000 26.135000 0.810000 ;
+ LAYER pwell ;
+ RECT 25.905000 0.320000 26.075000 0.845000 ;
+ END
+ PORT
+ LAYER li1 ;
+ RECT 25.845000 4.630000 26.135000 5.175000 ;
+ LAYER pwell ;
+ RECT 25.905000 4.595000 26.075000 5.120000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 5.355000 0.315000 5.525000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 12.565000 -0.085000 12.735000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 12.565000 5.355000 12.735000 5.525000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 13.025000 -0.085000 13.195000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 13.025000 5.355000 13.195000 5.525000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 25.445000 -0.085000 25.615000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 25.445000 5.355000 25.615000 5.525000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 26.365000 -0.085000 26.535000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 26.365000 5.355000 26.535000 5.525000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 38.785000 -0.085000 38.955000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 38.785000 5.355000 38.955000 5.525000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 39.245000 -0.085000 39.415000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 39.245000 5.355000 39.415000 5.525000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 51.665000 -0.085000 51.835000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 51.665000 5.355000 51.835000 5.525000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER li1 ;
+ RECT 25.845000 1.470000 26.135000 2.455000 ;
+ RECT 25.845000 2.985000 26.135000 3.970000 ;
+ LAYER nwell ;
+ RECT -0.190000 1.305000 52.170000 4.135000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.magic.lef b/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.magic.lef
index 5cca985..6b3b83b 100644
--- a/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.magic.lef
+++ b/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_1.magic.lef
@@ -110,18 +110,6 @@
RECT 6.585000 0.945000 6.935000 1.295000 ;
END
END S[3]
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 8.930000 2.910000 ;
- END
- END VPB
PIN Z
ANTENNADIFFAREA 1.426400 ;
DIRECTION OUTPUT ;
@@ -147,6 +135,22 @@
RECT 0.000000 -0.240000 8.740000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 8.930000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.magic.lef b/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.magic.lef
index d3f828a..60d4d91 100644
--- a/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.magic.lef
+++ b/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_2.magic.lef
@@ -102,30 +102,6 @@
RECT 9.755000 1.025000 10.090000 1.295000 ;
END
END S[3]
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 12.565000 -0.085000 12.735000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 6.125000 -0.085000 6.295000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 6.585000 -0.085000 6.755000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 13.070000 2.910000 ;
- END
- END VPB
PIN Z
ANTENNADIFFAREA 1.512800 ;
DIRECTION OUTPUT ;
@@ -190,6 +166,34 @@
RECT 0.000000 -0.240000 12.880000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 12.565000 -0.085000 12.735000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 6.125000 -0.085000 6.295000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 6.585000 -0.085000 6.755000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 13.070000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.magic.lef b/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.magic.lef
index 9851764..f1964e8 100644
--- a/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.magic.lef
+++ b/cells/muxb4to1/sky130_fd_sc_hdll__muxb4to1_4.magic.lef
@@ -102,30 +102,6 @@
RECT 19.405000 0.995000 20.000000 1.325000 ;
END
END S[3]
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 12.565000 -0.085000 12.735000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 13.025000 -0.085000 13.195000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 25.445000 -0.085000 25.615000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 25.950000 2.910000 ;
- END
- END VPB
PIN Z
ANTENNADIFFAREA 3.025600 ;
DIRECTION OUTPUT ;
@@ -240,6 +216,34 @@
RECT 0.000000 -0.240000 25.760000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 12.565000 -0.085000 12.735000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 13.025000 -0.085000 13.195000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 25.445000 -0.085000 25.615000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 25.950000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.magic.lef b/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.magic.lef
index d2111a3..afd8cbf 100644
--- a/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.magic.lef
+++ b/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_1.magic.lef
@@ -190,34 +190,6 @@
RECT 14.815000 0.945000 15.215000 1.295000 ;
END
END S[7]
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 12.565000 -0.085000 12.735000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 16.705000 -0.085000 16.875000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 4.285000 -0.085000 4.455000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 8.425000 -0.085000 8.595000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 17.210000 2.910000 ;
- END
- END VPB
PIN Z
ANTENNADIFFAREA 2.852800 ;
DIRECTION OUTPUT ;
@@ -390,6 +362,38 @@
RECT 0.000000 -0.240000 17.020000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 12.565000 -0.085000 12.735000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 16.705000 -0.085000 16.875000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 4.285000 -0.085000 4.455000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 8.425000 -0.085000 8.595000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 17.210000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.magic.lef b/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.magic.lef
index 2738e32..cb4af36 100644
--- a/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.magic.lef
+++ b/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_2.magic.lef
@@ -174,46 +174,6 @@
RECT 22.635000 1.025000 22.970000 1.295000 ;
END
END S[7]
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 12.565000 -0.085000 12.735000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 13.025000 -0.085000 13.195000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 19.005000 -0.085000 19.175000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 19.465000 -0.085000 19.635000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 25.445000 -0.085000 25.615000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 6.125000 -0.085000 6.295000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 6.585000 -0.085000 6.755000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 25.950000 2.910000 ;
- END
- END VPB
PIN Z
ANTENNADIFFAREA 3.025600 ;
DIRECTION OUTPUT ;
@@ -320,6 +280,50 @@
RECT 0.000000 -0.240000 25.760000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 12.565000 -0.085000 12.735000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 13.025000 -0.085000 13.195000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 19.005000 -0.085000 19.175000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 19.465000 -0.085000 19.635000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 25.445000 -0.085000 25.615000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 6.125000 -0.085000 6.295000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 6.585000 -0.085000 6.755000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 25.950000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.magic.lef b/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.magic.lef
index 37239ce..3c9f57f 100644
--- a/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.magic.lef
+++ b/cells/muxb8to1/sky130_fd_sc_hdll__muxb8to1_4.magic.lef
@@ -174,38 +174,6 @@
RECT 24.160000 4.115000 24.755000 4.445000 ;
END
END S[7]
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 0.145000 5.355000 0.315000 5.525000 ;
- END
- PORT
- LAYER pwell ;
- RECT 18.545000 -0.085000 18.715000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 18.545000 5.355000 18.715000 5.525000 ;
- END
- PORT
- LAYER pwell ;
- RECT 6.125000 -0.085000 6.295000 0.085000 ;
- END
- PORT
- LAYER pwell ;
- RECT 6.125000 5.355000 6.295000 5.525000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 25.030000 4.135000 ;
- END
- END VPB
PIN Z
ANTENNADIFFAREA 6.051200 ;
DIRECTION OUTPUT ;
@@ -432,6 +400,42 @@
RECT 0.000000 5.200000 24.840000 5.680000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 5.355000 0.315000 5.525000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 18.545000 -0.085000 18.715000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 18.545000 5.355000 18.715000 5.525000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 6.125000 -0.085000 6.295000 0.085000 ;
+ END
+ PORT
+ LAYER pwell ;
+ RECT 6.125000 5.355000 6.295000 5.525000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 25.030000 4.135000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nand2/sky130_fd_sc_hdll__nand2_1.magic.lef b/cells/nand2/sky130_fd_sc_hdll__nand2_1.magic.lef
index e96e785..54a3c6a 100644
--- a/cells/nand2/sky130_fd_sc_hdll__nand2_1.magic.lef
+++ b/cells/nand2/sky130_fd_sc_hdll__nand2_1.magic.lef
@@ -48,18 +48,6 @@
RECT 0.095000 1.055000 0.430000 1.325000 ;
END
END B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.140000 -0.085000 0.310000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.030000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.491500 ;
DIRECTION OUTPUT ;
@@ -79,6 +67,22 @@
RECT 0.000000 -0.240000 1.840000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.140000 -0.085000 0.310000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.030000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nand2/sky130_fd_sc_hdll__nand2_12.magic.lef b/cells/nand2/sky130_fd_sc_hdll__nand2_12.magic.lef
index f4d9e17..8d6a0f9 100644
--- a/cells/nand2/sky130_fd_sc_hdll__nand2_12.magic.lef
+++ b/cells/nand2/sky130_fd_sc_hdll__nand2_12.magic.lef
@@ -48,18 +48,6 @@
RECT 0.335000 1.055000 5.765000 1.325000 ;
END
END B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 12.150000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 4.858000 ;
DIRECTION OUTPUT ;
@@ -95,6 +83,22 @@
RECT 0.000000 -0.240000 11.960000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 12.150000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nand2/sky130_fd_sc_hdll__nand2_16.magic.lef b/cells/nand2/sky130_fd_sc_hdll__nand2_16.magic.lef
index 3286f03..74ccd24 100644
--- a/cells/nand2/sky130_fd_sc_hdll__nand2_16.magic.lef
+++ b/cells/nand2/sky130_fd_sc_hdll__nand2_16.magic.lef
@@ -48,18 +48,6 @@
RECT 0.395000 1.055000 7.525000 1.325000 ;
END
END B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 15.830000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 6.499000 ;
DIRECTION OUTPUT ;
@@ -99,6 +87,22 @@
RECT 0.000000 -0.240000 15.640000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 15.830000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nand2/sky130_fd_sc_hdll__nand2_2.magic.lef b/cells/nand2/sky130_fd_sc_hdll__nand2_2.magic.lef
index ec88843..5930997 100644
--- a/cells/nand2/sky130_fd_sc_hdll__nand2_2.magic.lef
+++ b/cells/nand2/sky130_fd_sc_hdll__nand2_2.magic.lef
@@ -48,18 +48,6 @@
RECT 0.085000 1.075000 0.895000 1.325000 ;
END
END B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.950000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.820500 ;
DIRECTION OUTPUT ;
@@ -81,6 +69,22 @@
RECT 0.000000 -0.240000 2.760000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.950000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nand2/sky130_fd_sc_hdll__nand2_4.magic.lef b/cells/nand2/sky130_fd_sc_hdll__nand2_4.magic.lef
index 75cd6a9..840630d 100644
--- a/cells/nand2/sky130_fd_sc_hdll__nand2_4.magic.lef
+++ b/cells/nand2/sky130_fd_sc_hdll__nand2_4.magic.lef
@@ -48,18 +48,6 @@
RECT 0.110000 1.075000 1.880000 1.325000 ;
END
END B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.790000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 1.608500 ;
DIRECTION OUTPUT ;
@@ -83,6 +71,22 @@
RECT 0.000000 -0.240000 4.600000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.790000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nand2/sky130_fd_sc_hdll__nand2_6.magic.lef b/cells/nand2/sky130_fd_sc_hdll__nand2_6.magic.lef
index c812e55..97db39e 100644
--- a/cells/nand2/sky130_fd_sc_hdll__nand2_6.magic.lef
+++ b/cells/nand2/sky130_fd_sc_hdll__nand2_6.magic.lef
@@ -48,18 +48,6 @@
RECT 0.395000 1.055000 2.765000 1.325000 ;
END
END B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 6.630000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 2.429000 ;
DIRECTION OUTPUT ;
@@ -88,6 +76,22 @@
RECT 0.000000 -0.240000 6.440000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 6.630000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nand2/sky130_fd_sc_hdll__nand2_8.magic.lef b/cells/nand2/sky130_fd_sc_hdll__nand2_8.magic.lef
index 914cdc2..4ec2064 100644
--- a/cells/nand2/sky130_fd_sc_hdll__nand2_8.magic.lef
+++ b/cells/nand2/sky130_fd_sc_hdll__nand2_8.magic.lef
@@ -48,18 +48,6 @@
RECT 0.510000 1.075000 3.715000 1.295000 ;
END
END B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 8.470000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 3.184500 ;
DIRECTION OUTPUT ;
@@ -89,6 +77,22 @@
RECT 0.000000 -0.240000 8.280000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 8.470000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nand2b/sky130_fd_sc_hdll__nand2b_1.magic.lef b/cells/nand2b/sky130_fd_sc_hdll__nand2b_1.magic.lef
index 3333362..644d889 100644
--- a/cells/nand2b/sky130_fd_sc_hdll__nand2b_1.magic.lef
+++ b/cells/nand2b/sky130_fd_sc_hdll__nand2b_1.magic.lef
@@ -48,18 +48,6 @@
RECT 0.590000 1.075000 1.185000 1.315000 ;
END
END B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.490000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.491500 ;
DIRECTION OUTPUT ;
@@ -80,6 +68,22 @@
RECT 0.000000 -0.240000 2.300000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.490000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nand2b/sky130_fd_sc_hdll__nand2b_2.magic.lef b/cells/nand2b/sky130_fd_sc_hdll__nand2b_2.magic.lef
index d3dd84c..07893ca 100644
--- a/cells/nand2b/sky130_fd_sc_hdll__nand2b_2.magic.lef
+++ b/cells/nand2b/sky130_fd_sc_hdll__nand2b_2.magic.lef
@@ -49,18 +49,6 @@
RECT 2.905000 1.275000 3.095000 1.655000 ;
END
END B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.410000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.825500 ;
DIRECTION OUTPUT ;
@@ -82,6 +70,22 @@
RECT 0.000000 -0.240000 3.220000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.410000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nand2b/sky130_fd_sc_hdll__nand2b_4.magic.lef b/cells/nand2b/sky130_fd_sc_hdll__nand2b_4.magic.lef
index 76697e7..3a8b8da 100644
--- a/cells/nand2b/sky130_fd_sc_hdll__nand2b_4.magic.lef
+++ b/cells/nand2b/sky130_fd_sc_hdll__nand2b_4.magic.lef
@@ -48,18 +48,6 @@
RECT 3.405000 1.075000 5.390000 1.275000 ;
END
END B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 5.710000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 1.576000 ;
DIRECTION OUTPUT ;
@@ -83,6 +71,22 @@
RECT 0.000000 -0.240000 5.520000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 5.710000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nand3/sky130_fd_sc_hdll__nand3_1.magic.lef b/cells/nand3/sky130_fd_sc_hdll__nand3_1.magic.lef
index 3d28d99..3cfbf7e 100644
--- a/cells/nand3/sky130_fd_sc_hdll__nand3_1.magic.lef
+++ b/cells/nand3/sky130_fd_sc_hdll__nand3_1.magic.lef
@@ -57,18 +57,6 @@
RECT 0.110000 0.745000 0.330000 1.325000 ;
END
END C
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.490000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.761500 ;
DIRECTION OUTPUT ;
@@ -91,6 +79,22 @@
RECT 0.000000 -0.240000 2.300000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.490000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nand3/sky130_fd_sc_hdll__nand3_2.magic.lef b/cells/nand3/sky130_fd_sc_hdll__nand3_2.magic.lef
index e8c1cc0..19fbe42 100644
--- a/cells/nand3/sky130_fd_sc_hdll__nand3_2.magic.lef
+++ b/cells/nand3/sky130_fd_sc_hdll__nand3_2.magic.lef
@@ -57,18 +57,6 @@
RECT 2.785000 1.075000 4.000000 1.275000 ;
END
END C
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.330000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 1.078000 ;
DIRECTION OUTPUT ;
@@ -90,6 +78,22 @@
RECT 0.000000 -0.240000 4.140000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.330000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nand3/sky130_fd_sc_hdll__nand3_4.magic.lef b/cells/nand3/sky130_fd_sc_hdll__nand3_4.magic.lef
index 5b4feb7..7e232de 100644
--- a/cells/nand3/sky130_fd_sc_hdll__nand3_4.magic.lef
+++ b/cells/nand3/sky130_fd_sc_hdll__nand3_4.magic.lef
@@ -57,18 +57,6 @@
RECT 0.110000 1.075000 1.850000 1.275000 ;
END
END C
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 7.090000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 2.156000 ;
DIRECTION OUTPUT ;
@@ -94,6 +82,22 @@
RECT 0.000000 -0.240000 6.900000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 7.090000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nand3b/sky130_fd_sc_hdll__nand3b_1.magic.lef b/cells/nand3b/sky130_fd_sc_hdll__nand3b_1.magic.lef
index cdf664c..071fba1 100644
--- a/cells/nand3b/sky130_fd_sc_hdll__nand3b_1.magic.lef
+++ b/cells/nand3b/sky130_fd_sc_hdll__nand3b_1.magic.lef
@@ -57,18 +57,6 @@
RECT 1.015000 0.995000 1.335000 1.325000 ;
END
END C
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.950000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.775250 ;
DIRECTION OUTPUT ;
@@ -90,6 +78,22 @@
RECT 0.000000 -0.240000 2.760000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.950000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nand3b/sky130_fd_sc_hdll__nand3b_2.magic.lef b/cells/nand3b/sky130_fd_sc_hdll__nand3b_2.magic.lef
index a26b2c5..067d10f 100644
--- a/cells/nand3b/sky130_fd_sc_hdll__nand3b_2.magic.lef
+++ b/cells/nand3b/sky130_fd_sc_hdll__nand3b_2.magic.lef
@@ -57,18 +57,6 @@
RECT 1.065000 1.075000 1.890000 1.275000 ;
END
END C
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.790000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 1.110500 ;
DIRECTION OUTPUT ;
@@ -93,6 +81,22 @@
RECT 0.000000 -0.240000 4.600000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.790000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.magic.lef b/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.magic.lef
index c20a246..96e98fe 100644
--- a/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.magic.lef
+++ b/cells/nand3b/sky130_fd_sc_hdll__nand3b_4.magic.lef
@@ -57,18 +57,6 @@
RECT 5.185000 1.075000 7.100000 1.275000 ;
END
END C
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 8.010000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 2.156000 ;
DIRECTION OUTPUT ;
@@ -96,6 +84,22 @@
RECT 0.000000 -0.240000 7.820000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 8.010000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nand4/sky130_fd_sc_hdll__nand4_1.magic.lef b/cells/nand4/sky130_fd_sc_hdll__nand4_1.magic.lef
index 420bb37..55eac92 100644
--- a/cells/nand4/sky130_fd_sc_hdll__nand4_1.magic.lef
+++ b/cells/nand4/sky130_fd_sc_hdll__nand4_1.magic.lef
@@ -69,18 +69,6 @@
RECT 0.110000 0.995000 0.395000 1.325000 ;
END
END D
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.950000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.867500 ;
DIRECTION OUTPUT ;
@@ -102,6 +90,22 @@
RECT 0.000000 -0.240000 2.760000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.950000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nand4/sky130_fd_sc_hdll__nand4_2.magic.lef b/cells/nand4/sky130_fd_sc_hdll__nand4_2.magic.lef
index 519dcaa..8ba8452 100644
--- a/cells/nand4/sky130_fd_sc_hdll__nand4_2.magic.lef
+++ b/cells/nand4/sky130_fd_sc_hdll__nand4_2.magic.lef
@@ -66,18 +66,6 @@
RECT 0.110000 1.075000 0.895000 1.275000 ;
END
END D
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 5.250000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 1.368000 ;
DIRECTION OUTPUT ;
@@ -101,6 +89,22 @@
RECT 0.000000 -0.240000 5.060000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 5.250000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nand4/sky130_fd_sc_hdll__nand4_4.magic.lef b/cells/nand4/sky130_fd_sc_hdll__nand4_4.magic.lef
index 7152a7e..88bba5a 100644
--- a/cells/nand4/sky130_fd_sc_hdll__nand4_4.magic.lef
+++ b/cells/nand4/sky130_fd_sc_hdll__nand4_4.magic.lef
@@ -66,18 +66,6 @@
RECT 0.105000 1.075000 1.835000 1.275000 ;
END
END D
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 8.925000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 2.736000 ;
DIRECTION OUTPUT ;
@@ -105,6 +93,22 @@
RECT 0.000000 -0.240000 8.740000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 8.925000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nand4b/sky130_fd_sc_hdll__nand4b_1.magic.lef b/cells/nand4b/sky130_fd_sc_hdll__nand4b_1.magic.lef
index 26a769e..6a53798 100644
--- a/cells/nand4b/sky130_fd_sc_hdll__nand4b_1.magic.lef
+++ b/cells/nand4b/sky130_fd_sc_hdll__nand4b_1.magic.lef
@@ -67,18 +67,6 @@
RECT 1.010000 0.995000 1.330000 1.325000 ;
END
END D
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.410000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.882500 ;
DIRECTION OUTPUT ;
@@ -100,6 +88,22 @@
RECT 0.000000 -0.240000 3.220000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.410000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nand4b/sky130_fd_sc_hdll__nand4b_2.magic.lef b/cells/nand4b/sky130_fd_sc_hdll__nand4b_2.magic.lef
index 6082688..8bc948b 100644
--- a/cells/nand4b/sky130_fd_sc_hdll__nand4b_2.magic.lef
+++ b/cells/nand4b/sky130_fd_sc_hdll__nand4b_2.magic.lef
@@ -66,18 +66,6 @@
RECT 5.020000 1.075000 5.885000 1.275000 ;
END
END D
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 6.170000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 1.368000 ;
DIRECTION OUTPUT ;
@@ -100,6 +88,22 @@
RECT 0.000000 -0.240000 5.980000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 6.170000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.magic.lef b/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.magic.lef
index 8507ad8..aa967d5 100644
--- a/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.magic.lef
+++ b/cells/nand4b/sky130_fd_sc_hdll__nand4b_4.magic.lef
@@ -66,18 +66,6 @@
RECT 7.665000 1.075000 9.505000 1.275000 ;
END
END D
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 9.850000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 2.736000 ;
DIRECTION OUTPUT ;
@@ -105,6 +93,22 @@
RECT 0.000000 -0.240000 9.660000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 9.850000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_1.magic.lef b/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_1.magic.lef
index 3aeb62a..83bdaab 100644
--- a/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_1.magic.lef
+++ b/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_1.magic.lef
@@ -66,18 +66,6 @@
RECT 0.995000 1.075000 1.325000 1.325000 ;
END
END D
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.330000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.901500 ;
DIRECTION OUTPUT ;
@@ -100,6 +88,22 @@
RECT 0.000000 -0.240000 4.140000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.330000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.magic.lef b/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.magic.lef
index 8496c46..12b25a8 100644
--- a/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.magic.lef
+++ b/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_2.magic.lef
@@ -66,18 +66,6 @@
RECT 5.315000 1.075000 6.295000 1.275000 ;
END
END D
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 6.630000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 1.368000 ;
DIRECTION OUTPUT ;
@@ -101,6 +89,22 @@
RECT 0.000000 -0.240000 6.440000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 6.630000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.magic.lef b/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.magic.lef
index 10c873a..23b6a8b 100644
--- a/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.magic.lef
+++ b/cells/nand4bb/sky130_fd_sc_hdll__nand4bb_4.magic.lef
@@ -66,18 +66,6 @@
RECT 8.395000 1.075000 10.340000 1.275000 ;
END
END D
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 10.770000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 2.736000 ;
DIRECTION OUTPUT ;
@@ -105,6 +93,22 @@
RECT 0.000000 -0.240000 10.580000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 10.770000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nor2/sky130_fd_sc_hdll__nor2_1.magic.lef b/cells/nor2/sky130_fd_sc_hdll__nor2_1.magic.lef
index 712f118..b7e7738 100644
--- a/cells/nor2/sky130_fd_sc_hdll__nor2_1.magic.lef
+++ b/cells/nor2/sky130_fd_sc_hdll__nor2_1.magic.lef
@@ -48,18 +48,6 @@
RECT 0.085000 1.075000 0.435000 1.325000 ;
END
END B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.030000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.445500 ;
DIRECTION OUTPUT ;
@@ -80,6 +68,22 @@
RECT 0.000000 -0.240000 1.840000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.030000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nor2/sky130_fd_sc_hdll__nor2_2.magic.lef b/cells/nor2/sky130_fd_sc_hdll__nor2_2.magic.lef
index 2292951..27f7b16 100644
--- a/cells/nor2/sky130_fd_sc_hdll__nor2_2.magic.lef
+++ b/cells/nor2/sky130_fd_sc_hdll__nor2_2.magic.lef
@@ -48,18 +48,6 @@
RECT 1.030000 1.075000 1.900000 1.275000 ;
END
END B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.950000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.771000 ;
DIRECTION OUTPUT ;
@@ -83,6 +71,22 @@
RECT 0.000000 -0.240000 2.760000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.950000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nor2/sky130_fd_sc_hdll__nor2_4.magic.lef b/cells/nor2/sky130_fd_sc_hdll__nor2_4.magic.lef
index ee57001..dc61d59 100644
--- a/cells/nor2/sky130_fd_sc_hdll__nor2_4.magic.lef
+++ b/cells/nor2/sky130_fd_sc_hdll__nor2_4.magic.lef
@@ -48,18 +48,6 @@
RECT 2.320000 1.075000 3.835000 1.275000 ;
END
END B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.790000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 1.477000 ;
DIRECTION OUTPUT ;
@@ -85,6 +73,22 @@
RECT 0.000000 -0.240000 4.600000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.790000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nor2/sky130_fd_sc_hdll__nor2_8.magic.lef b/cells/nor2/sky130_fd_sc_hdll__nor2_8.magic.lef
index 7ab8a26..e2defa6 100644
--- a/cells/nor2/sky130_fd_sc_hdll__nor2_8.magic.lef
+++ b/cells/nor2/sky130_fd_sc_hdll__nor2_8.magic.lef
@@ -48,18 +48,6 @@
RECT 4.200000 1.075000 7.290000 1.275000 ;
END
END B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 8.470000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 2.889000 ;
DIRECTION OUTPUT ;
@@ -91,6 +79,22 @@
RECT 0.000000 -0.240000 8.280000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 8.470000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nor2b/sky130_fd_sc_hdll__nor2b_1.magic.lef b/cells/nor2b/sky130_fd_sc_hdll__nor2b_1.magic.lef
index c6bc2ab..8fae4fc 100644
--- a/cells/nor2b/sky130_fd_sc_hdll__nor2b_1.magic.lef
+++ b/cells/nor2b/sky130_fd_sc_hdll__nor2b_1.magic.lef
@@ -48,18 +48,6 @@
RECT 0.515000 0.975000 0.785000 1.745000 ;
END
END B_N
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.490000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.445500 ;
DIRECTION OUTPUT ;
@@ -80,6 +68,22 @@
RECT 0.000000 -0.240000 2.300000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.490000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nor2b/sky130_fd_sc_hdll__nor2b_2.magic.lef b/cells/nor2b/sky130_fd_sc_hdll__nor2b_2.magic.lef
index c3a2eca..f2b34eb 100644
--- a/cells/nor2b/sky130_fd_sc_hdll__nor2b_2.magic.lef
+++ b/cells/nor2b/sky130_fd_sc_hdll__nor2b_2.magic.lef
@@ -49,18 +49,6 @@
RECT 3.270000 1.275000 3.535000 1.965000 ;
END
END B_N
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.870000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.738500 ;
DIRECTION OUTPUT ;
@@ -81,6 +69,22 @@
RECT 0.000000 -0.240000 3.680000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.870000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nor2b/sky130_fd_sc_hdll__nor2b_4.magic.lef b/cells/nor2b/sky130_fd_sc_hdll__nor2b_4.magic.lef
index 9dd85c4..adfc99e 100644
--- a/cells/nor2b/sky130_fd_sc_hdll__nor2b_4.magic.lef
+++ b/cells/nor2b/sky130_fd_sc_hdll__nor2b_4.magic.lef
@@ -48,18 +48,6 @@
RECT 4.925000 1.075000 5.425000 1.320000 ;
END
END B_N
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 5.710000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 1.444500 ;
DIRECTION OUTPUT ;
@@ -85,6 +73,22 @@
RECT 0.000000 -0.240000 5.520000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 5.710000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nor3/sky130_fd_sc_hdll__nor3_1.magic.lef b/cells/nor3/sky130_fd_sc_hdll__nor3_1.magic.lef
index b79653a..012a80a 100644
--- a/cells/nor3/sky130_fd_sc_hdll__nor3_1.magic.lef
+++ b/cells/nor3/sky130_fd_sc_hdll__nor3_1.magic.lef
@@ -58,18 +58,6 @@
RECT 0.090000 0.995000 0.425000 1.325000 ;
END
END C
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.490000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.647000 ;
DIRECTION OUTPUT ;
@@ -92,6 +80,22 @@
RECT 0.000000 -0.240000 2.300000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.490000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nor3/sky130_fd_sc_hdll__nor3_2.magic.lef b/cells/nor3/sky130_fd_sc_hdll__nor3_2.magic.lef
index a5d58b8..869e21c 100644
--- a/cells/nor3/sky130_fd_sc_hdll__nor3_2.magic.lef
+++ b/cells/nor3/sky130_fd_sc_hdll__nor3_2.magic.lef
@@ -58,18 +58,6 @@
RECT 2.445000 1.285000 2.935000 1.625000 ;
END
END C
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.330000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 1.011500 ;
DIRECTION OUTPUT ;
@@ -93,6 +81,22 @@
RECT 0.000000 -0.240000 4.140000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.330000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nor3/sky130_fd_sc_hdll__nor3_4.magic.lef b/cells/nor3/sky130_fd_sc_hdll__nor3_4.magic.lef
index b74190d..87c8771 100644
--- a/cells/nor3/sky130_fd_sc_hdll__nor3_4.magic.lef
+++ b/cells/nor3/sky130_fd_sc_hdll__nor3_4.magic.lef
@@ -61,18 +61,6 @@
RECT 4.255000 1.075000 5.315000 1.275000 ;
END
END C
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 6.630000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 1.828000 ;
DIRECTION OUTPUT ;
@@ -101,6 +89,22 @@
RECT 0.000000 -0.240000 6.440000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 6.630000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nor3b/sky130_fd_sc_hdll__nor3b_1.magic.lef b/cells/nor3b/sky130_fd_sc_hdll__nor3b_1.magic.lef
index 727bcfd..132f3c4 100644
--- a/cells/nor3b/sky130_fd_sc_hdll__nor3b_1.magic.lef
+++ b/cells/nor3b/sky130_fd_sc_hdll__nor3b_1.magic.lef
@@ -57,18 +57,6 @@
RECT 1.985000 0.995000 2.335000 1.615000 ;
END
END C_N
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.950000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.759000 ;
DIRECTION OUTPUT ;
@@ -90,6 +78,22 @@
RECT 0.000000 -0.240000 2.760000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.950000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nor3b/sky130_fd_sc_hdll__nor3b_2.magic.lef b/cells/nor3b/sky130_fd_sc_hdll__nor3b_2.magic.lef
index e042205..8445dec 100644
--- a/cells/nor3b/sky130_fd_sc_hdll__nor3b_2.magic.lef
+++ b/cells/nor3b/sky130_fd_sc_hdll__nor3b_2.magic.lef
@@ -57,18 +57,6 @@
RECT 4.330000 1.075000 4.915000 1.285000 ;
END
END C_N
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 5.250000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.979000 ;
DIRECTION OUTPUT ;
@@ -90,6 +78,22 @@
RECT 0.000000 -0.240000 5.060000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 5.250000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.magic.lef b/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.magic.lef
index 0a98cd2..9d8bea5 100644
--- a/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.magic.lef
+++ b/cells/nor3b/sky130_fd_sc_hdll__nor3b_4.magic.lef
@@ -57,18 +57,6 @@
RECT 0.110000 1.075000 0.445000 1.285000 ;
END
END C_N
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 7.550000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 1.925500 ;
DIRECTION OUTPUT ;
@@ -96,6 +84,22 @@
RECT 0.000000 -0.240000 7.360000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 7.550000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nor4/sky130_fd_sc_hdll__nor4_1.magic.lef b/cells/nor4/sky130_fd_sc_hdll__nor4_1.magic.lef
index 3de188f..0898f1e 100644
--- a/cells/nor4/sky130_fd_sc_hdll__nor4_1.magic.lef
+++ b/cells/nor4/sky130_fd_sc_hdll__nor4_1.magic.lef
@@ -66,18 +66,6 @@
RECT 0.085000 0.745000 0.335000 1.325000 ;
END
END D
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.950000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.699000 ;
DIRECTION OUTPUT ;
@@ -100,6 +88,22 @@
RECT 0.000000 -0.240000 2.760000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.950000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nor4/sky130_fd_sc_hdll__nor4_2.magic.lef b/cells/nor4/sky130_fd_sc_hdll__nor4_2.magic.lef
index 981ed58..801f2a3 100644
--- a/cells/nor4/sky130_fd_sc_hdll__nor4_2.magic.lef
+++ b/cells/nor4/sky130_fd_sc_hdll__nor4_2.magic.lef
@@ -66,18 +66,6 @@
RECT 3.640000 1.075000 4.275000 1.285000 ;
END
END D
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 5.250000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 1.252000 ;
DIRECTION OUTPUT ;
@@ -102,6 +90,22 @@
RECT 0.000000 -0.240000 5.060000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 5.250000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nor4/sky130_fd_sc_hdll__nor4_4.magic.lef b/cells/nor4/sky130_fd_sc_hdll__nor4_4.magic.lef
index 0b799a6..5fdab76 100644
--- a/cells/nor4/sky130_fd_sc_hdll__nor4_4.magic.lef
+++ b/cells/nor4/sky130_fd_sc_hdll__nor4_4.magic.lef
@@ -66,18 +66,6 @@
RECT 6.475000 1.075000 8.045000 1.285000 ;
END
END D
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 8.930000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 2.374000 ;
DIRECTION OUTPUT ;
@@ -107,6 +95,22 @@
RECT 0.000000 -0.240000 8.740000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 8.930000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nor4/sky130_fd_sc_hdll__nor4_6.magic.lef b/cells/nor4/sky130_fd_sc_hdll__nor4_6.magic.lef
index 3854b0e..6085f8a 100644
--- a/cells/nor4/sky130_fd_sc_hdll__nor4_6.magic.lef
+++ b/cells/nor4/sky130_fd_sc_hdll__nor4_6.magic.lef
@@ -66,18 +66,6 @@
RECT 9.395000 1.075000 11.085000 1.285000 ;
END
END D
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 12.610000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 2.976000 ;
DIRECTION OUTPUT ;
@@ -112,6 +100,22 @@
RECT 0.000000 -0.240000 12.420000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 12.610000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nor4/sky130_fd_sc_hdll__nor4_8.magic.lef b/cells/nor4/sky130_fd_sc_hdll__nor4_8.magic.lef
index 1d0a817..f3aa645 100644
--- a/cells/nor4/sky130_fd_sc_hdll__nor4_8.magic.lef
+++ b/cells/nor4/sky130_fd_sc_hdll__nor4_8.magic.lef
@@ -66,18 +66,6 @@
RECT 12.985000 1.075000 15.355000 1.285000 ;
END
END D
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 16.290000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 3.968000 ;
DIRECTION OUTPUT ;
@@ -117,6 +105,22 @@
RECT 0.000000 -0.240000 16.100000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 16.290000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nor4b/sky130_fd_sc_hdll__nor4b_1.magic.lef b/cells/nor4b/sky130_fd_sc_hdll__nor4b_1.magic.lef
index 223c88a..c3b4951 100644
--- a/cells/nor4b/sky130_fd_sc_hdll__nor4b_1.magic.lef
+++ b/cells/nor4b/sky130_fd_sc_hdll__nor4b_1.magic.lef
@@ -66,18 +66,6 @@
RECT 2.825000 0.995000 3.225000 1.615000 ;
END
END D_N
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.870000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.913500 ;
DIRECTION OUTPUT ;
@@ -98,6 +86,22 @@
RECT 0.000000 -0.240000 3.680000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.870000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nor4b/sky130_fd_sc_hdll__nor4b_2.magic.lef b/cells/nor4b/sky130_fd_sc_hdll__nor4b_2.magic.lef
index efc31cd..a15c8c6 100644
--- a/cells/nor4b/sky130_fd_sc_hdll__nor4b_2.magic.lef
+++ b/cells/nor4b/sky130_fd_sc_hdll__nor4b_2.magic.lef
@@ -67,18 +67,6 @@
RECT 5.615000 1.285000 5.885000 1.955000 ;
END
END D_N
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 6.170000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 1.219500 ;
DIRECTION OUTPUT ;
@@ -104,6 +92,22 @@
RECT 0.000000 -0.240000 5.980000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 6.170000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.magic.lef b/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.magic.lef
index 82a1a4f..8d2d2af 100644
--- a/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.magic.lef
+++ b/cells/nor4b/sky130_fd_sc_hdll__nor4b_4.magic.lef
@@ -66,18 +66,6 @@
RECT 8.855000 1.075000 9.550000 1.285000 ;
END
END D_N
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 9.850000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 2.341500 ;
DIRECTION OUTPUT ;
@@ -107,6 +95,22 @@
RECT 0.000000 -0.240000 9.660000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 9.850000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_1.magic.lef b/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_1.magic.lef
index e7e70f4..c626331 100644
--- a/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_1.magic.lef
+++ b/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_1.magic.lef
@@ -66,18 +66,6 @@
RECT 1.000000 0.995000 1.340000 1.325000 ;
END
END D_N
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.330000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.660000 ;
DIRECTION OUTPUT ;
@@ -99,6 +87,22 @@
RECT 0.000000 -0.240000 4.140000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.330000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.magic.lef b/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.magic.lef
index b23c0bd..e2fa092 100644
--- a/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.magic.lef
+++ b/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_2.magic.lef
@@ -66,18 +66,6 @@
RECT 0.425000 0.995000 0.830000 1.695000 ;
END
END D_N
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 6.630000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 1.219500 ;
DIRECTION OUTPUT ;
@@ -101,6 +89,22 @@
RECT 0.000000 -0.240000 6.440000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 6.630000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.magic.lef b/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.magic.lef
index 3d3d0a9..870853f 100644
--- a/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.magic.lef
+++ b/cells/nor4bb/sky130_fd_sc_hdll__nor4bb_4.magic.lef
@@ -66,18 +66,6 @@
RECT 1.005000 1.075000 1.395000 1.325000 ;
END
END D_N
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 10.310000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 2.374000 ;
DIRECTION OUTPUT ;
@@ -105,6 +93,22 @@
RECT 0.000000 -0.240000 10.120000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 10.310000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o211a/sky130_fd_sc_hdll__o211a_1.magic.lef b/cells/o211a/sky130_fd_sc_hdll__o211a_1.magic.lef
index e27ae99..08bb19a 100644
--- a/cells/o211a/sky130_fd_sc_hdll__o211a_1.magic.lef
+++ b/cells/o211a/sky130_fd_sc_hdll__o211a_1.magic.lef
@@ -67,18 +67,6 @@
RECT 3.640000 1.075000 4.005000 1.325000 ;
END
END C1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.330000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.439000 ;
DIRECTION OUTPUT ;
@@ -98,6 +86,22 @@
RECT 0.000000 -0.240000 4.140000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.330000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o211a/sky130_fd_sc_hdll__o211a_2.magic.lef b/cells/o211a/sky130_fd_sc_hdll__o211a_2.magic.lef
index 646c24c..977ea7e 100644
--- a/cells/o211a/sky130_fd_sc_hdll__o211a_2.magic.lef
+++ b/cells/o211a/sky130_fd_sc_hdll__o211a_2.magic.lef
@@ -66,18 +66,6 @@
RECT 0.085000 0.995000 0.360000 1.325000 ;
END
END C1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.330000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.534000 ;
DIRECTION OUTPUT ;
@@ -99,6 +87,22 @@
RECT 0.000000 -0.240000 4.140000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.330000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o211a/sky130_fd_sc_hdll__o211a_4.magic.lef b/cells/o211a/sky130_fd_sc_hdll__o211a_4.magic.lef
index c12a4d4..aebfc07 100644
--- a/cells/o211a/sky130_fd_sc_hdll__o211a_4.magic.lef
+++ b/cells/o211a/sky130_fd_sc_hdll__o211a_4.magic.lef
@@ -70,18 +70,6 @@
RECT 3.255000 1.035000 4.090000 1.275000 ;
END
END C1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 7.090000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 1.016000 ;
DIRECTION OUTPUT ;
@@ -106,6 +94,22 @@
RECT 0.000000 -0.240000 6.900000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 7.090000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o211ai/sky130_fd_sc_hdll__o211ai_1.magic.lef b/cells/o211ai/sky130_fd_sc_hdll__o211ai_1.magic.lef
index 4183337..4d3d7a5 100644
--- a/cells/o211ai/sky130_fd_sc_hdll__o211ai_1.magic.lef
+++ b/cells/o211ai/sky130_fd_sc_hdll__o211ai_1.magic.lef
@@ -68,18 +68,6 @@
RECT 1.915000 1.020000 2.270000 1.615000 ;
END
END C1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.950000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 1.297000 ;
DIRECTION OUTPUT ;
@@ -102,6 +90,22 @@
RECT 0.000000 -0.240000 2.760000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.950000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o211ai/sky130_fd_sc_hdll__o211ai_2.magic.lef b/cells/o211ai/sky130_fd_sc_hdll__o211ai_2.magic.lef
index ebdf0d4..de91b98 100644
--- a/cells/o211ai/sky130_fd_sc_hdll__o211ai_2.magic.lef
+++ b/cells/o211ai/sky130_fd_sc_hdll__o211ai_2.magic.lef
@@ -67,18 +67,6 @@
RECT 0.085000 0.995000 0.375000 1.970000 ;
END
END C1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 5.250000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 1.114500 ;
DIRECTION OUTPUT ;
@@ -100,6 +88,22 @@
RECT 0.000000 -0.240000 5.060000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 5.250000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.magic.lef b/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.magic.lef
index e63c7cc..dbc5a30 100644
--- a/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.magic.lef
+++ b/cells/o211ai/sky130_fd_sc_hdll__o211ai_4.magic.lef
@@ -72,18 +72,6 @@
RECT 5.970000 1.075000 7.140000 1.345000 ;
END
END C1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 8.930000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 2.218500 ;
DIRECTION OUTPUT ;
@@ -108,6 +96,22 @@
RECT 0.000000 -0.240000 8.740000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 8.930000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o21a/sky130_fd_sc_hdll__o21a_1.magic.lef b/cells/o21a/sky130_fd_sc_hdll__o21a_1.magic.lef
index e41f1e9..d63391b 100644
--- a/cells/o21a/sky130_fd_sc_hdll__o21a_1.magic.lef
+++ b/cells/o21a/sky130_fd_sc_hdll__o21a_1.magic.lef
@@ -58,18 +58,6 @@
RECT 1.055000 1.075000 1.555000 1.305000 ;
END
END B1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.410000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.472000 ;
DIRECTION OUTPUT ;
@@ -88,6 +76,22 @@
RECT 0.000000 -0.240000 3.220000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.410000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o21a/sky130_fd_sc_hdll__o21a_2.magic.lef b/cells/o21a/sky130_fd_sc_hdll__o21a_2.magic.lef
index 212fe45..6549e4e 100644
--- a/cells/o21a/sky130_fd_sc_hdll__o21a_2.magic.lef
+++ b/cells/o21a/sky130_fd_sc_hdll__o21a_2.magic.lef
@@ -58,18 +58,6 @@
RECT 1.525000 1.010000 1.955000 1.615000 ;
END
END B1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.870000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.506250 ;
DIRECTION OUTPUT ;
@@ -87,6 +75,22 @@
RECT 0.000000 -0.240000 3.680000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.870000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o21a/sky130_fd_sc_hdll__o21a_4.magic.lef b/cells/o21a/sky130_fd_sc_hdll__o21a_4.magic.lef
index 7e1bbfe..3154ecc 100644
--- a/cells/o21a/sky130_fd_sc_hdll__o21a_4.magic.lef
+++ b/cells/o21a/sky130_fd_sc_hdll__o21a_4.magic.lef
@@ -59,18 +59,6 @@
RECT 2.735000 1.075000 3.485000 1.615000 ;
END
END B1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 6.170000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 1.029000 ;
DIRECTION OUTPUT ;
@@ -93,6 +81,22 @@
RECT 0.000000 -0.240000 5.980000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 6.170000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o21ai/sky130_fd_sc_hdll__o21ai_1.magic.lef b/cells/o21ai/sky130_fd_sc_hdll__o21ai_1.magic.lef
index 6c63b11..709dd40 100644
--- a/cells/o21ai/sky130_fd_sc_hdll__o21ai_1.magic.lef
+++ b/cells/o21ai/sky130_fd_sc_hdll__o21ai_1.magic.lef
@@ -58,18 +58,6 @@
RECT 1.655000 1.295000 2.215000 1.655000 ;
END
END B1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.490000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.752250 ;
DIRECTION OUTPUT ;
@@ -90,6 +78,22 @@
RECT 0.000000 -0.240000 2.300000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.490000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o21ai/sky130_fd_sc_hdll__o21ai_2.magic.lef b/cells/o21ai/sky130_fd_sc_hdll__o21ai_2.magic.lef
index d57c9c9..26374e4 100644
--- a/cells/o21ai/sky130_fd_sc_hdll__o21ai_2.magic.lef
+++ b/cells/o21ai/sky130_fd_sc_hdll__o21ai_2.magic.lef
@@ -59,18 +59,6 @@
RECT 3.280000 0.765000 3.570000 1.400000 ;
END
END B1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.140000 -0.085000 0.310000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.870000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.814500 ;
DIRECTION OUTPUT ;
@@ -91,6 +79,22 @@
RECT 0.000000 -0.240000 3.680000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.140000 -0.085000 0.310000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.870000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.magic.lef b/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.magic.lef
index 8d856fe..3f888cb 100644
--- a/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.magic.lef
+++ b/cells/o21ai/sky130_fd_sc_hdll__o21ai_4.magic.lef
@@ -60,18 +60,6 @@
RECT 4.305000 1.015000 5.600000 1.275000 ;
END
END B1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 6.630000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 1.661500 ;
DIRECTION OUTPUT ;
@@ -96,6 +84,22 @@
RECT 0.000000 -0.240000 6.440000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 6.630000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o21ba/sky130_fd_sc_hdll__o21ba_1.magic.lef b/cells/o21ba/sky130_fd_sc_hdll__o21ba_1.magic.lef
index 3be8a28..a958fec 100644
--- a/cells/o21ba/sky130_fd_sc_hdll__o21ba_1.magic.lef
+++ b/cells/o21ba/sky130_fd_sc_hdll__o21ba_1.magic.lef
@@ -57,18 +57,6 @@
RECT 1.030000 0.995000 1.380000 1.325000 ;
END
END B1_N
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.870000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.439000 ;
DIRECTION OUTPUT ;
@@ -88,6 +76,22 @@
RECT 0.000000 -0.240000 3.680000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.870000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o21ba/sky130_fd_sc_hdll__o21ba_2.magic.lef b/cells/o21ba/sky130_fd_sc_hdll__o21ba_2.magic.lef
index 5240da3..5a29f4e 100644
--- a/cells/o21ba/sky130_fd_sc_hdll__o21ba_2.magic.lef
+++ b/cells/o21ba/sky130_fd_sc_hdll__o21ba_2.magic.lef
@@ -58,18 +58,6 @@
RECT 0.605000 1.325000 0.825000 1.695000 ;
END
END B1_N
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.330000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.571750 ;
DIRECTION OUTPUT ;
@@ -89,6 +77,22 @@
RECT 0.000000 -0.240000 4.140000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.330000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.magic.lef b/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.magic.lef
index bdbb68b..0d1708b 100644
--- a/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.magic.lef
+++ b/cells/o21ba/sky130_fd_sc_hdll__o21ba_4.magic.lef
@@ -58,18 +58,6 @@
RECT 0.605000 1.285000 0.935000 1.705000 ;
END
END B1_N
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 6.630000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 1.028500 ;
DIRECTION OUTPUT ;
@@ -91,6 +79,22 @@
RECT 0.000000 -0.240000 6.440000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 6.630000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o21bai/sky130_fd_sc_hdll__o21bai_1.magic.lef b/cells/o21bai/sky130_fd_sc_hdll__o21bai_1.magic.lef
index 95ffa1c..360aaf2 100644
--- a/cells/o21bai/sky130_fd_sc_hdll__o21bai_1.magic.lef
+++ b/cells/o21bai/sky130_fd_sc_hdll__o21bai_1.magic.lef
@@ -58,18 +58,6 @@
RECT 0.085000 1.345000 0.355000 2.445000 ;
END
END B1_N
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.410000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.521500 ;
DIRECTION OUTPUT ;
@@ -89,6 +77,22 @@
RECT 0.000000 -0.240000 3.220000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.410000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o21bai/sky130_fd_sc_hdll__o21bai_2.magic.lef b/cells/o21bai/sky130_fd_sc_hdll__o21bai_2.magic.lef
index 5f219f3..89d28f3 100644
--- a/cells/o21bai/sky130_fd_sc_hdll__o21bai_2.magic.lef
+++ b/cells/o21bai/sky130_fd_sc_hdll__o21bai_2.magic.lef
@@ -57,18 +57,6 @@
RECT 0.085000 0.995000 0.480000 1.325000 ;
END
END B1_N
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.790000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.788000 ;
DIRECTION OUTPUT ;
@@ -89,6 +77,22 @@
RECT 0.000000 -0.240000 4.600000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.790000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.magic.lef b/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.magic.lef
index 4f565d7..99df61c 100644
--- a/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.magic.lef
+++ b/cells/o21bai/sky130_fd_sc_hdll__o21bai_4.magic.lef
@@ -57,18 +57,6 @@
RECT 0.085000 1.075000 0.510000 1.285000 ;
END
END B1_N
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 7.550000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 1.576000 ;
DIRECTION OUTPUT ;
@@ -94,6 +82,22 @@
RECT 0.000000 -0.240000 7.360000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 7.550000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o221a/sky130_fd_sc_hdll__o221a_1.magic.lef b/cells/o221a/sky130_fd_sc_hdll__o221a_1.magic.lef
index 0ada14e..d5dc150 100644
--- a/cells/o221a/sky130_fd_sc_hdll__o221a_1.magic.lef
+++ b/cells/o221a/sky130_fd_sc_hdll__o221a_1.magic.lef
@@ -76,18 +76,6 @@
RECT 0.085000 0.995000 0.415000 1.285000 ;
END
END C1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.330000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.504500 ;
DIRECTION OUTPUT ;
@@ -107,6 +95,22 @@
RECT 0.000000 -0.240000 4.140000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.330000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o221a/sky130_fd_sc_hdll__o221a_2.magic.lef b/cells/o221a/sky130_fd_sc_hdll__o221a_2.magic.lef
index 87cec04..6e86523 100644
--- a/cells/o221a/sky130_fd_sc_hdll__o221a_2.magic.lef
+++ b/cells/o221a/sky130_fd_sc_hdll__o221a_2.magic.lef
@@ -75,18 +75,6 @@
RECT 0.085000 0.975000 0.345000 1.325000 ;
END
END C1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.120000 -0.085000 0.290000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.790000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.530500 ;
DIRECTION OUTPUT ;
@@ -108,6 +96,22 @@
RECT 0.000000 -0.240000 4.600000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.120000 -0.085000 0.290000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.790000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o221a/sky130_fd_sc_hdll__o221a_4.magic.lef b/cells/o221a/sky130_fd_sc_hdll__o221a_4.magic.lef
index abe2abf..2231ca6 100644
--- a/cells/o221a/sky130_fd_sc_hdll__o221a_4.magic.lef
+++ b/cells/o221a/sky130_fd_sc_hdll__o221a_4.magic.lef
@@ -80,18 +80,6 @@
RECT 0.090000 1.075000 0.440000 1.275000 ;
END
END C1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 8.010000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 1.028500 ;
DIRECTION OUTPUT ;
@@ -118,6 +106,22 @@
RECT 0.000000 -0.240000 7.820000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 8.010000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o221ai/sky130_fd_sc_hdll__o221ai_1.magic.lef b/cells/o221ai/sky130_fd_sc_hdll__o221ai_1.magic.lef
index 903d680..6e62a04 100644
--- a/cells/o221ai/sky130_fd_sc_hdll__o221ai_1.magic.lef
+++ b/cells/o221ai/sky130_fd_sc_hdll__o221ai_1.magic.lef
@@ -78,18 +78,6 @@
RECT 0.085000 0.995000 0.465000 1.325000 ;
END
END C1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.870000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.974500 ;
DIRECTION OUTPUT ;
@@ -113,6 +101,22 @@
RECT 0.000000 -0.240000 3.680000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.870000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.magic.lef b/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.magic.lef
index de2b86e..afad7ad 100644
--- a/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.magic.lef
+++ b/cells/o221ai/sky130_fd_sc_hdll__o221ai_2.magic.lef
@@ -80,18 +80,6 @@
RECT 0.085000 1.075000 0.435000 1.275000 ;
END
END C1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 6.170000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 1.078000 ;
DIRECTION OUTPUT ;
@@ -115,6 +103,22 @@
RECT 0.000000 -0.240000 5.980000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 6.170000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.magic.lef b/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.magic.lef
index 9e181cd..0560737 100644
--- a/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.magic.lef
+++ b/cells/o221ai/sky130_fd_sc_hdll__o221ai_4.magic.lef
@@ -81,18 +81,6 @@
RECT 0.090000 1.075000 1.900000 1.275000 ;
END
END C1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 10.770000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 2.156000 ;
DIRECTION OUTPUT ;
@@ -117,6 +105,22 @@
RECT 0.000000 -0.240000 10.580000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 10.770000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o22a/sky130_fd_sc_hdll__o22a_1.magic.lef b/cells/o22a/sky130_fd_sc_hdll__o22a_1.magic.lef
index d0479e6..a930f12 100644
--- a/cells/o22a/sky130_fd_sc_hdll__o22a_1.magic.lef
+++ b/cells/o22a/sky130_fd_sc_hdll__o22a_1.magic.lef
@@ -67,18 +67,6 @@
RECT 1.730000 1.075000 2.155000 1.325000 ;
END
END B2
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.870000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.472000 ;
DIRECTION OUTPUT ;
@@ -96,6 +84,22 @@
RECT 0.000000 -0.240000 3.680000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.870000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o22a/sky130_fd_sc_hdll__o22a_2.magic.lef b/cells/o22a/sky130_fd_sc_hdll__o22a_2.magic.lef
index 92e332e..70fb0d8 100644
--- a/cells/o22a/sky130_fd_sc_hdll__o22a_2.magic.lef
+++ b/cells/o22a/sky130_fd_sc_hdll__o22a_2.magic.lef
@@ -67,18 +67,6 @@
RECT 2.110000 1.075000 2.625000 1.275000 ;
END
END B2
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.130000 -0.085000 0.300000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.330000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.491500 ;
DIRECTION OUTPUT ;
@@ -96,6 +84,22 @@
RECT 0.000000 -0.240000 4.140000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.130000 -0.085000 0.300000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.330000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o22a/sky130_fd_sc_hdll__o22a_4.magic.lef b/cells/o22a/sky130_fd_sc_hdll__o22a_4.magic.lef
index 9ec7bcb..bb9950d 100644
--- a/cells/o22a/sky130_fd_sc_hdll__o22a_4.magic.lef
+++ b/cells/o22a/sky130_fd_sc_hdll__o22a_4.magic.lef
@@ -71,18 +71,6 @@
RECT 3.350000 1.075000 4.030000 1.275000 ;
END
END B2
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 7.090000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 1.028500 ;
DIRECTION OUTPUT ;
@@ -106,6 +94,22 @@
RECT 0.000000 -0.240000 6.900000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 7.090000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o22ai/sky130_fd_sc_hdll__o22ai_1.magic.lef b/cells/o22ai/sky130_fd_sc_hdll__o22ai_1.magic.lef
index 4cb7a36..f9ccf50 100644
--- a/cells/o22ai/sky130_fd_sc_hdll__o22ai_1.magic.lef
+++ b/cells/o22ai/sky130_fd_sc_hdll__o22ai_1.magic.lef
@@ -69,18 +69,6 @@
RECT 1.050000 0.995000 1.350000 1.665000 ;
END
END B2
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.950000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.816750 ;
DIRECTION OUTPUT ;
@@ -101,6 +89,22 @@
RECT 0.000000 -0.240000 2.760000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.950000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o22ai/sky130_fd_sc_hdll__o22ai_2.magic.lef b/cells/o22ai/sky130_fd_sc_hdll__o22ai_2.magic.lef
index 15172d0..e30cf25 100644
--- a/cells/o22ai/sky130_fd_sc_hdll__o22ai_2.magic.lef
+++ b/cells/o22ai/sky130_fd_sc_hdll__o22ai_2.magic.lef
@@ -66,18 +66,6 @@
RECT 1.325000 1.075000 2.125000 1.275000 ;
END
END B2
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 5.250000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 1.061000 ;
DIRECTION OUTPUT ;
@@ -99,6 +87,22 @@
RECT 0.000000 -0.240000 5.060000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 5.250000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.magic.lef b/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.magic.lef
index bbd4ebd..3a8524e 100644
--- a/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.magic.lef
+++ b/cells/o22ai/sky130_fd_sc_hdll__o22ai_4.magic.lef
@@ -71,18 +71,6 @@
RECT 5.660000 1.075000 7.160000 1.275000 ;
END
END B2
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 8.470000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 1.959500 ;
DIRECTION OUTPUT ;
@@ -110,6 +98,22 @@
RECT 0.000000 -0.240000 8.280000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 8.470000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_1.magic.lef b/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_1.magic.lef
index d27a18a..5d1bd0a 100644
--- a/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_1.magic.lef
+++ b/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_1.magic.lef
@@ -69,18 +69,6 @@
RECT 3.335000 1.325000 3.535000 2.425000 ;
END
END B2
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.330000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.471500 ;
DIRECTION OUTPUT ;
@@ -100,6 +88,22 @@
RECT 0.000000 -0.240000 4.140000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.330000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_2.magic.lef b/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_2.magic.lef
index 6bc305d..690791f 100644
--- a/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_2.magic.lef
+++ b/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_2.magic.lef
@@ -70,18 +70,6 @@
RECT 3.655000 1.915000 3.995000 2.425000 ;
END
END B2
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.135000 -0.085000 0.305000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.790000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.498000 ;
DIRECTION OUTPUT ;
@@ -101,6 +89,22 @@
RECT 0.000000 -0.240000 4.600000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.135000 -0.085000 0.305000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.790000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.magic.lef b/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.magic.lef
index a4f3eb7..8a781dc 100644
--- a/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.magic.lef
+++ b/cells/o2bb2a/sky130_fd_sc_hdll__o2bb2a_4.magic.lef
@@ -70,18 +70,6 @@
RECT 0.855000 1.075000 1.445000 1.275000 ;
END
END B2
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 8.010000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 1.028500 ;
DIRECTION OUTPUT ;
@@ -107,6 +95,22 @@
RECT 0.000000 -0.240000 7.820000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 8.010000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_1.magic.lef b/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_1.magic.lef
index 4e5eb06..4507b79 100644
--- a/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_1.magic.lef
+++ b/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_1.magic.lef
@@ -68,18 +68,6 @@
RECT 2.445000 1.275000 2.615000 2.425000 ;
END
END B2
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.870000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.485500 ;
DIRECTION OUTPUT ;
@@ -100,6 +88,22 @@
RECT 0.000000 -0.240000 3.680000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.870000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.magic.lef b/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.magic.lef
index d55086b..cd45495 100644
--- a/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.magic.lef
+++ b/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_2.magic.lef
@@ -70,18 +70,6 @@
RECT 4.260000 1.075000 4.900000 1.275000 ;
END
END B2
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 6.170000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.788000 ;
DIRECTION OUTPUT ;
@@ -103,6 +91,22 @@
RECT 0.000000 -0.240000 5.980000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 6.170000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.magic.lef b/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.magic.lef
index 9299b22..21166d2 100644
--- a/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.magic.lef
+++ b/cells/o2bb2ai/sky130_fd_sc_hdll__o2bb2ai_4.magic.lef
@@ -66,18 +66,6 @@
RECT 7.065000 1.075000 8.675000 1.285000 ;
END
END B2
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.135000 -0.085000 0.305000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 11.230000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 1.608500 ;
DIRECTION OUTPUT ;
@@ -101,6 +89,22 @@
RECT 0.000000 -0.240000 11.040000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.135000 -0.085000 0.305000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 11.230000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o31ai/sky130_fd_sc_hdll__o31ai_1.magic.lef b/cells/o31ai/sky130_fd_sc_hdll__o31ai_1.magic.lef
index 9df55e2..f178cfb 100644
--- a/cells/o31ai/sky130_fd_sc_hdll__o31ai_1.magic.lef
+++ b/cells/o31ai/sky130_fd_sc_hdll__o31ai_1.magic.lef
@@ -67,18 +67,6 @@
RECT 2.325000 0.995000 2.650000 1.325000 ;
END
END B1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.950000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.833500 ;
DIRECTION OUTPUT ;
@@ -97,6 +85,22 @@
RECT 0.000000 -0.240000 2.760000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.950000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o31ai/sky130_fd_sc_hdll__o31ai_2.magic.lef b/cells/o31ai/sky130_fd_sc_hdll__o31ai_2.magic.lef
index 28ef459..371a026 100644
--- a/cells/o31ai/sky130_fd_sc_hdll__o31ai_2.magic.lef
+++ b/cells/o31ai/sky130_fd_sc_hdll__o31ai_2.magic.lef
@@ -66,18 +66,6 @@
RECT 4.630000 0.755000 4.970000 1.325000 ;
END
END B1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 5.250000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 1.136000 ;
DIRECTION OUTPUT ;
@@ -99,6 +87,22 @@
RECT 0.000000 -0.240000 5.060000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 5.250000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.magic.lef b/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.magic.lef
index 90bda1e..406c262 100644
--- a/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.magic.lef
+++ b/cells/o31ai/sky130_fd_sc_hdll__o31ai_4.magic.lef
@@ -66,18 +66,6 @@
RECT 7.165000 1.055000 8.585000 1.275000 ;
END
END B1
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 8.930000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 1.851000 ;
DIRECTION OUTPUT ;
@@ -100,6 +88,22 @@
RECT 0.000000 -0.240000 8.740000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 8.930000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o32ai/sky130_fd_sc_hdll__o32ai_1.magic.lef b/cells/o32ai/sky130_fd_sc_hdll__o32ai_1.magic.lef
index c09349a..619dd24 100644
--- a/cells/o32ai/sky130_fd_sc_hdll__o32ai_1.magic.lef
+++ b/cells/o32ai/sky130_fd_sc_hdll__o32ai_1.magic.lef
@@ -75,18 +75,6 @@
RECT 0.920000 0.995000 1.305000 1.615000 ;
END
END B2
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.410000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.758750 ;
DIRECTION OUTPUT ;
@@ -106,6 +94,22 @@
RECT 0.000000 -0.240000 3.220000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.410000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.magic.lef b/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.magic.lef
index c24cec9..4bbb075 100644
--- a/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.magic.lef
+++ b/cells/o32ai/sky130_fd_sc_hdll__o32ai_2.magic.lef
@@ -75,18 +75,6 @@
RECT 0.090000 1.075000 0.895000 1.325000 ;
END
END B2
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 6.630000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 1.061000 ;
DIRECTION OUTPUT ;
@@ -109,6 +97,22 @@
RECT 0.000000 -0.240000 6.440000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 6.630000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.magic.lef b/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.magic.lef
index 10f5dff..60128e9 100644
--- a/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.magic.lef
+++ b/cells/o32ai/sky130_fd_sc_hdll__o32ai_4.magic.lef
@@ -75,18 +75,6 @@
RECT 0.110000 1.075000 1.835000 1.275000 ;
END
END B2
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 11.230000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 2.024500 ;
DIRECTION OUTPUT ;
@@ -110,6 +98,22 @@
RECT 0.000000 -0.240000 11.040000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 11.230000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/or2/sky130_fd_sc_hdll__or2_1.magic.lef b/cells/or2/sky130_fd_sc_hdll__or2_1.magic.lef
index 88fbe89..36f3a2c 100644
--- a/cells/or2/sky130_fd_sc_hdll__or2_1.magic.lef
+++ b/cells/or2/sky130_fd_sc_hdll__or2_1.magic.lef
@@ -48,18 +48,6 @@
RECT 0.085000 0.765000 0.440000 1.325000 ;
END
END B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.490000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.551500 ;
DIRECTION OUTPUT ;
@@ -79,6 +67,22 @@
RECT 0.000000 -0.240000 2.300000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.490000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/or2/sky130_fd_sc_hdll__or2_2.magic.lef b/cells/or2/sky130_fd_sc_hdll__or2_2.magic.lef
index 75a8644..1c63453 100644
--- a/cells/or2/sky130_fd_sc_hdll__or2_2.magic.lef
+++ b/cells/or2/sky130_fd_sc_hdll__or2_2.magic.lef
@@ -48,18 +48,6 @@
RECT 0.125000 0.765000 0.345000 1.325000 ;
END
END B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.950000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.530500 ;
DIRECTION OUTPUT ;
@@ -81,6 +69,22 @@
RECT 0.000000 -0.240000 2.760000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.950000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/or2/sky130_fd_sc_hdll__or2_4.magic.lef b/cells/or2/sky130_fd_sc_hdll__or2_4.magic.lef
index 643d89d..0d9df25 100644
--- a/cells/or2/sky130_fd_sc_hdll__or2_4.magic.lef
+++ b/cells/or2/sky130_fd_sc_hdll__or2_4.magic.lef
@@ -48,18 +48,6 @@
RECT 0.090000 0.765000 0.345000 1.325000 ;
END
END B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.870000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 1.028500 ;
DIRECTION OUTPUT ;
@@ -85,6 +73,22 @@
RECT 0.000000 -0.240000 3.680000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.870000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/or2/sky130_fd_sc_hdll__or2_6.magic.lef b/cells/or2/sky130_fd_sc_hdll__or2_6.magic.lef
index 02518df..6229294 100644
--- a/cells/or2/sky130_fd_sc_hdll__or2_6.magic.lef
+++ b/cells/or2/sky130_fd_sc_hdll__or2_6.magic.lef
@@ -48,18 +48,6 @@
RECT 1.355000 1.075000 2.025000 1.275000 ;
END
END B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 6.170000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 1.396500 ;
DIRECTION OUTPUT ;
@@ -85,6 +73,22 @@
RECT 0.000000 -0.240000 5.980000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 6.170000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/or2/sky130_fd_sc_hdll__or2_8.magic.lef b/cells/or2/sky130_fd_sc_hdll__or2_8.magic.lef
index 413369e..e477d0c 100644
--- a/cells/or2/sky130_fd_sc_hdll__or2_8.magic.lef
+++ b/cells/or2/sky130_fd_sc_hdll__or2_8.magic.lef
@@ -48,18 +48,6 @@
RECT 1.355000 1.075000 2.025000 1.275000 ;
END
END B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 7.090000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 1.862000 ;
DIRECTION OUTPUT ;
@@ -87,6 +75,22 @@
RECT 0.000000 -0.240000 6.900000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 7.090000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/or2b/sky130_fd_sc_hdll__or2b_1.magic.lef b/cells/or2b/sky130_fd_sc_hdll__or2b_1.magic.lef
index 5717059..c90144e 100644
--- a/cells/or2b/sky130_fd_sc_hdll__or2b_1.magic.lef
+++ b/cells/or2b/sky130_fd_sc_hdll__or2b_1.magic.lef
@@ -48,18 +48,6 @@
RECT 0.090000 1.075000 0.425000 1.325000 ;
END
END B_N
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.410000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.455500 ;
DIRECTION OUTPUT ;
@@ -79,6 +67,22 @@
RECT 0.000000 -0.240000 3.220000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.410000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/or2b/sky130_fd_sc_hdll__or2b_2.magic.lef b/cells/or2b/sky130_fd_sc_hdll__or2b_2.magic.lef
index 5e61087..2c780dd 100644
--- a/cells/or2b/sky130_fd_sc_hdll__or2b_2.magic.lef
+++ b/cells/or2b/sky130_fd_sc_hdll__or2b_2.magic.lef
@@ -48,18 +48,6 @@
RECT 0.085000 1.075000 0.425000 1.325000 ;
END
END B_N
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.870000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.811500 ;
DIRECTION OUTPUT ;
@@ -77,6 +65,22 @@
RECT 0.000000 -0.240000 3.680000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.870000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/or2b/sky130_fd_sc_hdll__or2b_4.magic.lef b/cells/or2b/sky130_fd_sc_hdll__or2b_4.magic.lef
index 1939f95..98ad4b8 100644
--- a/cells/or2b/sky130_fd_sc_hdll__or2b_4.magic.lef
+++ b/cells/or2b/sky130_fd_sc_hdll__or2b_4.magic.lef
@@ -48,18 +48,6 @@
RECT 0.090000 1.075000 0.425000 1.955000 ;
END
END B_N
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.790000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 1.028500 ;
DIRECTION OUTPUT ;
@@ -85,6 +73,22 @@
RECT 0.000000 -0.240000 4.600000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.790000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/or3/sky130_fd_sc_hdll__or3_1.magic.lef b/cells/or3/sky130_fd_sc_hdll__or3_1.magic.lef
index c943a58..449047e 100644
--- a/cells/or3/sky130_fd_sc_hdll__or3_1.magic.lef
+++ b/cells/or3/sky130_fd_sc_hdll__or3_1.magic.lef
@@ -58,18 +58,6 @@
RECT 0.085000 0.995000 0.430000 1.325000 ;
END
END C
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.140000 -0.085000 0.310000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.950000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.810250 ;
DIRECTION OUTPUT ;
@@ -89,6 +77,22 @@
RECT 0.000000 -0.240000 2.760000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.140000 -0.085000 0.310000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.950000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/or3/sky130_fd_sc_hdll__or3_2.magic.lef b/cells/or3/sky130_fd_sc_hdll__or3_2.magic.lef
index 10adfd3..2e8db66 100644
--- a/cells/or3/sky130_fd_sc_hdll__or3_2.magic.lef
+++ b/cells/or3/sky130_fd_sc_hdll__or3_2.magic.lef
@@ -58,18 +58,6 @@
RECT 0.085000 0.995000 0.385000 1.325000 ;
END
END C
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.410000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.530500 ;
DIRECTION OUTPUT ;
@@ -89,6 +77,22 @@
RECT 0.000000 -0.240000 3.220000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.410000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/or3/sky130_fd_sc_hdll__or3_4.magic.lef b/cells/or3/sky130_fd_sc_hdll__or3_4.magic.lef
index c42fcb6..39b8f00 100644
--- a/cells/or3/sky130_fd_sc_hdll__or3_4.magic.lef
+++ b/cells/or3/sky130_fd_sc_hdll__or3_4.magic.lef
@@ -58,18 +58,6 @@
RECT 0.085000 1.075000 0.425000 1.325000 ;
END
END C
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.790000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.996000 ;
DIRECTION OUTPUT ;
@@ -93,6 +81,22 @@
RECT 0.000000 -0.240000 4.600000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.790000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/or3b/sky130_fd_sc_hdll__or3b_1.magic.lef b/cells/or3b/sky130_fd_sc_hdll__or3b_1.magic.lef
index 10ec856..9866119 100644
--- a/cells/or3b/sky130_fd_sc_hdll__or3b_1.magic.lef
+++ b/cells/or3b/sky130_fd_sc_hdll__or3b_1.magic.lef
@@ -58,18 +58,6 @@
RECT 0.090000 1.075000 0.425000 1.325000 ;
END
END C_N
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.870000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.463750 ;
DIRECTION OUTPUT ;
@@ -89,6 +77,22 @@
RECT 0.000000 -0.240000 3.680000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.870000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/or3b/sky130_fd_sc_hdll__or3b_2.magic.lef b/cells/or3b/sky130_fd_sc_hdll__or3b_2.magic.lef
index b8453e7..1192a51 100644
--- a/cells/or3b/sky130_fd_sc_hdll__or3b_2.magic.lef
+++ b/cells/or3b/sky130_fd_sc_hdll__or3b_2.magic.lef
@@ -57,18 +57,6 @@
RECT 0.085000 1.075000 0.425000 1.640000 ;
END
END C_N
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.870000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.741250 ;
DIRECTION OUTPUT ;
@@ -88,6 +76,22 @@
RECT 0.000000 -0.240000 3.680000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.870000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/or3b/sky130_fd_sc_hdll__or3b_4.magic.lef b/cells/or3b/sky130_fd_sc_hdll__or3b_4.magic.lef
index bd595cf..deb0e41 100644
--- a/cells/or3b/sky130_fd_sc_hdll__or3b_4.magic.lef
+++ b/cells/or3b/sky130_fd_sc_hdll__or3b_4.magic.lef
@@ -57,18 +57,6 @@
RECT 0.085000 1.075000 0.425000 1.640000 ;
END
END C_N
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.790000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 1.028500 ;
DIRECTION OUTPUT ;
@@ -90,6 +78,22 @@
RECT 0.000000 -0.240000 4.600000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.790000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/or4/sky130_fd_sc_hdll__or4_1.magic.lef b/cells/or4/sky130_fd_sc_hdll__or4_1.magic.lef
index 97866b3..fd24149 100644
--- a/cells/or4/sky130_fd_sc_hdll__or4_1.magic.lef
+++ b/cells/or4/sky130_fd_sc_hdll__or4_1.magic.lef
@@ -66,18 +66,6 @@
RECT 0.090000 0.755000 0.440000 1.325000 ;
END
END D
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.410000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.703000 ;
DIRECTION OUTPUT ;
@@ -97,6 +85,22 @@
RECT 0.000000 -0.240000 3.220000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.410000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/or4/sky130_fd_sc_hdll__or4_2.magic.lef b/cells/or4/sky130_fd_sc_hdll__or4_2.magic.lef
index 052a289..444f525 100644
--- a/cells/or4/sky130_fd_sc_hdll__or4_2.magic.lef
+++ b/cells/or4/sky130_fd_sc_hdll__or4_2.magic.lef
@@ -66,18 +66,6 @@
RECT 0.085000 0.755000 0.435000 1.325000 ;
END
END D
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.870000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.802750 ;
DIRECTION OUTPUT ;
@@ -97,6 +85,22 @@
RECT 0.000000 -0.240000 3.680000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.870000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/or4/sky130_fd_sc_hdll__or4_4.magic.lef b/cells/or4/sky130_fd_sc_hdll__or4_4.magic.lef
index 045bdd7..25919bb 100644
--- a/cells/or4/sky130_fd_sc_hdll__or4_4.magic.lef
+++ b/cells/or4/sky130_fd_sc_hdll__or4_4.magic.lef
@@ -70,18 +70,6 @@
RECT 0.085000 0.755000 0.370000 1.325000 ;
END
END D
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.140000 -0.085000 0.310000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.790000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 1.028500 ;
DIRECTION OUTPUT ;
@@ -105,6 +93,22 @@
RECT 0.000000 -0.240000 4.600000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.140000 -0.085000 0.310000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.790000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/or4b/sky130_fd_sc_hdll__or4b_1.magic.lef b/cells/or4b/sky130_fd_sc_hdll__or4b_1.magic.lef
index e9bb27f..18b139c 100644
--- a/cells/or4b/sky130_fd_sc_hdll__or4b_1.magic.lef
+++ b/cells/or4b/sky130_fd_sc_hdll__or4b_1.magic.lef
@@ -66,18 +66,6 @@
RECT 0.085000 0.755000 0.425000 1.325000 ;
END
END D_N
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.330000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.463750 ;
DIRECTION OUTPUT ;
@@ -97,6 +85,22 @@
RECT 0.000000 -0.240000 4.140000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.330000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/or4b/sky130_fd_sc_hdll__or4b_2.magic.lef b/cells/or4b/sky130_fd_sc_hdll__or4b_2.magic.lef
index 35232f7..4947694 100644
--- a/cells/or4b/sky130_fd_sc_hdll__or4b_2.magic.lef
+++ b/cells/or4b/sky130_fd_sc_hdll__or4b_2.magic.lef
@@ -66,18 +66,6 @@
RECT 0.085000 1.075000 0.425000 1.435000 ;
END
END D_N
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.330000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.498000 ;
DIRECTION OUTPUT ;
@@ -97,6 +85,22 @@
RECT 0.000000 -0.240000 4.140000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.330000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/or4b/sky130_fd_sc_hdll__or4b_4.magic.lef b/cells/or4b/sky130_fd_sc_hdll__or4b_4.magic.lef
index c14a46f..55103c8 100644
--- a/cells/or4b/sky130_fd_sc_hdll__or4b_4.magic.lef
+++ b/cells/or4b/sky130_fd_sc_hdll__or4b_4.magic.lef
@@ -67,18 +67,6 @@
RECT 0.105000 0.995000 0.445000 1.955000 ;
END
END D_N
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 5.710000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 1.028500 ;
DIRECTION OUTPUT ;
@@ -102,6 +90,22 @@
RECT 0.000000 -0.240000 5.520000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 5.710000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/or4bb/sky130_fd_sc_hdll__or4bb_1.magic.lef b/cells/or4bb/sky130_fd_sc_hdll__or4bb_1.magic.lef
index 6c85348..8d646c5 100644
--- a/cells/or4bb/sky130_fd_sc_hdll__or4bb_1.magic.lef
+++ b/cells/or4bb/sky130_fd_sc_hdll__or4bb_1.magic.lef
@@ -66,18 +66,6 @@
RECT 0.980000 0.995000 1.335000 1.325000 ;
END
END D_N
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 4.790000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.463750 ;
DIRECTION OUTPUT ;
@@ -97,6 +85,22 @@
RECT 0.000000 -0.240000 4.600000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 4.790000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/or4bb/sky130_fd_sc_hdll__or4bb_2.magic.lef b/cells/or4bb/sky130_fd_sc_hdll__or4bb_2.magic.lef
index 0f876ed..1262cf5 100644
--- a/cells/or4bb/sky130_fd_sc_hdll__or4bb_2.magic.lef
+++ b/cells/or4bb/sky130_fd_sc_hdll__or4bb_2.magic.lef
@@ -66,18 +66,6 @@
RECT 1.000000 0.995000 1.340000 1.325000 ;
END
END D_N
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 5.250000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.498000 ;
DIRECTION OUTPUT ;
@@ -97,6 +85,22 @@
RECT 0.000000 -0.240000 5.060000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 5.250000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.magic.lef b/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.magic.lef
index 4f82d0a..51b9793 100644
--- a/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.magic.lef
+++ b/cells/or4bb/sky130_fd_sc_hdll__or4bb_4.magic.lef
@@ -67,18 +67,6 @@
RECT 0.995000 0.995000 1.335000 1.325000 ;
END
END D_N
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.285000 6.170000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 1.028500 ;
DIRECTION OUTPUT ;
@@ -102,6 +90,22 @@
RECT 0.000000 -0.240000 5.980000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.285000 6.170000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.magic.lef b/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.magic.lef
index bba31a8..a7a4f58 100644
--- a/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.magic.lef
+++ b/cells/probe_p/sky130_fd_sc_hdll__probe_p_8.magic.lef
@@ -39,18 +39,6 @@
RECT 0.140000 1.075000 1.240000 1.275000 ;
END
END A
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 6.170000 2.910000 ;
- END
- END VPB
PIN X
DIRECTION OUTPUT ;
USE SIGNAL ;
@@ -91,6 +79,22 @@
RECT 0.000000 -0.240000 5.980000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 6.170000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INPUT ;
USE POWER ;
diff --git a/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.magic.lef b/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.magic.lef
index 8020fc5..dace2b4 100644
--- a/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.magic.lef
+++ b/cells/probec_p/sky130_fd_sc_hdll__probec_p_8.magic.lef
@@ -39,18 +39,6 @@
RECT 0.140000 1.075000 1.240000 1.275000 ;
END
END A
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 6.170000 2.910000 ;
- END
- END VPB
PIN X
DIRECTION OUTPUT ;
USE SIGNAL ;
@@ -73,6 +61,22 @@
RECT 4.560000 -0.455000 6.675000 -0.155000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 6.170000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INPUT ;
USE POWER ;
diff --git a/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.magic.lef b/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.magic.lef
index b26c7f4..38f6880 100644
--- a/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.magic.lef
+++ b/cells/sdfbbp/sky130_fd_sc_hdll__sdfbbp_1.magic.lef
@@ -114,18 +114,6 @@
RECT 10.655000 0.920000 10.945000 0.965000 ;
END
END SET_B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 15.830000 2.910000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -181,6 +169,22 @@
RECT 0.000000 -0.240000 15.640000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 15.830000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.magic.lef b/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.magic.lef
index db66816..4ebad04 100644
--- a/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.magic.lef
+++ b/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_1.magic.lef
@@ -100,20 +100,6 @@
RECT 1.585000 1.335000 2.220000 1.745000 ;
END
END SCE
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.215000 -0.010000 0.235000 0.015000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.120000 1.425000 ;
- RECT -0.190000 1.425000 14.450000 2.910000 ;
- RECT 4.455000 1.305000 14.450000 1.425000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -122,6 +108,24 @@
RECT 0.000000 -0.240000 14.260000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.215000 -0.010000 0.235000 0.015000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.120000 1.425000 ;
+ RECT -0.190000 1.425000 14.450000 2.910000 ;
+ RECT 4.455000 1.305000 14.450000 1.425000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.magic.lef b/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.magic.lef
index 44addb7..b2a0cfa 100644
--- a/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.magic.lef
+++ b/cells/sdfrbp/sky130_fd_sc_hdll__sdfrbp_2.magic.lef
@@ -100,20 +100,6 @@
RECT 1.585000 1.335000 2.220000 1.745000 ;
END
END SCE
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.215000 -0.010000 0.235000 0.015000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.120000 1.425000 ;
- RECT -0.190000 1.425000 14.910000 2.910000 ;
- RECT 4.455000 1.305000 14.910000 1.425000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -122,6 +108,24 @@
RECT 0.000000 -0.240000 14.720000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.215000 -0.010000 0.235000 0.015000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.120000 1.425000 ;
+ RECT -0.190000 1.425000 14.910000 2.910000 ;
+ RECT 4.455000 1.305000 14.910000 1.425000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.magic.lef b/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.magic.lef
index d7fbd1a..917d653 100644
--- a/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.magic.lef
+++ b/cells/sdfrtn/sky130_fd_sc_hdll__sdfrtn_1.magic.lef
@@ -89,20 +89,6 @@
RECT 1.585000 1.335000 2.220000 1.745000 ;
END
END SCE
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.215000 -0.010000 0.235000 0.015000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.120000 1.425000 ;
- RECT -0.190000 1.425000 13.070000 2.910000 ;
- RECT 4.455000 1.305000 13.070000 1.425000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -111,6 +97,24 @@
RECT 0.000000 -0.240000 12.880000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.215000 -0.010000 0.235000 0.015000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.120000 1.425000 ;
+ RECT -0.190000 1.425000 13.070000 2.910000 ;
+ RECT 4.455000 1.305000 13.070000 1.425000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.magic.lef b/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.magic.lef
index 21f3a62..d50d5ed 100644
--- a/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.magic.lef
+++ b/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_1.magic.lef
@@ -89,20 +89,6 @@
RECT 1.585000 1.335000 2.220000 1.745000 ;
END
END SCE
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.215000 -0.010000 0.235000 0.015000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.120000 1.425000 ;
- RECT -0.190000 1.425000 13.070000 2.910000 ;
- RECT 4.455000 1.305000 13.070000 1.425000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -111,6 +97,24 @@
RECT 0.000000 -0.240000 12.880000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.215000 -0.010000 0.235000 0.015000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.120000 1.425000 ;
+ RECT -0.190000 1.425000 13.070000 2.910000 ;
+ RECT 4.455000 1.305000 13.070000 1.425000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.magic.lef b/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.magic.lef
index 2a55409..0f1db71 100644
--- a/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.magic.lef
+++ b/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_2.magic.lef
@@ -89,20 +89,6 @@
RECT 1.585000 1.335000 2.220000 1.745000 ;
END
END SCE
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.215000 -0.010000 0.235000 0.015000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.120000 1.425000 ;
- RECT -0.190000 1.425000 13.530000 2.910000 ;
- RECT 4.455000 1.305000 13.530000 1.425000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -111,6 +97,24 @@
RECT 0.000000 -0.240000 13.340000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.215000 -0.010000 0.235000 0.015000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.120000 1.425000 ;
+ RECT -0.190000 1.425000 13.530000 2.910000 ;
+ RECT 4.455000 1.305000 13.530000 1.425000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.magic.lef b/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.magic.lef
index 7585056..68dca80 100644
--- a/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.magic.lef
+++ b/cells/sdfrtp/sky130_fd_sc_hdll__sdfrtp_4.magic.lef
@@ -94,20 +94,6 @@
RECT 1.585000 1.335000 2.220000 1.745000 ;
END
END SCE
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.215000 -0.010000 0.235000 0.015000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 2.120000 1.425000 ;
- RECT -0.190000 1.425000 14.450000 2.910000 ;
- RECT 4.455000 1.305000 14.450000 1.425000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -116,6 +102,24 @@
RECT 0.000000 -0.240000 14.260000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.215000 -0.010000 0.235000 0.015000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 2.120000 1.425000 ;
+ RECT -0.190000 1.425000 14.450000 2.910000 ;
+ RECT 4.455000 1.305000 14.450000 1.425000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.magic.lef b/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.magic.lef
index 52347d8..873a9cb 100644
--- a/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.magic.lef
+++ b/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_1.magic.lef
@@ -105,18 +105,6 @@
RECT 9.675000 1.600000 9.965000 1.645000 ;
END
END SET_B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 14.910000 2.910000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -125,6 +113,22 @@
RECT 0.000000 -0.240000 14.720000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 14.910000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.magic.lef b/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.magic.lef
index d7cd819..3e5a567 100644
--- a/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.magic.lef
+++ b/cells/sdfsbp/sky130_fd_sc_hdll__sdfsbp_2.magic.lef
@@ -105,18 +105,6 @@
RECT 9.675000 1.600000 9.965000 1.645000 ;
END
END SET_B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 15.830000 2.910000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -125,6 +113,22 @@
RECT 0.000000 -0.240000 15.640000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 15.830000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.magic.lef b/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.magic.lef
index 5ea18d3..6adb109 100644
--- a/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.magic.lef
+++ b/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_1.magic.lef
@@ -92,18 +92,6 @@
RECT 9.565000 1.600000 9.905000 1.645000 ;
END
END SET_B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 13.530000 2.910000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -112,6 +100,22 @@
RECT 0.000000 -0.240000 13.340000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 13.530000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.magic.lef b/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.magic.lef
index 74bf270..d312da9 100644
--- a/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.magic.lef
+++ b/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_2.magic.lef
@@ -94,18 +94,6 @@
RECT 9.730000 1.600000 10.070000 1.645000 ;
END
END SET_B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 14.450000 2.910000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -114,6 +102,22 @@
RECT 0.000000 -0.240000 14.260000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 14.450000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.magic.lef b/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.magic.lef
index 3916bc1..3cc452e 100644
--- a/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.magic.lef
+++ b/cells/sdfstp/sky130_fd_sc_hdll__sdfstp_4.magic.lef
@@ -98,18 +98,6 @@
RECT 9.730000 1.600000 10.070000 1.645000 ;
END
END SET_B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 15.370000 2.910000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -118,6 +106,22 @@
RECT 0.000000 -0.240000 15.180000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 15.370000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.magic.lef b/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.magic.lef
index 8d42213..d0e693a 100644
--- a/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.magic.lef
+++ b/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_1.magic.lef
@@ -88,18 +88,6 @@
RECT 3.315000 0.785000 3.535000 1.115000 ;
END
END SCE
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 12.150000 2.910000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -108,6 +96,22 @@
RECT 0.000000 -0.240000 11.960000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 12.150000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.magic.lef b/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.magic.lef
index b68c8ba..67cc9f2 100644
--- a/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.magic.lef
+++ b/cells/sdfxbp/sky130_fd_sc_hdll__sdfxbp_2.magic.lef
@@ -86,18 +86,6 @@
RECT 3.315000 0.785000 3.535000 1.115000 ;
END
END SCE
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 13.530000 2.910000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -106,6 +94,22 @@
RECT 0.000000 -0.240000 13.340000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 13.530000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.magic.lef b/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.magic.lef
index 2f54170..35b519e 100644
--- a/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.magic.lef
+++ b/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_1.magic.lef
@@ -79,18 +79,6 @@
RECT 3.335000 0.785000 3.505000 1.115000 ;
END
END SCE
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 10.770000 2.910000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -99,6 +87,22 @@
RECT 0.000000 -0.240000 10.580000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 10.770000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.magic.lef b/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.magic.lef
index 3ca9400..db32d26 100644
--- a/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.magic.lef
+++ b/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_2.magic.lef
@@ -79,18 +79,6 @@
RECT 3.335000 0.785000 3.505000 1.115000 ;
END
END SCE
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 11.230000 2.910000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -99,6 +87,22 @@
RECT 0.000000 -0.240000 11.040000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 11.230000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.magic.lef b/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.magic.lef
index 5a5252c..68c5428 100644
--- a/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.magic.lef
+++ b/cells/sdfxtp/sky130_fd_sc_hdll__sdfxtp_4.magic.lef
@@ -83,18 +83,6 @@
RECT 3.335000 0.785000 3.505000 1.115000 ;
END
END SCE
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 12.150000 2.910000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -103,6 +91,22 @@
RECT 0.000000 -0.240000 11.960000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 12.150000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.magic.lef b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.magic.lef
index b94956b..68b262c 100644
--- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.magic.lef
+++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_1.magic.lef
@@ -70,18 +70,6 @@
RECT 0.085000 0.955000 0.330000 1.665000 ;
END
END SCE
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 7.550000 2.910000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -90,6 +78,22 @@
RECT 0.000000 -0.240000 7.360000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 7.550000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.magic.lef b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.magic.lef
index fd6bc0c..609bf1f 100644
--- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.magic.lef
+++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_2.magic.lef
@@ -75,18 +75,6 @@
RECT 0.085000 0.955000 0.330000 1.665000 ;
END
END SCE
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 8.010000 2.910000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -95,6 +83,22 @@
RECT 0.000000 -0.240000 7.820000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 8.010000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.magic.lef b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.magic.lef
index d940d2e..fe237dd 100644
--- a/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.magic.lef
+++ b/cells/sdlclkp/sky130_fd_sc_hdll__sdlclkp_4.magic.lef
@@ -80,18 +80,6 @@
RECT 0.085000 0.955000 0.345000 1.665000 ;
END
END SCE
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 9.390000 2.910000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -100,6 +88,22 @@
RECT 0.000000 -0.240000 9.200000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 9.390000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.magic.lef b/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.magic.lef
index 71e74ae..563ca89 100644
--- a/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.magic.lef
+++ b/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_1.magic.lef
@@ -94,20 +94,6 @@
RECT 5.605000 1.105000 5.885000 1.615000 ;
END
END SCE
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 5.285000 1.435000 ;
- RECT -0.190000 1.435000 15.370000 2.910000 ;
- RECT 7.985000 1.305000 15.370000 1.435000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -116,6 +102,24 @@
RECT 0.000000 -0.240000 15.180000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 5.285000 1.435000 ;
+ RECT -0.190000 1.435000 15.370000 2.910000 ;
+ RECT 7.985000 1.305000 15.370000 1.435000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.magic.lef b/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.magic.lef
index bba5c88..e95f27e 100644
--- a/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.magic.lef
+++ b/cells/sedfxbp/sky130_fd_sc_hdll__sedfxbp_2.magic.lef
@@ -96,20 +96,6 @@
RECT 5.605000 1.105000 5.885000 1.615000 ;
END
END SCE
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 5.285000 1.435000 ;
- RECT -0.190000 1.435000 16.750000 2.910000 ;
- RECT 7.985000 1.305000 16.750000 1.435000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -118,6 +104,24 @@
RECT 0.000000 -0.240000 16.560000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 5.285000 1.435000 ;
+ RECT -0.190000 1.435000 16.750000 2.910000 ;
+ RECT 7.985000 1.305000 16.750000 1.435000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/tap/sky130_fd_sc_hdll__tap.magic.lef b/cells/tap/sky130_fd_sc_hdll__tap.magic.lef
index 594a713..9dd5fdf 100644
--- a/cells/tap/sky130_fd_sc_hdll__tap.magic.lef
+++ b/cells/tap/sky130_fd_sc_hdll__tap.magic.lef
@@ -30,6 +30,338 @@
RECT 177.780000 4.880000 180.095000 5.595000 ;
RECT 177.780000 5.895000 180.095000 6.610000 ;
RECT 177.980000 5.595000 180.095000 5.895000 ;
+ LAYER pwell ;
+ RECT 3.825000 0.320000 3.995000 0.845000 ;
+ RECT 7.045000 4.595000 7.215000 5.120000 ;
+ RECT 8.425000 0.320000 8.595000 0.845000 ;
+ RECT 15.325000 4.595000 15.495000 5.120000 ;
+ RECT 16.245000 0.320000 16.415000 0.845000 ;
+ RECT 19.465000 0.320000 19.635000 0.845000 ;
+ RECT 21.305000 4.595000 21.475000 5.120000 ;
+ RECT 24.985000 0.320000 25.155000 0.845000 ;
+ RECT 28.205000 4.595000 28.375000 5.120000 ;
+ RECT 33.265000 4.595000 33.435000 5.120000 ;
+ RECT 33.725000 0.320000 33.895000 0.845000 ;
+ RECT 38.325000 0.320000 38.495000 0.845000 ;
+ RECT 42.005000 4.595000 42.175000 5.120000 ;
+ RECT 42.925000 0.320000 43.095000 0.845000 ;
+ RECT 49.825000 0.320000 49.995000 0.845000 ;
+ RECT 51.665000 4.595000 51.835000 5.120000 ;
+ RECT 53.505000 0.320000 53.675000 0.845000 ;
+ RECT 58.565000 0.320000 58.735000 0.845000 ;
+ RECT 66.385000 0.320000 66.555000 0.845000 ;
+ RECT 68.685000 4.595000 68.855000 5.120000 ;
+ RECT 70.065000 0.320000 70.235000 0.845000 ;
+ RECT 74.205000 0.320000 74.375000 0.845000 ;
+ RECT 80.645000 0.320000 80.815000 0.845000 ;
+ RECT 83.405000 0.320000 83.575000 0.845000 ;
+ RECT 87.545000 0.320000 87.715000 0.845000 ;
+ RECT 87.545000 4.595000 87.715000 5.120000 ;
+ RECT 94.445000 0.320000 94.615000 0.845000 ;
+ RECT 94.445000 4.595000 94.615000 5.120000 ;
+ RECT 98.585000 0.320000 98.755000 0.845000 ;
+ RECT 105.025000 0.320000 105.195000 0.845000 ;
+ RECT 106.865000 4.595000 107.035000 5.120000 ;
+ RECT 116.065000 0.320000 116.235000 0.845000 ;
+ RECT 120.665000 0.320000 120.835000 0.845000 ;
+ RECT 122.965000 4.595000 123.135000 5.120000 ;
+ RECT 124.805000 0.320000 124.975000 0.845000 ;
+ RECT 129.405000 0.320000 129.575000 0.845000 ;
+ RECT 135.845000 4.595000 136.015000 5.120000 ;
+ RECT 136.765000 0.320000 136.935000 0.845000 ;
+ RECT 140.445000 0.320000 140.615000 0.845000 ;
+ RECT 145.965000 0.320000 146.135000 0.845000 ;
+ RECT 152.405000 4.595000 152.575000 5.120000 ;
+ RECT 155.165000 0.320000 155.335000 0.845000 ;
+ RECT 158.845000 4.595000 159.015000 5.120000 ;
+ RECT 159.765000 0.320000 159.935000 0.845000 ;
+ RECT 164.825000 0.320000 164.995000 0.845000 ;
+ RECT 166.205000 4.595000 166.375000 5.120000 ;
+ RECT 166.665000 4.595000 166.835000 5.120000 ;
+ RECT 173.105000 0.320000 173.275000 0.845000 ;
+ RECT 173.105000 4.595000 173.275000 5.120000 ;
+ RECT 177.245000 0.320000 177.415000 0.845000 ;
+ RECT 179.545000 4.595000 179.715000 5.120000 ;
+ RECT 183.685000 0.320000 183.855000 0.845000 ;
+ RECT 186.445000 4.595000 186.615000 5.120000 ;
+ RECT 193.345000 4.595000 193.515000 5.120000 ;
+ RECT 194.725000 0.320000 194.895000 0.845000 ;
+ RECT 198.405000 0.320000 198.575000 0.845000 ;
+ RECT 200.705000 4.595000 200.875000 5.120000 ;
+ RECT 202.545000 0.320000 202.715000 0.845000 ;
+ RECT 208.065000 4.595000 208.235000 5.120000 ;
+ RECT 209.905000 0.320000 210.075000 0.845000 ;
+ RECT 213.125000 0.320000 213.295000 0.845000 ;
+ RECT 216.345000 4.595000 216.515000 5.120000 ;
+ RECT 218.645000 0.320000 218.815000 0.845000 ;
+ RECT 224.625000 4.595000 224.795000 5.120000 ;
+ RECT 227.845000 0.320000 228.015000 0.845000 ;
+ RECT 232.445000 0.320000 232.615000 0.845000 ;
+ RECT 234.285000 4.595000 234.455000 5.120000 ;
+ RECT 237.505000 0.320000 237.675000 0.845000 ;
+ RECT 246.245000 0.320000 246.415000 0.845000 ;
+ RECT 249.925000 0.320000 250.095000 0.845000 ;
+ RECT 256.825000 0.320000 256.995000 0.845000 ;
+ RECT 268.785000 0.320000 268.955000 0.845000 ;
+ RECT 271.545000 0.320000 271.715000 0.845000 ;
+ RECT 274.765000 0.320000 274.935000 0.845000 ;
+ RECT 278.905000 0.320000 279.075000 0.845000 ;
+ RECT 282.585000 0.320000 282.755000 0.845000 ;
+ RECT 286.725000 0.320000 286.895000 0.845000 ;
+ RECT 291.325000 0.320000 291.495000 0.845000 ;
+ RECT 294.545000 0.320000 294.715000 0.845000 ;
+ RECT 298.225000 0.320000 298.395000 0.845000 ;
+ RECT 303.285000 0.320000 303.455000 0.845000 ;
+ RECT 307.425000 0.320000 307.595000 0.845000 ;
+ RECT 312.025000 0.320000 312.195000 0.845000 ;
+ RECT 317.545000 0.320000 317.715000 0.845000 ;
+ RECT 321.225000 0.320000 321.395000 0.845000 ;
+ RECT 325.365000 0.320000 325.535000 0.845000 ;
+ RECT 330.425000 0.320000 330.595000 0.845000 ;
+ RECT 335.025000 0.320000 335.195000 0.845000 ;
+ RECT 340.085000 0.320000 340.255000 0.845000 ;
+ RECT 345.605000 0.320000 345.775000 0.845000 ;
+ RECT 350.665000 0.320000 350.835000 0.845000 ;
+ RECT 356.185000 0.320000 356.355000 0.845000 ;
+ RECT 363.085000 0.320000 363.255000 0.845000 ;
+ RECT 365.385000 0.320000 365.555000 0.845000 ;
+ RECT 374.125000 0.320000 374.295000 0.845000 ;
+ RECT 386.085000 0.320000 386.255000 0.845000 ;
+ RECT 388.845000 0.320000 389.015000 0.845000 ;
+ RECT 392.525000 0.320000 392.695000 0.845000 ;
+ RECT 397.585000 0.320000 397.755000 0.845000 ;
+ RECT 404.025000 0.320000 404.195000 0.845000 ;
+ RECT 417.825000 0.320000 417.995000 0.845000 ;
+ RECT 425.645000 0.320000 425.815000 0.845000 ;
+ RECT 438.525000 0.320000 438.695000 0.845000 ;
+ RECT 445.885000 0.320000 446.055000 0.845000 ;
+ RECT 448.185000 0.320000 448.355000 0.845000 ;
+ RECT 458.765000 0.320000 458.935000 0.845000 ;
+ RECT 461.525000 0.320000 461.695000 0.845000 ;
+ RECT 465.205000 0.320000 465.375000 0.845000 ;
+ RECT 471.185000 0.320000 471.355000 0.845000 ;
+ RECT 473.485000 0.320000 473.655000 0.845000 ;
+ RECT 486.365000 0.320000 486.535000 0.845000 ;
+ RECT 489.125000 0.320000 489.295000 0.845000 ;
+ RECT 493.265000 0.320000 493.435000 0.845000 ;
+ RECT 500.165000 0.320000 500.335000 0.845000 ;
+ RECT 502.465000 0.320000 502.635000 0.845000 ;
+ RECT 505.685000 0.320000 505.855000 0.845000 ;
+ RECT 507.525000 0.320000 507.695000 0.845000 ;
+ RECT 517.645000 0.320000 517.815000 0.845000 ;
+ RECT 528.225000 0.320000 528.395000 0.845000 ;
+ RECT 540.185000 0.320000 540.355000 0.845000 ;
+ RECT 550.765000 0.320000 550.935000 0.845000 ;
+ RECT 561.805000 0.320000 561.975000 0.845000 ;
+ RECT 574.225000 0.320000 574.395000 0.845000 ;
+ RECT 580.665000 0.320000 580.835000 0.845000 ;
+ RECT 587.565000 0.320000 587.735000 0.845000 ;
+ RECT 595.385000 0.320000 595.555000 0.845000 ;
+ RECT 599.065000 0.320000 599.235000 0.845000 ;
+ RECT 602.745000 0.320000 602.915000 0.845000 ;
+ RECT 606.885000 0.320000 607.055000 0.845000 ;
+ RECT 611.025000 0.320000 611.195000 0.845000 ;
+ RECT 616.085000 0.320000 616.255000 0.845000 ;
+ RECT 622.985000 0.320000 623.155000 0.845000 ;
+ RECT 634.485000 0.320000 634.655000 0.845000 ;
+ RECT 637.705000 0.320000 637.875000 0.845000 ;
+ RECT 641.845000 0.320000 642.015000 0.845000 ;
+ RECT 647.825000 0.320000 647.995000 0.845000 ;
+ RECT 657.485000 0.320000 657.655000 0.845000 ;
+ RECT 660.705000 0.320000 660.875000 0.845000 ;
+ RECT 664.845000 0.320000 665.015000 0.845000 ;
+ RECT 670.825000 0.320000 670.995000 0.845000 ;
+ RECT 680.485000 0.320000 680.655000 0.845000 ;
+ RECT 682.325000 0.320000 682.495000 0.845000 ;
+ RECT 689.225000 0.320000 689.395000 0.845000 ;
+ RECT 697.965000 0.320000 698.135000 0.845000 ;
+ RECT 700.265000 0.320000 700.435000 0.845000 ;
+ RECT 703.485000 0.320000 703.655000 0.845000 ;
+ RECT 707.625000 0.320000 707.795000 0.845000 ;
+ RECT 712.685000 0.320000 712.855000 0.845000 ;
+ RECT 717.745000 0.320000 717.915000 0.845000 ;
+ RECT 722.805000 0.320000 722.975000 0.845000 ;
+ RECT 729.245000 0.320000 729.415000 0.845000 ;
+ RECT 740.285000 0.320000 740.455000 0.845000 ;
+ RECT 744.885000 0.320000 745.055000 0.845000 ;
+ RECT 750.865000 0.320000 751.035000 0.845000 ;
+ RECT 760.525000 0.320000 760.695000 0.845000 ;
+ RECT 762.825000 0.320000 762.995000 0.845000 ;
+ RECT 766.045000 0.320000 766.215000 0.845000 ;
+ RECT 771.105000 0.320000 771.275000 0.845000 ;
+ RECT 779.845000 0.320000 780.015000 0.845000 ;
+ RECT 782.605000 0.320000 782.775000 0.845000 ;
+ RECT 786.285000 0.320000 786.455000 0.845000 ;
+ RECT 792.265000 0.320000 792.435000 0.845000 ;
+ RECT 795.025000 0.320000 795.195000 0.845000 ;
+ RECT 799.625000 0.320000 799.795000 0.845000 ;
+ RECT 806.985000 0.320000 807.155000 0.845000 ;
+ RECT 810.205000 0.320000 810.375000 0.845000 ;
+ RECT 815.265000 0.320000 815.435000 0.845000 ;
+ RECT 823.545000 0.320000 823.715000 0.845000 ;
+ RECT 826.765000 0.320000 826.935000 0.845000 ;
+ RECT 832.285000 0.320000 832.455000 0.845000 ;
+ RECT 841.485000 0.320000 841.655000 0.845000 ;
+ RECT 845.165000 0.320000 845.335000 0.845000 ;
+ RECT 851.605000 0.320000 851.775000 0.845000 ;
+ RECT 861.725000 0.320000 861.895000 0.845000 ;
+ RECT 866.325000 0.320000 866.495000 0.845000 ;
+ RECT 873.225000 0.320000 873.395000 0.845000 ;
+ RECT 884.265000 0.320000 884.435000 0.845000 ;
+ RECT 886.565000 0.320000 886.735000 0.845000 ;
+ RECT 889.785000 0.320000 889.955000 0.845000 ;
+ RECT 894.845000 0.320000 895.015000 0.845000 ;
+ RECT 903.585000 0.320000 903.755000 0.845000 ;
+ RECT 906.345000 0.320000 906.515000 0.845000 ;
+ RECT 910.485000 0.320000 910.655000 0.845000 ;
+ RECT 916.465000 0.320000 916.635000 0.845000 ;
+ RECT 919.225000 0.320000 919.395000 0.845000 ;
+ RECT 923.825000 0.320000 923.995000 0.845000 ;
+ RECT 930.725000 0.320000 930.895000 0.845000 ;
+ RECT 933.945000 0.320000 934.115000 0.845000 ;
+ RECT 939.465000 0.320000 939.635000 0.845000 ;
+ RECT 947.285000 0.320000 947.455000 0.845000 ;
+ RECT 950.505000 0.320000 950.675000 0.845000 ;
+ RECT 956.025000 0.320000 956.195000 0.845000 ;
+ RECT 965.225000 0.320000 965.395000 0.845000 ;
+ RECT 969.365000 0.320000 969.535000 0.845000 ;
+ RECT 975.805000 0.320000 975.975000 0.845000 ;
+ RECT 985.925000 0.320000 986.095000 0.845000 ;
+ RECT 990.525000 0.320000 990.695000 0.845000 ;
+ RECT 997.425000 0.320000 997.595000 0.845000 ;
+ RECT 1008.005000 0.320000 1008.175000 0.845000 ;
+ RECT 1012.605000 0.320000 1012.775000 0.845000 ;
+ RECT 1017.205000 0.320000 1017.375000 0.845000 ;
+ RECT 1024.565000 0.320000 1024.735000 0.845000 ;
+ RECT 1027.785000 0.320000 1027.955000 0.845000 ;
+ RECT 1033.305000 0.320000 1033.475000 0.845000 ;
+ RECT 1042.505000 0.320000 1042.675000 0.845000 ;
+ RECT 1046.185000 0.320000 1046.355000 0.845000 ;
+ RECT 1050.325000 0.320000 1050.495000 0.845000 ;
+ RECT 1056.765000 0.320000 1056.935000 0.845000 ;
+ RECT 1059.525000 0.320000 1059.695000 0.845000 ;
+ RECT 1063.665000 0.320000 1063.835000 0.845000 ;
+ RECT 1070.565000 0.320000 1070.735000 0.845000 ;
+ RECT 1074.705000 0.320000 1074.875000 0.845000 ;
+ RECT 1079.305000 0.320000 1079.475000 0.845000 ;
+ RECT 1086.205000 0.320000 1086.375000 0.845000 ;
+ RECT 1089.885000 0.320000 1090.055000 0.845000 ;
+ RECT 1094.945000 0.320000 1095.115000 0.845000 ;
+ RECT 1102.765000 0.320000 1102.935000 0.845000 ;
+ RECT 1107.365000 0.320000 1107.535000 0.845000 ;
+ RECT 1112.425000 0.320000 1112.595000 0.845000 ;
+ RECT 1120.705000 0.320000 1120.875000 0.845000 ;
+ RECT 1124.845000 0.320000 1125.015000 0.845000 ;
+ RECT 1131.285000 0.320000 1131.455000 0.845000 ;
+ RECT 1142.325000 0.320000 1142.495000 0.845000 ;
+ RECT 1146.465000 0.320000 1146.635000 0.845000 ;
+ RECT 1151.065000 0.320000 1151.235000 0.845000 ;
+ RECT 1158.425000 0.320000 1158.595000 0.845000 ;
+ RECT 1161.645000 0.320000 1161.815000 0.845000 ;
+ RECT 1167.165000 0.320000 1167.335000 0.845000 ;
+ RECT 1175.905000 0.320000 1176.075000 0.845000 ;
+ RECT 1180.505000 0.320000 1180.675000 0.845000 ;
+ RECT 1185.565000 0.320000 1185.735000 0.845000 ;
+ RECT 1193.845000 0.320000 1194.015000 0.845000 ;
+ RECT 1197.985000 0.320000 1198.155000 0.845000 ;
+ RECT 1204.425000 0.320000 1204.595000 0.845000 ;
+ RECT 1215.925000 0.320000 1216.095000 0.845000 ;
+ RECT 1219.145000 0.320000 1219.315000 0.845000 ;
+ RECT 1224.665000 0.320000 1224.835000 0.845000 ;
+ RECT 1233.865000 0.320000 1234.035000 0.845000 ;
+ RECT 1237.545000 0.320000 1237.715000 0.845000 ;
+ RECT 1244.445000 0.320000 1244.615000 0.845000 ;
+ RECT 1255.945000 0.320000 1256.115000 0.845000 ;
+ RECT 1258.705000 0.320000 1258.875000 0.845000 ;
+ RECT 1261.925000 0.320000 1262.095000 0.845000 ;
+ RECT 1266.065000 0.320000 1266.235000 0.845000 ;
+ RECT 1269.745000 0.320000 1269.915000 0.845000 ;
+ RECT 1273.885000 0.320000 1274.055000 0.845000 ;
+ RECT 1278.945000 0.320000 1279.115000 0.845000 ;
+ RECT 1282.165000 0.320000 1282.335000 0.845000 ;
+ RECT 1285.845000 0.320000 1286.015000 0.845000 ;
+ RECT 1290.905000 0.320000 1291.075000 0.845000 ;
+ RECT 1295.045000 0.320000 1295.215000 0.845000 ;
+ RECT 1299.185000 0.320000 1299.355000 0.845000 ;
+ RECT 1304.245000 0.320000 1304.415000 0.845000 ;
+ RECT 1307.925000 0.320000 1308.095000 0.845000 ;
+ RECT 1312.065000 0.320000 1312.235000 0.845000 ;
+ RECT 1317.125000 0.320000 1317.295000 0.845000 ;
+ RECT 1321.725000 0.320000 1321.895000 0.845000 ;
+ RECT 1326.325000 0.320000 1326.495000 0.845000 ;
+ RECT 1332.305000 0.320000 1332.475000 0.845000 ;
+ RECT 1337.365000 0.320000 1337.535000 0.845000 ;
+ RECT 1342.885000 0.320000 1343.055000 0.845000 ;
+ RECT 1349.325000 0.320000 1349.495000 0.845000 ;
+ RECT 1365.425000 0.320000 1365.595000 0.845000 ;
+ RECT 1380.145000 0.320000 1380.315000 0.845000 ;
+ RECT 1395.325000 0.320000 1395.495000 0.845000 ;
+ RECT 1408.665000 0.320000 1408.835000 0.845000 ;
+ RECT 1422.005000 0.320000 1422.175000 0.845000 ;
+ RECT 1435.805000 0.320000 1435.975000 0.845000 ;
+ RECT 1450.985000 0.320000 1451.155000 0.845000 ;
+ RECT 1467.085000 0.320000 1467.255000 0.845000 ;
+ RECT 1480.885000 0.320000 1481.055000 0.845000 ;
+ RECT 1495.605000 0.320000 1495.775000 0.845000 ;
+ RECT 1511.245000 0.320000 1511.415000 0.845000 ;
+ RECT 1523.665000 0.320000 1523.835000 0.845000 ;
+ RECT 1537.465000 0.320000 1537.635000 0.845000 ;
+ RECT 1548.505000 0.320000 1548.675000 0.845000 ;
+ RECT 1560.005000 0.320000 1560.175000 0.845000 ;
+ RECT 1572.425000 0.320000 1572.595000 0.845000 ;
+ RECT 1580.245000 0.320000 1580.415000 0.845000 ;
+ RECT 1588.525000 0.320000 1588.695000 0.845000 ;
+ RECT 1598.185000 0.320000 1598.355000 0.845000 ;
+ RECT 1613.825000 0.320000 1613.995000 0.845000 ;
+ RECT 1630.845000 0.320000 1631.015000 0.845000 ;
+ RECT 1634.985000 0.320000 1635.155000 0.845000 ;
+ RECT 1641.885000 0.320000 1642.055000 0.845000 ;
+ RECT 1653.385000 0.320000 1653.555000 0.845000 ;
+ RECT 1663.045000 0.320000 1663.215000 0.845000 ;
+ RECT 1673.165000 0.320000 1673.335000 0.845000 ;
+ RECT 1684.205000 0.320000 1684.375000 0.845000 ;
+ RECT 1688.345000 0.320000 1688.515000 0.845000 ;
+ RECT 1695.245000 0.320000 1695.415000 0.845000 ;
+ RECT 1706.745000 0.320000 1706.915000 0.845000 ;
+ RECT 1716.865000 0.320000 1717.035000 0.845000 ;
+ RECT 1726.985000 0.320000 1727.155000 0.845000 ;
+ RECT 1738.025000 0.320000 1738.195000 0.845000 ;
+ RECT 1752.745000 0.320000 1752.915000 0.845000 ;
+ RECT 1755.505000 0.320000 1755.675000 0.845000 ;
+ RECT 1759.185000 0.320000 1759.355000 0.845000 ;
+ RECT 1762.865000 0.320000 1763.035000 0.845000 ;
+ RECT 1765.625000 0.320000 1765.795000 0.845000 ;
+ RECT 1768.385000 0.320000 1768.555000 0.845000 ;
+ RECT 1772.525000 0.320000 1772.695000 0.845000 ;
+ RECT 1778.505000 0.320000 1778.675000 0.845000 ;
+ RECT 1788.625000 0.320000 1788.795000 0.845000 ;
+ RECT 1807.485000 0.320000 1807.655000 0.845000 ;
+ RECT 1809.325000 0.320000 1809.495000 0.845000 ;
+ RECT 1811.625000 0.320000 1811.795000 0.845000 ;
+ RECT 1814.845000 0.320000 1815.015000 0.845000 ;
+ RECT 1818.985000 0.320000 1819.155000 0.845000 ;
+ RECT 1824.965000 0.320000 1825.135000 0.845000 ;
+ RECT 1832.325000 0.320000 1832.495000 0.845000 ;
+ RECT 1832.785000 0.320000 1832.955000 0.845000 ;
+ RECT 1841.985000 0.320000 1842.155000 0.845000 ;
+ RECT 1855.325000 0.320000 1855.495000 0.845000 ;
+ RECT 1881.545000 0.320000 1881.715000 0.845000 ;
+ RECT 1899.025000 0.320000 1899.195000 0.845000 ;
+ RECT 1925.245000 0.320000 1925.415000 0.845000 ;
+ RECT 1930.305000 0.320000 1930.475000 0.845000 ;
+ RECT 1935.825000 0.320000 1935.995000 0.845000 ;
+ RECT 1942.265000 0.320000 1942.435000 0.845000 ;
+ RECT 1942.265000 4.595000 1942.435000 5.120000 ;
+ RECT 1967.565000 0.320000 1967.735000 0.845000 ;
+ RECT 1967.565000 4.595000 1967.735000 5.120000 ;
+ RECT 1985.045000 0.320000 1985.215000 0.845000 ;
+ RECT 1985.045000 4.595000 1985.215000 5.120000 ;
+ RECT 2011.265000 0.320000 2011.435000 0.845000 ;
+ RECT 2011.265000 4.595000 2011.435000 5.120000 ;
+ RECT 2037.485000 0.320000 2037.655000 0.845000 ;
+ RECT 2037.485000 4.595000 2037.655000 5.120000 ;
+ RECT 2063.705000 0.320000 2063.875000 0.845000 ;
+ RECT 2063.705000 4.595000 2063.875000 5.120000 ;
END
END VGND
PIN VPWR
@@ -39,6 +371,25 @@
RECT 177.780000 1.550000 180.095000 2.265000 ;
RECT 177.780000 2.565000 180.095000 3.280000 ;
RECT 177.980000 2.265000 180.095000 2.565000 ;
+ LAYER nwell ;
+ RECT -0.190000 1.305000 1367.860000 1.425000 ;
+ RECT -0.190000 1.425000 1603.785000 1.435000 ;
+ RECT -0.190000 1.435000 2064.210000 2.910000 ;
+ RECT -0.190000 2.910000 234.790000 3.370000 ;
+ RECT -0.190000 3.370000 228.350000 4.135000 ;
+ RECT 229.810000 3.370000 231.110000 4.135000 ;
+ RECT 233.490000 3.370000 234.790000 4.135000 ;
+ RECT 1343.010000 1.285000 1349.370000 1.305000 ;
+ RECT 1370.195000 1.305000 1382.580000 1.425000 ;
+ RECT 1384.915000 1.305000 1397.760000 1.425000 ;
+ RECT 1400.095000 1.305000 1411.100000 1.425000 ;
+ RECT 1413.435000 1.305000 1424.440000 1.425000 ;
+ RECT 1426.775000 1.305000 1603.785000 1.425000 ;
+ RECT 1606.485000 1.305000 1619.425000 1.435000 ;
+ RECT 1622.125000 1.305000 1740.460000 1.425000 ;
+ RECT 1622.125000 1.425000 2064.210000 1.435000 ;
+ RECT 1742.795000 1.305000 2064.210000 1.425000 ;
+ RECT 1941.930000 2.910000 2064.210000 4.135000 ;
END
END VPWR
OBS
@@ -26491,6 +26842,396 @@
RECT 174.580000 1.615000 176.180000 6.545000 ;
RECT 177.780000 2.365000 177.880000 2.465000 ;
RECT 177.780000 5.695000 177.880000 5.795000 ;
+ LAYER pwell ;
+ RECT 0.135000 -0.085000 0.305000 0.085000 ;
+ RECT 0.145000 5.355000 0.315000 5.525000 ;
+ RECT 4.290000 -0.085000 4.460000 0.085000 ;
+ RECT 7.505000 5.355000 7.675000 5.525000 ;
+ RECT 8.885000 -0.085000 9.055000 0.085000 ;
+ RECT 15.785000 5.355000 15.955000 5.525000 ;
+ RECT 16.705000 -0.085000 16.875000 0.085000 ;
+ RECT 19.905000 -0.085000 20.075000 0.085000 ;
+ RECT 21.765000 5.355000 21.935000 5.525000 ;
+ RECT 25.450000 -0.085000 25.620000 0.085000 ;
+ RECT 28.665000 5.355000 28.835000 5.525000 ;
+ RECT 33.725000 5.355000 33.895000 5.525000 ;
+ RECT 34.185000 -0.085000 34.355000 0.085000 ;
+ RECT 38.790000 -0.085000 38.960000 0.085000 ;
+ RECT 42.470000 5.355000 42.640000 5.525000 ;
+ RECT 43.385000 -0.085000 43.555000 0.085000 ;
+ RECT 50.285000 -0.085000 50.455000 0.085000 ;
+ RECT 52.130000 5.355000 52.300000 5.525000 ;
+ RECT 53.970000 -0.085000 54.140000 0.085000 ;
+ RECT 59.025000 -0.085000 59.195000 0.085000 ;
+ RECT 66.845000 -0.085000 67.015000 0.085000 ;
+ RECT 69.150000 5.355000 69.320000 5.525000 ;
+ RECT 70.530000 -0.085000 70.700000 0.085000 ;
+ RECT 74.665000 -0.085000 74.835000 0.085000 ;
+ RECT 81.105000 -0.085000 81.275000 0.085000 ;
+ RECT 83.865000 -0.085000 84.035000 0.085000 ;
+ RECT 88.010000 -0.085000 88.180000 0.085000 ;
+ RECT 88.010000 5.355000 88.180000 5.525000 ;
+ RECT 94.905000 -0.085000 95.075000 0.085000 ;
+ RECT 94.905000 5.355000 95.075000 5.525000 ;
+ RECT 99.050000 -0.085000 99.220000 0.085000 ;
+ RECT 105.490000 -0.085000 105.660000 0.085000 ;
+ RECT 107.325000 5.355000 107.495000 5.525000 ;
+ RECT 116.530000 -0.085000 116.700000 0.085000 ;
+ RECT 121.125000 -0.085000 121.295000 0.085000 ;
+ RECT 123.430000 5.355000 123.600000 5.525000 ;
+ RECT 125.270000 -0.085000 125.440000 0.085000 ;
+ RECT 129.865000 -0.085000 130.035000 0.085000 ;
+ RECT 136.310000 5.355000 136.480000 5.525000 ;
+ RECT 137.230000 -0.085000 137.400000 0.085000 ;
+ RECT 140.910000 -0.085000 141.080000 0.085000 ;
+ RECT 146.430000 -0.085000 146.600000 0.085000 ;
+ RECT 152.870000 5.355000 153.040000 5.525000 ;
+ RECT 155.630000 -0.085000 155.800000 0.085000 ;
+ RECT 159.310000 5.355000 159.480000 5.525000 ;
+ RECT 160.205000 -0.085000 160.375000 0.085000 ;
+ RECT 165.290000 -0.085000 165.460000 0.085000 ;
+ RECT 167.130000 5.355000 167.300000 5.525000 ;
+ RECT 173.565000 -0.085000 173.735000 0.085000 ;
+ RECT 173.570000 5.355000 173.740000 5.525000 ;
+ RECT 177.705000 -0.085000 177.875000 0.085000 ;
+ RECT 180.005000 5.355000 180.175000 5.525000 ;
+ RECT 184.150000 -0.085000 184.320000 0.085000 ;
+ RECT 186.905000 5.355000 187.075000 5.525000 ;
+ RECT 193.805000 5.355000 193.975000 5.525000 ;
+ RECT 195.190000 -0.085000 195.360000 0.085000 ;
+ RECT 198.870000 -0.085000 199.040000 0.085000 ;
+ RECT 201.165000 5.355000 201.335000 5.525000 ;
+ RECT 203.010000 -0.085000 203.180000 0.085000 ;
+ RECT 208.525000 5.355000 208.695000 5.525000 ;
+ RECT 210.370000 -0.085000 210.540000 0.085000 ;
+ RECT 213.590000 -0.085000 213.760000 0.085000 ;
+ RECT 216.805000 5.355000 216.975000 5.525000 ;
+ RECT 219.110000 -0.085000 219.280000 0.085000 ;
+ RECT 225.085000 5.355000 225.255000 5.525000 ;
+ RECT 226.005000 5.355000 226.175000 5.525000 ;
+ RECT 227.845000 5.355000 228.015000 5.525000 ;
+ RECT 228.310000 -0.085000 228.480000 0.085000 ;
+ RECT 230.605000 5.355000 230.775000 5.525000 ;
+ RECT 232.910000 -0.085000 233.080000 0.085000 ;
+ RECT 237.970000 -0.085000 238.140000 0.085000 ;
+ RECT 246.705000 -0.085000 246.875000 0.085000 ;
+ RECT 250.390000 -0.085000 250.560000 0.085000 ;
+ RECT 257.290000 -0.085000 257.460000 0.085000 ;
+ RECT 269.245000 -0.085000 269.415000 0.085000 ;
+ RECT 272.005000 -0.085000 272.175000 0.085000 ;
+ RECT 275.225000 -0.085000 275.395000 0.085000 ;
+ RECT 279.365000 -0.085000 279.535000 0.085000 ;
+ RECT 283.050000 -0.085000 283.220000 0.085000 ;
+ RECT 287.185000 -0.085000 287.355000 0.085000 ;
+ RECT 291.785000 -0.085000 291.955000 0.085000 ;
+ RECT 295.005000 -0.085000 295.175000 0.085000 ;
+ RECT 298.685000 -0.085000 298.855000 0.085000 ;
+ RECT 303.750000 -0.085000 303.920000 0.085000 ;
+ RECT 307.885000 -0.085000 308.055000 0.085000 ;
+ RECT 312.485000 -0.085000 312.655000 0.085000 ;
+ RECT 318.005000 -0.085000 318.175000 0.085000 ;
+ RECT 321.690000 -0.085000 321.860000 0.085000 ;
+ RECT 325.830000 -0.085000 326.000000 0.085000 ;
+ RECT 330.885000 -0.085000 331.055000 0.085000 ;
+ RECT 335.490000 -0.085000 335.660000 0.085000 ;
+ RECT 340.550000 -0.085000 340.720000 0.085000 ;
+ RECT 346.065000 -0.085000 346.235000 0.085000 ;
+ RECT 351.130000 -0.085000 351.300000 0.085000 ;
+ RECT 356.650000 -0.085000 356.820000 0.085000 ;
+ RECT 363.555000 -0.085000 363.725000 0.085000 ;
+ RECT 366.320000 -0.085000 366.490000 0.085000 ;
+ RECT 374.590000 -0.085000 374.760000 0.085000 ;
+ RECT 386.545000 -0.085000 386.715000 0.085000 ;
+ RECT 389.310000 -0.085000 389.480000 0.085000 ;
+ RECT 392.990000 -0.085000 393.160000 0.085000 ;
+ RECT 398.050000 -0.085000 398.220000 0.085000 ;
+ RECT 404.490000 -0.085000 404.660000 0.085000 ;
+ RECT 418.290000 -0.085000 418.460000 0.085000 ;
+ RECT 426.110000 -0.085000 426.280000 0.085000 ;
+ RECT 438.990000 -0.085000 439.160000 0.085000 ;
+ RECT 447.365000 -0.085000 447.535000 0.085000 ;
+ RECT 448.645000 -0.085000 448.815000 0.085000 ;
+ RECT 459.230000 -0.085000 459.400000 0.085000 ;
+ RECT 461.985000 -0.085000 462.155000 0.085000 ;
+ RECT 465.665000 -0.085000 465.835000 0.085000 ;
+ RECT 471.645000 -0.085000 471.815000 0.085000 ;
+ RECT 473.945000 -0.085000 474.115000 0.085000 ;
+ RECT 486.825000 -0.085000 486.995000 0.085000 ;
+ RECT 489.585000 -0.085000 489.755000 0.085000 ;
+ RECT 493.730000 -0.085000 493.900000 0.085000 ;
+ RECT 500.625000 -0.085000 500.795000 0.085000 ;
+ RECT 502.925000 -0.085000 503.095000 0.085000 ;
+ RECT 506.145000 -0.085000 506.315000 0.085000 ;
+ RECT 507.985000 -0.085000 508.155000 0.085000 ;
+ RECT 518.105000 -0.085000 518.275000 0.085000 ;
+ RECT 528.685000 -0.085000 528.855000 0.085000 ;
+ RECT 540.645000 -0.085000 540.815000 0.085000 ;
+ RECT 551.225000 -0.085000 551.395000 0.085000 ;
+ RECT 562.265000 -0.085000 562.435000 0.085000 ;
+ RECT 574.690000 -0.085000 574.860000 0.085000 ;
+ RECT 581.130000 -0.085000 581.300000 0.085000 ;
+ RECT 588.025000 -0.085000 588.195000 0.085000 ;
+ RECT 595.840000 -0.085000 596.010000 0.085000 ;
+ RECT 599.520000 -0.085000 599.690000 0.085000 ;
+ RECT 603.200000 -0.085000 603.370000 0.085000 ;
+ RECT 607.350000 -0.085000 607.520000 0.085000 ;
+ RECT 611.490000 -0.085000 611.660000 0.085000 ;
+ RECT 616.550000 -0.085000 616.720000 0.085000 ;
+ RECT 623.445000 -0.085000 623.615000 0.085000 ;
+ RECT 634.945000 -0.085000 635.115000 0.085000 ;
+ RECT 638.165000 -0.085000 638.335000 0.085000 ;
+ RECT 642.310000 -0.085000 642.480000 0.085000 ;
+ RECT 648.290000 -0.085000 648.460000 0.085000 ;
+ RECT 657.950000 -0.085000 658.120000 0.085000 ;
+ RECT 661.170000 -0.085000 661.340000 0.085000 ;
+ RECT 665.310000 -0.085000 665.480000 0.085000 ;
+ RECT 671.290000 -0.085000 671.460000 0.085000 ;
+ RECT 680.945000 -0.085000 681.115000 0.085000 ;
+ RECT 682.785000 -0.085000 682.955000 0.085000 ;
+ RECT 689.685000 -0.085000 689.855000 0.085000 ;
+ RECT 698.425000 -0.085000 698.595000 0.085000 ;
+ RECT 700.725000 -0.085000 700.895000 0.085000 ;
+ RECT 703.945000 -0.085000 704.115000 0.085000 ;
+ RECT 708.085000 -0.085000 708.255000 0.085000 ;
+ RECT 713.420000 -0.085000 713.640000 0.085000 ;
+ RECT 718.210000 -0.085000 718.380000 0.085000 ;
+ RECT 723.270000 -0.085000 723.440000 0.085000 ;
+ RECT 729.710000 -0.085000 729.880000 0.085000 ;
+ RECT 740.745000 -0.085000 740.915000 0.085000 ;
+ RECT 745.350000 -0.085000 745.520000 0.085000 ;
+ RECT 751.330000 -0.085000 751.500000 0.085000 ;
+ RECT 760.980000 -0.085000 761.150000 0.085000 ;
+ RECT 763.290000 -0.085000 763.460000 0.085000 ;
+ RECT 766.510000 -0.085000 766.680000 0.085000 ;
+ RECT 771.570000 -0.085000 771.740000 0.085000 ;
+ RECT 780.310000 -0.085000 780.480000 0.085000 ;
+ RECT 783.070000 -0.085000 783.240000 0.085000 ;
+ RECT 786.750000 -0.085000 786.920000 0.085000 ;
+ RECT 792.730000 -0.085000 792.900000 0.085000 ;
+ RECT 795.490000 -0.085000 795.660000 0.085000 ;
+ RECT 800.090000 -0.085000 800.260000 0.085000 ;
+ RECT 807.445000 -0.085000 807.615000 0.085000 ;
+ RECT 810.670000 -0.085000 810.840000 0.085000 ;
+ RECT 815.730000 -0.085000 815.900000 0.085000 ;
+ RECT 824.010000 -0.085000 824.180000 0.085000 ;
+ RECT 827.230000 -0.085000 827.400000 0.085000 ;
+ RECT 832.750000 -0.085000 832.920000 0.085000 ;
+ RECT 841.945000 -0.085000 842.115000 0.085000 ;
+ RECT 845.630000 -0.085000 845.800000 0.085000 ;
+ RECT 852.070000 -0.085000 852.240000 0.085000 ;
+ RECT 862.185000 -0.085000 862.355000 0.085000 ;
+ RECT 866.785000 -0.085000 866.955000 0.085000 ;
+ RECT 873.685000 -0.085000 873.855000 0.085000 ;
+ RECT 884.730000 -0.085000 884.900000 0.085000 ;
+ RECT 887.030000 -0.085000 887.200000 0.085000 ;
+ RECT 890.250000 -0.085000 890.420000 0.085000 ;
+ RECT 895.305000 -0.085000 895.475000 0.085000 ;
+ RECT 904.045000 -0.085000 904.215000 0.085000 ;
+ RECT 906.810000 -0.085000 906.980000 0.085000 ;
+ RECT 910.950000 -0.085000 911.120000 0.085000 ;
+ RECT 916.930000 -0.085000 917.100000 0.085000 ;
+ RECT 919.690000 -0.085000 919.860000 0.085000 ;
+ RECT 924.290000 -0.085000 924.460000 0.085000 ;
+ RECT 931.185000 -0.085000 931.355000 0.085000 ;
+ RECT 934.410000 -0.085000 934.580000 0.085000 ;
+ RECT 939.930000 -0.085000 940.100000 0.085000 ;
+ RECT 947.745000 -0.085000 947.915000 0.085000 ;
+ RECT 950.970000 -0.085000 951.140000 0.085000 ;
+ RECT 956.490000 -0.085000 956.660000 0.085000 ;
+ RECT 965.685000 -0.085000 965.855000 0.085000 ;
+ RECT 969.825000 -0.085000 969.995000 0.085000 ;
+ RECT 976.265000 -0.085000 976.435000 0.085000 ;
+ RECT 986.390000 -0.085000 986.560000 0.085000 ;
+ RECT 990.985000 -0.085000 991.155000 0.085000 ;
+ RECT 997.890000 -0.085000 998.060000 0.085000 ;
+ RECT 1008.470000 -0.085000 1008.640000 0.085000 ;
+ RECT 1013.070000 -0.085000 1013.240000 0.085000 ;
+ RECT 1017.665000 -0.085000 1017.835000 0.085000 ;
+ RECT 1025.025000 -0.085000 1025.195000 0.085000 ;
+ RECT 1028.245000 -0.085000 1028.415000 0.085000 ;
+ RECT 1033.770000 -0.085000 1033.940000 0.085000 ;
+ RECT 1042.965000 -0.085000 1043.135000 0.085000 ;
+ RECT 1046.650000 -0.085000 1046.820000 0.085000 ;
+ RECT 1050.790000 -0.085000 1050.960000 0.085000 ;
+ RECT 1057.230000 -0.085000 1057.400000 0.085000 ;
+ RECT 1059.980000 -0.085000 1060.150000 0.085000 ;
+ RECT 1064.125000 -0.085000 1064.295000 0.085000 ;
+ RECT 1071.025000 -0.085000 1071.195000 0.085000 ;
+ RECT 1075.165000 -0.085000 1075.335000 0.085000 ;
+ RECT 1079.765000 -0.085000 1079.935000 0.085000 ;
+ RECT 1086.665000 -0.085000 1086.835000 0.085000 ;
+ RECT 1090.345000 -0.085000 1090.515000 0.085000 ;
+ RECT 1095.405000 -0.085000 1095.575000 0.085000 ;
+ RECT 1103.225000 -0.085000 1103.395000 0.085000 ;
+ RECT 1107.800000 -0.085000 1107.970000 0.085000 ;
+ RECT 1112.890000 -0.085000 1113.060000 0.085000 ;
+ RECT 1121.165000 -0.085000 1121.335000 0.085000 ;
+ RECT 1125.305000 -0.085000 1125.475000 0.085000 ;
+ RECT 1131.750000 -0.085000 1131.920000 0.085000 ;
+ RECT 1142.785000 -0.085000 1142.955000 0.085000 ;
+ RECT 1146.910000 -0.085000 1147.080000 0.085000 ;
+ RECT 1151.525000 -0.085000 1151.695000 0.085000 ;
+ RECT 1158.885000 -0.085000 1159.055000 0.085000 ;
+ RECT 1162.110000 -0.085000 1162.280000 0.085000 ;
+ RECT 1167.625000 -0.085000 1167.795000 0.085000 ;
+ RECT 1176.370000 -0.085000 1176.540000 0.085000 ;
+ RECT 1180.955000 -0.085000 1181.125000 0.085000 ;
+ RECT 1186.025000 -0.085000 1186.195000 0.085000 ;
+ RECT 1194.305000 -0.085000 1194.475000 0.085000 ;
+ RECT 1198.450000 -0.085000 1198.620000 0.085000 ;
+ RECT 1204.875000 -0.085000 1205.045000 0.085000 ;
+ RECT 1216.390000 -0.085000 1216.560000 0.085000 ;
+ RECT 1219.610000 -0.085000 1219.780000 0.085000 ;
+ RECT 1225.125000 -0.085000 1225.295000 0.085000 ;
+ RECT 1234.330000 -0.085000 1234.500000 0.085000 ;
+ RECT 1238.005000 -0.085000 1238.175000 0.085000 ;
+ RECT 1244.910000 -0.085000 1245.080000 0.085000 ;
+ RECT 1256.405000 -0.085000 1256.575000 0.085000 ;
+ RECT 1259.170000 -0.085000 1259.340000 0.085000 ;
+ RECT 1262.390000 -0.085000 1262.560000 0.085000 ;
+ RECT 1266.530000 -0.085000 1266.700000 0.085000 ;
+ RECT 1270.205000 -0.085000 1270.375000 0.085000 ;
+ RECT 1274.345000 -0.085000 1274.515000 0.085000 ;
+ RECT 1279.400000 -0.085000 1279.570000 0.085000 ;
+ RECT 1282.625000 -0.085000 1282.795000 0.085000 ;
+ RECT 1286.310000 -0.085000 1286.480000 0.085000 ;
+ RECT 1291.365000 -0.085000 1291.535000 0.085000 ;
+ RECT 1295.505000 -0.085000 1295.675000 0.085000 ;
+ RECT 1299.650000 -0.085000 1299.820000 0.085000 ;
+ RECT 1304.710000 -0.085000 1304.880000 0.085000 ;
+ RECT 1308.390000 -0.085000 1308.560000 0.085000 ;
+ RECT 1312.520000 -0.085000 1312.690000 0.085000 ;
+ RECT 1317.590000 -0.085000 1317.760000 0.085000 ;
+ RECT 1322.190000 -0.085000 1322.360000 0.085000 ;
+ RECT 1326.785000 -0.085000 1326.955000 0.085000 ;
+ RECT 1332.765000 -0.085000 1332.935000 0.085000 ;
+ RECT 1337.830000 -0.085000 1338.000000 0.085000 ;
+ RECT 1343.345000 -0.085000 1343.515000 0.085000 ;
+ RECT 1349.785000 -0.085000 1349.955000 0.085000 ;
+ RECT 1365.955000 -0.010000 1365.975000 0.015000 ;
+ RECT 1380.675000 -0.010000 1380.695000 0.015000 ;
+ RECT 1395.855000 -0.010000 1395.875000 0.015000 ;
+ RECT 1409.195000 -0.010000 1409.215000 0.015000 ;
+ RECT 1422.535000 -0.010000 1422.555000 0.015000 ;
+ RECT 1436.270000 -0.085000 1436.440000 0.085000 ;
+ RECT 1451.450000 -0.085000 1451.620000 0.085000 ;
+ RECT 1467.545000 -0.085000 1467.715000 0.085000 ;
+ RECT 1481.345000 -0.085000 1481.515000 0.085000 ;
+ RECT 1496.065000 -0.085000 1496.235000 0.085000 ;
+ RECT 1511.705000 -0.085000 1511.875000 0.085000 ;
+ RECT 1524.125000 -0.085000 1524.295000 0.085000 ;
+ RECT 1537.925000 -0.085000 1538.095000 0.085000 ;
+ RECT 1548.965000 -0.085000 1549.135000 0.085000 ;
+ RECT 1560.465000 -0.085000 1560.635000 0.085000 ;
+ RECT 1572.890000 -0.085000 1573.060000 0.085000 ;
+ RECT 1580.710000 -0.085000 1580.880000 0.085000 ;
+ RECT 1588.990000 -0.085000 1589.160000 0.085000 ;
+ RECT 1598.645000 -0.085000 1598.815000 0.085000 ;
+ RECT 1614.285000 -0.085000 1614.455000 0.085000 ;
+ RECT 1631.305000 -0.085000 1631.475000 0.085000 ;
+ RECT 1635.445000 -0.085000 1635.615000 0.085000 ;
+ RECT 1642.345000 -0.085000 1642.515000 0.085000 ;
+ RECT 1653.845000 -0.085000 1654.015000 0.085000 ;
+ RECT 1663.510000 -0.085000 1663.680000 0.085000 ;
+ RECT 1673.625000 -0.085000 1673.795000 0.085000 ;
+ RECT 1684.665000 -0.085000 1684.835000 0.085000 ;
+ RECT 1688.805000 -0.085000 1688.975000 0.085000 ;
+ RECT 1695.705000 -0.085000 1695.875000 0.085000 ;
+ RECT 1707.205000 -0.085000 1707.375000 0.085000 ;
+ RECT 1717.325000 -0.085000 1717.495000 0.085000 ;
+ RECT 1727.535000 -0.085000 1727.705000 0.085000 ;
+ RECT 1738.555000 -0.010000 1738.575000 0.015000 ;
+ RECT 1753.205000 -0.085000 1753.375000 0.085000 ;
+ RECT 1755.965000 -0.085000 1756.135000 0.085000 ;
+ RECT 1759.650000 -0.085000 1759.820000 0.085000 ;
+ RECT 1763.325000 -0.085000 1763.495000 0.085000 ;
+ RECT 1766.085000 -0.085000 1766.255000 0.085000 ;
+ RECT 1768.850000 -0.085000 1769.020000 0.085000 ;
+ RECT 1772.990000 -0.085000 1773.160000 0.085000 ;
+ RECT 1778.965000 -0.085000 1779.135000 0.085000 ;
+ RECT 1789.085000 -0.085000 1789.255000 0.085000 ;
+ RECT 1807.945000 -0.085000 1808.115000 0.085000 ;
+ RECT 1809.785000 -0.085000 1809.955000 0.085000 ;
+ RECT 1812.085000 -0.085000 1812.255000 0.085000 ;
+ RECT 1815.305000 -0.085000 1815.475000 0.085000 ;
+ RECT 1819.445000 -0.085000 1819.615000 0.085000 ;
+ RECT 1825.420000 -0.055000 1825.540000 0.055000 ;
+ RECT 1825.895000 -0.050000 1826.055000 0.060000 ;
+ RECT 1826.835000 -0.060000 1826.945000 0.060000 ;
+ RECT 1828.630000 -0.120000 1828.850000 0.050000 ;
+ RECT 1833.245000 -0.085000 1833.415000 0.085000 ;
+ RECT 1842.445000 -0.085000 1842.615000 0.085000 ;
+ RECT 1848.425000 -0.085000 1848.595000 0.085000 ;
+ RECT 1848.885000 -0.085000 1849.055000 0.085000 ;
+ RECT 1854.865000 -0.085000 1855.035000 0.085000 ;
+ RECT 1855.785000 -0.085000 1855.955000 0.085000 ;
+ RECT 1868.205000 -0.085000 1868.375000 0.085000 ;
+ RECT 1868.665000 -0.085000 1868.835000 0.085000 ;
+ RECT 1881.085000 -0.085000 1881.255000 0.085000 ;
+ RECT 1882.005000 -0.085000 1882.175000 0.085000 ;
+ RECT 1886.145000 -0.085000 1886.315000 0.085000 ;
+ RECT 1890.285000 -0.085000 1890.455000 0.085000 ;
+ RECT 1894.425000 -0.085000 1894.595000 0.085000 ;
+ RECT 1898.565000 -0.085000 1898.735000 0.085000 ;
+ RECT 1899.485000 -0.085000 1899.655000 0.085000 ;
+ RECT 1905.465000 -0.085000 1905.635000 0.085000 ;
+ RECT 1905.925000 -0.085000 1906.095000 0.085000 ;
+ RECT 1911.905000 -0.085000 1912.075000 0.085000 ;
+ RECT 1912.365000 -0.085000 1912.535000 0.085000 ;
+ RECT 1918.345000 -0.085000 1918.515000 0.085000 ;
+ RECT 1918.805000 -0.085000 1918.975000 0.085000 ;
+ RECT 1924.785000 -0.085000 1924.955000 0.085000 ;
+ RECT 1925.980000 -0.085000 1926.200000 0.085000 ;
+ RECT 1931.500000 -0.085000 1931.720000 0.085000 ;
+ RECT 1937.940000 -0.085000 1938.160000 0.085000 ;
+ RECT 1942.725000 -0.085000 1942.895000 0.085000 ;
+ RECT 1942.725000 5.355000 1942.895000 5.525000 ;
+ RECT 1948.705000 -0.085000 1948.875000 0.085000 ;
+ RECT 1948.705000 5.355000 1948.875000 5.525000 ;
+ RECT 1961.125000 -0.085000 1961.295000 0.085000 ;
+ RECT 1961.125000 5.355000 1961.295000 5.525000 ;
+ RECT 1968.025000 -0.085000 1968.195000 0.085000 ;
+ RECT 1968.025000 5.355000 1968.195000 5.525000 ;
+ RECT 1972.165000 -0.085000 1972.335000 0.085000 ;
+ RECT 1972.165000 5.355000 1972.335000 5.525000 ;
+ RECT 1976.305000 -0.085000 1976.475000 0.085000 ;
+ RECT 1976.305000 5.355000 1976.475000 5.525000 ;
+ RECT 1980.445000 -0.085000 1980.615000 0.085000 ;
+ RECT 1980.445000 5.355000 1980.615000 5.525000 ;
+ RECT 1984.585000 -0.085000 1984.755000 0.085000 ;
+ RECT 1984.585000 5.355000 1984.755000 5.525000 ;
+ RECT 1985.505000 -0.085000 1985.675000 0.085000 ;
+ RECT 1985.505000 5.355000 1985.675000 5.525000 ;
+ RECT 1991.485000 -0.085000 1991.655000 0.085000 ;
+ RECT 1991.485000 5.355000 1991.655000 5.525000 ;
+ RECT 1991.945000 -0.085000 1992.115000 0.085000 ;
+ RECT 1991.945000 5.355000 1992.115000 5.525000 ;
+ RECT 1997.925000 -0.085000 1998.095000 0.085000 ;
+ RECT 1997.925000 5.355000 1998.095000 5.525000 ;
+ RECT 1998.385000 -0.085000 1998.555000 0.085000 ;
+ RECT 1998.385000 5.355000 1998.555000 5.525000 ;
+ RECT 2004.365000 -0.085000 2004.535000 0.085000 ;
+ RECT 2004.365000 5.355000 2004.535000 5.525000 ;
+ RECT 2004.825000 -0.085000 2004.995000 0.085000 ;
+ RECT 2004.825000 5.355000 2004.995000 5.525000 ;
+ RECT 2010.805000 -0.085000 2010.975000 0.085000 ;
+ RECT 2010.805000 5.355000 2010.975000 5.525000 ;
+ RECT 2011.725000 -0.085000 2011.895000 0.085000 ;
+ RECT 2011.725000 5.355000 2011.895000 5.525000 ;
+ RECT 2024.145000 -0.085000 2024.315000 0.085000 ;
+ RECT 2024.145000 5.355000 2024.315000 5.525000 ;
+ RECT 2024.605000 -0.085000 2024.775000 0.085000 ;
+ RECT 2024.605000 5.355000 2024.775000 5.525000 ;
+ RECT 2037.025000 -0.085000 2037.195000 0.085000 ;
+ RECT 2037.025000 5.355000 2037.195000 5.525000 ;
+ RECT 2037.945000 -0.085000 2038.115000 0.085000 ;
+ RECT 2037.945000 5.355000 2038.115000 5.525000 ;
+ RECT 2050.365000 -0.085000 2050.535000 0.085000 ;
+ RECT 2050.365000 5.355000 2050.535000 5.525000 ;
+ RECT 2050.825000 -0.085000 2050.995000 0.085000 ;
+ RECT 2050.825000 5.355000 2050.995000 5.525000 ;
+ RECT 2063.245000 -0.085000 2063.415000 0.085000 ;
+ RECT 2063.245000 5.355000 2063.415000 5.525000 ;
LAYER via ;
RECT 156.215000 4.120000 156.475000 4.380000 ;
RECT 156.535000 4.120000 156.795000 4.380000 ;
diff --git a/cells/tap/sky130_fd_sc_hdll__tap_1.magic.lef b/cells/tap/sky130_fd_sc_hdll__tap_1.magic.lef
index b52a59f..2c6224d 100644
--- a/cells/tap/sky130_fd_sc_hdll__tap_1.magic.lef
+++ b/cells/tap/sky130_fd_sc_hdll__tap_1.magic.lef
@@ -30,20 +30,6 @@
SIZE 0.460000 BY 2.720000 ;
SYMMETRY X Y R90 ;
SITE unithd ;
- PIN VNB
- ANTENNADIFFAREA 0.089250 ;
- PORT
- LAYER li1 ;
- RECT 0.085000 0.265000 0.375000 0.810000 ;
- END
- END VNB
- PIN VPB
- ANTENNADIFFAREA 0.148750 ;
- PORT
- LAYER li1 ;
- RECT 0.085000 1.470000 0.375000 2.455000 ;
- END
- END VPB
PIN VGND
DIRECTION INOUT ;
USE GROUND ;
@@ -52,6 +38,26 @@
RECT 0.000000 -0.240000 0.460000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER li1 ;
+ RECT 0.085000 0.265000 0.375000 0.810000 ;
+ LAYER pwell ;
+ RECT 0.145000 0.320000 0.315000 0.845000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER li1 ;
+ RECT 0.085000 1.470000 0.375000 2.455000 ;
+ LAYER nwell ;
+ RECT -0.190000 1.305000 0.650000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/tapvgnd/sky130_fd_sc_hdll__tapvgnd_1.magic.lef b/cells/tapvgnd/sky130_fd_sc_hdll__tapvgnd_1.magic.lef
index 973d7ff..704ae2c 100644
--- a/cells/tapvgnd/sky130_fd_sc_hdll__tapvgnd_1.magic.lef
+++ b/cells/tapvgnd/sky130_fd_sc_hdll__tapvgnd_1.magic.lef
@@ -30,21 +30,28 @@
SIZE 0.460000 BY 2.720000 ;
SYMMETRY X Y R90 ;
SITE unithd ;
- PIN VPB
- ANTENNADIFFAREA 0.148750 ;
- PORT
- LAYER met1 ;
- RECT 0.085000 2.095000 0.375000 2.325000 ;
- END
- END VPB
PIN VGND
+ DIRECTION INPUT ;
USE GROUND ;
PORT
LAYER met1 ;
RECT 0.000000 -0.240000 0.460000 0.240000 ;
+ LAYER pwell ;
+ RECT 0.145000 0.320000 0.315000 0.845000 ;
END
END VGND
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER met1 ;
+ RECT 0.085000 2.095000 0.375000 2.325000 ;
+ LAYER nwell ;
+ RECT -0.190000 1.305000 0.650000 2.910000 ;
+ END
+ END VPB
PIN VPWR
+ DIRECTION INPUT ;
USE POWER ;
PORT
LAYER met1 ;
diff --git a/cells/tapvgnd2/sky130_fd_sc_hdll__tapvgnd2_1.magic.lef b/cells/tapvgnd2/sky130_fd_sc_hdll__tapvgnd2_1.magic.lef
index 46f43b2..1a9069b 100644
--- a/cells/tapvgnd2/sky130_fd_sc_hdll__tapvgnd2_1.magic.lef
+++ b/cells/tapvgnd2/sky130_fd_sc_hdll__tapvgnd2_1.magic.lef
@@ -30,21 +30,28 @@
SIZE 0.460000 BY 2.720000 ;
SYMMETRY X Y R90 ;
SITE unithd ;
- PIN VPB
- ANTENNADIFFAREA 0.148750 ;
- PORT
- LAYER met1 ;
- RECT 0.085000 1.755000 0.375000 1.985000 ;
- END
- END VPB
PIN VGND
+ DIRECTION INPUT ;
USE GROUND ;
PORT
LAYER met1 ;
RECT 0.000000 -0.240000 0.460000 0.240000 ;
+ LAYER pwell ;
+ RECT 0.145000 0.320000 0.315000 0.845000 ;
END
END VGND
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER met1 ;
+ RECT 0.085000 1.755000 0.375000 1.985000 ;
+ LAYER nwell ;
+ RECT -0.190000 1.305000 0.650000 2.910000 ;
+ END
+ END VPB
PIN VPWR
+ DIRECTION INPUT ;
USE POWER ;
PORT
LAYER met1 ;
diff --git a/cells/tapvpwrvgnd/sky130_fd_sc_hdll__tapvpwrvgnd_1.magic.lef b/cells/tapvpwrvgnd/sky130_fd_sc_hdll__tapvpwrvgnd_1.magic.lef
index 3b90672..d89232e 100644
--- a/cells/tapvpwrvgnd/sky130_fd_sc_hdll__tapvpwrvgnd_1.magic.lef
+++ b/cells/tapvpwrvgnd/sky130_fd_sc_hdll__tapvpwrvgnd_1.magic.lef
@@ -36,6 +36,8 @@
PORT
LAYER met1 ;
RECT 0.000000 -0.240000 0.460000 0.240000 ;
+ LAYER pwell ;
+ RECT 0.145000 0.320000 0.315000 0.845000 ;
END
END VGND
PIN VPWR
@@ -44,6 +46,8 @@
PORT
LAYER met1 ;
RECT 0.000000 2.480000 0.460000 2.960000 ;
+ LAYER nwell ;
+ RECT -0.190000 1.305000 0.650000 2.910000 ;
END
END VPWR
OBS
diff --git a/cells/xnor2/sky130_fd_sc_hdll__xnor2_1.magic.lef b/cells/xnor2/sky130_fd_sc_hdll__xnor2_1.magic.lef
index 7cf5ab5..4779337 100644
--- a/cells/xnor2/sky130_fd_sc_hdll__xnor2_1.magic.lef
+++ b/cells/xnor2/sky130_fd_sc_hdll__xnor2_1.magic.lef
@@ -51,18 +51,6 @@
RECT 1.945000 1.245000 2.165000 1.445000 ;
END
END B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.870000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.545000 ;
DIRECTION OUTPUT ;
@@ -84,6 +72,22 @@
RECT 0.000000 -0.240000 3.680000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.870000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.magic.lef b/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.magic.lef
index 0a5134f..6887909 100644
--- a/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.magic.lef
+++ b/cells/xnor2/sky130_fd_sc_hdll__xnor2_2.magic.lef
@@ -52,18 +52,6 @@
RECT 3.180000 1.285000 3.350000 1.445000 ;
END
END B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 6.630000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 0.953000 ;
DIRECTION OUTPUT ;
@@ -87,6 +75,22 @@
RECT 0.000000 -0.240000 6.440000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 6.630000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.magic.lef b/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.magic.lef
index a0effca..b3c251b 100644
--- a/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.magic.lef
+++ b/cells/xnor2/sky130_fd_sc_hdll__xnor2_4.magic.lef
@@ -52,18 +52,6 @@
RECT 6.100000 1.275000 6.270000 1.445000 ;
END
END B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 11.230000 2.910000 ;
- END
- END VPB
PIN Y
ANTENNADIFFAREA 1.858500 ;
DIRECTION OUTPUT ;
@@ -88,6 +76,22 @@
RECT 0.000000 -0.240000 11.040000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 11.230000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.magic.lef b/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.magic.lef
index 8bdec16..0df7106 100644
--- a/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.magic.lef
+++ b/cells/xnor3/sky130_fd_sc_hdll__xnor3_1.magic.lef
@@ -58,18 +58,6 @@
RECT 1.715000 1.075000 2.330000 1.325000 ;
END
END C
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 9.390000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.472000 ;
DIRECTION OUTPUT ;
@@ -88,6 +76,22 @@
RECT 0.000000 -0.240000 9.200000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 9.390000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.magic.lef b/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.magic.lef
index 8bcb4a1..24bf29c 100644
--- a/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.magic.lef
+++ b/cells/xnor3/sky130_fd_sc_hdll__xnor3_2.magic.lef
@@ -58,18 +58,6 @@
RECT 2.225000 1.075000 2.840000 1.325000 ;
END
END C
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.150000 -0.085000 0.320000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 9.850000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.550500 ;
DIRECTION OUTPUT ;
@@ -87,6 +75,22 @@
RECT 0.000000 -0.240000 9.660000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.150000 -0.085000 0.320000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 9.850000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.magic.lef b/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.magic.lef
index f51163f..1e5dd5d 100644
--- a/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.magic.lef
+++ b/cells/xnor3/sky130_fd_sc_hdll__xnor3_4.magic.lef
@@ -58,18 +58,6 @@
RECT 3.245000 1.075000 3.860000 1.325000 ;
END
END C
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 10.770000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.996000 ;
DIRECTION OUTPUT ;
@@ -93,6 +81,22 @@
RECT 0.000000 -0.240000 10.580000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 10.770000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/xor2/sky130_fd_sc_hdll__xor2_1.magic.lef b/cells/xor2/sky130_fd_sc_hdll__xor2_1.magic.lef
index 96d85a4..61cd8c3 100644
--- a/cells/xor2/sky130_fd_sc_hdll__xor2_1.magic.lef
+++ b/cells/xor2/sky130_fd_sc_hdll__xor2_1.magic.lef
@@ -51,18 +51,6 @@
RECT 1.720000 1.245000 1.890000 1.445000 ;
END
END B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 3.870000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.996000 ;
DIRECTION OUTPUT ;
@@ -83,6 +71,22 @@
RECT 0.000000 -0.240000 3.680000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 3.870000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/xor2/sky130_fd_sc_hdll__xor2_2.magic.lef b/cells/xor2/sky130_fd_sc_hdll__xor2_2.magic.lef
index 559bd41..5ca7005 100644
--- a/cells/xor2/sky130_fd_sc_hdll__xor2_2.magic.lef
+++ b/cells/xor2/sky130_fd_sc_hdll__xor2_2.magic.lef
@@ -56,18 +56,6 @@
RECT 3.765000 1.260000 4.055000 1.305000 ;
END
END B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 6.630000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.806750 ;
DIRECTION OUTPUT ;
@@ -90,6 +78,22 @@
RECT 0.000000 -0.240000 6.440000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 6.630000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/xor2/sky130_fd_sc_hdll__xor2_4.magic.lef b/cells/xor2/sky130_fd_sc_hdll__xor2_4.magic.lef
index 265b8ed..1706bfc 100644
--- a/cells/xor2/sky130_fd_sc_hdll__xor2_4.magic.lef
+++ b/cells/xor2/sky130_fd_sc_hdll__xor2_4.magic.lef
@@ -53,18 +53,6 @@
RECT 3.270000 1.105000 6.340000 1.275000 ;
END
END B
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 11.230000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 1.759450 ;
DIRECTION OUTPUT ;
@@ -84,6 +72,22 @@
RECT 0.000000 -0.240000 11.040000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 11.230000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/xor3/sky130_fd_sc_hdll__xor3_1.magic.lef b/cells/xor3/sky130_fd_sc_hdll__xor3_1.magic.lef
index 4c94d49..460ecfa 100644
--- a/cells/xor3/sky130_fd_sc_hdll__xor3_1.magic.lef
+++ b/cells/xor3/sky130_fd_sc_hdll__xor3_1.magic.lef
@@ -58,18 +58,6 @@
RECT 1.960000 0.995000 2.645000 1.325000 ;
END
END C
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 9.850000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.472000 ;
DIRECTION OUTPUT ;
@@ -89,6 +77,22 @@
RECT 0.000000 -0.240000 9.660000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 9.850000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/xor3/sky130_fd_sc_hdll__xor3_2.magic.lef b/cells/xor3/sky130_fd_sc_hdll__xor3_2.magic.lef
index bf557e2..c4cc021 100644
--- a/cells/xor3/sky130_fd_sc_hdll__xor3_2.magic.lef
+++ b/cells/xor3/sky130_fd_sc_hdll__xor3_2.magic.lef
@@ -58,18 +58,6 @@
RECT 2.255000 0.995000 2.940000 1.325000 ;
END
END C
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.145000 -0.085000 0.315000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 9.850000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.517500 ;
DIRECTION OUTPUT ;
@@ -91,6 +79,22 @@
RECT 0.000000 -0.240000 9.660000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.145000 -0.085000 0.315000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 9.850000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
diff --git a/cells/xor3/sky130_fd_sc_hdll__xor3_4.magic.lef b/cells/xor3/sky130_fd_sc_hdll__xor3_4.magic.lef
index 6ac409f..35c0e57 100644
--- a/cells/xor3/sky130_fd_sc_hdll__xor3_4.magic.lef
+++ b/cells/xor3/sky130_fd_sc_hdll__xor3_4.magic.lef
@@ -58,18 +58,6 @@
RECT 3.130000 0.995000 3.815000 1.325000 ;
END
END C
- PIN VNB
- PORT
- LAYER pwell ;
- RECT 0.235000 -0.085000 0.405000 0.085000 ;
- END
- END VNB
- PIN VPB
- PORT
- LAYER nwell ;
- RECT -0.190000 1.305000 10.770000 2.910000 ;
- END
- END VPB
PIN X
ANTENNADIFFAREA 0.996000 ;
DIRECTION OUTPUT ;
@@ -94,6 +82,22 @@
RECT 0.000000 -0.240000 10.580000 0.240000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.235000 -0.085000 0.405000 0.085000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.305000 10.770000 2.910000 ;
+ END
+ END VPB
PIN VPWR
DIRECTION INOUT ;
USE POWER ;
