blob: d26d4135e4b4ae01aeaebd37e776a89c0851eea7 [file] [log] [blame]
{
"description": "Lower power Clock tree inverter.",
"file_prefix": "sky130_fd_sc_hdll__clkinvlp",
"library": "sky130_fd_sc_hdll",
"name": "clkinvlp",
"parameters": [],
"ports": [
[
"signal",
"Y",
"output",
""
],
[
"signal",
"A",
"input",
""
],
[
"power",
"VPWR",
"input",
"supply1"
],
[
"power",
"VGND",
"input",
"supply0"
],
[
"power",
"VPB",
"input",
"supply1"
],
[
"power",
"VNB",
"input",
"supply0"
]
],
"type": "cell",
"verilog_name": "sky130_fd_sc_hdll__clkinvlp"
}