| { |
| "area": 16.2656, |
| "cell_footprint": "clkmux2", |
| "cell_leakage_power": 0.006116219, |
| "leakage_power": [ |
| { |
| "value": 0.0019448, |
| "when": "!A0&!A1&S" |
| }, |
| { |
| "value": 0.0019007, |
| "when": "!A0&!A1&!S" |
| }, |
| { |
| "value": 0.0332375, |
| "when": "!A0&A1&S" |
| }, |
| { |
| "value": 0.0023644, |
| "when": "!A0&A1&!S" |
| }, |
| { |
| "value": 0.0023589, |
| "when": "A0&!A1&S" |
| }, |
| { |
| "value": 0.0023752, |
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| }, |
| { |
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| }, |
| { |
| "value": 0.0022695, |
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| } |
| ], |
| "pg_pin VGND": { |
| "pg_type": "primary_ground", |
| "related_bias_pin": "VNB", |
| "voltage_name": "VGND" |
| }, |
| "pg_pin VNB": { |
| "pg_type": "pwell", |
| "voltage_name": "VNB" |
| }, |
| "pg_pin VPB": { |
| "pg_type": "nwell", |
| "voltage_name": "VPB" |
| }, |
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| "related_bias_pin": "VPB", |
| "voltage_name": "VPWR" |
| }, |
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| "clock": "false", |
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| "fall_capacitance": 0.001962, |
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| "index_1": [ |
| 0.01, |
| 0.0230506, |
| 0.0531329, |
| 0.122474, |
| 0.282311, |
| 0.650743, |
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| 0.0042038, |
| 0.0042073, |
| 0.0042154, |
| 0.004234, |
| 0.004277 |
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| }, |
| "rise_power power_inputs_1": { |
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| 0.01, |
| 0.0230506, |
| 0.0531329, |
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| 0.282311, |
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| "related_power_pin": "VPWR", |
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| }, |
| "pin A1": { |
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| "clock": "false", |
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| "fall_capacitance": 0.002294, |
| "internal_power": { |
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| 0.0230506, |
| 0.0531329, |
| 0.122474, |
| 0.282311, |
| 0.650743, |
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| 0.0051247 |
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| "rise_power power_inputs_1": { |
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| }, |
| "max_transition": 1.5, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
| "rise_capacitance": 0.002653 |
| }, |
| "pin S": { |
| "capacitance": 0.00475, |
| "clock": "false", |
| "direction": "input", |
| "fall_capacitance": 0.004482, |
| "internal_power": { |
| "fall_power power_inputs_1": { |
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| 0.01, |
| 0.0230506, |
| 0.0531329, |
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| 0.0156935, |
| 0.0158586, |
| 0.016239 |
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| }, |
| "rise_power power_inputs_1": { |
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| 0.01, |
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| 0.122474, |
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| }, |
| "max_transition": 1.5, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
| "rise_capacitance": 0.005018 |
| }, |
| "pin X": { |
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| "function": "(A0&!S) | (A1&S)", |
| "internal_power": [ |
| { |
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| ] |
| }, |
| "related_pin": "S", |
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| }, |
| { |
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| }, |
| "related_pin": "A0", |
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| }, |
| { |
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| [ |
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| [ |
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| [ |
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| }, |
| "related_pin": "A1", |
| "rise_power power_outputs_1": { |
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| } |
| ], |
| "max_capacitance": 0.381098, |
| "max_transition": 1.510171, |
| "power_down_function": "(!VPWR + VGND)", |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
| "timing": [ |
| { |
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