blob: 9ef2e4cdbe86dca0f2f02888bf9e89c7711c6786 [file] [log] [blame]
{
"description": "UDP_OUT :=x when VPWR!=1 or VGND!=0\nUDP_OUT :=UDP_IN when VPWR==1 and VGND==0",
"file_prefix": "sky130_fd_sc_hdll__udp_pwrgood_pp_pg_s",
"library": "sky130_fd_sc_hdll",
"name": "udp_pwrgood_pp$PG$S",
"parameters": [],
"ports": [
[
"signal",
"UDP_OUT",
"output",
""
],
[
"signal",
"UDP_IN",
"input",
""
],
[
"power",
"VPWR",
"input",
"supply1"
],
[
"power",
"VGND",
"input",
"supply0"
],
[
"signal",
"SLEEP",
"input",
""
]
],
"type": "primitive",
"verilog_name": "sky130_fd_sc_hdll__udp_pwrgood_pp$PG$S"
}