blob: 5bd497167373a67964f26abef6036c75539f2d96 [file] [log] [blame]
Kevin Kelleyca9a95a2020-05-06 11:00:01 +07001{
2 "description": "2-input NAND and 2-input OR into 2-input AND.",
3 "equation": "X = (!(A1 & A2) & (B1 | B2))",
4 "file_prefix": "sky130_fd_sc_hd__o2bb2a",
5 "library": "sky130_fd_sc_hd",
6 "name": "o2bb2a",
7 "parameters": [],
8 "ports": [
9 [
10 "signal",
11 "X",
12 "output",
13 ""
14 ],
15 [
16 "signal",
17 "A1_N",
18 "input",
19 ""
20 ],
21 [
22 "signal",
23 "A2_N",
24 "input",
25 ""
26 ],
27 [
28 "signal",
29 "B1",
30 "input",
31 ""
32 ],
33 [
34 "signal",
35 "B2",
36 "input",
37 ""
38 ],
39 [
40 "power",
41 "VPWR",
42 "input",
43 "supply1"
44 ],
45 [
46 "power",
47 "VGND",
48 "input",
49 "supply0"
50 ],
51 [
52 "power",
53 "VPB",
54 "input",
55 "supply1"
56 ],
57 [
58 "power",
59 "VNB",
60 "input",
61 "supply0"
62 ]
63 ],
64 "type": "cell",
65 "verilog_name": "sky130_fd_sc_hd__o2bb2a"
66}