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| "cell_footprint": "sky130_fd_sc_hd__lsbuf_lh_hl_isowell_tap", |
| "cell_leakage_power": 0.000199125, |
| "comp_attribute,input_voltage_range": [ |
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| 2.1 |
| ], |
| "comp_attribute,output_voltage_range": [ |
| 1.2, |
| 2.1 |
| ], |
| "driver_waveform_fall": "ramp", |
| "driver_waveform_rise": "ramp", |
| "is_level_shifter": "true", |
| "leakage_power": [ |
| { |
| "value": 0.0001434, |
| "when": "A" |
| }, |
| { |
| "value": 0.0002549, |
| "when": "!A" |
| } |
| ], |
| "level_shifter_type": "HL_LH", |
| "pg_pin,VGND": { |
| "pg_type": "primary_ground", |
| "related_bias_pin": "VPB", |
| "voltage_name": "VGND" |
| }, |
| "pg_pin,VPB": { |
| "pg_type": "pwell", |
| "physical_connection": "device_layer", |
| "voltage_name": "VPB" |
| }, |
| "pg_pin,VPWR": { |
| "pg_type": "primary_power", |
| "related_bias_pin": "VNB", |
| "voltage_name": "VPWR" |
| }, |
| "pg_pin,VPWRIN": { |
| "pg_type": "primary_power", |
| "voltage_name": "VPWRIN" |
| }, |
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| "capacitance": 0.005133, |
| "clock": "false", |
| "direction": "input", |
| "fall_capacitance": 0.005042, |
| "input_signal_level": "VPWRIN", |
| "level_shifter_data_pin": "true", |
| "max_transition": 10.0, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWRIN", |
| "rise_capacitance": 0.005224 |
| }, |
| "pin,X": { |
| "direction": "output", |
| "function": "(A)", |
| "internal_power": { |
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| }, |
| "related_pin": "A", |
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| }, |
| "max_capacitance": 0.788889, |
| "max_transition": 10.017127, |
| "power_down_function": "(!VPWRIN+!VPWR+VGND)", |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
| "timing": { |
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| ] |
| }, |
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| "timing_sense": "positive_unate", |
| "timing_type": "combinational" |
| } |
| } |
| } |
