| { |
| "description": "Scan delay flop, inverted reset, inverted clock, single output.", |
| "file_prefix": "sky130_fd_sc_hd__sdfrtn", |
| "library": "sky130_fd_sc_hd", |
| "name": "sdfrtn", |
| "parameters": [], |
| "ports": [ |
| [ |
| "signal", |
| "Q", |
| "output", |
| "" |
| ], |
| [ |
| "signal", |
| "CLK_N", |
| "input", |
| "" |
| ], |
| [ |
| "signal", |
| "D", |
| "input", |
| "" |
| ], |
| [ |
| "signal", |
| "SCD", |
| "input", |
| "" |
| ], |
| [ |
| "signal", |
| "SCE", |
| "input", |
| "" |
| ], |
| [ |
| "signal", |
| "RESET_B", |
| "input", |
| "" |
| ], |
| [ |
| "power", |
| "VPWR", |
| "input", |
| "supply1" |
| ], |
| [ |
| "power", |
| "VGND", |
| "input", |
| "supply0" |
| ], |
| [ |
| "power", |
| "VPB", |
| "input", |
| "supply1" |
| ], |
| [ |
| "power", |
| "VNB", |
| "input", |
| "supply0" |
| ] |
| ], |
| "type": "cell", |
| "verilog_name": "sky130_fd_sc_hd__sdfrtn" |
| } |