commit | 0effa96c32051608b5c053a46f894b47e4fd4d00 | [log] [tgz] |
---|---|---|
author | Ethan Mahintorabi <ethanmoon@google.com> | Wed Nov 24 19:47:21 2021 -0800 |
committer | Ethan Mahintorabi <ethanmoon@google.com> | Wed Nov 24 19:50:58 2021 -0800 |
tree | 98902ac072f8fed8bdaf61e336f99a7f538038a7 | |
parent | 21212f530de3b071e4737a7622ce3c7dce1527bb [diff] |
Fixes ReRAM Verilog-A model naming convention. Signed-off-by: Ethan Mahintorabi <ethanmoon@google.com>