cells/top_ground_lvc_wpad/definition.json

{
 "description": "Base ground I/O pad with low voltage clamp.",
 "file_prefix": "sky130_fd_io__top_ground_lvc_wpad",
 "library": "sky130_fd_io",
 "name": "top_ground_lvc_wpad",
 "parameters": [],
 "ports": [
  [
   "signal",
   "G_PAD",
   "inout",
   ""
  ],
  [
   "signal",
   "AMUXBUS_A",
   "inout",
   ""
  ],
  [
   "signal",
   "AMUXBUS_B",
   "inout",
   ""
  ],
  [
   "power",
   "SRC_BDY_LVC1",
   "inout",
   "supply0"
  ],
  [
   "power",
   "SRC_BDY_LVC2",
   "inout",
   "supply0"
  ],
  [
   "power",
   "OGC_LVC",
   "inout",
   "supply1"
  ],
  [
   "power",
   "DRN_LVC1",
   "inout",
   "supply1"
  ],
  [
   "power",
   "BDY2_B2B",
   "inout",
   "supply1"
  ],
  [
   "power",
   "DRN_LVC2",
   "inout",
   "supply0"
  ],
  [
   "power",
   "G_CORE",
   "inout",
   "supply0"
  ],
  [
   "power",
   "VDDIO",
   "inout",
   "supply1"
  ],
  [
   "power",
   "VDDIO_Q",
   "inout",
   "supply1"
  ],
  [
   "power",
   "VDDA",
   "inout",
   "supply1"
  ],
  [
   "power",
   "VCCD",
   "inout",
   "supply1"
  ],
  [
   "power",
   "VSWITCH",
   "inout",
   "supply1"
  ],
  [
   "power",
   "VCCHIB",
   "inout",
   "supply1"
  ],
  [
   "power",
   "VSSA",
   "inout",
   "supply0"
  ],
  [
   "power",
   "VSSD",
   "inout",
   "supply0"
  ],
  [
   "power",
   "VSSIO_Q",
   "inout",
   "supply0"
  ],
  [
   "power",
   "VSSIO",
   "inout",
   "supply0"
  ]
 ],
 "type": "cell",
 "verilog_name": "sky130_fd_io__top_ground_lvc_wpad"
}