| LAYOUT PATH "{{ layout_file }}" |
| LAYOUT PRIMARY "{{ cell_name }}" |
| LAYOUT SYSTEM {{layout_type}} |
| |
| SOURCE PATH "{{ netlist_file }}" |
| SOURCE PRIMARY "{{ cell_name }}" |
| SOURCE SYSTEM SPICE |
| |
| MASK SVDB DIRECTORY "svdb" QUERY XRC |
| |
| LVS REPORT "{{ cell_name }}.lvs.report" |
| |
| LVS REPORT OPTION NONE |
| LVS FILTER UNUSED OPTION NONE SOURCE |
| LVS FILTER UNUSED OPTION NONE LAYOUT |
| LVS FILTER R(SH) SHORT SOURCE |
| LVS REPORT MAXIMUM 50 |
| LVS POWER NAME VDD |
| LVS GROUND NAME VSS |
| |
| LVS RECOGNIZE GATES NONE |
| |
| LVS REDUCE SPLIT GATES NO |
| LVS REDUCE PARALLEL MOS YES |
| LVS SHORT EQUIVALENT NODES NO |
| |
| LVS ABORT ON SOFTCHK NO |
| LVS ABORT ON SUPPLY ERROR YES |
| LVS IGNORE PORTS NO |
| LVS SHOW SEED PROMOTIONS NO |
| LVS SHOW SEED PROMOTIONS MAXIMUM 50 |
| |
| LVS ISOLATE SHORTS NO |
| |
| VIRTUAL CONNECT COLON YES |
| VIRTUAL CONNECT REPORT NO |
| |
| LVS EXECUTE ERC YES |
| ERC RESULTS DATABASE "{{ cell_name }}.erc.results" |
| ERC SUMMARY REPORT "{{ cell_name }}.erc.summary" REPLACE HIER |
| ERC CELL NAME YES CELL SPACE XFORM |
| ERC MAXIMUM RESULTS 1000 |
| ERC MAXIMUM VERTEX 4096 |
| |
| DRC ICSTATION YES |
| |
| PEX POWER LAYOUT VDD |
| PEX GROUND LAYOUT VSS |
| PEX REDUCE ANALOG NO |
| |
| INCLUDE "$PDK_HOME/LVS/Calibre/lvs_s8_opts" |
