Tim 'mithro' Ansell | bcb4ed0 | 2020-07-23 19:24:47 -0700 | [diff] [blame] | 1 | Symbol,Explanation,Unit |
2 | PI,Perimeter of Interconnect,um | ||||
3 | FLT,Final Layer thickness,um | ||||
4 | W,Width of MOS Transistor,um | ||||
5 | L,Length of MOS Transistor,um | ||||
6 | A,Area of MOS Transistor gate (= W x L),um2 | ||||
7 | CA,Area of contact or via,um2 | ||||
8 | SW,Sidewall area (= PI x FLT),um2 | ||||
9 | EA,"Etched area (= CA for horizontal, = SW for vertical areas)",um2 |