| 1.8V low-VT NMOS FET |
| -------------------- |
| |
| Spice Model Information |
| ~~~~~~~~~~~~~~~~~~~~~~~ |
| |
| - Cell Name: :cell:`sky130_fd_pr__nfet_01v8` |
| - Model Name: :model:`sky130_fd_pr__nfet_01v8_lvt` |
| |
| Operating Voltages where SPICE models are valid |
| |
| - :math:`V_{DS} = 0` to 1.95V |
| - :math:`V_{GS} = 0` to 1.95V |
| - :math:`V_{BS} = +0.3` to -1.95V |
| |
| Details |
| ~~~~~~~ |
| |
| Major model output parameters are shown below and compared against the EDR (e-test) specs. |
| |
| |
| .. include:: nfet_01v8_lvt-table0.rst |
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| |
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| Inverter Gate Delays using :model:`sky130_fd_pr__nfet_01v8_lvt`/:model:`sky130_fd_pr__pfet_01v8` device combinations: |
| |
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| .. include:: nfet_01v8_lvt-table1.rst |
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| |
| |
| The symbol of the :model:`sky130_fd_pr__nfet_01v8_lvt` (1.8V low-VT NMOS FET) is shown below: |
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| |symbol-nfet_01v8_lvt| |
| |
| The cross-section of the low-VT NMOS FET is shown below. The cross-section is identical to the std NMOS FET except for the :math:`V_T` adjust implants (to achieve the lower :math:`V_T`) |
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| |cross-section-nfet_01v8_lvt| |
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| .. |symbol-nfet_01v8_lvt| image:: symbol-nfet_01v8_lvt.svg |
| .. |cross-section-nfet_01v8_lvt| image:: cross-section-nfet_01v8_lvt.svg |
| |
