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Skywater SKY130 PDK
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<span class="mdl-layout-title toc">Table Of Contents</span>
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<ul class="current">
<li class="toctree-l1 current"><a class="reference internal" href="../rules.html">Process Design Rules</a><ul class="current">
<li class="toctree-l2"><a class="reference internal" href="background.html">Introduction</a></li>
<li class="toctree-l2"><a class="reference internal" href="assumptions.html">Design Rule Criteria &amp; Assumptions</a></li>
<li class="toctree-l2"><a class="reference internal" href="define.html">Device, LVS and other CAD definitions</a></li>
<li class="toctree-l2"><a class="reference internal" href="connectivity.html">Device and Connectivity Information</a></li>
<li class="toctree-l2"><a class="reference internal" href="connectivity/lvs.html">TODO: rules/connectivity/lvs</a></li>
<li class="toctree-l2"><a class="reference internal" href="connectivity/impant.html">TODO: rules/connectivity/impant</a></li>
<li class="toctree-l2"><a class="reference internal" href="connectivity/table.html">TODO: rules/connectivity/table</a></li>
<li class="toctree-l2"><a class="reference internal" href="core.html">Core Rules</a></li>
<li class="toctree-l2"><a class="reference internal" href="periphery.html">Periphery Rules</a></li>
<li class="toctree-l2"><a class="reference internal" href="dummy.html">Dummy Poly Generation to reduce Litr-Poly shorts</a></li>
<li class="toctree-l2"><a class="reference internal" href="areaid.html">TODO: rules/areaid</a></li>
<li class="toctree-l2"><a class="reference internal" href="antenna.html">Antenna Rules</a></li>
<li class="toctree-l2"><a class="reference internal" href="opc.html">OPC sizing/verification procedure</a></li>
<li class="toctree-l2"><a class="reference internal" href="cad.html">CAD switches, created layer algorithms</a></li>
<li class="toctree-l2"><a class="reference internal" href="waffles.html">Created Layer dummy structures (&quot;waffles&quot;)</a></li>
<li class="toctree-l2 current"><a class="current reference internal" href="#">Purpose/Scope</a></li>
<li class="toctree-l2"><a class="reference internal" href="#critical-requirements-summary">Critical Requirements Summary</a></li>
<li class="toctree-l2"><a class="reference internal" href="#operating-procedures-and-responsibilities">Operating Procedures and Responsibilities</a></li>
<li class="toctree-l2"><a class="reference internal" href="#quality-requirements">Quality Requirements</a></li>
<li class="toctree-l2"><a class="reference internal" href="#mtdr-cad-definitions">MTDR &amp; CAD Definitions</a></li>
<li class="toctree-l2"><a class="reference internal" href="latchup.html">Latch-up Design Rules</a></li>
<li class="toctree-l2"><a class="reference internal" href="misc.html">Misc Design Rules</a></li>
</ul>
</li>
</ul>
<ul>
<li class="toctree-l1"><a class="reference internal" href="../contents.html">PDK Contents</a><ul>
<li class="toctree-l2"><a class="reference internal" href="../contents/libraries.html">Libraries</a><ul>
<li class="toctree-l3"><a class="reference internal" href="../contents/libraries/sky130_fd_pr_base/README.html"><span class="lib-process">sky130</span><span>_</span><span class="lib-src">fd</span><span>_</span><span class="lib-type">pr</span> - Skywater Foundry XXXXXX</a><ul>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_pr_base/cells/README.html">Index of <span class="lib-process">sky130</span><span>_</span><span class="lib-src">fd</span><span>_</span><span class="lib-type">pr</span> (version 2.0.1) cells</a></li>
</ul>
</li>
<li class="toctree-l3"><a class="reference internal" href="../contents/libraries/sky130_fd_pr_rf/README.html"><span class="lib-process">sky130</span><span>_</span><span class="lib-src">fd</span><span>_</span><span class="lib-type">pr</span><span>_</span><span class="lib-name">rf</span> - SkyWater Foundry Legacy RF Primitives</a></li>
<li class="toctree-l3"><a class="reference internal" href="../contents/libraries/sky130_fd_pr_rf2/README.html"><span class="lib-process">sky130</span><span>_</span><span class="lib-src">fd</span><span>_</span><span class="lib-type">pr</span><span>_</span><span class="lib-name">rf2</span> - SkyWater Foundry New RF Primitives</a></li>
<li class="toctree-l3"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hd/README.html"><span class="lib-process">sky130</span><span>_</span><span class="lib-src">fd</span><span>_</span><span class="lib-type">sc</span><span>_</span><span class="lib-name">hd</span> - SkyWater Foundry High Density Standard Cells</a><ul>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hd/cells/README.html">TODO: Index of <span class="lib-process">sky130</span><span>_</span><span class="lib-src">fd</span><span>_</span><span class="lib-type">sc</span><span>_</span><span class="lib-name">hd</span> (version 0.0.1) cells</a></li>
</ul>
</li>
<li class="toctree-l3"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hdll/README.html">TODO: <span class="lib-process">sky130</span><span>_</span><span class="lib-src">fd</span><span>_</span><span class="lib-type">sc</span><span>_</span><span class="lib-name">hdll</span></a><ul>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hdll/release_notes.html">Table of Contents</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hdll/release_notes.html#table-of-figures">Table of Figures</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hdll/release_notes.html#table-of-tables">Table of Tables</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hdll/release_notes.html#revision-history">Revision History</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hdll/release_notes.html#reference-documents">Reference Documents</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hdll/release_notes.html#v0-1-1-updates-and-known-limitations-2019-03-28">V0.1.1 Updates and Known Limitations (2019/03/28)</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hdll/release_notes.html#v0-1-0-updates-and-known-limitations-2018-04-26">V0.1.0 Updates and Known Limitations (2018/04/26)</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hdll/release_notes.html#overview">Overview</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hdll/release_notes.html#ip-installation">IP Installation</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hdll/release_notes.html#ip-usage">IP Usage</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hdll/release_notes.html#digital-pdk">Digital PDK</a></li>
</ul>
</li>
<li class="toctree-l3"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hs/README.html">TODO: <span class="lib-process">sky130</span><span>_</span><span class="lib-src">fd</span><span>_</span><span class="lib-type">sc</span><span>_</span><span class="lib-name">hs</span></a><ul>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hs/release_notes.html">Table of Contents</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hs/release_notes.html#table-of-figures">Table of Figures</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hs/release_notes.html#table-of-tables">Table of Tables</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hs/release_notes.html#revision-history">Revision History</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hs/release_notes.html#reference-documents">Reference Documents</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hs/release_notes.html#v0-0-1-updates-and-known-limitations">V0.0.1 Updates and Known Limitations</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hs/release_notes.html#v0-0-0-updates-and-known-limitations">V0.0.0 Updates and Known Limitations</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hs/release_notes.html#overview">Overview</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hs/release_notes.html#ip-installation">IP Installation</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hs/release_notes.html#ip-usage">IP Usage</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hs/release_notes.html#digital-pdk">Digital PDK</a></li>
</ul>
</li>
<li class="toctree-l3"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hvl/README.html">TODO: <span class="lib-process">sky130</span><span>_</span><span class="lib-src">fd</span><span>_</span><span class="lib-type">sc</span><span>_</span><span class="lib-name">hvl</span></a><ul>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hvl/release_notes.html">Table of Contents</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hvl/release_notes.html#list-of-figures">List of Figures</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hvl/release_notes.html#list-of-tables">List of Tables</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hvl/release_notes.html#revision-history">Revision History</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hvl/release_notes.html#reference-documents">Reference Documents</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hvl/release_notes.html#v0-0-1-updates-and-known-limitations">V0.0.1 Updates and Known Limitations</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hvl/release_notes.html#previous-releases">Previous Releases</a></li>
</ul>
</li>
<li class="toctree-l3"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_lp/README.html">TODO: <span class="lib-process">sky130</span><span>_</span><span class="lib-src">fd</span><span>_</span><span class="lib-type">sc</span><span>_</span><span class="lib-name">lp</span></a><ul>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_lp/release_notes.html">Table of Contents</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_lp/release_notes.html#table-of-figures">Table of Figures</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_lp/release_notes.html#table-of-tables">Table of Tables</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_lp/release_notes.html#revision-history">Revision History</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_lp/release_notes.html#reference-documents">Reference Documents</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_lp/release_notes.html#v0-0-1-updates-and-known-limitations">V0.0.1 Updates and Known Limitations</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_lp/release_notes.html#v0-0-0-updates-and-known-limitations">V0.0.0 Updates and Known Limitations</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_lp/release_notes.html#overview">Overview</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_lp/release_notes.html#ip-installation">IP Installation</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_lp/release_notes.html#ip-usage">IP Usage</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_lp/release_notes.html#digital-pdk">Digital PDK</a></li>
</ul>
</li>
<li class="toctree-l3"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ls/README.html">TODO: <span class="lib-process">sky130</span><span>_</span><span class="lib-src">fd</span><span>_</span><span class="lib-type">sc</span><span>_</span><span class="lib-name">ls</span></a><ul>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ls/release_notes.html">Table of Contents</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ls/release_notes.html#table-of-figures">Table of Figures</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ls/release_notes.html#table-of-tables">Table of Tables</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ls/release_notes.html#revision-history">Revision History</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ls/release_notes.html#reference-documents">Reference Documents</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ls/release_notes.html#v0-1-1-updates-and-known-limitations-2019-03-28">V0.1.1 Updates and Known Limitations (2019/03/28)</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ls/release_notes.html#v0-1-0-updates-and-known-limitations-2018-04-25">V0.1.0 Updates and Known Limitations (2018/04/25)</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ls/release_notes.html#overview">Overview</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ls/release_notes.html#ip-installation">IP Installation</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ls/release_notes.html#ip-usage">IP Usage</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ls/release_notes.html#digital-pdk">Digital PDK</a></li>
</ul>
</li>
<li class="toctree-l3"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ms/README.html">TODO: <span class="lib-process">sky130</span><span>_</span><span class="lib-src">fd</span><span>_</span><span class="lib-type">sc</span><span>_</span><span class="lib-name">ms</span></a><ul>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ms/release_notes.html">Table of Contents</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ms/release_notes.html#table-of-figures">Table of Figures</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ms/release_notes.html#table-of-tables">Table of Tables</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ms/release_notes.html#revision-history">Revision History</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ms/release_notes.html#reference-documents">Reference Documents</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ms/release_notes.html#v0-0-1-updates-and-known-limitations-2019-03-28">V0.0.1 Updates and Known Limitations (2019/03/28)</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ms/release_notes.html#v0-0-0-updates-and-known-limitations-2018-03-30">V0.0.0 Updates and Known Limitations (2018/03/30)</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ms/release_notes.html#overview">Overview</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ms/release_notes.html#ip-installation">IP Installation</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ms/release_notes.html#ip-usage">IP Usage</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ms/release_notes.html#digital-pdk">Digital PDK</a></li>
</ul>
</li>
<li class="toctree-l3"><a class="reference internal" href="../contents/libraries/sky130_osu_sc/README.html"><span class="lib-process">sky130</span><span>_</span><span class="lib-src">osu</span><span>_</span><span class="lib-type">sc</span> Oklahoma State University Standard Cells</a></li>
<li class="toctree-l3"><a class="reference internal" href="../contents/libraries/sky130_fd_sp_fmlt/README.html">TODO: <span class="lib-process">sky130</span><span>_</span><span class="lib-src">fd</span><span>_</span><span class="lib-type">sp</span><span>_</span><span class="lib-name">fmlt</span> - SKY130 Flash Build Space</a><ul>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sp_fmlt/release_notes.html">Table of Contents</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sp_fmlt/release_notes.html#table-of-tables">Table of Tables</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sp_fmlt/release_notes.html#revision-history">Revision History</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sp_fmlt/release_notes.html#reference-documents">Reference Documents</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sp_fmlt/release_notes.html#v0-1-1-updates-and-known-limitations">V0.1.1 Updates and Known Limitations</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sp_fmlt/release_notes.html#overview">Overview</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sp_fmlt/release_notes.html#ip-installation">IP Installation</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sp_fmlt/release_notes.html#ip-usage">IP Usage</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sp_fmlt/release_notes.html#digital-pdk">Digital PDK</a></li>
</ul>
</li>
<li class="toctree-l3"><a class="reference internal" href="../contents/libraries/sky130_fd_sp_sram/README.html">TODO: <span class="lib-process">sky130</span><span>_</span><span class="lib-src">fd</span><span>_</span><span class="lib-type">sp</span><span>_</span><span class="lib-name">sram</span> - SKY130 SRAM Build Space</a></li>
<li class="toctree-l3"><a class="reference internal" href="../contents/libraries/sky130_fd_io/README.html">TODO: <span class="lib-process">sky130</span><span>_</span><span class="lib-src">fd</span><span>_</span><span class="lib-type">io</span> - SkyWater Foundry provided IO cells</a></li>
<li class="toctree-l3"><a class="reference internal" href="../contents/libraries/sky130_ef_io/README.html">TODO: <span class="lib-process">sky130</span><span>_</span><span class="lib-src">ef</span><span>_</span><span class="lib-type">io</span> - Efabless created IO cells</a></li>
</ul>
</li>
</ul>
</li>
</ul>
<ul>
<li class="toctree-l1"><a class="reference internal" href="../verification.html">Physical &amp; Design Verification</a><ul>
<li class="toctree-l2"><a class="reference internal" href="../verification/drc.html">Automated Design Rule (DRC) Checking</a><ul>
<li class="toctree-l3"><a class="reference internal" href="../verification/drc/calibre.html">DRC</a></li>
<li class="toctree-l3"><a class="reference internal" href="../verification/drc/magic.html">TODO: verification/drc/magic</a></li>
<li class="toctree-l3"><a class="reference internal" href="../verification/drc/klayout.html">TODO: verification/drc/klayout</a></li>
</ul>
</li>
<li class="toctree-l2"><a class="reference internal" href="../verification/lvs.html">Layout Versus Schematic (LVS) Checking</a><ul>
<li class="toctree-l3"><a class="reference internal" href="../verification/lvs/calibre.html">LVS</a></li>
<li class="toctree-l3"><a class="reference internal" href="../verification/lvs/magic.html">TODO: verification/lvs/magic</a></li>
<li class="toctree-l3"><a class="reference internal" href="../verification/lvs/klayout.html">TODO: verification/lvs/klayout</a></li>
</ul>
</li>
<li class="toctree-l2"><a class="reference internal" href="../verification/pex.html">Parasitic Extraction (PEX)</a><ul>
<li class="toctree-l3"><a class="reference internal" href="../verification/pex/calibre.html">PEX</a></li>
<li class="toctree-l3"><a class="reference internal" href="../verification/pex/magic.html">TODO: verification/pex/magic</a></li>
<li class="toctree-l3"><a class="reference internal" href="../verification/pex/klayout.html">TODO: verification/pex/klayout</a></li>
</ul>
</li>
<li class="toctree-l2"><a class="reference internal" href="../verification/drc.html">SkyWater SKY130 Design Rule Verification</a><ul>
<li class="toctree-l3"><a class="reference internal" href="../verification/drc/calibre.html">DRC</a></li>
<li class="toctree-l3"><a class="reference internal" href="../verification/drc/magic.html">TODO: verification/drc/magic</a></li>
<li class="toctree-l3"><a class="reference internal" href="../verification/drc/klayout.html">TODO: verification/drc/klayout</a></li>
</ul>
</li>
<li class="toctree-l2"><a class="reference internal" href="../verification/lvs.html">SkyWater SKY130 Layout verse Schematic (LVS) Verification</a><ul>
<li class="toctree-l3"><a class="reference internal" href="../verification/lvs/calibre.html">LVS</a></li>
<li class="toctree-l3"><a class="reference internal" href="../verification/lvs/magic.html">TODO: verification/lvs/magic</a></li>
<li class="toctree-l3"><a class="reference internal" href="../verification/lvs/klayout.html">TODO: verification/lvs/klayout</a></li>
</ul>
</li>
<li class="toctree-l2"><a class="reference internal" href="../verification/pex.html">SkyWater SKY130 Parasitics Extraction (PEX)</a><ul>
<li class="toctree-l3"><a class="reference internal" href="../verification/pex/calibre.html">PEX</a></li>
<li class="toctree-l3"><a class="reference internal" href="../verification/pex/magic.html">TODO: verification/pex/magic</a></li>
<li class="toctree-l3"><a class="reference internal" href="../verification/pex/klayout.html">TODO: verification/pex/klayout</a></li>
</ul>
</li>
</ul>
</li>
</ul>
<ul>
<li class="toctree-l1"><a class="reference internal" href="../analog.html">Analog Design</a><ul>
<li class="toctree-l2"><a class="reference internal" href="../analog/virtuoso.html">With Cadence Virtuoso</a></li>
<li class="toctree-l2"><a class="reference internal" href="../analog/magic.html">With MAGIC</a></li>
<li class="toctree-l2"><a class="reference internal" href="../analog/klayout.html">With Klayout</a></li>
<li class="toctree-l2"><a class="reference internal" href="../analog/bag.html">With Berkeley Analog Generator (BAG)</a></li>
<li class="toctree-l2"><a class="reference internal" href="../analog/fasoc.html">With FASoC</a></li>
<li class="toctree-l2"><a class="reference internal" href="../analog/new.html">With your design flow?</a></li>
</ul>
</li>
</ul>
<ul>
<li class="toctree-l1"><a class="reference internal" href="../digital.html">Digital Design</a><ul>
<li class="toctree-l2"><a class="reference internal" href="../digital/innovus.html">With Cadence Innovus</a></li>
<li class="toctree-l2"><a class="reference internal" href="../digital/openroad.html">With OpenROAD</a></li>
<li class="toctree-l2"><a class="reference internal" href="../analog/new.html">With your design flow?</a></li>
</ul>
</li>
</ul>
<ul>
<li class="toctree-l1"><a class="reference internal" href="../sim.html">Simulation</a><ul>
<li class="toctree-l2"><a class="reference internal" href="../sim/spectre.html">With Cadence Spectre</a></li>
<li class="toctree-l2"><a class="reference internal" href="../sim/ngspice.html">With ngspice</a></li>
<li class="toctree-l2"><a class="reference internal" href="../analog/new.html">With your design flow?</a></li>
</ul>
</li>
</ul>
<ul>
<li class="toctree-l1"><a class="reference internal" href="../glossary.html">Glossary</a></li>
<li class="toctree-l1"><a class="reference internal" href="../previous.html">Previous Nomenclature</a></li>
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<!-- Title -->
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<a class="title" href="../index.html">
<span class="title-text">
Skywater SKY130 PDK
</span>
</a>
</span>
<div class="globaltoc">
<span class="mdl-layout-title toc">Table Of Contents</span>
<nav class="mdl-navigation">
<ul class="current">
<li class="toctree-l1 current"><a class="reference internal" href="../rules.html">Process Design Rules</a><ul class="current">
<li class="toctree-l2"><a class="reference internal" href="background.html">Introduction</a></li>
<li class="toctree-l2"><a class="reference internal" href="assumptions.html">Design Rule Criteria &amp; Assumptions</a></li>
<li class="toctree-l2"><a class="reference internal" href="define.html">Device, LVS and other CAD definitions</a></li>
<li class="toctree-l2"><a class="reference internal" href="connectivity.html">Device and Connectivity Information</a></li>
<li class="toctree-l2"><a class="reference internal" href="connectivity/lvs.html">TODO: rules/connectivity/lvs</a></li>
<li class="toctree-l2"><a class="reference internal" href="connectivity/impant.html">TODO: rules/connectivity/impant</a></li>
<li class="toctree-l2"><a class="reference internal" href="connectivity/table.html">TODO: rules/connectivity/table</a></li>
<li class="toctree-l2"><a class="reference internal" href="core.html">Core Rules</a></li>
<li class="toctree-l2"><a class="reference internal" href="periphery.html">Periphery Rules</a></li>
<li class="toctree-l2"><a class="reference internal" href="dummy.html">Dummy Poly Generation to reduce Litr-Poly shorts</a></li>
<li class="toctree-l2"><a class="reference internal" href="areaid.html">TODO: rules/areaid</a></li>
<li class="toctree-l2"><a class="reference internal" href="antenna.html">Antenna Rules</a></li>
<li class="toctree-l2"><a class="reference internal" href="opc.html">OPC sizing/verification procedure</a></li>
<li class="toctree-l2"><a class="reference internal" href="cad.html">CAD switches, created layer algorithms</a></li>
<li class="toctree-l2"><a class="reference internal" href="waffles.html">Created Layer dummy structures (&quot;waffles&quot;)</a></li>
<li class="toctree-l2 current"><a class="current reference internal" href="#">Purpose/Scope</a></li>
<li class="toctree-l2"><a class="reference internal" href="#critical-requirements-summary">Critical Requirements Summary</a></li>
<li class="toctree-l2"><a class="reference internal" href="#operating-procedures-and-responsibilities">Operating Procedures and Responsibilities</a></li>
<li class="toctree-l2"><a class="reference internal" href="#quality-requirements">Quality Requirements</a></li>
<li class="toctree-l2"><a class="reference internal" href="#mtdr-cad-definitions">MTDR &amp; CAD Definitions</a></li>
<li class="toctree-l2"><a class="reference internal" href="latchup.html">Latch-up Design Rules</a></li>
<li class="toctree-l2"><a class="reference internal" href="misc.html">Misc Design Rules</a></li>
</ul>
</li>
</ul>
<ul>
<li class="toctree-l1"><a class="reference internal" href="../contents.html">PDK Contents</a><ul>
<li class="toctree-l2"><a class="reference internal" href="../contents/libraries.html">Libraries</a><ul>
<li class="toctree-l3"><a class="reference internal" href="../contents/libraries/sky130_fd_pr_base/README.html"><span class="lib-process">sky130</span><span>_</span><span class="lib-src">fd</span><span>_</span><span class="lib-type">pr</span> - Skywater Foundry XXXXXX</a><ul>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_pr_base/cells/README.html">Index of <span class="lib-process">sky130</span><span>_</span><span class="lib-src">fd</span><span>_</span><span class="lib-type">pr</span> (version 2.0.1) cells</a></li>
</ul>
</li>
<li class="toctree-l3"><a class="reference internal" href="../contents/libraries/sky130_fd_pr_rf/README.html"><span class="lib-process">sky130</span><span>_</span><span class="lib-src">fd</span><span>_</span><span class="lib-type">pr</span><span>_</span><span class="lib-name">rf</span> - SkyWater Foundry Legacy RF Primitives</a></li>
<li class="toctree-l3"><a class="reference internal" href="../contents/libraries/sky130_fd_pr_rf2/README.html"><span class="lib-process">sky130</span><span>_</span><span class="lib-src">fd</span><span>_</span><span class="lib-type">pr</span><span>_</span><span class="lib-name">rf2</span> - SkyWater Foundry New RF Primitives</a></li>
<li class="toctree-l3"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hd/README.html"><span class="lib-process">sky130</span><span>_</span><span class="lib-src">fd</span><span>_</span><span class="lib-type">sc</span><span>_</span><span class="lib-name">hd</span> - SkyWater Foundry High Density Standard Cells</a><ul>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hd/cells/README.html">TODO: Index of <span class="lib-process">sky130</span><span>_</span><span class="lib-src">fd</span><span>_</span><span class="lib-type">sc</span><span>_</span><span class="lib-name">hd</span> (version 0.0.1) cells</a></li>
</ul>
</li>
<li class="toctree-l3"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hdll/README.html">TODO: <span class="lib-process">sky130</span><span>_</span><span class="lib-src">fd</span><span>_</span><span class="lib-type">sc</span><span>_</span><span class="lib-name">hdll</span></a><ul>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hdll/release_notes.html">Table of Contents</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hdll/release_notes.html#table-of-figures">Table of Figures</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hdll/release_notes.html#table-of-tables">Table of Tables</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hdll/release_notes.html#revision-history">Revision History</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hdll/release_notes.html#reference-documents">Reference Documents</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hdll/release_notes.html#v0-1-1-updates-and-known-limitations-2019-03-28">V0.1.1 Updates and Known Limitations (2019/03/28)</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hdll/release_notes.html#v0-1-0-updates-and-known-limitations-2018-04-26">V0.1.0 Updates and Known Limitations (2018/04/26)</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hdll/release_notes.html#overview">Overview</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hdll/release_notes.html#ip-installation">IP Installation</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hdll/release_notes.html#ip-usage">IP Usage</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hdll/release_notes.html#digital-pdk">Digital PDK</a></li>
</ul>
</li>
<li class="toctree-l3"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hs/README.html">TODO: <span class="lib-process">sky130</span><span>_</span><span class="lib-src">fd</span><span>_</span><span class="lib-type">sc</span><span>_</span><span class="lib-name">hs</span></a><ul>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hs/release_notes.html">Table of Contents</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hs/release_notes.html#table-of-figures">Table of Figures</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hs/release_notes.html#table-of-tables">Table of Tables</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hs/release_notes.html#revision-history">Revision History</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hs/release_notes.html#reference-documents">Reference Documents</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hs/release_notes.html#v0-0-1-updates-and-known-limitations">V0.0.1 Updates and Known Limitations</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hs/release_notes.html#v0-0-0-updates-and-known-limitations">V0.0.0 Updates and Known Limitations</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hs/release_notes.html#overview">Overview</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hs/release_notes.html#ip-installation">IP Installation</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hs/release_notes.html#ip-usage">IP Usage</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hs/release_notes.html#digital-pdk">Digital PDK</a></li>
</ul>
</li>
<li class="toctree-l3"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hvl/README.html">TODO: <span class="lib-process">sky130</span><span>_</span><span class="lib-src">fd</span><span>_</span><span class="lib-type">sc</span><span>_</span><span class="lib-name">hvl</span></a><ul>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hvl/release_notes.html">Table of Contents</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hvl/release_notes.html#list-of-figures">List of Figures</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hvl/release_notes.html#list-of-tables">List of Tables</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hvl/release_notes.html#revision-history">Revision History</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hvl/release_notes.html#reference-documents">Reference Documents</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hvl/release_notes.html#v0-0-1-updates-and-known-limitations">V0.0.1 Updates and Known Limitations</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_hvl/release_notes.html#previous-releases">Previous Releases</a></li>
</ul>
</li>
<li class="toctree-l3"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_lp/README.html">TODO: <span class="lib-process">sky130</span><span>_</span><span class="lib-src">fd</span><span>_</span><span class="lib-type">sc</span><span>_</span><span class="lib-name">lp</span></a><ul>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_lp/release_notes.html">Table of Contents</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_lp/release_notes.html#table-of-figures">Table of Figures</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_lp/release_notes.html#table-of-tables">Table of Tables</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_lp/release_notes.html#revision-history">Revision History</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_lp/release_notes.html#reference-documents">Reference Documents</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_lp/release_notes.html#v0-0-1-updates-and-known-limitations">V0.0.1 Updates and Known Limitations</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_lp/release_notes.html#v0-0-0-updates-and-known-limitations">V0.0.0 Updates and Known Limitations</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_lp/release_notes.html#overview">Overview</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_lp/release_notes.html#ip-installation">IP Installation</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_lp/release_notes.html#ip-usage">IP Usage</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_lp/release_notes.html#digital-pdk">Digital PDK</a></li>
</ul>
</li>
<li class="toctree-l3"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ls/README.html">TODO: <span class="lib-process">sky130</span><span>_</span><span class="lib-src">fd</span><span>_</span><span class="lib-type">sc</span><span>_</span><span class="lib-name">ls</span></a><ul>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ls/release_notes.html">Table of Contents</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ls/release_notes.html#table-of-figures">Table of Figures</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ls/release_notes.html#table-of-tables">Table of Tables</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ls/release_notes.html#revision-history">Revision History</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ls/release_notes.html#reference-documents">Reference Documents</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ls/release_notes.html#v0-1-1-updates-and-known-limitations-2019-03-28">V0.1.1 Updates and Known Limitations (2019/03/28)</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ls/release_notes.html#v0-1-0-updates-and-known-limitations-2018-04-25">V0.1.0 Updates and Known Limitations (2018/04/25)</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ls/release_notes.html#overview">Overview</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ls/release_notes.html#ip-installation">IP Installation</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ls/release_notes.html#ip-usage">IP Usage</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ls/release_notes.html#digital-pdk">Digital PDK</a></li>
</ul>
</li>
<li class="toctree-l3"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ms/README.html">TODO: <span class="lib-process">sky130</span><span>_</span><span class="lib-src">fd</span><span>_</span><span class="lib-type">sc</span><span>_</span><span class="lib-name">ms</span></a><ul>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ms/release_notes.html">Table of Contents</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ms/release_notes.html#table-of-figures">Table of Figures</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ms/release_notes.html#table-of-tables">Table of Tables</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ms/release_notes.html#revision-history">Revision History</a></li>
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<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sc_ms/release_notes.html#v0-0-0-updates-and-known-limitations-2018-03-30">V0.0.0 Updates and Known Limitations (2018/03/30)</a></li>
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<li class="toctree-l3"><a class="reference internal" href="../contents/libraries/sky130_osu_sc/README.html"><span class="lib-process">sky130</span><span>_</span><span class="lib-src">osu</span><span>_</span><span class="lib-type">sc</span> Oklahoma State University Standard Cells</a></li>
<li class="toctree-l3"><a class="reference internal" href="../contents/libraries/sky130_fd_sp_fmlt/README.html">TODO: <span class="lib-process">sky130</span><span>_</span><span class="lib-src">fd</span><span>_</span><span class="lib-type">sp</span><span>_</span><span class="lib-name">fmlt</span> - SKY130 Flash Build Space</a><ul>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sp_fmlt/release_notes.html">Table of Contents</a></li>
<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sp_fmlt/release_notes.html#table-of-tables">Table of Tables</a></li>
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<li class="toctree-l4"><a class="reference internal" href="../contents/libraries/sky130_fd_sp_fmlt/release_notes.html#digital-pdk">Digital PDK</a></li>
</ul>
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<li class="toctree-l3"><a class="reference internal" href="../contents/libraries/sky130_fd_sp_sram/README.html">TODO: <span class="lib-process">sky130</span><span>_</span><span class="lib-src">fd</span><span>_</span><span class="lib-type">sp</span><span>_</span><span class="lib-name">sram</span> - SKY130 SRAM Build Space</a></li>
<li class="toctree-l3"><a class="reference internal" href="../contents/libraries/sky130_fd_io/README.html">TODO: <span class="lib-process">sky130</span><span>_</span><span class="lib-src">fd</span><span>_</span><span class="lib-type">io</span> - SkyWater Foundry provided IO cells</a></li>
<li class="toctree-l3"><a class="reference internal" href="../contents/libraries/sky130_ef_io/README.html">TODO: <span class="lib-process">sky130</span><span>_</span><span class="lib-src">ef</span><span>_</span><span class="lib-type">io</span> - Efabless created IO cells</a></li>
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<div class="document">
<div class="page-content">
<p>Title: M0S8 ACTIVE ESD DESIGN RULES (ESD MTDR)</p>
<p><a class="reference external" href="#appendix-a-mtdr-cad-definitions">APPENDIX A: MTDR &amp; CAD Definitions 5</a>
<a class="reference external" href="#section-a1-mtdr-definitions">Section A1: MTDR Definitions 5</a>
<a class="reference external" href="#section-a2-cad-definitions">Section A2: CAD Definitions 5</a></p>
<p><a class="reference external" href="#appendix-b.-esd-design-rules">APPENDIX B. ESD Design Rules 6</a>
<a class="reference external" href="#section-b1-primary-esd-network-integration-rules">Section B1: Primary ESD Network Integration Rules 6</a>
<a class="reference external" href="#section-b2-secondary-esd-block-integration-rules">Section B2: Secondary ESD Block Integration Rules 9</a>
<a class="reference external" href="#section-b3-regulatedinternal-supply-esd-integration-rules">Section B3: Regulated/Internal Supply ESD Integration Rules 11</a></p>
<p><a class="reference external" href="#appendix-c-miscellaneous-rules">APPENDIX C: Miscellaneous Rules 11</a>
<a class="reference external" href="#section-c1-miscellaneous-rules">Section C1: Miscellaneous Rules 11</a></p>
<div class="section" id="purpose-scope">
<h1>Purpose/Scope<a class="headerlink" href="#purpose-scope" title="Permalink to this headline"></a></h1>
<div class="section" id="purpose">
<h2>Purpose<a class="headerlink" href="#purpose" title="Permalink to this headline"></a></h2>
<p>This specification defines Active ESD design rules for m0s8.</p>
</div>
<div class="section" id="scope">
<h2>Scope<a class="headerlink" href="#scope" title="Permalink to this headline"></a></h2>
<p>This specification is intended for use by design engineers in the development of new products in the m0s8 technology.</p>
</div>
</div>
<div class="section" id="critical-requirements-summary">
<h1>Critical Requirements Summary<a class="headerlink" href="#critical-requirements-summary" title="Permalink to this headline"></a></h1>
<p>Design engineers must provide a design database that is clean to the rules included in this specification, regardless of whether these rules are supported by the automated DRC routines or checked manually.</p>
<p>All manually verified design rules must be checked by design prior to submitting the spec for approval by the technology and ESD groups.</p>
<p>The technology and ESD groups are responsible for interpreting the rules for CAD and design, and for compliance verification based on spot-checks as necessary.</p>
<p>Dimensions included in the spec are drawn = final.</p>
</div>
<div class="section" id="operating-procedures-and-responsibilities">
<h1>Operating Procedures and Responsibilities<a class="headerlink" href="#operating-procedures-and-responsibilities" title="Permalink to this headline"></a></h1>
<p>The MTDR review process consists of the validation of latch up, ESD, and other miscellaneous design rules.</p>
<p>Both automated and manually verified design rules must be reviewed validated by design.</p>
<p>MTDR and CAD definitions are presented in Appendix A.</p>
<p>ESD rules are presented in Appendix B. The rules are divided into two sections: ESD block integration and miscellaneous rules.</p>
<ul class="simple">
<li><p>Section B1 provides rules for pad ring ESD networks associated with I/O’s and power supplies. It specifies the Primary ESD block integration requirements and also defines the resistances, bus widths, and interconnect requirements to connect these ESD blocks to bond pads and/or I/O buffers within an I/O, input, output, power, or ground cell.</p></li>
<li><p>Section B2 specifies the Secondary (local) ESD block integration rules and defines the resistances, bus widths, and interconnect requirements to connect these ESD blocks to bond pads and/or IO buffers within an I/O and input cell.</p></li>
<li><p>Section B3 specifies the Regulated (internal) ESD block integration rules.</p></li>
</ul>
<p>Section C outlines additional miscellaneous rules applicable at the chip-level.</p>
</div>
<div class="section" id="quality-requirements">
<h1>Quality Requirements<a class="headerlink" href="#quality-requirements" title="Permalink to this headline"></a></h1>
<p>All rules not checked automatically (marked as “NDRC” in this spec) must be checked manually by Design.</p>
</div>
<div class="section" id="mtdr-cad-definitions">
<h1>MTDR &amp; CAD Definitions<a class="headerlink" href="#mtdr-cad-definitions" title="Permalink to this headline"></a></h1>
<table class="listparagraph docutils align-default" id="section-a1-mtdr-definitions">
<caption><span class="caption-text">Section A1: MTDR Definitions</span><a class="headerlink" href="#section-a1-mtdr-definitions" title="Permalink to this table"></a></caption>
<colgroup>
<col style="width: 24%" />
<col style="width: 76%" />
</colgroup>
<tbody>
<tr class="row-odd"><td><p><strong>Name</strong></p></td>
<td><p><strong>Definitions (Used throughout the body of the spec)</strong></p></td>
</tr>
<tr class="row-even"><td><p>Pad</p></td>
<td><p>A bond pad</p></td>
</tr>
<tr class="row-odd"><td><p>Power Supply</p></td>
<td><p>A power net</p></td>
</tr>
<tr class="row-even"><td><p>Ground Supply</p></td>
<td><p>A ground net</p></td>
</tr>
<tr class="row-odd"><td><p>Regulated/Internal Power Supply</p></td>
<td><p>An internal power supply that is not bonded out in package but regulated from an external supply</p>
<p>The net names placed in latch-up DRC form must be enclosed by a pair of square brackets.</p>
</td>
</tr>
<tr class="row-even"><td><p>Primary ESD Block</p></td>
<td><p>A pad-connected ESD block that provides primary ESD protection in the IO ring</p></td>
</tr>
<tr class="row-odd"><td><p>IO Pad</p></td>
<td><p>A pad associated with an input or IO net</p></td>
</tr>
<tr class="row-even"><td><p>ESD Resistor</p></td>
<td><p>An ESD resistor used in the input path to a gate oxide</p></td>
</tr>
<tr class="row-odd"><td><p>Secondary ESD Block</p></td>
<td><p>A local ESD protection element (resistors and clamps) required for protection of input paths</p></td>
</tr>
<tr class="row-even"><td><p>Signal Pad Diffusion or Tap</p></td>
<td><p>Any diff or tap connected to a signal pad either metallically or through a resistor of less than 10KOhm.</p>
<p>Notes:</p>
<ol class="arabic simple">
<li><p>Only resistors labeled with text.dg as ‘10KOhm’, or connected to pwr/gnd supplies, will break the connectivity between pad and diffusion.</p></li>
<li><p>Drain Extended FETs must be checked manually for all guard ring rules</p></li>
</ol>
<p>Legacy IP with ‘100KOhm’ text.dg label will also break the connectivity between pad and diffusion.</p>
</td>
</tr>
</tbody>
</table>
<table class="listparagraph docutils align-default" id="section-a2-cad-definitions">
<caption><span class="caption-text">Section A2: CAD Definitions</span><a class="headerlink" href="#section-a2-cad-definitions" title="Permalink to this table"></a></caption>
<colgroup>
<col style="width: 65%" />
<col style="width: 35%" />
</colgroup>
<tbody>
<tr class="row-odd"><td><p><strong>Name</strong></p></td>
<td><p><strong>Defining algorithm</strong></p></td>
</tr>
<tr class="row-even"><td></td>
<td></td>
</tr>
</tbody>
</table>
<table class="docutils align-default" id="id1">
<caption><span class="caption-text">Latch-up DRC Form Descriptions</span><a class="headerlink" href="#id1" title="Permalink to this table"></a></caption>
<colgroup>
<col style="width: 17%" />
<col style="width: 83%" />
</colgroup>
<tbody>
<tr class="row-odd"><td><p><strong>Name</strong></p></td>
<td><p><strong>Descriptions</strong></p></td>
</tr>
<tr class="row-even"><td><p><em>Gnd Nets</em></p>
<p><em>Pwr Nets</em></p>
</td>
<td><p>A list of power/ground nets. Regulated Supply nets need to be enclosed between square brackets and placed in the latchup form power nets field, for example: [vpwr] vcch [vnb] vgnd.</p></td>
</tr>
</tbody>
</table>
<div class="section" id="esd-design-rules">
<h2>ESD Design Rules<a class="headerlink" href="#esd-design-rules" title="Permalink to this headline"></a></h2>
<table class="listparagraph docutils align-default" id="section-b1-primary-esd-network-integration-rules">
<caption><span class="caption-text">Section B1: Primary ESD Network Integration Rules</span><a class="headerlink" href="#section-b1-primary-esd-network-integration-rules" title="Permalink to this table"></a></caption>
<colgroup>
<col style="width: 4%" />
<col style="width: 7%" />
<col style="width: 82%" />
<col style="width: 4%" />
<col style="width: 4%" />
</colgroup>
<tbody>
<tr class="row-odd"><td><p><strong>Rule</strong></p>
<p><strong>netio.</strong></p>
</td>
<td><p><strong>Exempt</strong></p></td>
<td><p>Note 1. The ESD group is responsible for documenting the ESD block used for each die pad and for defining the chip-level ESD supply bussing, boost, and trigger domains. The product team is responsible for implementing the chip-level primary ESD network.</p></td>
<td><p><strong>Use</strong></p></td>
<td><p><strong>Value</strong></p></td>
</tr>
<tr class="row-even"><td><p><strong>1</strong></p></td>
<td></td>
<td><p>Allowable ESD public cells for the primary ESD network</p></td>
<td><p><strong>NDRC</strong></p></td>
<td><p><strong>Table 1</strong></p></td>
</tr>
<tr class="row-odd"><td><p><strong>2.1</strong></p></td>
<td></td>
<td><p>Maximum Vcc bus routing resistance between adjacent 10V distributed active shunt ESD blocks</p></td>
<td><p><strong>NDRC</strong></p></td>
<td><p><strong>110 mΩ</strong></p></td>
</tr>
<tr class="row-even"><td><p><strong>2.2</strong></p></td>
<td><p>ESD Bus Domains</p></td>
<td><p>Maximum Vcc bus routing resistance between any 5V pad and nearest 5V grouped active shunt ESD clamp</p></td>
<td><p><strong>NDRC</strong></p></td>
<td><p><strong>1.0 Ω</strong></p></td>
</tr>
<tr class="row-odd"><td><p><strong>3.1</strong></p></td>
<td></td>
<td><p>Maximum Vss bus routing resistance between adjacent 10V distributed active shunt ESD blocks</p></td>
<td><p><strong>NDRC</strong></p></td>
<td><p><strong>210 mΩ</strong></p></td>
</tr>
<tr class="row-even"><td><p><strong>3.2</strong></p></td>
<td></td>
<td><p>Maximum Vss bus routing resistance between any 5V pad and nearest 5V grouped active shunt ESD clamp</p></td>
<td><p><strong>NDRC</strong></p></td>
<td><p><strong>1.0 Ω</strong></p></td>
</tr>
<tr class="row-odd"><td><p><strong>4</strong></p></td>
<td><p>Non-ESD Bus Domains</p></td>
<td><p>Maximum ESD bus routing resistance between any 5V pad and nearest 5V grouped active shunt ESD clamp</p></td>
<td><p><strong>NDRC</strong></p></td>
<td><p><strong>1.0 Ω</strong></p></td>
</tr>
<tr class="row-even"><td><p><strong>5</strong></p></td>
<td></td>
<td><p>The minimum number of 10V distributed active shunt ESD blocks connected to a single trigger circuit via the “trig_s” signal</p>
<p><strong>Note: not checked when the block_level switch is used</strong></p>
<p><strong>Note: this rule does not apply when run on ESD library cells</strong></p>
</td>
<td><p><strong>NDRC</strong></p></td>
<td><p><strong>8</strong></p></td>
</tr>
<tr class="row-odd"><td><p><strong>6</strong></p></td>
<td></td>
<td><p>The maximum number of 10V distributed active shunt ESD blocks connected to a single trigger circuit via the “trig_s” signal</p>
<p><strong>Note: not checked when the block_level switch is used</strong></p>
<p><strong>Note: this rule does not apply when run on ESD library cells</strong></p>
</td>
<td><p><strong>NDRC</strong></p></td>
<td><p><strong>15</strong></p></td>
</tr>
<tr class="row-even"><td><p><strong>7</strong></p></td>
<td></td>
<td><p>The trigger circuit output (trig_s) must not be multi-driven (i.e. trig signal from one trigger circuit must not connect to the trig signal of other trigger circuit)</p>
<p><strong>Note: this rule does not apply when run on ESD library cells</strong></p>
</td>
<td><p><strong>NDRC</strong></p></td>
<td></td>
</tr>
<tr class="row-odd"><td><p><strong>8</strong></p></td>
<td></td>
<td><p>The trigger circuit and the 10V distributed active shunt ESD blocks connected to that trigger circuit must have a common boost signal</p>
<p><strong>Note: this rule does not apply when run on ESD library cells</strong></p>
</td>
<td><p><strong>NDRC</strong></p></td>
<td></td>
</tr>
<tr class="row-even"><td><p><strong>9</strong></p></td>
<td></td>
<td><p>Any routing used to extend pad pitch beyond minimum must utilize, at a minimum, the identical bussing structure and bus widths as the ESD block</p></td>
<td><p><strong>NDRC</strong></p></td>
<td></td>
</tr>
<tr class="row-odd"><td><p><strong>10</strong></p></td>
<td></td>
<td><p>The 10V distributed active shunt domain output driver ground supply must be strapped to the associated ESD ground at every IO block</p></td>
<td><p><strong>NDRC</strong></p></td>
<td></td>
</tr>
<tr class="row-even"><td><p><strong>10.1</strong></p></td>
<td></td>
<td><p>Maximum ground supply resistance between the 10V distributed active shunt domain output driver source and 10V distributed active shunt ESD block</p></td>
<td><p><strong>NDRC</strong></p></td>
<td><p><strong>0.5 Ω</strong></p></td>
</tr>
<tr class="row-odd"><td><p><strong>11</strong></p></td>
<td></td>
<td><p>The 10V distributed active shunt domain output driver power supply must be strapped to its associated ESD supply at every IO block</p></td>
<td><p><strong>NDRC</strong></p></td>
<td></td>
</tr>
<tr class="row-even"><td><p><strong>11.1</strong></p></td>
<td></td>
<td><p>Maximum power supply resistance between the 10V distributed active shunt output driver source and 10V distributed active shunt ESD block</p></td>
<td><p><strong>NDRC</strong></p></td>
<td><p><strong>0.5 Ω</strong></p></td>
</tr>
<tr class="row-odd"><td><p><strong>12</strong></p></td>
<td></td>
<td><p>Each pad associated with a 10V distributed active shunt ESD block must connect directly to that ESD block in metal</p></td>
<td><p><strong>NDRC</strong></p></td>
<td></td>
</tr>
<tr class="row-even"><td><p><strong>12.1</strong></p></td>
<td></td>
<td><p>Maximum total resistance between pad and the 10V distributed active shunt ESD block</p></td>
<td><p><strong>NDRC</strong></p></td>
<td><p><strong>0.1 Ω</strong></p></td>
</tr>
<tr class="row-odd"><td><p><strong>12.2</strong></p></td>
<td></td>
<td><p>Minimum metal width of each metal layer in any path between pad and the ESD block</p></td>
<td><p><strong>NDRC</strong></p></td>
<td><p><strong>Table 2</strong></p></td>
</tr>
<tr class="row-even"><td><p><strong>12.3</strong></p></td>
<td></td>
<td><p>Minimum number of contacts for each contact layer in any path between pad and any primary ESD block</p></td>
<td><p><strong>NDRC</strong></p></td>
<td><p><strong>Table 3</strong></p></td>
</tr>
<tr class="row-odd"><td><p><strong>13</strong></p></td>
<td></td>
<td><p>The maximum resistance from any ground pad to the nearest B2B diode down to Met1.</p>
<p>Allowable B2B diodes:</p>
<ul class="simple">
<li><p>s8iom0s8_top_b2b_diode</p></li>
<li><p>s8iom0S8_top_lvc_b2b_wopad</p></li>
<li><p>s8_esd_gnd2gnd_120x2_lv_isosub</p></li>
<li><p>s8atlasana_esd_gnd2gnd_120x2_lv_isosub</p></li>
<li><p>s8fpiom0s8_esd_gnd2gnd_180x2_lv_dnwl</p></li>
</ul>
</td>
<td><p><strong>LuRes</strong></p></td>
<td><p><strong>2Ω</strong></p></td>
</tr>
<tr class="row-even"><td><p><strong>14</strong></p></td>
<td></td>
<td><p>Each independent on-chip ground pad, including substrate pads, must metallically connect to at least one B2B diode</p>
<p>Allowable B2B diodes:</p>
<ul class="simple">
<li><p>s8iom0s8_top_b2b_diode</p></li>
<li><p>s8iom0S8_top_lvc_b2b_wopad</p></li>
<li><p>s8_esd_gnd2gnd_120x2_lv_isosub</p></li>
<li><p>s8atlasana_esd_gnd2gnd_120x2_lv_isosub</p></li>
<li><p>s8fpiom0s8_esd_gnd2gnd_180x2_lv_dnwl</p></li>
</ul>
</td>
<td><p><strong>LuRes</strong></p></td>
<td></td>
</tr>
<tr class="row-odd"><td><p><strong>15</strong></p></td>
<td></td>
<td><p>Maximum metal resistance from one end of the bus (power, ground) to another</p></td>
<td><p><strong>NDRC</strong></p></td>
<td><p><strong>5Ω</strong></p></td>
</tr>
</tbody>
</table>
<table class="docutils align-default" id="id2">
<caption><span class="caption-text">Table 1 – Allowable Primary ESD Blocks</span><a class="headerlink" href="#id2" title="Permalink to this table"></a></caption>
<colgroup>
<col style="width: 8%" />
<col style="width: 8%" />
<col style="width: 12%" />
<col style="width: 33%" />
<col style="width: 39%" />
</colgroup>
<tbody>
<tr class="row-odd"><td><p>Pad Type</p></td>
<td><p>DDC</p></td>
<td><p>Library</p></td>
<td><p>Cell Name</p></td>
<td><p>Description</p></td>
</tr>
<tr class="row-even"><td><p>10V</p></td>
<td><p>s8esdg4</p></td>
<td><p>s8esdg4_net</p></td>
<td><p>s8esdg4_net_io_b</p></td>
<td><p>10V TX/RX signal pad</p></td>
</tr>
<tr class="row-odd"><td><p>10V</p></td>
<td><p>s8esdg4</p></td>
<td><p>s8esdg4_net</p></td>
<td><p>s8esdg4_net_10v_clamp</p></td>
<td><p>10V supply pad</p></td>
</tr>
<tr class="row-even"><td><p>10V</p></td>
<td><p>s8esdg4</p></td>
<td><p>s8esdg4_trig</p></td>
<td><p>s8esdtrig_trig_top_b</p></td>
<td><p>10V distributed active shunt trigger circuit</p></td>
</tr>
<tr class="row-odd"><td><p>5V</p></td>
<td><p>s8iom0s8</p></td>
<td><p>s8iom0s8</p></td>
<td><p>s8iom0s8_top_gpio</p></td>
<td><p>5V GPIO driver with ESD block</p></td>
</tr>
<tr class="row-even"><td><p>5V</p></td>
<td><p>s8iom0s8</p></td>
<td><p>s8iom0s8</p></td>
<td><p>s8iom0s8_top_sio</p></td>
<td><p>5V SIO driver with ESD block</p></td>
</tr>
<tr class="row-odd"><td><p>5V</p></td>
<td><p>s8iom0s8</p></td>
<td><p>s8iom0s8</p></td>
<td><p>s8iom0s8_top_vss</p></td>
<td><p>Includes 5V HV ESD clamp</p></td>
</tr>
<tr class="row-even"><td><p>5V</p></td>
<td><p>s8iom0s8</p></td>
<td><p>s8iom0s8</p></td>
<td><p>s8iom0s8_top_vcc</p></td>
<td><p>Includes two 1.8V LV clamps</p></td>
</tr>
<tr class="row-odd"><td><p>5V</p></td>
<td><p>s8iom0s8</p></td>
<td><p>s8iom0s8</p></td>
<td><p>s8iom0s8_top_vdd</p></td>
<td><p>Includes two 1.8V LV clamps</p></td>
</tr>
<tr class="row-even"><td><p>5V</p></td>
<td><p>s8iom0s8</p></td>
<td><p>s8iom0s8</p></td>
<td><p>s8iom0s8_top_vddnp</p></td>
<td><p>Includes 5V HV ESD clamp</p></td>
</tr>
<tr class="row-odd"><td><p>5V</p></td>
<td><p>s8iom0s8</p></td>
<td><p>s8iom0s8</p></td>
<td><p>s8iom0s8_top_vddc</p></td>
<td><p>Includes 5V HV ESD clamp</p></td>
</tr>
<tr class="row-even"><td><p>5V</p></td>
<td><p>s8iom0s8</p></td>
<td><p>s8iom0s8</p></td>
<td><p>s8iom0s8_top_vssc</p></td>
<td><p>Includes two 1.8V LV clamps and B2B diode</p></td>
</tr>
<tr class="row-odd"><td><p>1.8V</p></td>
<td><p>s8framio</p></td>
<td><p>s8framio</p></td>
<td><p>s8framio_esd_paddiode2pwr_100_lv</p></td>
<td><p>LV diode clamps for FRS8 products</p></td>
</tr>
<tr class="row-even"><td><p>1.8V</p></td>
<td><p>s8framio</p></td>
<td><p>s8framio</p></td>
<td><p>s8framio_esd_paddiode2gnd_100_dnwl_lv</p></td>
<td><p>LV diode clamps for FRS8 products</p></td>
</tr>
</tbody>
</table>
<table class="docutils align-default" id="id3">
<caption><span class="caption-text">Table 1a: Pin Table for SHV ESD Clamps</span><a class="headerlink" href="#id3" title="Permalink to this table"></a></caption>
<colgroup>
<col style="width: 16%" />
<col style="width: 15%" />
<col style="width: 42%" />
<col style="width: 27%" />
</colgroup>
<tbody>
<tr class="row-odd"><td><p>Pad Type</p></td>
<td><p><strong>DDC</strong></p></td>
<td><p><strong>Cell Name</strong></p></td>
<td><p><strong>Description</strong></p></td>
</tr>
<tr class="row-even"><td><p>21V</p></td>
<td><p>s8usbpd</p></td>
<td><p>s8usbpd_esd_iec_21v_30x4</p></td>
<td><p>21V IEC Clamp</p></td>
</tr>
<tr class="row-odd"><td><p>32V</p></td>
<td><p>s8usbpd</p></td>
<td><p>s8usbpd_esd_hbm_32v_10x4</p></td>
<td><p>32V HBM Clamps</p></td>
</tr>
<tr class="row-even"><td><p>21V</p></td>
<td><p>s8usbpd</p></td>
<td><p>s8usbpd_esd_hbm_21v_10x4</p></td>
<td><p>21V HBM Clamps</p></td>
</tr>
<tr class="row-odd"><td><p>21V</p></td>
<td><p>s8usbpd</p></td>
<td><p>s8usbpd_esd_cdm_uhv</p></td>
<td><p>HV CDM Clamp</p></td>
</tr>
</tbody>
</table>
<table class="docutils align-default" id="id4">
<caption><span class="caption-text">Table 2 – Primary ESD Block Minimum Metal Interconnect Width Requirements</span><a class="headerlink" href="#id4" title="Permalink to this table"></a></caption>
<colgroup>
<col style="width: 26%" />
<col style="width: 15%" />
<col style="width: 15%" />
<col style="width: 13%" />
<col style="width: 13%" />
<col style="width: 18%" />
</colgroup>
<tbody>
<tr class="row-odd"><td><p>Pad Type</p></td>
<td><p>M1</p></td>
<td><p>M2</p></td>
<td><p>M3</p></td>
<td><p>M4</p></td>
<td><p>M5</p></td>
</tr>
<tr class="row-even"><td><p>All</p></td>
<td><p>12µm</p></td>
<td><p>12µm</p></td>
<td><p>6µm</p></td>
<td><p>6µm</p></td>
<td><p>2.5µm</p></td>
</tr>
</tbody>
</table>
<table class="docutils align-default" id="id5">
<caption><span class="caption-text">Table 3 – Primary ESD Block Minimum Contact Interconnect Requirements</span><a class="headerlink" href="#id5" title="Permalink to this table"></a></caption>
<colgroup>
<col style="width: 19%" />
<col style="width: 15%" />
<col style="width: 14%" />
<col style="width: 12%" />
<col style="width: 14%" />
<col style="width: 14%" />
<col style="width: 14%" />
</colgroup>
<tbody>
<tr class="row-odd"><td><p><strong>Pad Type</strong></p></td>
<td><p><strong>licon</strong></p></td>
<td><p><strong>mcon</strong></p></td>
<td><p><strong>via</strong></p></td>
<td><p><strong>via2</strong></p></td>
<td><p><strong>via3</strong></p></td>
<td><p><strong>via4</strong></p></td>
</tr>
<tr class="row-even"><td><p>All</p></td>
<td><p>400</p></td>
<td><p>250</p></td>
<td><p>90</p></td>
<td><p>70</p></td>
<td><p>70</p></td>
<td><p>8</p></td>
</tr>
</tbody>
</table>
<table class="listparagraph docutils align-default" id="section-b2-secondary-esd-block-integration-rules">
<caption><span class="caption-text">Section B2: Secondary ESD Block Integration Rules</span><a class="headerlink" href="#section-b2-secondary-esd-block-integration-rules" title="Permalink to this table"></a></caption>
<colgroup>
<col style="width: 3%" />
<col style="width: 3%" />
<col style="width: 86%" />
<col style="width: 3%" />
<col style="width: 4%" />
</colgroup>
<tbody>
<tr class="row-odd"><td><p><strong>Rule</strong></p>
<p><strong>blkio.</strong></p>
</td>
<td><p><strong>Exempt</strong></p></td>
<td><p>Note: Secondary (local) ESD blocks are associated with input paths from the pad to input buffers or any gate oxide</p></td>
<td><p><strong>Use</strong></p></td>
<td><p><strong>Value</strong></p></td>
</tr>
<tr class="row-even"><td><p><strong>1</strong></p></td>
<td></td>
<td><p>Allowable ESD IP for secondary ESD blocks</p></td>
<td><p><strong>NDRC</strong></p></td>
<td><p><strong>Table 4</strong></p></td>
</tr>
<tr class="row-odd"><td><p><strong>2</strong></p></td>
<td></td>
<td><p>An ESD resistor must be connected between any IO pad and pass/transmission and/or input buffer gates</p>
<p>Exemptions:</p>
<ul class="simple">
<li><p>s8tsafeg7xl_mux_low_res_top</p></li>
</ul>
</td>
<td><p><strong>NDRC</strong></p></td>
<td></td>
</tr>
<tr class="row-even"><td><p><strong>3</strong></p></td>
<td></td>
<td><p>Secondary ESD blocks must be placed at the input buffer gates if the resistance from pad to input is &lt;10K ohms</p></td>
<td><p><strong>NDRC</strong></p></td>
<td></td>
</tr>
<tr class="row-odd"><td></td>
<td><p><strong>3a</strong></p></td>
<td><p>Secondary ESD blocks are not required if the input path consists of an ESD resistor AND series pass/transmission gate(s)</p></td>
<td><p><strong>NDRC</strong></p></td>
<td></td>
</tr>
<tr class="row-even"><td><p><strong>3.1</strong></p></td>
<td></td>
<td><p>The secondary ESD block must connect to the same power supply and ground supply as the input buffers</p></td>
<td><p><strong>NDRC</strong></p></td>
<td></td>
</tr>
<tr class="row-odd"><td></td>
<td><p><strong>3.1a</strong></p></td>
<td><p>If the input gate voltage swing exceeds the input stage power supply, the secondary ESD block may be connected to an intermediate power supply at the discretion of the ESD Group</p></td>
<td><p><strong>NDRC</strong></p></td>
<td></td>
</tr>
<tr class="row-even"><td><p><strong>3.2</strong></p></td>
<td></td>
<td><p>Maximum power supply interconnect resistance (R1) between secondary ESD block cathode and input buffer power supply based on the following conditions (Figure 1):</p>
<ol class="loweralpha simple">
<li><p>If the local diode power supply connection is in the primary current path (Condition a)</p></li>
<li><p>If the local diode power supply connection is not in the primary current path (Condition b)</p></li>
</ol>
<p><strong>Note: If the power supply connections to the input block use the input block power bussing as a feedthrough to other blocks, the connection is considered to be in the primary current path. Condition b is desired, as it limits the maximum voltage across the input buffer gate during ESD events.</strong></p>
</td>
<td><p><strong>NDRC</strong></p></td>
<td><p><strong>1 Ω</strong></p>
<p><strong>5 Ω</strong></p>
</td>
</tr>
<tr class="row-odd"><td></td>
<td><p><strong>3.2a</strong></p></td>
<td><p>If condition 3.1a exists, rule 3.2 is exempted.</p></td>
<td><p><strong>NDRC</strong></p></td>
<td></td>
</tr>
<tr class="row-even"><td><p><strong>3.3</strong></p></td>
<td></td>
<td><p>Maximum ground supply interconnect resistance (R2) between secondary ESD block anode and input buffer ground supply based on the following conditions (Figure 1):</p>
<ol class="loweralpha simple">
<li><p>If the local diode power supply connection is in the primary current path (Condition a)</p></li>
<li><p>If the local diode power supply connection is not in the primary current path (Condition b)</p></li>
</ol>
<p><strong>Note: If the ground supply connections to the input block use the input block ground bussing as a feedthrough to other blocks, the connection is considered to be in the primary current path. Condition b is desired, as it limits the maximum voltage across the input buffer gate during ESD events.</strong></p>
</td>
<td><p><strong>NDRC</strong></p></td>
<td><p><strong>1 Ω</strong></p>
<p><strong>5 Ω</strong></p>
</td>
</tr>
<tr class="row-odd"><td><p><strong>4</strong></p></td>
<td></td>
<td><p>Minimum metal width for any metal layer in all paths connecting from IO pad to the secondary ESD block</p></td>
<td><p><strong>NDRC</strong></p></td>
<td><p><strong>0.6µm</strong></p></td>
</tr>
<tr class="row-even"><td><p><strong>5</strong></p></td>
<td></td>
<td><p>Minimum total number of contacts for any contact layer in all paths from IO pad to the secondary ESD block</p></td>
<td><p><strong>NDRC</strong></p></td>
<td><p><strong>2</strong></p></td>
</tr>
</tbody>
</table>
<table class="docutils align-default" id="id6">
<caption><span class="caption-text">Table 4 – Cell Names for Secondary ESD Blocks</span><a class="headerlink" href="#id6" title="Permalink to this table"></a></caption>
<colgroup>
<col style="width: 21%" />
<col style="width: 12%" />
<col style="width: 17%" />
<col style="width: 50%" />
</colgroup>
<tbody>
<tr class="row-odd"><td><p>Pad Type</p></td>
<td><p>DDC Name</p></td>
<td><p>Library Name</p></td>
<td><p>Cell Name</p></td>
</tr>
<tr class="row-even"><td><p>All input paths</p></td>
<td><p>s8_esd</p></td>
<td><p>s8_esd</p></td>
<td><p>s8_esd_ signal_5_sym_lv_local
s8_esd_signal_ 5_sym_hv_local_5term
s8_esd_signal_5_sym_hv_local_5term_dnwl
s8_esd_localdiode_hv
s8_esd_localdiode_lv
s8_esd_res_75only_small
s8_esd_res_250only_small</p></td>
</tr>
</tbody>
</table>
<div class="figure align-default" id="id7">
<img alt="rules/Figure1–LocalDiodeConnectionResistanceRules" src="rules/Figure1–LocalDiodeConnectionResistanceRules" />
<p class="caption"><span class="caption-text"><a class="reference internal" href="rules/./media/esd3.svf"><img alt="image1" src="rules/./media/esd3.svf" style="width: 6.09722in; height: 2.94097in;" /></a></span><a class="headerlink" href="#id7" title="Permalink to this image"></a></p>
</div>
<table class="listparagraph docutils align-default" id="section-b3-regulatedinternal-supply-esd-integration-rules">
<caption><span class="caption-text">Section B3: Regulated/Internal Supply ESD Integration Rules</span><a class="headerlink" href="#section-b3-regulatedinternal-supply-esd-integration-rules" title="Permalink to this table"></a></caption>
<colgroup>
<col style="width: 4%" />
<col style="width: 4%" />
<col style="width: 85%" />
<col style="width: 3%" />
<col style="width: 4%" />
</colgroup>
<tbody>
<tr class="row-odd"><td><p><strong>Rule</strong></p>
<p><strong>netreg.</strong></p>
</td>
<td><p><strong>Exempt</strong></p></td>
<td><p>Note: Due to the complexities of internal supply domain ESD protection, the ESD group will document the protection scheme for each regulated/internal supply on chip. The product team is responsible for implementing the chip-level regulated ESD network.</p></td>
<td><p><strong>Use</strong></p></td>
<td><p><strong>Value</strong></p></td>
</tr>
<tr class="row-even"><td><p><strong>1</strong></p></td>
<td></td>
<td><p>Allowable ESD IP Blocks for regulated/internal supply domains</p></td>
<td><p><strong>NDRC</strong></p></td>
<td><p><strong>Table</strong></p></td>
</tr>
<tr class="row-odd"><td><p><strong>2</strong></p></td>
<td></td>
<td><p>No ESD blocks are required for regulated/internal supply domains with total Pwr to Gnd capacitance of greater than</p></td>
<td><p><strong>NDRC</strong></p></td>
<td><p><strong>30 nF</strong></p></td>
</tr>
</tbody>
</table>
<table class="docutils align-default" id="id8">
<caption><span class="caption-text">Table 5 – Cell Names for Regulated/Internal Supply Domains</span><a class="headerlink" href="#id8" title="Permalink to this table"></a></caption>
<colgroup>
<col style="width: 16%" />
<col style="width: 16%" />
<col style="width: 22%" />
<col style="width: 46%" />
</colgroup>
<tbody>
<tr class="row-odd"><td><p>Pad Type</p></td>
<td><p>DDC Name</p></td>
<td><p>Library Name</p></td>
<td><p>Cell Name</p></td>
</tr>
<tr class="row-even"><td><p>10V</p></td>
<td><p>N/A</p></td>
<td><p>N/A</p></td>
<td><p>N/A</p></td>
</tr>
<tr class="row-odd"><td><p>5V</p></td>
<td><p>s8iom0s8</p></td>
<td><p>s8iom0s8</p></td>
<td><p>Includes two 1.8V LV clamps</p></td>
</tr>
</tbody>
</table>
</div>
<div class="section" id="appendix-c-miscellaneous-rules">
<h2>APPENDIX C: Miscellaneous Rules<a class="headerlink" href="#appendix-c-miscellaneous-rules" title="Permalink to this headline"></a></h2>
<table class="listparagraph docutils align-default" id="section-c1-miscellaneous-rules">
<caption><span class="caption-text">Section C1: Miscellaneous Rules</span><a class="headerlink" href="#section-c1-miscellaneous-rules" title="Permalink to this table"></a></caption>
<colgroup>
<col style="width: 3%" />
<col style="width: 4%" />
<col style="width: 82%" />
<col style="width: 4%" />
<col style="width: 6%" />
</colgroup>
<tbody>
<tr class="row-odd"><td><p><strong>Rule</strong>
<strong>mdr.</strong></p></td>
<td><p><strong>Exempt</strong></p></td>
<td></td>
<td><p><strong>Use</strong></p></td>
<td><p><strong>Value</strong></p></td>
</tr>
<tr class="row-even"><td><p><strong>1</strong></p></td>
<td></td>
<td><p>DELETED</p></td>
<td></td>
<td></td>
</tr>
<tr class="row-odd"><td><p><strong>2</strong></p></td>
<td></td>
<td><p>DELETED</p></td>
<td></td>
<td></td>
</tr>
<tr class="row-even"><td><p><strong>3</strong></p>
<p><strong>3.1</strong></p>
<p><strong>3.2</strong></p>
</td>
<td></td>
<td><p>Parasitic diodes metallically connected between external pads (i.e. – pdiff to a pad and its associated nwell connected to another pad, or ndiff to a pad and its associated pwell connected to another pad) must meet the following criteria;</p>
<p>Minimum diffusion area:</p>
<p>Minimum interconnect metal width and contact/via counts</p>
</td>
<td><p><strong>NDRC</strong></p></td>
<td><p>100 µm<sup>2</sup></p>
<p>Tables 2/3</p>
</td>
</tr>
<tr class="row-odd"><td></td>
<td><p><strong>3a</strong></p></td>
<td><p>Exemptions: Instances covered by areaid:ed</p></td>
<td></td>
<td></td>
</tr>
<tr class="row-even"><td><p><strong>4</strong></p></td>
<td></td>
<td><p><strong>ESD_At_Risk_Wells</strong></p>
<p>Defined as;</p>
<ol class="arabic simple">
<li><p>Nwell that contains pad connected diffusion and the well is not metallically connected (hard tied) to a Vcc net</p></li>
<li><p>Pwell in DNW that contains pad connected diffusion and the well is not metallically connected (hard tied) to a Vss net</p></li>
</ol>
<p>Equivalent resistance from the pad to the diffusion in the well must be ≥ 75Ω</p>
<p>(See Figure below)</p>
<p><a class="reference internal" href="rules/./media/esd4.svf"><img alt="image2" src="rules/./media/esd4.svf" style="width: 4.21528in; height: 6.68542in;" /></a></p>
<p><strong>Rule 4 – ESD_At_Risk_Wells</strong></p>
</td>
<td><p><strong>NDRC</strong></p></td>
<td></td>
</tr>
<tr class="row-odd"><td></td>
<td><p><strong>4a</strong></p></td>
<td><p>Exemption: Pad connected ESD diffusion – the ESD diffusion must be in a separate/isolated well, it cannot be in the same well as any other resistively isolated diffusions. (See Figure)</p>
<p><a class="reference internal" href="rules/./media/esd5.svf"><img alt="image3" src="rules/./media/esd5.svf" style="width: 5.29028in; height: 6.84514in;" /></a></p>
<p><strong>Rule 4 – ESD_At_Risk_Wells – Exemptions</strong></p>
</td>
<td><p><strong>NDRC</strong></p></td>
<td></td>
</tr>
<tr class="row-even"><td><p><strong>5</strong></p></td>
<td></td>
<td><p>Minimum equivalent resistance from signal pad to n+ diffusion which is in an isolated p-well where the isolated p-well is not metallically connected to ground</p>
<p>Exemption:</p>
<ul class="simple">
<li><p>s8uspbd_sbu_sw_top</p></li>
<li><p>s8subpdv2_vddd_sw_nsw</p></li>
<li><p>s8usbpdv2_dpdm_sw_2X2_nch</p></li>
<li><p>s8usbpdv2_20vconn_sw_top</p></li>
<li><p>s8usbpdv2_20sbu_sw_top</p></li>
</ul>
</td>
<td><p><strong>LuRes</strong></p></td>
<td><p>150Ω</p></td>
</tr>
<tr class="row-odd"><td><p><strong>6</strong></p></td>
<td></td>
<td><p>All touch products should use snapback robust ESD clamp on the power supply that drives the touch sense X-Y IO’s and the touch sense X-Y IO’s should have snapback capable licon to poly space</p></td>
<td><p><strong>NDRC</strong></p></td>
<td></td>
</tr>
</tbody>
</table>
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<li><a class="reference internal" href="#critical-requirements-summary">Critical Requirements Summary</a></li>
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<li><a class="reference internal" href="#esd-design-rules">ESD Design Rules</a></li>
<li><a class="reference internal" href="#appendix-c-miscellaneous-rules">APPENDIX C: Miscellaneous Rules</a></li>
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