| #!/usr/bin/env python3 |
| # Copyright 2020 The Skywater PDK Authors |
| # |
| # Licensed under the Apache License, Version 2.0 (the "License"); |
| # you may not use this file except in compliance with the License. |
| # You may obtain a copy of the License at |
| # |
| # https://www.apache.org/licenses/LICENSE-2.0 |
| # |
| # Unless required by applicable law or agreed to in writing, software |
| # distributed under the License is distributed on an "AS IS" BASIS, |
| # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| # See the License for the specific language governing permissions and |
| # limitations under the License. |
| |
| from specify_parser.extract_timings import VerilogSpecifyExtractor |
| import argparse |
| from pathlib import Path |
| from pprint import pprint as pp |
| |
| if __name__ == '__main__': |
| parser = argparse.ArgumentParser() |
| parser.add_argument( |
| "input", |
| help="JSON file containing mappings from cell to Verilog files", |
| type=Path) |
| parser.add_argument( |
| "outputdir", |
| help="The output directory that will contain extracted timings", |
| type=Path) |
| |
| args = parser.parse_args() |
| |
| with open(args.input, 'r') as verilog: |
| veriloglines = verilog.readlines() |
| |
| # print(veriloglines) |
| |
| extractor = VerilogSpecifyExtractor(veriloglines) |
| extractor.parse() |
| for module, parsedentry in extractor.parsedspecifyblocks.items(): |
| print('-------------------') |
| print('Module: {}'.format(module)) |
| print('-------------------') |
| print('Specparams') |
| for param, value in parsedentry["specparams"].items(): |
| pp('{} = {}'.format(param, value)) |
| print('-------------------') |
| print('Constraint checks') |
| for c in parsedentry["constraintchecks"]: |
| pp(c) |
| print('-------------------') |
| print('Path delays') |
| for p in parsedentry["pathdelays"]: |
| pp(p) |
| print('-------------------') |
| print('Conditioned path delays') |
| for v in parsedentry["ifstatements"].values(): |
| for e in v: |
| pp(e) |