| #!/usr/bin/env python3 |
| # Copyright 2020 The Skywater PDK Authors |
| # |
| # Licensed under the Apache License, Version 2.0 (the "License"); |
| # you may not use this file except in compliance with the License. |
| # You may obtain a copy of the License at |
| # |
| # https://www.apache.org/licenses/LICENSE-2.0 |
| # |
| # Unless required by applicable law or agreed to in writing, software |
| # distributed under the License is distributed on an "AS IS" BASIS, |
| # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| # See the License for the specific language governing permissions and |
| # limitations under the License. |
| |
| |
| import os |
| import re |
| |
| import common |
| |
| |
| re_verilog = re.compile('\s*(?:(?:module)|(?:primitive))\s+([^\s(]+)\s*') |
| |
| |
| def debug(*args): |
| if False: |
| print(*args) |
| |
| |
| broken = [] |
| for pn in common.files(['.v']): |
| print("verilog file", pn) |
| |
| found = False |
| for l in common.read_without_cmts(pn, 'c'): |
| l = l.strip().lower() |
| |
| if 'module' not in l and 'primitive' not in l: |
| continue |
| if 'endmodule' in l or 'endprimitive' in l: |
| continue |
| |
| m = re_verilog.search(l) |
| if not m: |
| print(" Error:", l) |
| continue |
| mod = m.group(1) |
| assert mod, (l, m.groups()) |
| common.add_file_for_module(mod, pn) |
| found = True |
| |
| # Hack for empty file |
| if 'define_functional.v' in pn: |
| found = True |
| |
| if not found: |
| broken.append(pn) |
| print(" !!!! No modules found in", pn) |
| |
| |
| common.write_mod_json('verilog', common.modules, broken) |