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foss-eda-tools / openfpga-macros
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  1. 17d0faa add SOFA-Plus GDS, LEF and DEF macro files by romangauchi · 2 years, 9 months ago master
  2. 1ad3a2a add SOFA GDS, lef, spef and post-pnr verilog files by romangauchi · 3 years ago

OpenFPGA ready-to-use Macros

This repository provide the following GDS-ready eFPGA IPs using OpenFPGA prototyping tool.

Available FPGA Macros

  • SOFA_CHD: Skywater Open-source FPGA (SOFA) - Custom High-Density Design

    • Open-source 12x12 FPGA with adapted QuickLogic' soft-adder CLB architecture (documentation, github)
    • Designed with Skywater130nm PDK with HD standard cell library + Custom Transmission Gate Cells
    • Base K4 architecture from VPR with 60 vertical and horizontal channels
    • Fabricated with eFabless Open-MPW shuttle program (mpw-one/slot-039)

  • SOFA_HD: Skywater Open-source FPGA (SOFA) - High-Density Design

    • Open-source 12x12 FPGA (documentation, github)
    • Designed with Skywater130nm PDK with HD standard cell library
    • Base K4 architecture from VPR with 40 vertical and horizontal channels
    • No adders (carry-chain) or flipflop reset pins
    • Fabricated with eFabless Open-MPW shuttle program (mpw-one/slot-017)

  • SOFA_PLUS_HD: Skywater Open-source FPGA (SOFA) - Second version of SOFA with enhanced DSP features

    • Open-source 12x12 FPGA (github)
    • Designed with Skywater130nm PDK with HD standard cell library
    • Enhanced DSP features (18x18 fracturable multipliers)
    • Fabricated with eFabless Open-MPW shuttle program (mpw-two/slot-021)

  • SOFA_QLHD: Skywater Open-source FPGA (SOFA) - QuickLogic' soft-adder High-Density Design

    • Open-source 12x12 FPGA with adapted QuickLogic' soft-adder CLB architecture (documentation, github)
    • Designed with Skywater130nm PDK with HD standard cell library
    • Base K4 architecture from VPR with 60 vertical and horizontal channels
    • Fabricated with eFabless Open-MPW shuttle program (mpw-one/slot-036)