| /* |
| ############################################################################################### |
| # |
| # GLOBALFOUNDRIES Singapore Pte. Ltd. |
| # |
| # File: cmos018hv.3p3.6v.lvs.ctl |
| # Description: Mentor Calibre LVS Runset for 018MCU |
| # Document ID: EDA-CAD-018-LV131 |
| # Document Revision: 11 |
| # Author: Liew Sie Ling |
| # Date: 2018-02-27 10:47:58 |
| # |
| ############################################################################################### |
| # Copyright (c) 2018 GLOBALFOUNDRIES Singapore Pte. Ltd. |
| ############################################################################################### |
| # This document is confidential and a proprietary product of GLOBALFOUNDRIES Singapore Pte. Ltd. |
| # Any unauthorized use, reproduction or transfer of this document is strictly prohibited. |
| ############################################################################################### |
| # Disclaimer: |
| # ----------- |
| # The information contained herein is confidential and is the property of GLOBALFOUNDRIES and/or |
| # its licensors. GLOBALFOUNDRIES reserves all proprietary, design, manufacturing, reproduction, |
| # use, sales and other rights in the information herein, in its products and services, and to any |
| # article or process utilizing such information, except to the extent that rights are expressly |
| # granted to others. |
| # This document is for informational purposes only, is current only as of the date of publication |
| # and is subject to change by GLOBALFOUNDRIES at any time without notice. While precautions have |
| # been taken in the preparation of the information herein, it may contain technical inaccuracies, |
| # omissions and typographical errors. GLOBALFOUNDRIES is under no obligation to update or otherwise |
| # correct this information. |
| # All information contained herein is provided "AS IS." GLOBALFOUNDRIES makes no representations |
| # and disclaims all warranties of any kind, express or implied, including without limitation any |
| # implied warranties of non-infringement, merchantability or fitness for a particular purpose, |
| # with respect to the information contained HEREIN. |
| # Terms and conditions applicable to the purchase, quality and use of GLOBALFOUNDRIES' products |
| # and services are as set forth in your organization's signed agreement with GLOBALFOUNDRIES or |
| # in GLOBALFOUNDRIES' Standard Terms and Conditions of Sale. Unless otherwise authorized in a |
| # signed agreement with GLOBALFOUNDRIES, GLOBALFOUNDRIES' products and services are NOT intended |
| # for use in applications such as implantation, life support, or other hazardous uses where |
| # malfunction could result in death, bodily injury, or catastrophic property damage. |
| # GLOBALFOUNDRIES, the GLOBALFOUNDRIES logo and combinations thereof are trademarks of |
| # GLOBALFOUNDRIES Inc. in the United States and/or other jurisdictions. Other product or service |
| # names are for identification purposes only and may be trademarks or service marks of their |
| # respective owners. |
| # � GLOBALFOUNDRIES Inc. 2015. Unless otherwise indicated, all rights reserved. |
| # Do not copy or redistribute except as expressly permitted by GLOBALFOUNDRIES. |
| # |
| ############################################################################################### |
| */ |
| #IFDEF PEX_RUN |
| TITLE "Mentor Calibre LVS/PEX Technology File for GLOBALFOUNDRIES 0.18UM 3.3V/(5V)6V HIGH VOLTAGE PROCESS (GREEN PROCESS)" |
| #ELSE |
| TITLE "Mentor Calibre LVS Runset for GLOBALFOUNDRIES 0.18UM 3.3V/(5V)6V HIGH VOLTAGE PROCESS (GREEN PROCESS)" |
| #ENDIF // PEX_RUN |
| |
| /**********************************************************************************************************/ |
| /* +----------------------------------------------------------------------------------------------------+ */ |
| /* | SWITCHES SETUP SECTION | */ |
| /* +----------------------------------------------------------------------------------------------------+ */ |
| /**********************************************************************************************************/ |
| // |
| //########################################################################################################// |
| // Switch: Metallization Option // |
| //########################################################################################################// |
| // To define the metalization option please use the following environmental variable: |
| // |
| // $BEOL_STACK = 1PxM (x = # of metal layers, 2<=x<=6) |
| // |
| // Please refer to DR spec for available metalization options. |
| // |
| //========================================================================================================// |
| // If environmental variables are being used, do NOT edit the next lines! |
| // If NOT ... You MUST uncomment ONE metallization option. |
| //========================================================================================================// |
| //#DEFINE BEOL_1P2M // Uncomment this line to define metal2 as the top metal (Poly2,M1,M2). |
| //#DEFINE BEOL_1P3M // Uncomment this line to define metal3 as the top metal (Poly2,M1,M2,M3). |
| //#DEFINE BEOL_1P4M // Uncomment this line to define metal4 as the top metal (Poly2,M1,M2,M3,M4). |
| #DEFINE BEOL_1P5M // Uncomment this line to define metal5 as the top metal (Poly2,M1,M2,M3,M4,M5). |
| //#DEFINE BEOL_1P6M // Uncomment this line to define metal6 as the top metal (Poly2,M1,M2,M3,M4,M5,M6). |
| // |
| #IFDEF $BEOL_STACK 1P2M |
| #DEFINE BEOL_1P2M |
| #ENDIF // $BEOL_STACK 1P2M |
| #IFDEF $BEOL_STACK 1P3M |
| #DEFINE BEOL_1P3M |
| #ENDIF // $BEOL_STACK 1P3M |
| #IFDEF $BEOL_STACK 1P4M |
| #DEFINE BEOL_1P4M |
| #ENDIF // $BEOL_STACK 1P4M |
| #IFDEF $BEOL_STACK 1P5M |
| #DEFINE BEOL_1P5M |
| #ENDIF // $BEOL_STACK 1P5M |
| #IFDEF $BEOL_STACK 1P6M |
| #DEFINE BEOL_1P6M |
| #ENDIF // $BEOL_STACK 1P6M |
| |
| #IFNDEF BEOL_1P2M |
| #IFNDEF BEOL_1P3M |
| #IFNDEF BEOL_1P4M |
| #IFNDEF BEOL_1P5M |
| #IFNDEF BEOL_1P6M |
| ERROR_MESSAGE_BEOL_STACK = COPY __NO_VALID_BEOL_STACK_DEFINED__ |
| #ENDIF // BEOL_1P6M |
| #ENDIF // BEOL_1P5M |
| #ENDIF // BEOL_1P4M |
| #ENDIF // BEOL_1P3M |
| #ENDIF // BEOL_1P2M |
| // |
| //########################################################################################################// |
| // Switch: Thick Top Metal Option // |
| //########################################################################################################// |
| // To define other value as thick top metal thickness please use the following environmental variable: |
| // |
| // $TOPMETAL = 9kA |
| // |
| // e.g. |
| // setenv TOPMETAL 9kA # [ 6kA | 9kA | 11kA | 30kA ] |
| // |
| // Please refer to DR spec for available topmetal thickness options. |
| // |
| //========================================================================================================// |
| // If environmental variables are being used, do NOT edit the next lines! // |
| //========================================================================================================// |
| // #DEFINE TOPMETAL_6kA // Uncomment this line to define 6kA as thick top metal thickness. |
| #DEFINE TOPMETAL_9kA // Uncomment this line to define 9kA as thick top metal thickness. |
| // #DEFINE TOPMETAL_11kA // Uncomment this line to define 11kA as thick top metal thickness. |
| // #DEFINE TOPMETAL_30kA // Uncomment this line to define 30kA as thick top metal thickness. |
| // |
| #IFDEF $TOPMETAL 6kA |
| #DEFINE TOPMETAL_6kA |
| #ENDIF // $TOPMETAL 6kA |
| #IFDEF $TOPMETAL 9kA |
| #DEFINE TOPMETAL_9kA |
| #ENDIF // $TOPMETAL 9kA |
| #IFDEF $TOPMETAL 11kA |
| #DEFINE TOPMETAL_11kA |
| #ENDIF // $TOPMETAL 11kA |
| #IFDEF $TOPMETAL 30kA |
| #DEFINE TOPMETAL_30kA |
| #ENDIF // $TOPMETAL 30kA |
| // |
| ///########################################################################################################// |
| // Switch: Ppoly high resistor Option // |
| //########################################################################################################// |
| // By default,LVS ues 1K high-Rs p+ poly resistor |
| // To define 2K and 3K p+ poly resistor,please use the following environmental variable: |
| // |
| // $POLY_HIGH_RESISTOR = [1K || 2K || 3K] |
| // |
| // e.g. |
| // setenv POLY_HIGH_RESISTOR 1K # [1K || 2K || 3K] |
| // |
| // 1K - To define high p+ poly resistor sheet resistance to be 1K |
| // 2K - To define high p+ poly resistor sheet resistance to be 2K |
| // 3K - To define high p+ poly resistor sheet resistance to be 3K |
| // |
| //========================================================================================================// |
| // If environmental variables are being used, do NOT edit the next lines! |
| //========================================================================================================// |
| // #DEFINE POLY_HIGH_RESISTOR_2K // Uncomment this line to define 2K high Rs poly resistor |
| // #DEFINE POLY_HIGH_RESISTOR_3K // Uncomment this line to define 3K high Rs poly resistor |
| // |
| #IFDEF $POLY_HIGH_RESISTOR 2K |
| #DEFINE POLY_HIGH_RESISTOR_2K |
| #ENDIF // $POLY_HIGH_RESISTOR 2K |
| #IFDEF $POLY_HIGH_RESISTOR 3K |
| #DEFINE POLY_HIGH_RESISTOR_3K |
| #ENDIF // $POLY_HIGH_RESISTOR 3K |
| // |
| //########################################################################################################// |
| // Switch: MIM Capacitor Option // |
| //########################################################################################################// |
| // To extract 1.0fF/um*um or 1.5fF/um*um MIM capacitor please use the following environmental variable: |
| // |
| // $EXTRACT_MIM_CAP = [ 2p0fF_OPT_A | 1p5fF_OPT_A | 1p0fF_OPT_A | 2p0fF_OPT_B | 1p5fF_OPT_B | 1p0fF_OPT_B ] |
| // |
| // Note: Currently GLOBALFOUNDRIES offers 1.5fF/um*um (Vc <= 6V) , 1.0fF/um*um (Vc <= 20V) and 2.0fF/um*um (Vc <= 6V) |
| // MIM capacitor in nominal process, however, the three devices can NOT co-exist. |
| // Please choose one of the three capacitors for LVS. |
| // |
| //========================================================================================================// |
| // If environmental variables are being used, do NOT edit the next lines! |
| //========================================================================================================// |
| //#DEFINE EXTRACT_MIM_CAP_2p0fF_OPT_A // Uncomment this line to extract 2.0fF/um*um (Vc <= 6V) MIM capacitor. |
| //#DEFINE EXTRACT_MIM_CAP_1p5fF_OPT_A // Uncomment this line to extract 1.5fF/um*um (Vc <= 6V) MIM capacitor. |
| //#DEFINE EXTRACT_MIM_CAP_1p0fF_OPT_A // Uncomment this line to extract 1.0fF/um*um (Vc <= 20V) MIM capacitor. |
| #DEFINE EXTRACT_MIM_CAP_2p0fF_OPT_B // Uncomment this line to extract 2.0fF/um*um (Vc <= 6V) MIM capacitor. |
| //#DEFINE EXTRACT_MIM_CAP_1p5fF_OPT_B // Uncomment this line to extract 1.5fF/um*um (Vc <= 6V) MIM capacitor. |
| //#DEFINE EXTRACT_MIM_CAP_1p0fF_OPT_B // Uncomment this line to extract 1.0fF/um*um (Vc <= 20V) MIM capacitor. |
| // |
| #IFDEF $EXTRACT_MIM_CAP 1p0fF_OPT_A |
| #DEFINE EXTRACT_MIM_CAP_1p0fF_OPT_A |
| #ENDIF // $EXTRACT_MIM_CAP 1p0fF_OPT_A |
| #IFDEF $EXTRACT_MIM_CAP 1p5fF_OPT_A |
| #DEFINE EXTRACT_MIM_CAP_1p5fF_OPT_A |
| #ENDIF // $EXTRACT_MIM_CAP 1p5fF_OPT_A |
| #IFDEF $EXTRACT_MIM_CAP 2p0fF_OPT_A |
| #DEFINE EXTRACT_MIM_CAP_2p0fF_OPT_A |
| #ENDIF // $EXTRACT_MIM_CAP 2p0fF_OPT_A |
| |
| #IFDEF $EXTRACT_MIM_CAP 1p0fF_OPT_B |
| #DEFINE EXTRACT_MIM_CAP_1p0fF_OPT_B |
| #ENDIF // $EXTRACT_MIM_CAP 1p0fF_OPT_B |
| #IFDEF $EXTRACT_MIM_CAP 1p5fF_OPT_B |
| #DEFINE EXTRACT_MIM_CAP_1p5fF_OPT_B |
| #ENDIF // $EXTRACT_MIM_CAP 1p5fF_OPT_B |
| #IFDEF $EXTRACT_MIM_CAP 2p0fF_OPT_B |
| #DEFINE EXTRACT_MIM_CAP_2p0fF_OPT_B |
| #ENDIF // $EXTRACT_MIM_CAP 2p0fF_OPT_B |
| |
| // If none of these EXTRACT_MIM_CAP_**_OPT_A were selected |
| // connectivity for MIM_OPTION_B will be followed |
| #IFDEF EXTRACT_MIM_CAP_1p0fF_OPT_A |
| #DEFINE MIM_OPTION_A |
| #ENDIF |
| #IFDEF EXTRACT_MIM_CAP_1p5fF_OPT_A |
| #DEFINE MIM_OPTION_A |
| #ENDIF |
| #IFDEF EXTRACT_MIM_CAP_2p0fF_OPT_A |
| #DEFINE MIM_OPTION_A |
| #ENDIF |
| // |
| //########################################################################################################// |
| // Switch: ERC Option // |
| //########################################################################################################// |
| // By default, LVS does not run any ERC checks. |
| // To run ERC checks please use the following environmental variable: |
| // |
| // $LVS_EXECUTE_ERC = YES |
| // |
| //========================================================================================================// |
| // If environmental variables are being used, do NOT edit the next lines! |
| //========================================================================================================// |
| //#DEFINE ERC_RUN // Uncomment this line to run ERC checks in LVS. |
| // |
| #IFDEF $ERC_RUN YES |
| #DEFINE ERC_RUN |
| #ENDIF // $ERC_RUN YES |
| // |
| //========================================================================================================// |
| //########################################################################################################// |
| // Switch: Connect thru diffusion check Option // |
| //########################################################################################################// |
| // By default, CONNECT_THRU_DIFF_CHECK = NO This means that any ptap ring, ntap ring, nsd ring, and psd ring |
| // that sits in the same diffusion will pass CONNECT_THRU_DIFF_CHECK even if there's a metal slit in the ring. |
| // |
| // $CONNECT_THRU_DIFF_CHECK = [ YES | NO ] |
| // |
| //#DEFINE CONNECT_THRU_DIFF_CHECK // uncomment this line to check all diffusion layers that used as connections. |
| // |
| #IFDEF $CONNECT_THRU_DIFF_CHECK YES |
| #DEFINE CONNECT_THRU_DIFF_CHECK |
| #ENDIF // $CONNECT_THRU_DIFF_CHECK YES |
| // |
| //########################################################################################################// |
| // Switch: MOSFET Number-of-Finger(NF) Extraction Option // |
| //########################################################################################################// |
| // By default, LVS extract multifinger MOSFET as one device and its NF is extracted base on the connected |
| // gate numbers over the same diffusion region. |
| // To extract multifinger MOSFET as separate individual devices, please use the following environmental variable: |
| // |
| // $MOS_NF_BY = SPLIT |
| // |
| // e.g. |
| // setenv MOS_NF_BY COUNT # [ COUNT || SPLIT ] |
| // |
| // e.g. |
| // By default (MOS_NF_BY_SPLIT), 3-finger MOSFET is extracted as 3 MOSFET with NF=1, |
| // while with MOS_NF_BY_COUNT defined, 3-finger MOSFET is extracted as 1 MOSFETs with NF=3 for each MOSFET. |
| //========================================================================================================// |
| // If environmental variables are being used, do NOT edit the next lines! // |
| //========================================================================================================// |
| // #DEFINE MOS_NF_BY_COUNT // Uncomment this line to extract MOSFET NF by total gate count. |
| // |
| #IFDEF $MOS_NF_BY COUNT |
| #DEFINE MOS_NF_BY_COUNT |
| #ENDIF // $MOS_NF_BY COUNT |
| // |
| #IFDEF $MOS_NF_BY COUNT |
| #IFDEF MOS_NF_BY_SPLIT |
| ERROR_MESSAGE_MOS_NF_BY = COPY __MORE_THAN_ONE_MOS_NF_BY_DEFINED_COUNT_&_SPLIT__ |
| #ENDIF // MOS_NF_BY_SPLIT |
| #ENDIF // $MOS_NF_BY COUNT |
| // |
| //########################################################################################################// |
| // Switch: PEX Option // |
| //########################################################################################################// |
| // By default, LVS does not run PEX. |
| // To run PEX please use the following environmental variable: |
| // |
| // $PEX_RUN = YES |
| // |
| // e.g. |
| // setenv PEX_RUN NO # [ NO || YES ] |
| // |
| //========================================================================================================// |
| // If environmental variables are being used, do NOT edit the next lines! // |
| //========================================================================================================// |
| // #DEFINE PEX_RUN // Uncomment this line to run PEX. |
| // |
| #IFDEF $PEX_RUN YES |
| #DEFINE PEX_RUN |
| #ENDIF // $PEX_RUN YES |
| // |
| /**********************************************************************************************************/ |
| /* +----------------------------------------------------------------------------------------------------+ */ |
| /* | INCLUDE SECTION | */ |
| /* +----------------------------------------------------------------------------------------------------+ */ |
| /**********************************************************************************************************/ |
| |
| INCLUDE $TECHDIR/LVS/Calibre/EDA-CAD-018-LV131/Rev11/INCLUDE/cmos018hv.3p3.6v.layers.cal |
| INCLUDE $TECHDIR/LVS/Calibre/EDA-CAD-018-LV131/Rev11/INCLUDE/cmos018hv.3p3.6v.extract.cal |
| INCLUDE $TECHDIR/LVS/Calibre/EDA-CAD-018-LV131/Rev11/INCLUDE/cmos018hv.3p3.6v.compare.cal |
| INCLUDE $TECHDIR/LVS/Calibre/EDA-CAD-018-LV131/Rev11/INCLUDE/gf180mcu_fd_sc_mcu7t5v0.bbox |
| |
| #IFDEF ERC_RUN |
| INCLUDE $TECHDIR/LVS/Calibre/EDA-CAD-018-LV131/Rev11/INCLUDE/cmos018hv.3p3.6v.erc.cal |
| #ENDIF |
| |
| #IFDEF PEX_RUN |
| //INCLUDE __PEX_RULE_PATH__/__PEX_FILE_C__ |
| //INCLUDE __PEX_RULE_PATH__/__PEX_FILE_R__ |
| #ENDIF // PEX_RUN |
| |
| #IFDEF $INCLUDE_FILE |
| INCLUDE $INCLUDE_FILE |
| #ELSE |
| //INCLUDE $TECHDIR/LVS/Calibre/EDA-CAD-018-LV131/Rev11/sample_design_inc.cal |
| #ENDIF |
| |
| |
| /**********************************************************************************************************/ |
| /* +----------------------------------------------------------------------------------------------------+ */ |
| /* | LVS GLOBAL OPTION DEFINITION SECTION | */ |
| /* +----------------------------------------------------------------------------------------------------+ */ |
| /**********************************************************************************************************/ |
| LVS SPICE REPLICATE DEVICES NO |
| LVS SPICE STRICT WL NO |
| |
| VARIABLE JOB_NAME ENVIRONMENT |
| |
| LAYOUT PATH $LAYOUT_PATH |
| LAYOUT PRIMARY JOB_NAME |
| LAYOUT SYSTEM GDSII |
| |
| SOURCE PATH $SOURCE_PATH |
| SOURCE PRIMARY JOB_NAME |
| SOURCE SYSTEM SPICE |
| LAYOUT CASE YES |
| LAYOUT PRESERVE NET CASE YES |
| SOURCE CASE YES |
| |
| // box |
| LVS REPORT OPTION BX |
| // detailed error analysis |
| LVS REPORT OPTION FX |
| // omit correctly matched pins |
| LVS REPORT OPTION NP |
| // passthrough nets |
| LVS REPORT OPTION SP |
| |
| LVS REPORT $LVS_REPORT_PATH |
| |
