blob: b9dbdb145ada4ae7652e29594801d0783ef8e67b [file] [log] [blame]
mohanad0mohameddbbdf2a2022-07-28 10:50:59 +02001{
2 "description": "row end closure cell",
3 "file_prefix": "gf180mcu_fd_sc_mcu9t5v0__endcap",
4 "library": "gf180mcu_fd_sc_mcu9t5v0",
5 "name": "endcap",
6 "parameters": [],
7 "ports": [
8 [
9 "power",
10 "VDD",
11 "input",
12 "supply1"
13 ],
14 [
15 "power",
16 "VSS",
17 "input",
18 "supply0"
19 ]
20 ],
21 "type": "cell",
22 "verilog_name": "gf180mcu_fd_sc_mcu9t5v0__endcap"
23}