Merge pull request #12 from mabrains/fix_schematics FIx schematics images

commit: f9d9bc0e90fed0e4ff70f1e0d5898db48228219b [log] [tgz]
author: Tim 'mithro' Ansell <tansell@google.com> Fri Aug 12 12:12:29 2022 -0700
committer: GitHub <noreply@github.com> Fri Aug 12 12:12:29 2022 -0700
tree: f907c98eb0622bfec9b2843ad9c6434deae483bf
parent: 13d59fb08242f7073ce88a9aadfb4da2f88b9e87 [diff]
parent: 4d71c1fef60c7d751e70e0141c79611252828311 [diff]
diff --git a/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf.schematic.svg b/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf.schematic.svg
new file mode 100644
index 0000000..036caf5
--- /dev/null
+++ b/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf.schematic.svg

@@ -0,0 +1,23 @@
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diff --git a/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_1.rst b/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_1.rst
index 68224e8..714f168 100644
--- a/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_1.rst
+++ b/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__addf_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__addf_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__addf.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__addf_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__addf_1 layout**

diff --git a/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_1.schematic.png b/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_1.schematic.png
deleted file mode 100644
index d27f5c7..0000000
--- a/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_2.rst b/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_2.rst
index 23d99bf..5041571 100644
--- a/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_2.rst
+++ b/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__addf_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__addf_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__addf.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__addf_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__addf_2 layout**

diff --git a/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_2.schematic.png b/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_2.schematic.png
deleted file mode 100644
index d27f5c7..0000000
--- a/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_4.rst b/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_4.rst
index c26cae3..09cd38b 100644
--- a/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_4.rst
+++ b/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__addf_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__addf_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__addf.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__addf_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__addf_4 layout**

diff --git a/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_4.schematic.png b/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_4.schematic.png
deleted file mode 100644
index d27f5c7..0000000
--- a/cells/addf/gf180mcu_fd_sc_mcu9t5v0__addf_4.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh.schematic.svg b/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh.schematic.svg
new file mode 100644
index 0000000..cdfc11e
--- /dev/null
+++ b/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="315" height="188.5"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="and" transform="translate(208,19.5)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__addh.v:22$1"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__addh.v:22$1"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="and" transform="translate(143,60.5)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__addh.v:30$2"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__addh.v:30$2"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="and" transform="translate(143,146.5)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__addh.v:38$3"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__addh.v:38$3"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="not" transform="translate(78,50.5)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__addh.v:0$5"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__addh.v:0$5"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__addh.v:0$5"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(78,91.5)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__addh.v:0$6"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 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s:type="inputExt" transform="translate(12,91.5)" s:width="30" s:height="20" id="cell_A"><text x="15" y="-4" class="nodelabel cell_A" s:attribute="ref">A</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,156.5)" s:width="30" s:height="20" id="cell_B"><text x="15" y="-4" class="nodelabel cell_B" s:attribute="ref">B</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_B"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(273,141.5)" s:width="30" s:height="20" id="cell_S"><text x="15" y="-4" class="nodelabel cell_S" s:attribute="ref">S</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_S"/><g s:x="0" s:y="10" s:pid="A"/></g><line x1="42" x2="52" y1="101.5" y2="101.5" class="net_3 width_1" style="stroke-width: 1"/><line x1="52" x2="52" y1="101.5" y2="28.5" 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\ No newline at end of file

diff --git a/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_1.rst b/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_1.rst
index 68e78c1..39e0475 100644
--- a/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_1.rst
+++ b/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__addh_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__addh_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__addh.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__addh_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__addh_1 layout**

diff --git a/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_1.schematic.png b/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_1.schematic.png
deleted file mode 100644
index e988407..0000000
--- a/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_2.rst b/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_2.rst
index 4fc81e4..34ffb11 100644
--- a/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_2.rst
+++ b/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__addh_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__addh_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__addh.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__addh_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__addh_2 layout**

diff --git a/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_2.schematic.png b/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_2.schematic.png
deleted file mode 100644
index e988407..0000000
--- a/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_4.rst b/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_4.rst
index a38e976..0662cef 100644
--- a/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_4.rst
+++ b/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__addh_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__addh_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__addh.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__addh_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__addh_4 layout**

diff --git a/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_4.schematic.png b/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_4.schematic.png
deleted file mode 100644
index e988407..0000000
--- a/cells/addh/gf180mcu_fd_sc_mcu9t5v0__addh_4.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2.schematic.svg b/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2.schematic.svg
new file mode 100644
index 0000000..7d8e8f9
--- /dev/null
+++ b/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="184" height="119"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="and" transform="translate(77,27)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__and2.v:22$1"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__and2.v:22$1"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_A1"><text x="15" y="-4" class="nodelabel cell_A1" s:attribute="ref">A1</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A1"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,87)" s:width="30" s:height="20" id="cell_A2"><text x="15" y="-4" class="nodelabel cell_A2" s:attribute="ref">A2</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A2"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(142,29.5)" s:width="30" s:height="20" id="cell_Z"><text x="15" y="-4" class="nodelabel cell_Z" s:attribute="ref">Z</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_Z"/><g s:x="0" s:y="10" s:pid="A"/></g><line x1="42" x2="77" y1="32" y2="32" class="net_2 width_1" style="stroke-width: 1"/><line x1="42" x2="52" y1="97" y2="97" class="net_3 width_1" style="stroke-width: 1"/><line x1="52" x2="52" y1="97" y2="47" class="net_3 width_1" style="stroke-width: 1"/><line x1="52" x2="77" y1="47" y2="47" class="net_3 width_1" style="stroke-width: 1"/><line x1="107" x2="142" y1="39.5" y2="39.5" class="net_4 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file

diff --git a/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_1.rst b/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_1.rst
index 82e84cf..dab2c99 100644
--- a/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_1.rst
+++ b/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__and2_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__and2_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__and2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__and2_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__and2_1 layout**

diff --git a/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_1.schematic.png b/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_1.schematic.png
deleted file mode 100644
index ac70987..0000000
--- a/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_2.rst b/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_2.rst
index b731f04..fd6a76a 100644
--- a/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_2.rst
+++ b/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__and2_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__and2_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__and2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__and2_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__and2_2 layout**

diff --git a/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_2.schematic.png b/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_2.schematic.png
deleted file mode 100644
index ac70987..0000000
--- a/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_4.rst b/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_4.rst
index efd18ed..62dcf47 100644
--- a/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_4.rst
+++ b/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__and2_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__and2_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__and2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__and2_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__and2_4 layout**

diff --git a/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_4.schematic.png b/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_4.schematic.png
deleted file mode 100644
index ac70987..0000000
--- a/cells/and2/gf180mcu_fd_sc_mcu9t5v0__and2_4.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3.schematic.svg b/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3.schematic.svg
new file mode 100644
index 0000000..41a248e
--- /dev/null
+++ b/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="249" height="129"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="and" transform="translate(77,27)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__and3.v:22$1"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__and3.v:22$1"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="and" transform="translate(142,34.5)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__and3.v:22$2"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__and3.v:22$2"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_A1"><text x="15" y="-4" class="nodelabel cell_A1" s:attribute="ref">A1</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A1"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(77,97)" s:width="30" s:height="20" id="cell_A3"><text x="15" y="-4" class="nodelabel cell_A3" s:attribute="ref">A3</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A3"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,87)" s:width="30" s:height="20" id="cell_A2"><text x="15" y="-4" class="nodelabel cell_A2" s:attribute="ref">A2</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A2"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(207,37)" s:width="30" s:height="20" id="cell_Z"><text x="15" y="-4" class="nodelabel cell_Z" s:attribute="ref">Z</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_Z"/><g s:x="0" s:y="10" s:pid="A"/></g><line x1="42" x2="77" y1="32" y2="32" class="net_2 width_1" style="stroke-width: 1"/><line x1="42" x2="52" y1="97" y2="97" class="net_4 width_1" style="stroke-width: 1"/><line x1="52" x2="52" y1="97" y2="47" class="net_4 width_1" style="stroke-width: 1"/><line x1="52" x2="77" y1="47" y2="47" class="net_4 width_1" style="stroke-width: 1"/><line x1="107" x2="142" y1="39.5" y2="39.5" class="net_6 width_1" style="stroke-width: 1"/><line x1="107" x2="117" y1="107" y2="107" class="net_3 width_1" style="stroke-width: 1"/><line x1="117" x2="117" y1="107" y2="54.5" class="net_3 width_1" style="stroke-width: 1"/><line x1="117" x2="142" y1="54.5" y2="54.5" class="net_3 width_1" style="stroke-width: 1"/><line x1="172" x2="207" y1="47" y2="47" class="net_5 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file

diff --git a/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_1.rst b/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_1.rst
index 71a2062..c242da2 100644
--- a/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_1.rst
+++ b/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__and3_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__and3_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__and3.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__and3_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__and3_1 layout**

diff --git a/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_1.schematic.png b/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_1.schematic.png
deleted file mode 100644
index 53b37c6..0000000
--- a/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_2.rst b/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_2.rst
index f47fd56..7ac1ffb 100644
--- a/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_2.rst
+++ b/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__and3_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__and3_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__and3.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__and3_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__and3_2 layout**

diff --git a/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_2.schematic.png b/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_2.schematic.png
deleted file mode 100644
index 53b37c6..0000000
--- a/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_4.rst b/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_4.rst
index 2d840b9..c36721e 100644
--- a/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_4.rst
+++ b/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__and3_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__and3_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__and3.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__and3_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__and3_4 layout**

diff --git a/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_4.schematic.png b/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_4.schematic.png
deleted file mode 100644
index 53b37c6..0000000
--- a/cells/and3/gf180mcu_fd_sc_mcu9t5v0__and3_4.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4.schematic.svg b/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4.schematic.svg
new file mode 100644
index 0000000..4ea7f58
--- /dev/null
+++ b/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="314" height="136.5"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="and" transform="translate(77,27)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__and4.v:22$1"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__and4.v:22$1"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="and" transform="translate(142,34.5)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__and4.v:22$2"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__and4.v:22$2"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="and" transform="translate(207,42)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__and4.v:22$3"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__and4.v:22$3"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_A1"><text x="15" y="-4" class="nodelabel cell_A1" s:attribute="ref">A1</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A1"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,87)" s:width="30" s:height="20" id="cell_A2"><text x="15" y="-4" class="nodelabel cell_A2" s:attribute="ref">A2</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A2"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(77,97)" s:width="30" s:height="20" id="cell_A3"><text x="15" y="-4" class="nodelabel cell_A3" s:attribute="ref">A3</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A3"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(142,104.5)" s:width="30" s:height="20" id="cell_A4"><text x="15" y="-4" class="nodelabel cell_A4" s:attribute="ref">A4</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A4"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(272,44.5)" s:width="30" s:height="20" id="cell_Z"><text x="15" y="-4" class="nodelabel cell_Z" s:attribute="ref">Z</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_Z"/><g s:x="0" s:y="10" s:pid="A"/></g><line x1="42" x2="77" y1="32" y2="32" class="net_2 width_1" style="stroke-width: 1"/><line x1="42" x2="52" y1="97" y2="97" class="net_3 width_1" style="stroke-width: 1"/><line x1="52" x2="52" y1="97" y2="47" class="net_3 width_1" style="stroke-width: 1"/><line x1="52" x2="77" y1="47" y2="47" class="net_3 width_1" style="stroke-width: 1"/><line x1="107" x2="142" y1="39.5" y2="39.5" class="net_7 width_1" style="stroke-width: 1"/><line x1="107" x2="117" y1="107" y2="107" class="net_4 width_1" style="stroke-width: 1"/><line x1="117" x2="117" y1="107" y2="54.5" class="net_4 width_1" style="stroke-width: 1"/><line x1="117" x2="142" y1="54.5" y2="54.5" class="net_4 width_1" style="stroke-width: 1"/><line x1="172" x2="207" y1="47" y2="47" class="net_8 width_1" style="stroke-width: 1"/><line x1="172" x2="182" y1="114.5" y2="114.5" class="net_5 width_1" style="stroke-width: 1"/><line x1="182" x2="182" y1="114.5" y2="62" class="net_5 width_1" style="stroke-width: 1"/><line x1="182" x2="207" y1="62" y2="62" class="net_5 width_1" style="stroke-width: 1"/><line x1="237" x2="272" y1="54.5" y2="54.5" class="net_6 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file

diff --git a/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_1.rst b/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_1.rst
index e81e574..00d62ca 100644
--- a/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_1.rst
+++ b/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__and4_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__and4_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__and4.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__and4_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__and4_1 layout**

diff --git a/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_1.schematic.png b/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_1.schematic.png
deleted file mode 100644
index d29a8b1..0000000
--- a/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_2.rst b/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_2.rst
index 4138a36..c6170fb 100644
--- a/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_2.rst
+++ b/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__and4_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__and4_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__and4.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__and4_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__and4_2 layout**

diff --git a/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_2.schematic.png b/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_2.schematic.png
deleted file mode 100644
index d29a8b1..0000000
--- a/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_4.rst b/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_4.rst
index 37326a3..de66d70 100644
--- a/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_4.rst
+++ b/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__and4_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__and4_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__and4.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__and4_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__and4_4 layout**

diff --git a/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_4.schematic.png b/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_4.schematic.png
deleted file mode 100644
index d29a8b1..0000000
--- a/cells/and4/gf180mcu_fd_sc_mcu9t5v0__and4_4.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/antenna/gf180mcu_fd_sc_mcu9t5v0__antenna.rst b/cells/antenna/gf180mcu_fd_sc_mcu9t5v0__antenna.rst
index 633fe4b..164db0f 100644
--- a/cells/antenna/gf180mcu_fd_sc_mcu9t5v0__antenna.rst
+++ b/cells/antenna/gf180mcu_fd_sc_mcu9t5v0__antenna.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__antenna schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__antenna.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__antenna.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__antenna schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__antenna layout**

diff --git a/cells/antenna/gf180mcu_fd_sc_mcu9t5v0__antenna.schematic.png b/cells/antenna/gf180mcu_fd_sc_mcu9t5v0__antenna.schematic.png
deleted file mode 100644
index 9a5f56c..0000000
--- a/cells/antenna/gf180mcu_fd_sc_mcu9t5v0__antenna.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/antenna/gf180mcu_fd_sc_mcu9t5v0__antenna.schematic.svg b/cells/antenna/gf180mcu_fd_sc_mcu9t5v0__antenna.schematic.svg
new file mode 100644
index 0000000..4bb6a24
--- /dev/null
+++ b/cells/antenna/gf180mcu_fd_sc_mcu9t5v0__antenna.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="54" height="54"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_I"><text x="15" y="-4" class="nodelabel cell_I" s:attribute="ref">I</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_I"/><g s:x="30" s:y="10" s:pid="Y"/></g></svg>
\ No newline at end of file

diff --git a/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21.schematic.svg b/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21.schematic.svg
new file mode 100644
index 0000000..f8d2836
--- /dev/null
+++ b/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="315" height="194"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="and" transform="translate(143,27)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__aoi21.v:32$1"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__aoi21.v:32$1"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="and" transform="translate(143,87)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__aoi21.v:40$2"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__aoi21.v:40$2"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="not" transform="translate(78,22)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__aoi21.v:0$4"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__aoi21.v:0$4"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__aoi21.v:0$4"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(78,97)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__aoi21.v:0$5"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__aoi21.v:0$5"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__aoi21.v:0$5"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(78,162)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__aoi21.v:0$6"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__aoi21.v:0$6"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__aoi21.v:0$6"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="or" transform="translate(208,34.5)" s:width="30" s:height="25" id="cell_$or$gf180mcu_fd_sc_mcu9t5v0__aoi21.v:42$3"><s:alias val="$or"/><s:alias val="$logic_or"/><s:alias val="$_OR_"/><s:alias val="$reduce_or"/><s:alias val="$reduce_bool"/><path d="M0,0 A30 25 0 0 1 0,25 A30 25 0 0 0 30,12.5 A30 25 0 0 0 0,0" class="cell_$or$gf180mcu_fd_sc_mcu9t5v0__aoi21.v:42$3"/><g s:x="2" s:y="5" s:pid="A"/><g s:x="2" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,162)" s:width="30" s:height="20" id="cell_A2"><text x="15" y="-4" class="nodelabel cell_A2" s:attribute="ref">A2</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A2"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(273,37)" s:width="30" s:height="20" id="cell_ZN"><text x="15" y="-4" class="nodelabel cell_ZN" s:attribute="ref">ZN</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_ZN"/><g s:x="0" s:y="10" s:pid="A"/></g><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_A1"><text x="15" y="-4" class="nodelabel cell_A1" s:attribute="ref">A1</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A1"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,97)" s:width="30" s:height="20" id="cell_B"><text x="15" y="-4" class="nodelabel cell_B" s:attribute="ref">B</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_B"/><g s:x="30" s:y="10" s:pid="Y"/></g><line x1="105" x2="143" y1="32" y2="32" class="net_6 width_1" style="stroke-width: 1"/><line x1="105" x2="118" y1="107" y2="107" class="net_7 width_1" style="stroke-width: 1"/><line x1="118" x2="118" y1="107" y2="47" class="net_7 width_1" style="stroke-width: 1"/><circle cx="118" cy="107" r="2" style="fill:#000" class="net_7 width_1"/><line x1="118" x2="143" y1="47" y2="47" class="net_7 width_1" style="stroke-width: 1"/><line x1="105" x2="143" y1="107" y2="107" class="net_7 width_1" style="stroke-width: 1"/><line x1="105" x2="128" y1="172" y2="172" class="net_9 width_1" style="stroke-width: 1"/><line x1="128" x2="128" y1="172" y2="92" class="net_9 width_1" style="stroke-width: 1"/><line x1="128" x2="143" y1="92" y2="92" class="net_9 width_1" style="stroke-width: 1"/><line x1="42" x2="77" y1="32" y2="32" class="net_4 width_1" style="stroke-width: 1"/><line x1="42" x2="77" y1="107" y2="107" class="net_5 width_1" style="stroke-width: 1"/><line x1="42" x2="77" y1="172" y2="172" class="net_2 width_1" style="stroke-width: 1"/><line x1="173" x2="210" y1="39.5" y2="39.5" class="net_8 width_1" style="stroke-width: 1"/><line x1="173" x2="183" y1="99.5" y2="99.5" class="net_10 width_1" style="stroke-width: 1"/><line x1="183" x2="183" y1="99.5" y2="54.5" class="net_10 width_1" style="stroke-width: 1"/><line x1="183" x2="210" y1="54.5" y2="54.5" class="net_10 width_1" style="stroke-width: 1"/><line x1="238" x2="273" y1="47" y2="47" class="net_3 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file

diff --git a/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_1.rst b/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_1.rst
index 954ae27..10727db 100644
--- a/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_1.rst
+++ b/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi21_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi21_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi21.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__aoi21_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi21_1 layout**

diff --git a/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_1.schematic.png b/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_1.schematic.png
deleted file mode 100644
index da351df..0000000
--- a/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_2.rst b/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_2.rst
index 0f7a61f..5f63d1b 100644
--- a/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_2.rst
+++ b/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi21_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi21_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi21.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__aoi21_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi21_2 layout**

diff --git a/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_2.schematic.png b/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_2.schematic.png
deleted file mode 100644
index da351df..0000000
--- a/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_4.rst b/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_4.rst
index 551a84c..86f7738 100644
--- a/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_4.rst
+++ b/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi21_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi21_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi21.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__aoi21_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi21_4 layout**

diff --git a/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_4.schematic.png b/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_4.schematic.png
deleted file mode 100644
index da351df..0000000
--- a/cells/aoi21/gf180mcu_fd_sc_mcu9t5v0__aoi21_4.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211.schematic.svg b/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211.schematic.svg
new file mode 100644
index 0000000..8984fd4
--- /dev/null
+++ b/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="381" height="249"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="and" transform="translate(143.66666666666666,77)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__aoi211.v:36$1"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__aoi211.v:36$1"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="and" transform="translate(209,84.5)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__aoi211.v:36$2"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__aoi211.v:36$2"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="and" transform="translate(143.66666666666666,157)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__aoi211.v:44$3"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__aoi211.v:44$3"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="and" transform="translate(209,207)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__aoi211.v:44$4"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__aoi211.v:44$4"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="not" transform="translate(78,22)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__aoi211.v:0$6"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path 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diff --git a/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_1.rst b/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_1.rst
index 3825568..552a974 100644
--- a/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_1.rst
+++ b/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi211_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi211_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi211.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__aoi211_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi211_1 layout**

diff --git a/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_1.schematic.png b/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_1.schematic.png
deleted file mode 100644
index e14de5c..0000000
--- a/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_2.rst b/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_2.rst
index d79ceb9..7be518f 100644
--- a/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_2.rst
+++ b/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi211_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi211_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi211.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__aoi211_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi211_2 layout**

diff --git a/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_2.schematic.png b/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_2.schematic.png
deleted file mode 100644
index e14de5c..0000000
--- a/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_4.rst b/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_4.rst
index 4435a5d..306b1bb 100644
--- a/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_4.rst
+++ b/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi211_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi211_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi211.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__aoi211_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi211_4 layout**

diff --git a/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_4.schematic.png b/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_4.schematic.png
deleted file mode 100644
index e14de5c..0000000
--- a/cells/aoi211/gf180mcu_fd_sc_mcu9t5v0__aoi211_4.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22.schematic.svg b/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22.schematic.svg
new file mode 100644
index 0000000..48316a5
--- /dev/null
+++ b/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22.schematic.svg

@@ -0,0 +1,23 @@
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+  stroke:#000;
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+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
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+  text-anchor: end;
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diff --git a/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_1.rst b/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_1.rst
index f25c82a..7b34048 100644
--- a/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_1.rst
+++ b/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi22_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi22_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi22.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__aoi22_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi22_1 layout**

diff --git a/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_1.schematic.png b/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_1.schematic.png
deleted file mode 100644
index 29a9b3b..0000000
--- a/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_2.rst b/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_2.rst
index 4adcecc..8f96522 100644
--- a/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_2.rst
+++ b/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi22_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi22_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi22.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__aoi22_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi22_2 layout**

diff --git a/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_2.schematic.png b/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_2.schematic.png
deleted file mode 100644
index 29a9b3b..0000000
--- a/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_4.rst b/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_4.rst
index 59e4cf6..4c47dcf 100644
--- a/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_4.rst
+++ b/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi22_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi22_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi22.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__aoi22_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi22_4 layout**

diff --git a/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_4.schematic.png b/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_4.schematic.png
deleted file mode 100644
index 29a9b3b..0000000
--- a/cells/aoi22/gf180mcu_fd_sc_mcu9t5v0__aoi22_4.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221.schematic.svg b/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221.schematic.svg
new file mode 100644
index 0000000..82fb1f5
--- /dev/null
+++ b/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221.schematic.svg

@@ -0,0 +1,23 @@
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+}
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+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
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+}
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+  text-anchor: end;
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+  fill:#000;
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diff --git a/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_1.rst b/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_1.rst
index aac9c12..f9cea4e 100644
--- a/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_1.rst
+++ b/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi221_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi221_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi221.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__aoi221_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi221_1 layout**

diff --git a/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_1.schematic.png b/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_1.schematic.png
deleted file mode 100644
index c1e6eaa..0000000
--- a/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_2.rst b/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_2.rst
index 5382c47..4997469 100644
--- a/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_2.rst
+++ b/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi221_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi221_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi221.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__aoi221_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi221_2 layout**

diff --git a/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_2.schematic.png b/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_2.schematic.png
deleted file mode 100644
index c1e6eaa..0000000
--- a/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_4.rst b/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_4.rst
index 4a7080e..e4c22d3 100644
--- a/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_4.rst
+++ b/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi221_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi221_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi221.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__aoi221_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi221_4 layout**

diff --git a/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_4.schematic.png b/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_4.schematic.png
deleted file mode 100644
index c1e6eaa..0000000
--- a/cells/aoi221/gf180mcu_fd_sc_mcu9t5v0__aoi221_4.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222.schematic.svg b/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222.schematic.svg
new file mode 100644
index 0000000..0120f83
--- /dev/null
+++ b/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="777" height="422"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
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diff --git a/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_1.rst b/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_1.rst
index 75082a3..574ee21 100644
--- a/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_1.rst
+++ b/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi222_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi222_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi222.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__aoi222_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi222_1 layout**

diff --git a/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_1.schematic.png b/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_1.schematic.png
deleted file mode 100644
index 5c3c1e1..0000000
--- a/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_2.rst b/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_2.rst
index a9a3cd2..e5b66be 100644
--- a/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_2.rst
+++ b/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi222_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi222_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi222.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__aoi222_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi222_2 layout**

diff --git a/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_2.schematic.png b/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_2.schematic.png
deleted file mode 100644
index 5c3c1e1..0000000
--- a/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_4.rst b/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_4.rst
index 77302f6..b2cbe80 100644
--- a/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_4.rst
+++ b/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi222_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi222_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__aoi222.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__aoi222_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__aoi222_4 layout**

diff --git a/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_4.schematic.png b/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_4.schematic.png
deleted file mode 100644
index 5c3c1e1..0000000
--- a/cells/aoi222/gf180mcu_fd_sc_mcu9t5v0__aoi222_4.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf.schematic.svg b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf.schematic.svg
new file mode 100644
index 0000000..72e18ad
--- /dev/null
+++ b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="119" height="54"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_I"><text x="15" y="-4" class="nodelabel cell_I" s:attribute="ref">I</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_I"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(77,22)" s:width="30" s:height="20" id="cell_Z"><text x="15" y="-4" class="nodelabel cell_Z" s:attribute="ref">Z</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_Z"/><g s:x="0" s:y="10" s:pid="A"/></g><line x1="42" x2="77" y1="32" y2="32" class="net_2 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file

diff --git a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_1.rst b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_1.rst
index 2e0fd1b..fd695a6 100644
--- a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_1.rst
+++ b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__buf_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__buf_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__buf.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__buf_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__buf_1 layout**

diff --git a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_1.schematic.png b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_1.schematic.png
deleted file mode 100644
index fb243ea..0000000
--- a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_12.rst b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_12.rst
index 2818d9c..54ee589 100644
--- a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_12.rst
+++ b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_12.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__buf_x12 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__buf_12.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__buf.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__buf_x12 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__buf_x12 layout**

diff --git a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_12.schematic.png b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_12.schematic.png
deleted file mode 100644
index fb243ea..0000000
--- a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_12.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_16.rst b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_16.rst
index 1a6fd55..102bda5 100644
--- a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_16.rst
+++ b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_16.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__buf_x16 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__buf_16.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__buf.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__buf_x16 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__buf_x16 layout**

diff --git a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_16.schematic.png b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_16.schematic.png
deleted file mode 100644
index fb243ea..0000000
--- a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_16.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_2.rst b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_2.rst
index c2ed508..4657851 100644
--- a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_2.rst
+++ b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__buf_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__buf_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__buf.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__buf_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__buf_2 layout**

diff --git a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_2.schematic.png b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_2.schematic.png
deleted file mode 100644
index fb243ea..0000000
--- a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_20.rst b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_20.rst
index b5596e6..49acc77 100644
--- a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_20.rst
+++ b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_20.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__buf_x20 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__buf_20.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__buf.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__buf_x20 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__buf_x20 layout**

diff --git a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_20.schematic.png b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_20.schematic.png
deleted file mode 100644
index fb243ea..0000000
--- a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_20.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_3.rst b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_3.rst
index 024b296..aab2365 100644
--- a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_3.rst
+++ b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_3.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__buf_3 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__buf_3.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__buf.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__buf_3 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__buf_3 layout**

diff --git a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_3.schematic.png b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_3.schematic.png
deleted file mode 100644
index fb243ea..0000000
--- a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_3.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_4.rst b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_4.rst
index af8b3ee..4b7b30a 100644
--- a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_4.rst
+++ b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__buf_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__buf_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__buf.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__buf_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__buf_4 layout**

diff --git a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_4.schematic.png b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_4.schematic.png
deleted file mode 100644
index fb243ea..0000000
--- a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_4.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_8.rst b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_8.rst
index 034996b..75edb45 100644
--- a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_8.rst
+++ b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_8.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__buf_8 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__buf_8.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__buf.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__buf_8 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__buf_8 layout**

diff --git a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_8.schematic.png b/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_8.schematic.png
deleted file mode 100644
index fb243ea..0000000
--- a/cells/buf/gf180mcu_fd_sc_mcu9t5v0__buf_8.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz.schematic.svg b/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz.schematic.svg
new file mode 100644
index 0000000..98abdd8
--- /dev/null
+++ b/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="239" height="121.5"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="and" transform="translate(77,29.5)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__bufz.v:26$1"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__bufz.v:26$1"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="mux" transform="translate(142,12)" s:width="20" s:height="40" id="cell_$ternary$gf180mcu_fd_sc_mcu9t5v0__bufz.v:0$2"><s:alias val="$pmux"/><s:alias val="$mux"/><s:alias val="$_MUX_"/><path d="M0,0 L20,10 L20,30 L0,40 Z" class="cell_$ternary$gf180mcu_fd_sc_mcu9t5v0__bufz.v:0$2"/><text x="5" y="32" class="nodelabel cell_$ternary$gf180mcu_fd_sc_mcu9t5v0__bufz.v:0$2" s:attribute="">1</text><text x="5" y="13" class="nodelabel cell_$ternary$gf180mcu_fd_sc_mcu9t5v0__bufz.v:0$2" s:attribute="">0</text><g s:x="0" s:y="10" s:pid="A"/><g s:x="0" s:y="30" s:pid="B"/><g s:x="10" s:y="35" s:pid="S"/><g s:x="20" s:y="20" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,24.5)" s:width="30" s:height="20" id="cell_EN"><text x="15" y="-4" class="nodelabel cell_EN" s:attribute="ref">EN</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_EN"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,89.5)" s:width="30" s:height="20" id="cell_I"><text x="15" y="-4" class="nodelabel cell_I" s:attribute="ref">I</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_I"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(197,22)" s:width="30" s:height="20" id="cell_Z"><text x="15" y="-4" class="nodelabel cell_Z" s:attribute="ref">Z</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_Z"/><g s:x="0" s:y="10" s:pid="A"/></g><line x1="42" x2="77" y1="34.5" y2="34.5" class="net_2 width_1" style="stroke-width: 1"/><line x1="42" x2="62" y1="34.5" y2="34.5" class="net_2 width_1" style="stroke-width: 1"/><line x1="62" x2="62" y1="34.5" y2="64.5" class="net_2 width_1" style="stroke-width: 1"/><line x1="62" x2="152" y1="64.5" y2="64.5" class="net_2 width_1" style="stroke-width: 1"/><circle cx="62" cy="34.5" r="2" style="fill:#000" class="net_2 width_1"/><line x1="152" x2="152" y1="64.5" y2="47" class="net_2 width_1" style="stroke-width: 1"/><line x1="42" x2="52" y1="99.5" y2="99.5" class="net_3 width_1" style="stroke-width: 1"/><line x1="52" x2="52" y1="99.5" y2="49.5" class="net_3 width_1" style="stroke-width: 1"/><line x1="52" x2="77" y1="49.5" y2="49.5" class="net_3 width_1" style="stroke-width: 1"/><line x1="107" x2="142" y1="42" y2="42" class="net_5 width_1" style="stroke-width: 1"/><line x1="162" x2="197" y1="32" y2="32" class="net_4 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file

diff --git a/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_1.rst b/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_1.rst
index d1db40b..10d824a 100644
--- a/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_1.rst
+++ b/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__bufz_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__bufz_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__bufz.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__bufz_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__bufz_1 layout**

diff --git a/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_12.rst b/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_12.rst
index 6fd61b1..07893e1 100644
--- a/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_12.rst
+++ b/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_12.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__bufz_x12 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__bufz_12.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__bufz.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__bufz_x12 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__bufz_x12 layout**

diff --git a/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_16.rst b/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_16.rst
index 60d442c..1a3d67e 100644
--- a/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_16.rst
+++ b/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_16.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__bufz_x16 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__bufz_16.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__bufz.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__bufz_x16 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__bufz_x16 layout**

diff --git a/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_2.rst b/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_2.rst
index ad09ef7..3678492 100644
--- a/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_2.rst
+++ b/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__bufz_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__bufz_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__bufz.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__bufz_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__bufz_2 layout**

diff --git a/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_3.rst b/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_3.rst
index 32a9278..62bc79b 100644
--- a/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_3.rst
+++ b/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_3.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__bufz_3 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__bufz_3.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__bufz.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__bufz_3 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__bufz_3 layout**

diff --git a/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_4.rst b/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_4.rst
index 501da60..1b419dc 100644
--- a/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_4.rst
+++ b/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__bufz_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__bufz_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__bufz.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__bufz_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__bufz_4 layout**

diff --git a/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_8.rst b/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_8.rst
index 137297c..af32f4b 100644
--- a/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_8.rst
+++ b/cells/bufz/gf180mcu_fd_sc_mcu9t5v0__bufz_8.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__bufz_8 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__bufz_8.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__bufz.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__bufz_8 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__bufz_8 layout**

diff --git a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf.schematic.svg b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf.schematic.svg
new file mode 100644
index 0000000..72e18ad
--- /dev/null
+++ b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="119" height="54"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_I"><text x="15" y="-4" class="nodelabel cell_I" s:attribute="ref">I</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_I"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(77,22)" s:width="30" s:height="20" id="cell_Z"><text x="15" y="-4" class="nodelabel cell_Z" s:attribute="ref">Z</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_Z"/><g s:x="0" s:y="10" s:pid="A"/></g><line x1="42" x2="77" y1="32" y2="32" class="net_2 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file

diff --git a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_1.rst b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_1.rst
index 8e5c9a4..8b1de5e 100644
--- a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_1.rst
+++ b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__clkbuf_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__clkbuf_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__clkbuf.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__clkbuf_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__clkbuf_1 layout**

diff --git a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_1.schematic.png b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_1.schematic.png
deleted file mode 100644
index fb243ea..0000000
--- a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_12.rst b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_12.rst
index 578d231..cefc2dc 100644
--- a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_12.rst
+++ b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_12.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__clkbuf_x12 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__clkbuf_12.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__clkbuf.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__clkbuf_x12 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__clkbuf_x12 layout**

diff --git a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_12.schematic.png b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_12.schematic.png
deleted file mode 100644
index fb243ea..0000000
--- a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_12.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_16.rst b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_16.rst
index f288c2b..bc597be 100644
--- a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_16.rst
+++ b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_16.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__clkbuf_x16 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__clkbuf_16.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__clkbuf.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__clkbuf_x16 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__clkbuf_x16 layout**

diff --git a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_16.schematic.png b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_16.schematic.png
deleted file mode 100644
index fb243ea..0000000
--- a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_16.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_2.rst b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_2.rst
index 1c30a86..230660b 100644
--- a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_2.rst
+++ b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__clkbuf_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__clkbuf_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__clkbuf.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__clkbuf_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__clkbuf_2 layout**

diff --git a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_2.schematic.png b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_2.schematic.png
deleted file mode 100644
index fb243ea..0000000
--- a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_20.rst b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_20.rst
index 529bbc8..03cdbf3 100644
--- a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_20.rst
+++ b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_20.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__clkbuf_x20 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__clkbuf_20.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__clkbuf.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__clkbuf_x20 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__clkbuf_x20 layout**

diff --git a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_20.schematic.png b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_20.schematic.png
deleted file mode 100644
index fb243ea..0000000
--- a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_20.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_3.rst b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_3.rst
index 86f6eed..2a78b78 100644
--- a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_3.rst
+++ b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_3.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__clkbuf_3 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__clkbuf_3.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__clkbuf.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__clkbuf_3 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__clkbuf_3 layout**

diff --git a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_3.schematic.png b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_3.schematic.png
deleted file mode 100644
index fb243ea..0000000
--- a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_3.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_4.rst b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_4.rst
index 7a9ddd5..2bf7117 100644
--- a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_4.rst
+++ b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__clkbuf_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__clkbuf_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__clkbuf.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__clkbuf_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__clkbuf_4 layout**

diff --git a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_4.schematic.png b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_4.schematic.png
deleted file mode 100644
index fb243ea..0000000
--- a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_4.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_8.rst b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_8.rst
index 29aebe3..a0c7233 100644
--- a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_8.rst
+++ b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_8.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__clkbuf_8 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__clkbuf_8.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__clkbuf.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__clkbuf_8 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__clkbuf_8 layout**

diff --git a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_8.schematic.png b/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_8.schematic.png
deleted file mode 100644
index fb243ea..0000000
--- a/cells/clkbuf/gf180mcu_fd_sc_mcu9t5v0__clkbuf_8.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv.schematic.svg b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv.schematic.svg
new file mode 100644
index 0000000..0a992b7
--- /dev/null
+++ b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="185" height="54"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="not" transform="translate(78,22)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__clkinv.v:0$1"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__clkinv.v:0$1"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__clkinv.v:0$1"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_I"><text x="15" y="-4" class="nodelabel cell_I" s:attribute="ref">I</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_I"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(143,22)" s:width="30" s:height="20" id="cell_ZN"><text x="15" y="-4" class="nodelabel cell_ZN" s:attribute="ref">ZN</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_ZN"/><g s:x="0" s:y="10" s:pid="A"/></g><line x1="42" x2="77" y1="32" y2="32" class="net_2 width_1" style="stroke-width: 1"/><line x1="105" x2="143" y1="32" y2="32" class="net_3 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file

diff --git a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_1.rst b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_1.rst
index 70c5e0a..71387cb 100644
--- a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_1.rst
+++ b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__clkinv_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__clkinv_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__clkinv.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__clkinv_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__clkinv_1 layout**

diff --git a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_1.schematic.png b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_1.schematic.png
deleted file mode 100644
index 68f2c8b..0000000
--- a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_12.rst b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_12.rst
index 3cb8e60..20bb70d 100644
--- a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_12.rst
+++ b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_12.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__clkinv_x12 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__clkinv_12.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__clkinv.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__clkinv_x12 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__clkinv_x12 layout**

diff --git a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_12.schematic.png b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_12.schematic.png
deleted file mode 100644
index 68f2c8b..0000000
--- a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_12.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_16.rst b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_16.rst
index 8d96eed..b179cfa 100644
--- a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_16.rst
+++ b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_16.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__clkinv_x16 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__clkinv_16.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__clkinv.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__clkinv_x16 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__clkinv_x16 layout**

diff --git a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_16.schematic.png b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_16.schematic.png
deleted file mode 100644
index 68f2c8b..0000000
--- a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_16.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_2.rst b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_2.rst
index 3122165..b8ee6d3 100644
--- a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_2.rst
+++ b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__clkinv_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__clkinv_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__clkinv.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__clkinv_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__clkinv_2 layout**

diff --git a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_2.schematic.png b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_2.schematic.png
deleted file mode 100644
index 68f2c8b..0000000
--- a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_20.rst b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_20.rst
index 6501e6a..9d0485f 100644
--- a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_20.rst
+++ b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_20.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__clkinv_x20 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__clkinv_20.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__clkinv.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__clkinv_x20 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__clkinv_x20 layout**

diff --git a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_20.schematic.png b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_20.schematic.png
deleted file mode 100644
index 68f2c8b..0000000
--- a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_20.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_3.rst b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_3.rst
index 1250439..1e6d321 100644
--- a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_3.rst
+++ b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_3.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__clkinv_3 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__clkinv_3.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__clkinv.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__clkinv_3 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__clkinv_3 layout**

diff --git a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_3.schematic.png b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_3.schematic.png
deleted file mode 100644
index 68f2c8b..0000000
--- a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_3.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_4.rst b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_4.rst
index a4e73b6..2171176 100644
--- a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_4.rst
+++ b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__clkinv_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__clkinv_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__clkinv.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__clkinv_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__clkinv_4 layout**

diff --git a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_4.schematic.png b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_4.schematic.png
deleted file mode 100644
index 68f2c8b..0000000
--- a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_4.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_8.rst b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_8.rst
index cd04831..a7b831d 100644
--- a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_8.rst
+++ b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_8.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__clkinv_8 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__clkinv_8.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__clkinv.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__clkinv_8 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__clkinv_8 layout**

diff --git a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_8.schematic.png b/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_8.schematic.png
deleted file mode 100644
index 68f2c8b..0000000
--- a/cells/clkinv/gf180mcu_fd_sc_mcu9t5v0__clkinv_8.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/dffnq/gf180mcu_fd_sc_mcu9t5v0__dffnq.schematic.svg b/cells/dffnq/gf180mcu_fd_sc_mcu9t5v0__dffnq.schematic.svg
new file mode 100644
index 0000000..5a10979
--- /dev/null
+++ b/cells/dffnq/gf180mcu_fd_sc_mcu9t5v0__dffnq.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="359" height="239"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="not" transform="translate(86,77)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffnq.v:0$1"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffnq.v:0$1"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffnq.v:0$1"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(86,142)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffnq.v:0$2"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffnq.v:0$2"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffnq.v:0$2"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(252,57)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffnq.v:0$3"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffnq.v:0$3"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffnq.v:0$3"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="generic" transform="translate(178,56.5)" s:width="30" s:height="40" id="cell_x0"><text x="15" y="-4" class="nodelabel cell_x0" s:attribute="ref">udp_gf180mcu_fd_sc_mcu9t5v0_tt_25c_1v80_verilog_mgm_n_iq_ff_udp</text><rect width="30" height="100" s:generic="body" class="cell_x0"/><g transform="translate(0,10)" s:x="0" s:y="10" s:pid="in0" id="port_x0~C"><text x="-3" y="-4" class="inputPortLabel cell_x0">C</text></g><g transform="translate(0,30)" s:x="0" s:y="10" s:pid="in0" id="port_x0~CK"><text x="-3" y="-4" class="inputPortLabel cell_x0">CK</text></g><g transform="translate(0,50)" s:x="0" s:y="10" s:pid="in0" id="port_x0~D"><text x="-3" y="-4" class="inputPortLabel cell_x0">D</text></g><g transform="translate(0,70)" s:x="0" s:y="10" s:pid="in0" id="port_x0~N"><text x="-3" y="-4" class="inputPortLabel cell_x0">N</text></g><g transform="translate(0,90)" s:x="0" s:y="10" s:pid="in0" id="port_x0~P"><text x="-3" y="-4" class="inputPortLabel cell_x0">P</text></g><g transform="translate(30,10)" s:x="30" s:y="10" s:pid="out0" id="port_x0~Q"><text x="5" y="-4" style="fill:#000; stroke:none" class="cell_x0">Q</text></g></g><g s:type="inputExt" transform="translate(12,77)" s:width="30" s:height="20" id="cell_CLKN"><text x="15" y="-4" class="nodelabel cell_CLKN" s:attribute="ref">CLKN</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_CLKN"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,142)" s:width="30" s:height="20" id="cell_D"><text x="15" y="-4" class="nodelabel cell_D" s:attribute="ref">D</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_D"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(317,57)" s:width="30" s:height="20" id="cell_Q"><text x="15" y="-4" class="nodelabel cell_Q" s:attribute="ref">Q</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_Q"/><g s:x="0" s:y="10" s:pid="A"/></g><g s:type="inputExt" transform="translate(77,207)" s:width="30" s:height="20" id="cell_notifier"><text x="15" y="-4" class="nodelabel cell_notifier" s:attribute="ref">notifier</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_notifier"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="constant" transform="translate(77,22)" s:width="30" s:height="20" id="cell_0"><text x="15" y="-4" class="nodelabel cell_0" s:attribute="ref">0</text><s:alias val="$_constant_"/><rect width="30" height="20" class="cell_0"/><g s:x="31" s:y="10" s:pid="Y"/></g><line x1="42" x2="85" y1="87" y2="87" class="net_2 width_1" style="stroke-width: 1"/><line x1="42" x2="85" y1="152" y2="152" class="net_3 width_1" style="stroke-width: 1"/><line x1="209" x2="251" y1="67" y2="67" class="net_8 width_1" style="stroke-width: 1"/><line x1="108" x2="155" y1="32" y2="32" class="net_9 width_1" style="stroke-width: 1"/><line x1="155" x2="155" y1="32" y2="67" class="net_9 width_1" style="stroke-width: 1"/><circle cx="155" cy="67" r="2" style="fill:#000" class="net_9 width_1"/><line x1="155" x2="178" y1="67" y2="67" class="net_9 width_1" style="stroke-width: 1"/><line x1="108" x2="155" y1="32" y2="32" class="net_9 width_1" style="stroke-width: 1"/><line x1="155" x2="155" y1="32" y2="147" class="net_9 width_1" style="stroke-width: 1"/><line x1="155" x2="178" y1="147" y2="147" class="net_9 width_1" style="stroke-width: 1"/><line x1="113" x2="178" y1="87" y2="87" class="net_6 width_1" style="stroke-width: 1"/><line x1="113" x2="135" y1="152" y2="152" class="net_7 width_1" style="stroke-width: 1"/><line x1="135" x2="135" y1="152" y2="107" class="net_7 width_1" style="stroke-width: 1"/><line x1="135" x2="178" y1="107" y2="107" class="net_7 width_1" style="stroke-width: 1"/><line x1="107" x2="145" y1="217" y2="217" class="net_5 width_1" style="stroke-width: 1"/><line x1="145" x2="145" y1="217" y2="127" class="net_5 width_1" style="stroke-width: 1"/><line x1="145" x2="178" y1="127" y2="127" class="net_5 width_1" style="stroke-width: 1"/><line x1="279" x2="317" y1="67" y2="67" class="net_4 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file

diff --git a/cells/dffnq/gf180mcu_fd_sc_mcu9t5v0__dffnq_1.rst b/cells/dffnq/gf180mcu_fd_sc_mcu9t5v0__dffnq_1.rst
index ba5c8a0..b3b10b4 100644
--- a/cells/dffnq/gf180mcu_fd_sc_mcu9t5v0__dffnq_1.rst
+++ b/cells/dffnq/gf180mcu_fd_sc_mcu9t5v0__dffnq_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnq_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnq_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffnq_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnq_1 layout**

diff --git a/cells/dffnq/gf180mcu_fd_sc_mcu9t5v0__dffnq_2.rst b/cells/dffnq/gf180mcu_fd_sc_mcu9t5v0__dffnq_2.rst
index f7595f1..df89f6b 100644
--- a/cells/dffnq/gf180mcu_fd_sc_mcu9t5v0__dffnq_2.rst
+++ b/cells/dffnq/gf180mcu_fd_sc_mcu9t5v0__dffnq_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnq_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnq_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffnq_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnq_2 layout**

diff --git a/cells/dffnq/gf180mcu_fd_sc_mcu9t5v0__dffnq_4.rst b/cells/dffnq/gf180mcu_fd_sc_mcu9t5v0__dffnq_4.rst
index 4049b0b..957db2b 100644
--- a/cells/dffnq/gf180mcu_fd_sc_mcu9t5v0__dffnq_4.rst
+++ b/cells/dffnq/gf180mcu_fd_sc_mcu9t5v0__dffnq_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnq_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnq_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffnq_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnq_4 layout**

diff --git a/cells/dffnrnq/gf180mcu_fd_sc_mcu9t5v0__dffnrnq.schematic.svg b/cells/dffnrnq/gf180mcu_fd_sc_mcu9t5v0__dffnrnq.schematic.svg
new file mode 100644
index 0000000..a774175
--- /dev/null
+++ b/cells/dffnrnq/gf180mcu_fd_sc_mcu9t5v0__dffnrnq.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="354" height="294"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="not" transform="translate(86,77)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffnrnq.v:0$1"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffnrnq.v:0$1"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffnrnq.v:0$1"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(86,262)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffnrnq.v:0$2"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffnrnq.v:0$2"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffnrnq.v:0$2"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(86,142)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffnrnq.v:0$3"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffnrnq.v:0$3"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffnrnq.v:0$3"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(247,102)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffnrnq.v:0$4"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffnrnq.v:0$4"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffnrnq.v:0$4"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="generic" transform="translate(173,101.5)" s:width="30" s:height="40" id="cell_x0"><text x="15" y="-4" class="nodelabel cell_x0" s:attribute="ref">udp_gf180mcu_fd_sc_mcu9t5v0_tt_25c_1v80_verilog_mgm_n_iq_ff_udp</text><rect width="30" height="100" s:generic="body" class="cell_x0"/><g transform="translate(0,10)" s:x="0" s:y="10" s:pid="in0" id="port_x0~C"><text x="-3" y="-4" class="inputPortLabel cell_x0">C</text></g><g transform="translate(0,30)" s:x="0" s:y="10" s:pid="in0" id="port_x0~CK"><text x="-3" y="-4" class="inputPortLabel cell_x0">CK</text></g><g transform="translate(0,50)" s:x="0" s:y="10" s:pid="in0" id="port_x0~D"><text x="-3" y="-4" class="inputPortLabel cell_x0">D</text></g><g transform="translate(0,70)" s:x="0" s:y="10" s:pid="in0" id="port_x0~N"><text x="-3" y="-4" class="inputPortLabel cell_x0">N</text></g><g transform="translate(0,90)" s:x="0" s:y="10" s:pid="in0" id="port_x0~P"><text x="-3" y="-4" class="inputPortLabel cell_x0">P</text></g><g transform="translate(30,10)" s:x="30" s:y="10" s:pid="out0" id="port_x0~Q"><text x="5" y="-4" style="fill:#000; stroke:none" class="cell_x0">Q</text></g></g><g s:type="inputExt" transform="translate(12,77)" s:width="30" s:height="20" id="cell_CLKN"><text x="15" y="-4" class="nodelabel cell_CLKN" s:attribute="ref">CLKN</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_CLKN"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,142)" s:width="30" s:height="20" id="cell_D"><text x="15" y="-4" class="nodelabel cell_D" s:attribute="ref">D</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_D"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,262)" s:width="30" s:height="20" id="cell_RN"><text x="15" y="-4" class="nodelabel cell_RN" s:attribute="ref">RN</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_RN"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(312,102)" s:width="30" s:height="20" id="cell_Q"><text x="15" y="-4" class="nodelabel cell_Q" s:attribute="ref">Q</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_Q"/><g s:x="0" s:y="10" s:pid="A"/></g><g s:type="inputExt" transform="translate(77,207)" s:width="30" s:height="20" id="cell_notifier"><text x="15" y="-4" class="nodelabel cell_notifier" s:attribute="ref">notifier</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_notifier"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="constant" transform="translate(77,22)" s:width="30" s:height="20" id="cell_0"><text x="15" y="-4" class="nodelabel cell_0" s:attribute="ref">0</text><s:alias val="$_constant_"/><rect width="30" height="20" class="cell_0"/><g s:x="31" s:y="10" s:pid="Y"/></g><line x1="42" x2="85" y1="87" y2="87" class="net_2 width_1" style="stroke-width: 1"/><line x1="42" x2="85" y1="272" y2="272" class="net_4 width_1" style="stroke-width: 1"/><line x1="42" x2="85" y1="152" y2="152" class="net_3 width_1" style="stroke-width: 1"/><line x1="204" x2="246" y1="112" y2="112" class="net_10 width_1" style="stroke-width: 1"/><line x1="108" x2="145" y1="32" y2="32" class="net_11 width_1" style="stroke-width: 1"/><line x1="145" x2="145" y1="32" y2="112" class="net_11 width_1" style="stroke-width: 1"/><line x1="145" x2="173" y1="112" y2="112" class="net_11 width_1" style="stroke-width: 1"/><line x1="113" x2="135" y1="87" y2="87" class="net_7 width_1" style="stroke-width: 1"/><line x1="135" x2="135" y1="87" y2="132" class="net_7 width_1" style="stroke-width: 1"/><line x1="135" x2="173" y1="132" y2="132" class="net_7 width_1" style="stroke-width: 1"/><line x1="113" x2="173" y1="152" y2="152" class="net_9 width_1" style="stroke-width: 1"/><line x1="107" x2="135" y1="217" y2="217" class="net_6 width_1" style="stroke-width: 1"/><line x1="135" x2="135" y1="217" y2="172" class="net_6 width_1" style="stroke-width: 1"/><line x1="135" x2="173" y1="172" y2="172" class="net_6 width_1" style="stroke-width: 1"/><line x1="113" x2="145" y1="272" y2="272" class="net_8 width_1" style="stroke-width: 1"/><line x1="145" x2="145" y1="272" y2="192" class="net_8 width_1" style="stroke-width: 1"/><line x1="145" x2="173" y1="192" y2="192" class="net_8 width_1" style="stroke-width: 1"/><line x1="274" x2="312" y1="112" y2="112" class="net_5 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file

diff --git a/cells/dffnrnq/gf180mcu_fd_sc_mcu9t5v0__dffnrnq_1.rst b/cells/dffnrnq/gf180mcu_fd_sc_mcu9t5v0__dffnrnq_1.rst
index 98d25f8..376be50 100644
--- a/cells/dffnrnq/gf180mcu_fd_sc_mcu9t5v0__dffnrnq_1.rst
+++ b/cells/dffnrnq/gf180mcu_fd_sc_mcu9t5v0__dffnrnq_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnrnq_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnrnq_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnrnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffnrnq_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnrnq_1 layout**

diff --git a/cells/dffnrnq/gf180mcu_fd_sc_mcu9t5v0__dffnrnq_2.rst b/cells/dffnrnq/gf180mcu_fd_sc_mcu9t5v0__dffnrnq_2.rst
index ed4907c..bf68228 100644
--- a/cells/dffnrnq/gf180mcu_fd_sc_mcu9t5v0__dffnrnq_2.rst
+++ b/cells/dffnrnq/gf180mcu_fd_sc_mcu9t5v0__dffnrnq_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnrnq_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnrnq_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnrnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffnrnq_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnrnq_2 layout**

diff --git a/cells/dffnrnq/gf180mcu_fd_sc_mcu9t5v0__dffnrnq_4.rst b/cells/dffnrnq/gf180mcu_fd_sc_mcu9t5v0__dffnrnq_4.rst
index c943121..7ec119c 100644
--- a/cells/dffnrnq/gf180mcu_fd_sc_mcu9t5v0__dffnrnq_4.rst
+++ b/cells/dffnrnq/gf180mcu_fd_sc_mcu9t5v0__dffnrnq_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnrnq_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnrnq_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnrnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffnrnq_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnrnq_4 layout**

diff --git a/cells/dffnrsnq/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq.schematic.svg b/cells/dffnrsnq/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq.schematic.svg
new file mode 100644
index 0000000..3cc56b1
--- /dev/null
+++ b/cells/dffnrsnq/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="354" height="304"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="not" transform="translate(86,87)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffnrsnq.v:0$1"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffnrsnq.v:0$1"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffnrsnq.v:0$1"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(86,272)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffnrsnq.v:0$2"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffnrsnq.v:0$2"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffnrsnq.v:0$2"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(86,22)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffnrsnq.v:0$3"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffnrsnq.v:0$3"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffnrsnq.v:0$3"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(86,152)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffnrsnq.v:0$4"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffnrsnq.v:0$4"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffnrsnq.v:0$4"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(247,112)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffnrsnq.v:0$5"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffnrsnq.v:0$5"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffnrsnq.v:0$5"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="generic" transform="translate(173,111.5)" s:width="30" s:height="40" id="cell_x0"><text x="15" y="-4" class="nodelabel cell_x0" s:attribute="ref">udp_gf180mcu_fd_sc_mcu9t5v0_tt_25c_1v80_verilog_mgm_hn_iq_ff_udp</text><rect width="30" height="100" s:generic="body" class="cell_x0"/><g transform="translate(0,10)" s:x="0" s:y="10" s:pid="in0" id="port_x0~C"><text x="-3" y="-4" class="inputPortLabel cell_x0">C</text></g><g transform="translate(0,30)" s:x="0" s:y="10" s:pid="in0" id="port_x0~CK"><text x="-3" y="-4" class="inputPortLabel cell_x0">CK</text></g><g transform="translate(0,50)" s:x="0" s:y="10" s:pid="in0" id="port_x0~D"><text x="-3" y="-4" class="inputPortLabel cell_x0">D</text></g><g transform="translate(0,70)" s:x="0" s:y="10" s:pid="in0" id="port_x0~N"><text x="-3" y="-4" class="inputPortLabel cell_x0">N</text></g><g transform="translate(0,90)" s:x="0" s:y="10" s:pid="in0" id="port_x0~P"><text x="-3" y="-4" class="inputPortLabel cell_x0">P</text></g><g transform="translate(30,10)" s:x="30" s:y="10" s:pid="out0" id="port_x0~Q"><text x="5" y="-4" style="fill:#000; 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\ No newline at end of file

diff --git a/cells/dffnrsnq/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_1.rst b/cells/dffnrsnq/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_1.rst
index 8ba68d3..06a3d86 100644
--- a/cells/dffnrsnq/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_1.rst
+++ b/cells/dffnrsnq/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnrsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_1 layout**

diff --git a/cells/dffnrsnq/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_2.rst b/cells/dffnrsnq/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_2.rst
index 0ca3d99..6c99f97 100644
--- a/cells/dffnrsnq/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_2.rst
+++ b/cells/dffnrsnq/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnrsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_2 layout**

diff --git a/cells/dffnrsnq/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_4.rst b/cells/dffnrsnq/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_4.rst
index 7606ecf..7971929 100644
--- a/cells/dffnrsnq/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_4.rst
+++ b/cells/dffnrsnq/gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnrsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnrsnq_4 layout**

diff --git a/cells/dffnsnq/gf180mcu_fd_sc_mcu9t5v0__dffnsnq.schematic.svg b/cells/dffnsnq/gf180mcu_fd_sc_mcu9t5v0__dffnsnq.schematic.svg
new file mode 100644
index 0000000..c9c17f1
--- /dev/null
+++ b/cells/dffnsnq/gf180mcu_fd_sc_mcu9t5v0__dffnsnq.schematic.svg

@@ -0,0 +1,23 @@
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+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
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\ No newline at end of file

diff --git a/cells/dffnsnq/gf180mcu_fd_sc_mcu9t5v0__dffnsnq_1.rst b/cells/dffnsnq/gf180mcu_fd_sc_mcu9t5v0__dffnsnq_1.rst
index 4d47b45..eab3856 100644
--- a/cells/dffnsnq/gf180mcu_fd_sc_mcu9t5v0__dffnsnq_1.rst
+++ b/cells/dffnsnq/gf180mcu_fd_sc_mcu9t5v0__dffnsnq_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnsnq_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnsnq_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffnsnq_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnsnq_1 layout**

diff --git a/cells/dffnsnq/gf180mcu_fd_sc_mcu9t5v0__dffnsnq_2.rst b/cells/dffnsnq/gf180mcu_fd_sc_mcu9t5v0__dffnsnq_2.rst
index 80e5997..02ab390 100644
--- a/cells/dffnsnq/gf180mcu_fd_sc_mcu9t5v0__dffnsnq_2.rst
+++ b/cells/dffnsnq/gf180mcu_fd_sc_mcu9t5v0__dffnsnq_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnsnq_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnsnq_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffnsnq_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnsnq_2 layout**

diff --git a/cells/dffnsnq/gf180mcu_fd_sc_mcu9t5v0__dffnsnq_4.rst b/cells/dffnsnq/gf180mcu_fd_sc_mcu9t5v0__dffnsnq_4.rst
index fd732c0..a832ebb 100644
--- a/cells/dffnsnq/gf180mcu_fd_sc_mcu9t5v0__dffnsnq_4.rst
+++ b/cells/dffnsnq/gf180mcu_fd_sc_mcu9t5v0__dffnsnq_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnsnq_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnsnq_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffnsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffnsnq_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffnsnq_4 layout**

diff --git a/cells/dffq/gf180mcu_fd_sc_mcu9t5v0__dffq.schematic.svg b/cells/dffq/gf180mcu_fd_sc_mcu9t5v0__dffq.schematic.svg
new file mode 100644
index 0000000..61a853f
--- /dev/null
+++ b/cells/dffq/gf180mcu_fd_sc_mcu9t5v0__dffq.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="354" height="239"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="not" transform="translate(86,142)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffq.v:0$1"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffq.v:0$1"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffq.v:0$1"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(247,87)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffq.v:0$2"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffq.v:0$2"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffq.v:0$2"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="generic" transform="translate(173,86.5)" s:width="30" s:height="40" id="cell_x0"><text x="15" y="-4" class="nodelabel cell_x0" s:attribute="ref">udp_gf180mcu_fd_sc_mcu9t5v0_tt_25c_1v80_verilog_mgm_n_iq_ff_udp</text><rect width="30" height="100" s:generic="body" class="cell_x0"/><g transform="translate(0,10)" s:x="0" s:y="10" s:pid="in0" id="port_x0~C"><text x="-3" y="-4" class="inputPortLabel cell_x0">C</text></g><g transform="translate(0,30)" s:x="0" s:y="10" s:pid="in0" id="port_x0~CK"><text x="-3" y="-4" class="inputPortLabel cell_x0">CK</text></g><g transform="translate(0,50)" s:x="0" s:y="10" s:pid="in0" id="port_x0~D"><text x="-3" y="-4" class="inputPortLabel cell_x0">D</text></g><g transform="translate(0,70)" s:x="0" s:y="10" s:pid="in0" id="port_x0~N"><text x="-3" y="-4" class="inputPortLabel cell_x0">N</text></g><g transform="translate(0,90)" s:x="0" s:y="10" s:pid="in0" id="port_x0~P"><text x="-3" y="-4" class="inputPortLabel cell_x0">P</text></g><g transform="translate(30,10)" s:x="30" s:y="10" s:pid="out0" id="port_x0~Q"><text x="5" y="-4" style="fill:#000; stroke:none" class="cell_x0">Q</text></g></g><g s:type="inputExt" transform="translate(77,22)" s:width="30" s:height="20" id="cell_CLK"><text x="15" y="-4" class="nodelabel cell_CLK" s:attribute="ref">CLK</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_CLK"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,142)" s:width="30" s:height="20" id="cell_D"><text x="15" y="-4" class="nodelabel cell_D" s:attribute="ref">D</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_D"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(312,87)" s:width="30" s:height="20" id="cell_Q"><text x="15" y="-4" class="nodelabel cell_Q" s:attribute="ref">Q</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_Q"/><g s:x="0" s:y="10" s:pid="A"/></g><g s:type="inputExt" transform="translate(77,207)" s:width="30" s:height="20" id="cell_notifier"><text x="15" y="-4" class="nodelabel cell_notifier" s:attribute="ref">notifier</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_notifier"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="constant" transform="translate(77,87)" s:width="30" s:height="20" id="cell_0"><text x="15" y="-4" class="nodelabel cell_0" s:attribute="ref">0</text><s:alias val="$_constant_"/><rect width="30" height="20" class="cell_0"/><g s:x="31" s:y="10" s:pid="Y"/></g><line x1="42" x2="85" y1="152" y2="152" class="net_3 width_1" style="stroke-width: 1"/><line x1="204" x2="246" y1="97" y2="97" class="net_7 width_1" style="stroke-width: 1"/><line x1="108" x2="173" y1="97" y2="97" class="net_8 width_1" style="stroke-width: 1"/><line x1="108" x2="135" y1="97" y2="97" class="net_8 width_1" style="stroke-width: 1"/><line x1="135" x2="135" y1="97" y2="177" class="net_8 width_1" style="stroke-width: 1"/><circle cx="135" cy="97" r="2" style="fill:#000" class="net_8 width_1"/><line x1="135" x2="173" y1="177" y2="177" class="net_8 width_1" style="stroke-width: 1"/><line x1="107" x2="145" y1="32" y2="32" class="net_2 width_1" style="stroke-width: 1"/><line x1="145" x2="145" y1="32" y2="117" class="net_2 width_1" style="stroke-width: 1"/><line x1="145" x2="173" y1="117" y2="117" class="net_2 width_1" style="stroke-width: 1"/><line x1="113" x2="145" y1="152" y2="152" class="net_6 width_1" style="stroke-width: 1"/><line x1="145" x2="145" y1="152" y2="137" class="net_6 width_1" style="stroke-width: 1"/><line x1="145" x2="173" y1="137" y2="137" class="net_6 width_1" style="stroke-width: 1"/><line x1="107" x2="145" y1="217" y2="217" class="net_5 width_1" style="stroke-width: 1"/><line x1="145" x2="145" y1="217" y2="157" class="net_5 width_1" style="stroke-width: 1"/><line x1="145" x2="173" y1="157" y2="157" class="net_5 width_1" style="stroke-width: 1"/><line x1="274" x2="312" y1="97" y2="97" class="net_4 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file

diff --git a/cells/dffq/gf180mcu_fd_sc_mcu9t5v0__dffq_1.rst b/cells/dffq/gf180mcu_fd_sc_mcu9t5v0__dffq_1.rst
index 49f3ed1..a266b82 100644
--- a/cells/dffq/gf180mcu_fd_sc_mcu9t5v0__dffq_1.rst
+++ b/cells/dffq/gf180mcu_fd_sc_mcu9t5v0__dffq_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__dffq_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffq_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffq_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffq_1 layout**

diff --git a/cells/dffq/gf180mcu_fd_sc_mcu9t5v0__dffq_2.rst b/cells/dffq/gf180mcu_fd_sc_mcu9t5v0__dffq_2.rst
index a09e429..d9f30b5 100644
--- a/cells/dffq/gf180mcu_fd_sc_mcu9t5v0__dffq_2.rst
+++ b/cells/dffq/gf180mcu_fd_sc_mcu9t5v0__dffq_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__dffq_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffq_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffq_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffq_2 layout**

diff --git a/cells/dffq/gf180mcu_fd_sc_mcu9t5v0__dffq_4.rst b/cells/dffq/gf180mcu_fd_sc_mcu9t5v0__dffq_4.rst
index d7ea726..6cccd67 100644
--- a/cells/dffq/gf180mcu_fd_sc_mcu9t5v0__dffq_4.rst
+++ b/cells/dffq/gf180mcu_fd_sc_mcu9t5v0__dffq_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__dffq_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffq_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffq_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffq_4 layout**

diff --git a/cells/dffrnq/gf180mcu_fd_sc_mcu9t5v0__dffrnq.schematic.svg b/cells/dffrnq/gf180mcu_fd_sc_mcu9t5v0__dffrnq.schematic.svg
new file mode 100644
index 0000000..3c4ee07
--- /dev/null
+++ b/cells/dffrnq/gf180mcu_fd_sc_mcu9t5v0__dffrnq.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="354" height="294"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="not" transform="translate(86,262)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffrnq.v:0$1"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffrnq.v:0$1"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffrnq.v:0$1"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(86,142)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffrnq.v:0$2"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffrnq.v:0$2"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffrnq.v:0$2"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(247,102)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffrnq.v:0$3"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffrnq.v:0$3"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffrnq.v:0$3"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="generic" transform="translate(173,101.5)" s:width="30" s:height="40" id="cell_x0"><text x="15" y="-4" class="nodelabel cell_x0" s:attribute="ref">udp_gf180mcu_fd_sc_mcu9t5v0_tt_25c_1v80_verilog_mgm_n_iq_ff_udp</text><rect width="30" height="100" s:generic="body" class="cell_x0"/><g transform="translate(0,10)" s:x="0" s:y="10" s:pid="in0" id="port_x0~C"><text x="-3" y="-4" class="inputPortLabel cell_x0">C</text></g><g transform="translate(0,30)" s:x="0" s:y="10" s:pid="in0" id="port_x0~CK"><text x="-3" y="-4" class="inputPortLabel cell_x0">CK</text></g><g transform="translate(0,50)" s:x="0" s:y="10" s:pid="in0" id="port_x0~D"><text x="-3" y="-4" class="inputPortLabel cell_x0">D</text></g><g transform="translate(0,70)" s:x="0" s:y="10" s:pid="in0" id="port_x0~N"><text x="-3" y="-4" class="inputPortLabel cell_x0">N</text></g><g transform="translate(0,90)" s:x="0" s:y="10" s:pid="in0" id="port_x0~P"><text x="-3" y="-4" class="inputPortLabel cell_x0">P</text></g><g transform="translate(30,10)" s:x="30" s:y="10" s:pid="out0" id="port_x0~Q"><text x="5" y="-4" style="fill:#000; stroke:none" class="cell_x0">Q</text></g></g><g s:type="inputExt" transform="translate(77,87)" s:width="30" s:height="20" id="cell_CLK"><text x="15" y="-4" class="nodelabel cell_CLK" s:attribute="ref">CLK</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_CLK"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,142)" s:width="30" s:height="20" id="cell_D"><text x="15" y="-4" class="nodelabel cell_D" s:attribute="ref">D</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_D"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,262)" s:width="30" s:height="20" id="cell_RN"><text x="15" y="-4" class="nodelabel cell_RN" s:attribute="ref">RN</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_RN"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(312,102)" s:width="30" s:height="20" id="cell_Q"><text x="15" y="-4" class="nodelabel cell_Q" s:attribute="ref">Q</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_Q"/><g s:x="0" s:y="10" s:pid="A"/></g><g s:type="inputExt" transform="translate(77,207)" s:width="30" s:height="20" id="cell_notifier"><text x="15" y="-4" class="nodelabel cell_notifier" s:attribute="ref">notifier</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_notifier"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="constant" transform="translate(77,22)" s:width="30" s:height="20" id="cell_0"><text x="15" y="-4" class="nodelabel cell_0" s:attribute="ref">0</text><s:alias val="$_constant_"/><rect width="30" height="20" class="cell_0"/><g s:x="31" s:y="10" s:pid="Y"/></g><line x1="42" x2="85" y1="272" y2="272" class="net_4 width_1" style="stroke-width: 1"/><line x1="42" x2="85" y1="152" y2="152" class="net_3 width_1" style="stroke-width: 1"/><line x1="204" x2="246" y1="112" y2="112" class="net_9 width_1" style="stroke-width: 1"/><line x1="108" x2="145" y1="32" y2="32" class="net_10 width_1" style="stroke-width: 1"/><line x1="145" x2="145" y1="32" y2="112" class="net_10 width_1" style="stroke-width: 1"/><line x1="145" x2="173" y1="112" y2="112" class="net_10 width_1" style="stroke-width: 1"/><line x1="107" x2="135" y1="97" y2="97" class="net_2 width_1" style="stroke-width: 1"/><line x1="135" x2="135" y1="97" y2="132" class="net_2 width_1" style="stroke-width: 1"/><line x1="135" x2="173" y1="132" y2="132" class="net_2 width_1" style="stroke-width: 1"/><line x1="113" x2="173" y1="152" y2="152" class="net_8 width_1" style="stroke-width: 1"/><line x1="107" x2="135" y1="217" y2="217" class="net_6 width_1" style="stroke-width: 1"/><line x1="135" x2="135" y1="217" y2="172" class="net_6 width_1" style="stroke-width: 1"/><line x1="135" x2="173" y1="172" y2="172" class="net_6 width_1" style="stroke-width: 1"/><line x1="113" x2="145" y1="272" y2="272" class="net_7 width_1" style="stroke-width: 1"/><line x1="145" x2="145" y1="272" y2="192" class="net_7 width_1" style="stroke-width: 1"/><line x1="145" x2="173" y1="192" y2="192" class="net_7 width_1" style="stroke-width: 1"/><line x1="274" x2="312" y1="112" y2="112" class="net_5 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file

diff --git a/cells/dffrnq/gf180mcu_fd_sc_mcu9t5v0__dffrnq_1.rst b/cells/dffrnq/gf180mcu_fd_sc_mcu9t5v0__dffrnq_1.rst
index 5bd67ac..25ba1f8 100644
--- a/cells/dffrnq/gf180mcu_fd_sc_mcu9t5v0__dffrnq_1.rst
+++ b/cells/dffrnq/gf180mcu_fd_sc_mcu9t5v0__dffrnq_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__dffrnq_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffrnq_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffrnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffrnq_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffrnq_1 layout**

diff --git a/cells/dffrnq/gf180mcu_fd_sc_mcu9t5v0__dffrnq_2.rst b/cells/dffrnq/gf180mcu_fd_sc_mcu9t5v0__dffrnq_2.rst
index 2a92bff..d446f28 100644
--- a/cells/dffrnq/gf180mcu_fd_sc_mcu9t5v0__dffrnq_2.rst
+++ b/cells/dffrnq/gf180mcu_fd_sc_mcu9t5v0__dffrnq_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__dffrnq_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffrnq_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffrnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffrnq_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffrnq_2 layout**

diff --git a/cells/dffrnq/gf180mcu_fd_sc_mcu9t5v0__dffrnq_4.rst b/cells/dffrnq/gf180mcu_fd_sc_mcu9t5v0__dffrnq_4.rst
index 50d7084..bd7b3ea 100644
--- a/cells/dffrnq/gf180mcu_fd_sc_mcu9t5v0__dffrnq_4.rst
+++ b/cells/dffrnq/gf180mcu_fd_sc_mcu9t5v0__dffrnq_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__dffrnq_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffrnq_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffrnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffrnq_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffrnq_4 layout**

diff --git a/cells/dffrsnq/gf180mcu_fd_sc_mcu9t5v0__dffrsnq.schematic.svg b/cells/dffrsnq/gf180mcu_fd_sc_mcu9t5v0__dffrsnq.schematic.svg
new file mode 100644
index 0000000..9981929
--- /dev/null
+++ b/cells/dffrsnq/gf180mcu_fd_sc_mcu9t5v0__dffrsnq.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="354" height="294"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="not" transform="translate(86,262)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffrsnq.v:0$1"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffrsnq.v:0$1"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffrsnq.v:0$1"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(86,22)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffrsnq.v:0$2"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffrsnq.v:0$2"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffrsnq.v:0$2"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(86,142)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffrsnq.v:0$3"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffrsnq.v:0$3"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffrsnq.v:0$3"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(247,102)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffrsnq.v:0$4"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffrsnq.v:0$4"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffrsnq.v:0$4"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="generic" transform="translate(173,101.5)" s:width="30" s:height="40" id="cell_x0"><text x="15" y="-4" class="nodelabel cell_x0" s:attribute="ref">udp_gf180mcu_fd_sc_mcu9t5v0_tt_25c_1v80_verilog_mgm_hn_iq_ff_udp</text><rect width="30" height="100" s:generic="body" class="cell_x0"/><g transform="translate(0,10)" s:x="0" s:y="10" s:pid="in0" id="port_x0~C"><text x="-3" y="-4" class="inputPortLabel cell_x0">C</text></g><g transform="translate(0,30)" s:x="0" s:y="10" s:pid="in0" id="port_x0~CK"><text x="-3" y="-4" class="inputPortLabel cell_x0">CK</text></g><g transform="translate(0,50)" s:x="0" s:y="10" s:pid="in0" id="port_x0~D"><text x="-3" y="-4" class="inputPortLabel cell_x0">D</text></g><g transform="translate(0,70)" s:x="0" s:y="10" s:pid="in0" id="port_x0~N"><text x="-3" y="-4" class="inputPortLabel cell_x0">N</text></g><g transform="translate(0,90)" s:x="0" s:y="10" s:pid="in0" id="port_x0~P"><text x="-3" y="-4" class="inputPortLabel cell_x0">P</text></g><g transform="translate(30,10)" s:x="30" s:y="10" s:pid="out0" id="port_x0~Q"><text x="5" y="-4" style="fill:#000; stroke:none" class="cell_x0">Q</text></g></g><g s:type="inputExt" transform="translate(77,87)" s:width="30" s:height="20" id="cell_CLK"><text x="15" y="-4" class="nodelabel cell_CLK" s:attribute="ref">CLK</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_CLK"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,142)" s:width="30" s:height="20" id="cell_D"><text x="15" y="-4" class="nodelabel cell_D" s:attribute="ref">D</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_D"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_SETN"><text x="15" y="-4" class="nodelabel cell_SETN" s:attribute="ref">SETN</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_SETN"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,262)" s:width="30" s:height="20" id="cell_RN"><text x="15" y="-4" class="nodelabel cell_RN" s:attribute="ref">RN</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_RN"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(312,102)" s:width="30" s:height="20" id="cell_Q"><text x="15" y="-4" class="nodelabel cell_Q" s:attribute="ref">Q</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_Q"/><g s:x="0" s:y="10" s:pid="A"/></g><g s:type="inputExt" transform="translate(77,207)" s:width="30" s:height="20" id="cell_notifier"><text x="15" y="-4" class="nodelabel cell_notifier" s:attribute="ref">notifier</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_notifier"/><g s:x="30" s:y="10" s:pid="Y"/></g><line x1="42" x2="85" y1="272" y2="272" class="net_5 width_1" style="stroke-width: 1"/><line x1="42" x2="85" y1="32" y2="32" class="net_4 width_1" style="stroke-width: 1"/><line x1="42" x2="85" y1="152" y2="152" class="net_3 width_1" style="stroke-width: 1"/><line x1="204" x2="246" y1="112" y2="112" class="net_11 width_1" style="stroke-width: 1"/><line x1="113" x2="145" y1="32" y2="32" class="net_9 width_1" style="stroke-width: 1"/><line x1="145" x2="145" y1="32" y2="112" class="net_9 width_1" style="stroke-width: 1"/><line x1="145" x2="173" y1="112" y2="112" class="net_9 width_1" style="stroke-width: 1"/><line x1="107" x2="135" y1="97" y2="97" class="net_2 width_1" style="stroke-width: 1"/><line x1="135" x2="135" y1="97" y2="132" class="net_2 width_1" style="stroke-width: 1"/><line x1="135" x2="173" y1="132" y2="132" class="net_2 width_1" style="stroke-width: 1"/><line x1="113" x2="173" y1="152" y2="152" class="net_10 width_1" style="stroke-width: 1"/><line x1="107" x2="135" y1="217" y2="217" class="net_7 width_1" style="stroke-width: 1"/><line x1="135" x2="135" y1="217" y2="172" class="net_7 width_1" style="stroke-width: 1"/><line x1="135" x2="173" y1="172" y2="172" class="net_7 width_1" style="stroke-width: 1"/><line x1="113" x2="145" y1="272" y2="272" class="net_8 width_1" style="stroke-width: 1"/><line x1="145" x2="145" y1="272" y2="192" class="net_8 width_1" style="stroke-width: 1"/><line x1="145" x2="173" y1="192" y2="192" class="net_8 width_1" style="stroke-width: 1"/><line x1="274" x2="312" y1="112" y2="112" class="net_6 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file

diff --git a/cells/dffrsnq/gf180mcu_fd_sc_mcu9t5v0__dffrsnq_1.rst b/cells/dffrsnq/gf180mcu_fd_sc_mcu9t5v0__dffrsnq_1.rst
index 975102a..56f9633 100644
--- a/cells/dffrsnq/gf180mcu_fd_sc_mcu9t5v0__dffrsnq_1.rst
+++ b/cells/dffrsnq/gf180mcu_fd_sc_mcu9t5v0__dffrsnq_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__dffrsnq_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffrsnq_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffrsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffrsnq_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffrsnq_1 layout**

diff --git a/cells/dffrsnq/gf180mcu_fd_sc_mcu9t5v0__dffrsnq_2.rst b/cells/dffrsnq/gf180mcu_fd_sc_mcu9t5v0__dffrsnq_2.rst
index d0b44e9..dccf9fa 100644
--- a/cells/dffrsnq/gf180mcu_fd_sc_mcu9t5v0__dffrsnq_2.rst
+++ b/cells/dffrsnq/gf180mcu_fd_sc_mcu9t5v0__dffrsnq_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__dffrsnq_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffrsnq_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffrsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffrsnq_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffrsnq_2 layout**

diff --git a/cells/dffrsnq/gf180mcu_fd_sc_mcu9t5v0__dffrsnq_4.rst b/cells/dffrsnq/gf180mcu_fd_sc_mcu9t5v0__dffrsnq_4.rst
index f149268..50783ef 100644
--- a/cells/dffrsnq/gf180mcu_fd_sc_mcu9t5v0__dffrsnq_4.rst
+++ b/cells/dffrsnq/gf180mcu_fd_sc_mcu9t5v0__dffrsnq_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__dffrsnq_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffrsnq_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffrsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffrsnq_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffrsnq_4 layout**

diff --git a/cells/dffsnq/gf180mcu_fd_sc_mcu9t5v0__dffsnq.schematic.svg b/cells/dffsnq/gf180mcu_fd_sc_mcu9t5v0__dffsnq.schematic.svg
new file mode 100644
index 0000000..4387dde
--- /dev/null
+++ b/cells/dffsnq/gf180mcu_fd_sc_mcu9t5v0__dffsnq.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="354" height="304"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="not" transform="translate(86,22)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffsnq.v:0$1"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffsnq.v:0$1"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffsnq.v:0$1"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(86,142)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffsnq.v:0$2"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffsnq.v:0$2"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffsnq.v:0$2"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(247,102)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffsnq.v:0$3"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffsnq.v:0$3"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__dffsnq.v:0$3"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="generic" transform="translate(173,101.5)" s:width="30" s:height="40" id="cell_x0"><text x="15" y="-4" class="nodelabel cell_x0" s:attribute="ref">udp_gf180mcu_fd_sc_mcu9t5v0_tt_25c_1v80_verilog_mgm_n_iq_ff_udp</text><rect width="30" height="100" s:generic="body" class="cell_x0"/><g transform="translate(0,10)" s:x="0" s:y="10" s:pid="in0" id="port_x0~C"><text x="-3" y="-4" class="inputPortLabel cell_x0">C</text></g><g transform="translate(0,30)" s:x="0" s:y="10" s:pid="in0" id="port_x0~CK"><text x="-3" y="-4" class="inputPortLabel cell_x0">CK</text></g><g transform="translate(0,50)" s:x="0" s:y="10" s:pid="in0" id="port_x0~D"><text x="-3" y="-4" class="inputPortLabel cell_x0">D</text></g><g transform="translate(0,70)" s:x="0" s:y="10" s:pid="in0" id="port_x0~N"><text x="-3" y="-4" class="inputPortLabel cell_x0">N</text></g><g transform="translate(0,90)" s:x="0" s:y="10" s:pid="in0" id="port_x0~P"><text x="-3" y="-4" class="inputPortLabel cell_x0">P</text></g><g transform="translate(30,10)" s:x="30" s:y="10" s:pid="out0" id="port_x0~Q"><text x="5" y="-4" style="fill:#000; stroke:none" class="cell_x0">Q</text></g></g><g s:type="inputExt" transform="translate(77,87)" s:width="30" s:height="20" id="cell_CLK"><text x="15" y="-4" class="nodelabel cell_CLK" s:attribute="ref">CLK</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_CLK"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,142)" s:width="30" s:height="20" id="cell_D"><text x="15" y="-4" class="nodelabel cell_D" s:attribute="ref">D</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_D"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_SETN"><text x="15" y="-4" class="nodelabel cell_SETN" s:attribute="ref">SETN</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_SETN"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(312,102)" s:width="30" s:height="20" id="cell_Q"><text x="15" y="-4" class="nodelabel cell_Q" s:attribute="ref">Q</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_Q"/><g s:x="0" s:y="10" s:pid="A"/></g><g s:type="inputExt" transform="translate(77,207)" s:width="30" s:height="20" id="cell_notifier"><text x="15" y="-4" class="nodelabel cell_notifier" s:attribute="ref">notifier</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_notifier"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="constant" transform="translate(77,272)" s:width="30" s:height="20" id="cell_0"><text x="15" y="-4" class="nodelabel cell_0" s:attribute="ref">0</text><s:alias val="$_constant_"/><rect width="30" height="20" class="cell_0"/><g s:x="31" s:y="10" s:pid="Y"/></g><line x1="42" x2="85" y1="32" y2="32" class="net_4 width_1" style="stroke-width: 1"/><line x1="42" x2="85" y1="152" y2="152" class="net_3 width_1" style="stroke-width: 1"/><line x1="204" x2="246" y1="112" y2="112" class="net_9 width_1" style="stroke-width: 1"/><line x1="113" x2="145" y1="32" y2="32" class="net_7 width_1" style="stroke-width: 1"/><line x1="145" x2="145" y1="32" y2="112" class="net_7 width_1" style="stroke-width: 1"/><line x1="145" x2="173" y1="112" y2="112" class="net_7 width_1" style="stroke-width: 1"/><line x1="107" x2="135" y1="97" y2="97" class="net_2 width_1" style="stroke-width: 1"/><line x1="135" x2="135" y1="97" y2="132" class="net_2 width_1" style="stroke-width: 1"/><line x1="135" x2="173" y1="132" y2="132" class="net_2 width_1" style="stroke-width: 1"/><line x1="113" x2="173" y1="152" y2="152" class="net_8 width_1" style="stroke-width: 1"/><line x1="107" x2="135" y1="217" y2="217" class="net_6 width_1" style="stroke-width: 1"/><line x1="135" x2="135" y1="217" y2="172" class="net_6 width_1" style="stroke-width: 1"/><line x1="135" x2="173" y1="172" y2="172" class="net_6 width_1" style="stroke-width: 1"/><line x1="108" x2="145" y1="282" y2="282" class="net_10 width_1" style="stroke-width: 1"/><line x1="145" x2="145" y1="282" y2="192" class="net_10 width_1" style="stroke-width: 1"/><line x1="145" x2="173" y1="192" y2="192" class="net_10 width_1" style="stroke-width: 1"/><line x1="274" x2="312" y1="112" y2="112" class="net_5 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file

diff --git a/cells/dffsnq/gf180mcu_fd_sc_mcu9t5v0__dffsnq_1.rst b/cells/dffsnq/gf180mcu_fd_sc_mcu9t5v0__dffsnq_1.rst
index 1ffe69c..c991c7a 100644
--- a/cells/dffsnq/gf180mcu_fd_sc_mcu9t5v0__dffsnq_1.rst
+++ b/cells/dffsnq/gf180mcu_fd_sc_mcu9t5v0__dffsnq_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__dffsnq_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffsnq_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffsnq_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffsnq_1 layout**

diff --git a/cells/dffsnq/gf180mcu_fd_sc_mcu9t5v0__dffsnq_2.rst b/cells/dffsnq/gf180mcu_fd_sc_mcu9t5v0__dffsnq_2.rst
index 8f5ab30..ba5371d 100644
--- a/cells/dffsnq/gf180mcu_fd_sc_mcu9t5v0__dffsnq_2.rst
+++ b/cells/dffsnq/gf180mcu_fd_sc_mcu9t5v0__dffsnq_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__dffsnq_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffsnq_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffsnq_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffsnq_2 layout**

diff --git a/cells/dffsnq/gf180mcu_fd_sc_mcu9t5v0__dffsnq_4.rst b/cells/dffsnq/gf180mcu_fd_sc_mcu9t5v0__dffsnq_4.rst
index 3fcb003..4f9fdd5 100644
--- a/cells/dffsnq/gf180mcu_fd_sc_mcu9t5v0__dffsnq_4.rst
+++ b/cells/dffsnq/gf180mcu_fd_sc_mcu9t5v0__dffsnq_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__dffsnq_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dffsnq_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dffsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dffsnq_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dffsnq_4 layout**

diff --git a/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya.schematic.svg b/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya.schematic.svg
new file mode 100644
index 0000000..72e18ad
--- /dev/null
+++ b/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="119" height="54"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_I"><text x="15" y="-4" class="nodelabel cell_I" s:attribute="ref">I</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_I"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(77,22)" s:width="30" s:height="20" id="cell_Z"><text x="15" y="-4" class="nodelabel cell_Z" s:attribute="ref">Z</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_Z"/><g s:x="0" s:y="10" s:pid="A"/></g><line x1="42" x2="77" y1="32" y2="32" class="net_2 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file

diff --git a/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_1.rst b/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_1.rst
index 389f5b1..6c52444 100644
--- a/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_1.rst
+++ b/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__dlya_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dlya_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dlya.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dlya_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dlya_1 layout**

diff --git a/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_1.schematic.png b/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_1.schematic.png
deleted file mode 100644
index fb243ea..0000000
--- a/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_2.rst b/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_2.rst
index b688f81..a6ea404 100644
--- a/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_2.rst
+++ b/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__dlya_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dlya_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dlya.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dlya_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dlya_2 layout**

diff --git a/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_2.schematic.png b/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_2.schematic.png
deleted file mode 100644
index fb243ea..0000000
--- a/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_4.rst b/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_4.rst
index 31f69cf..3f8dff1 100644
--- a/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_4.rst
+++ b/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__dlya_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dlya_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dlya.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dlya_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dlya_4 layout**

diff --git a/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_4.schematic.png b/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_4.schematic.png
deleted file mode 100644
index fb243ea..0000000
--- a/cells/dlya/gf180mcu_fd_sc_mcu9t5v0__dlya_4.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb.schematic.svg b/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb.schematic.svg
new file mode 100644
index 0000000..72e18ad
--- /dev/null
+++ b/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="119" height="54"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_I"><text x="15" y="-4" class="nodelabel cell_I" s:attribute="ref">I</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_I"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(77,22)" s:width="30" s:height="20" id="cell_Z"><text x="15" y="-4" class="nodelabel cell_Z" s:attribute="ref">Z</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_Z"/><g s:x="0" s:y="10" s:pid="A"/></g><line x1="42" x2="77" y1="32" y2="32" class="net_2 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file

diff --git a/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_1.rst b/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_1.rst
index c4c12f3..41352d5 100644
--- a/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_1.rst
+++ b/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__dlyb_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dlyb_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dlyb.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dlyb_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dlyb_1 layout**

diff --git a/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_1.schematic.png b/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_1.schematic.png
deleted file mode 100644
index fb243ea..0000000
--- a/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_2.rst b/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_2.rst
index 5675b38..fbddf09 100644
--- a/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_2.rst
+++ b/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__dlyb_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dlyb_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dlyb.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dlyb_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dlyb_2 layout**

diff --git a/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_2.schematic.png b/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_2.schematic.png
deleted file mode 100644
index fb243ea..0000000
--- a/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_4.rst b/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_4.rst
index 66416dd..24a2d19 100644
--- a/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_4.rst
+++ b/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__dlyb_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dlyb_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dlyb.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dlyb_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dlyb_4 layout**

diff --git a/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_4.schematic.png b/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_4.schematic.png
deleted file mode 100644
index fb243ea..0000000
--- a/cells/dlyb/gf180mcu_fd_sc_mcu9t5v0__dlyb_4.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc.schematic.svg b/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc.schematic.svg
new file mode 100644
index 0000000..72e18ad
--- /dev/null
+++ b/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="119" height="54"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_I"><text x="15" y="-4" class="nodelabel cell_I" s:attribute="ref">I</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_I"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(77,22)" s:width="30" s:height="20" id="cell_Z"><text x="15" y="-4" class="nodelabel cell_Z" s:attribute="ref">Z</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_Z"/><g s:x="0" s:y="10" s:pid="A"/></g><line x1="42" x2="77" y1="32" y2="32" class="net_2 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file

diff --git a/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_1.rst b/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_1.rst
index 8d57d72..0cdca5b 100644
--- a/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_1.rst
+++ b/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__dlyc_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dlyc_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dlyc.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dlyc_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dlyc_1 layout**

diff --git a/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_1.schematic.png b/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_1.schematic.png
deleted file mode 100644
index fb243ea..0000000
--- a/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_2.rst b/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_2.rst
index 3ef30d4..3d6f2a3 100644
--- a/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_2.rst
+++ b/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__dlyc_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dlyc_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dlyc.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dlyc_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dlyc_2 layout**

diff --git a/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_2.schematic.png b/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_2.schematic.png
deleted file mode 100644
index fb243ea..0000000
--- a/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_4.rst b/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_4.rst
index e5253db..0e1a604 100644
--- a/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_4.rst
+++ b/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__dlyc_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dlyc_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dlyc.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dlyc_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dlyc_4 layout**

diff --git a/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_4.schematic.png b/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_4.schematic.png
deleted file mode 100644
index fb243ea..0000000
--- a/cells/dlyc/gf180mcu_fd_sc_mcu9t5v0__dlyc_4.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd.schematic.svg b/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd.schematic.svg
new file mode 100644
index 0000000..72e18ad
--- /dev/null
+++ b/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="119" height="54"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_I"><text x="15" y="-4" class="nodelabel cell_I" s:attribute="ref">I</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_I"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(77,22)" s:width="30" s:height="20" id="cell_Z"><text x="15" y="-4" class="nodelabel cell_Z" s:attribute="ref">Z</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_Z"/><g s:x="0" s:y="10" s:pid="A"/></g><line x1="42" x2="77" y1="32" y2="32" class="net_2 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file

diff --git a/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_1.rst b/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_1.rst
index 64792c5..3ce4dce 100644
--- a/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_1.rst
+++ b/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__dlyd_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dlyd_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dlyd.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dlyd_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dlyd_1 layout**

diff --git a/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_1.schematic.png b/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_1.schematic.png
deleted file mode 100644
index fb243ea..0000000
--- a/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_2.rst b/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_2.rst
index 035352c..6be7edb 100644
--- a/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_2.rst
+++ b/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__dlyd_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dlyd_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dlyd.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dlyd_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dlyd_2 layout**

diff --git a/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_2.schematic.png b/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_2.schematic.png
deleted file mode 100644
index fb243ea..0000000
--- a/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_4.rst b/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_4.rst
index 3fde56d..1b0808b 100644
--- a/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_4.rst
+++ b/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__dlyd_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__dlyd_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__dlyd.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__dlyd_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__dlyd_4 layout**

diff --git a/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_4.schematic.png b/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_4.schematic.png
deleted file mode 100644
index fb243ea..0000000
--- a/cells/dlyd/gf180mcu_fd_sc_mcu9t5v0__dlyd_4.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/endcap/gf180mcu_fd_sc_mcu9t5v0__endcap.rst b/cells/endcap/gf180mcu_fd_sc_mcu9t5v0__endcap.rst
index c56c911..ffaa050 100644
--- a/cells/endcap/gf180mcu_fd_sc_mcu9t5v0__endcap.rst
+++ b/cells/endcap/gf180mcu_fd_sc_mcu9t5v0__endcap.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__endcap schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__endcap.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__endcap.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__endcap schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__endcap layout**

diff --git a/cells/endcap/gf180mcu_fd_sc_mcu9t5v0__endcap.schematic.svg b/cells/endcap/gf180mcu_fd_sc_mcu9t5v0__endcap.schematic.svg
new file mode 100644
index 0000000..f8b5edc
--- /dev/null
+++ b/cells/endcap/gf180mcu_fd_sc_mcu9t5v0__endcap.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="0" height="0"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style></svg>
\ No newline at end of file

diff --git a/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill.schematic.svg b/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill.schematic.svg
new file mode 100644
index 0000000..f8b5edc
--- /dev/null
+++ b/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="0" height="0"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style></svg>
\ No newline at end of file

diff --git a/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_1.rst b/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_1.rst
index a9ea813..a051306 100644
--- a/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_1.rst
+++ b/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__fill_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__fill_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__fill.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__fill_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__fill_1 layout**

diff --git a/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_16.rst b/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_16.rst
index 719213e..1095da5 100644
--- a/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_16.rst
+++ b/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_16.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__fill_x16 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__fill_16.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__fill.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__fill_x16 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__fill_x16 layout**

diff --git a/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_2.rst b/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_2.rst
index bbefec3..20841ce 100644
--- a/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_2.rst
+++ b/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__fill_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__fill_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__fill.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__fill_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__fill_2 layout**

diff --git a/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_32.rst b/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_32.rst
index 0434c30..5907879 100644
--- a/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_32.rst
+++ b/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_32.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__fill_x32 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__fill_32.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__fill.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__fill_x32 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__fill_x32 layout**

diff --git a/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_4.rst b/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_4.rst
index 6f79d4a..f26564c 100644
--- a/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_4.rst
+++ b/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__fill_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__fill_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__fill.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__fill_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__fill_4 layout**

diff --git a/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_64.rst b/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_64.rst
index 501e4f5..0da891e 100644
--- a/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_64.rst
+++ b/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_64.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__fill_x64 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__fill_64.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__fill.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__fill_x64 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__fill_x64 layout**

diff --git a/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_8.rst b/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_8.rst
index 063103a..570977c 100644
--- a/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_8.rst
+++ b/cells/fill/gf180mcu_fd_sc_mcu9t5v0__fill_8.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__fill_8 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__fill_8.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__fill.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__fill_8 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__fill_8 layout**

diff --git a/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap.schematic.svg b/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap.schematic.svg
new file mode 100644
index 0000000..f8b5edc
--- /dev/null
+++ b/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="0" height="0"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style></svg>
\ No newline at end of file

diff --git a/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap_16.rst b/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap_16.rst
index 14819cd..e327e78 100644
--- a/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap_16.rst
+++ b/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap_16.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__fillcap_x16 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__fillcap_16.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__fillcap.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__fillcap_x16 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__fillcap_x16 layout**

diff --git a/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap_32.rst b/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap_32.rst
index 964d2a0..9289b31 100644
--- a/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap_32.rst
+++ b/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap_32.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__fillcap_x32 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__fillcap_32.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__fillcap.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__fillcap_x32 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__fillcap_x32 layout**

diff --git a/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap_4.rst b/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap_4.rst
index e373f9f..6f46554 100644
--- a/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap_4.rst
+++ b/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__fillcap_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__fillcap_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__fillcap.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__fillcap_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__fillcap_4 layout**

diff --git a/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap_64.rst b/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap_64.rst
index d530e67..2145b25 100644
--- a/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap_64.rst
+++ b/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap_64.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__fillcap_x64 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__fillcap_64.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__fillcap.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__fillcap_x64 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__fillcap_x64 layout**

diff --git a/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap_8.rst b/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap_8.rst
index cc92f02..03092d3 100644
--- a/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap_8.rst
+++ b/cells/fillcap/gf180mcu_fd_sc_mcu9t5v0__fillcap_8.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__fillcap_8 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__fillcap_8.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__fillcap.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__fillcap_8 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__fillcap_8 layout**

diff --git a/cells/filltie/gf180mcu_fd_sc_mcu9t5v0__filltie.rst b/cells/filltie/gf180mcu_fd_sc_mcu9t5v0__filltie.rst
index 1974b60..89b114f 100644
--- a/cells/filltie/gf180mcu_fd_sc_mcu9t5v0__filltie.rst
+++ b/cells/filltie/gf180mcu_fd_sc_mcu9t5v0__filltie.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__filltie schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__filltie.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__filltie.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__filltie schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__filltie layout**

diff --git a/cells/filltie/gf180mcu_fd_sc_mcu9t5v0__filltie.schematic.svg b/cells/filltie/gf180mcu_fd_sc_mcu9t5v0__filltie.schematic.svg
new file mode 100644
index 0000000..f8b5edc
--- /dev/null
+++ b/cells/filltie/gf180mcu_fd_sc_mcu9t5v0__filltie.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="0" height="0"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style></svg>
\ No newline at end of file

diff --git a/cells/hold/gf180mcu_fd_sc_mcu9t5v0__hold.rst b/cells/hold/gf180mcu_fd_sc_mcu9t5v0__hold.rst
index c21cab4..3d5ea89 100644
--- a/cells/hold/gf180mcu_fd_sc_mcu9t5v0__hold.rst
+++ b/cells/hold/gf180mcu_fd_sc_mcu9t5v0__hold.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__hold schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__hold.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__hold.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__hold schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__hold layout**

diff --git a/cells/hold/gf180mcu_fd_sc_mcu9t5v0__hold.schematic.svg b/cells/hold/gf180mcu_fd_sc_mcu9t5v0__hold.schematic.svg
new file mode 100644
index 0000000..f8b5edc
--- /dev/null
+++ b/cells/hold/gf180mcu_fd_sc_mcu9t5v0__hold.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="0" height="0"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style></svg>
\ No newline at end of file

diff --git a/cells/icgtn/gf180mcu_fd_sc_mcu9t5v0__icgtn.schematic.svg b/cells/icgtn/gf180mcu_fd_sc_mcu9t5v0__icgtn.schematic.svg
new file mode 100644
index 0000000..ddfb6d7
--- /dev/null
+++ b/cells/icgtn/gf180mcu_fd_sc_mcu9t5v0__icgtn.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="424" height="244"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
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\ No newline at end of file

diff --git a/cells/icgtn/gf180mcu_fd_sc_mcu9t5v0__icgtn_1.rst b/cells/icgtn/gf180mcu_fd_sc_mcu9t5v0__icgtn_1.rst
index 2b9ba19..da68030 100644
--- a/cells/icgtn/gf180mcu_fd_sc_mcu9t5v0__icgtn_1.rst
+++ b/cells/icgtn/gf180mcu_fd_sc_mcu9t5v0__icgtn_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__icgtn_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__icgtn_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__icgtn.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__icgtn_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__icgtn_1 layout**

diff --git a/cells/icgtn/gf180mcu_fd_sc_mcu9t5v0__icgtn_2.rst b/cells/icgtn/gf180mcu_fd_sc_mcu9t5v0__icgtn_2.rst
index 8bf4e81..5bb0994 100644
--- a/cells/icgtn/gf180mcu_fd_sc_mcu9t5v0__icgtn_2.rst
+++ b/cells/icgtn/gf180mcu_fd_sc_mcu9t5v0__icgtn_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__icgtn_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__icgtn_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__icgtn.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__icgtn_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__icgtn_2 layout**

diff --git a/cells/icgtn/gf180mcu_fd_sc_mcu9t5v0__icgtn_4.rst b/cells/icgtn/gf180mcu_fd_sc_mcu9t5v0__icgtn_4.rst
index 50453eb..f11d423 100644
--- a/cells/icgtn/gf180mcu_fd_sc_mcu9t5v0__icgtn_4.rst
+++ b/cells/icgtn/gf180mcu_fd_sc_mcu9t5v0__icgtn_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__icgtn_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__icgtn_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__icgtn.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__icgtn_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__icgtn_4 layout**

diff --git a/cells/icgtp/gf180mcu_fd_sc_mcu9t5v0__icgtp.schematic.svg b/cells/icgtp/gf180mcu_fd_sc_mcu9t5v0__icgtp.schematic.svg
new file mode 100644
index 0000000..f9891d6
--- /dev/null
+++ b/cells/icgtp/gf180mcu_fd_sc_mcu9t5v0__icgtp.schematic.svg

@@ -0,0 +1,23 @@
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+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
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\ No newline at end of file

diff --git a/cells/icgtp/gf180mcu_fd_sc_mcu9t5v0__icgtp_1.rst b/cells/icgtp/gf180mcu_fd_sc_mcu9t5v0__icgtp_1.rst
index bc6095d..3838063 100644
--- a/cells/icgtp/gf180mcu_fd_sc_mcu9t5v0__icgtp_1.rst
+++ b/cells/icgtp/gf180mcu_fd_sc_mcu9t5v0__icgtp_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__icgtp_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__icgtp_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__icgtp.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__icgtp_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__icgtp_1 layout**

diff --git a/cells/icgtp/gf180mcu_fd_sc_mcu9t5v0__icgtp_2.rst b/cells/icgtp/gf180mcu_fd_sc_mcu9t5v0__icgtp_2.rst
index ce218c3..00635d6 100644
--- a/cells/icgtp/gf180mcu_fd_sc_mcu9t5v0__icgtp_2.rst
+++ b/cells/icgtp/gf180mcu_fd_sc_mcu9t5v0__icgtp_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__icgtp_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__icgtp_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__icgtp.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__icgtp_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__icgtp_2 layout**

diff --git a/cells/icgtp/gf180mcu_fd_sc_mcu9t5v0__icgtp_4.rst b/cells/icgtp/gf180mcu_fd_sc_mcu9t5v0__icgtp_4.rst
index 8bc68ed..f6e9ae7 100644
--- a/cells/icgtp/gf180mcu_fd_sc_mcu9t5v0__icgtp_4.rst
+++ b/cells/icgtp/gf180mcu_fd_sc_mcu9t5v0__icgtp_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__icgtp_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__icgtp_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__icgtp.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__icgtp_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__icgtp_4 layout**

diff --git a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv.schematic.svg b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv.schematic.svg
new file mode 100644
index 0000000..70bdadb
--- /dev/null
+++ b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="185" height="54"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="not" transform="translate(78,22)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__inv.v:0$1"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__inv.v:0$1"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__inv.v:0$1"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_I"><text x="15" y="-4" class="nodelabel cell_I" s:attribute="ref">I</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_I"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(143,22)" s:width="30" s:height="20" id="cell_ZN"><text x="15" y="-4" class="nodelabel cell_ZN" s:attribute="ref">ZN</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_ZN"/><g s:x="0" s:y="10" s:pid="A"/></g><line x1="42" x2="77" y1="32" y2="32" class="net_2 width_1" style="stroke-width: 1"/><line x1="105" x2="143" y1="32" y2="32" class="net_3 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file

diff --git a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_1.rst b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_1.rst
index 16a606f..f4a9a7d 100644
--- a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_1.rst
+++ b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__inv_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__inv_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__inv.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__inv_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__inv_1 layout**

diff --git a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_1.schematic.png b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_1.schematic.png
deleted file mode 100644
index 68f2c8b..0000000
--- a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_12.rst b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_12.rst
index a02f34d..c03f694 100644
--- a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_12.rst
+++ b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_12.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__inv_x12 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__inv_12.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__inv.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__inv_x12 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__inv_x12 layout**

diff --git a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_12.schematic.png b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_12.schematic.png
deleted file mode 100644
index 68f2c8b..0000000
--- a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_12.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_16.rst b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_16.rst
index 955c20f..2c0b338 100644
--- a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_16.rst
+++ b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_16.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__inv_x16 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__inv_16.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__inv.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__inv_x16 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__inv_x16 layout**

diff --git a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_16.schematic.png b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_16.schematic.png
deleted file mode 100644
index 68f2c8b..0000000
--- a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_16.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_2.rst b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_2.rst
index e0c7b77..a6fb146 100644
--- a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_2.rst
+++ b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__inv_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__inv_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__inv.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__inv_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__inv_2 layout**

diff --git a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_2.schematic.png b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_2.schematic.png
deleted file mode 100644
index 68f2c8b..0000000
--- a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_20.rst b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_20.rst
index 423a1b4..86a7fc6 100644
--- a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_20.rst
+++ b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_20.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__inv_x20 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__inv_20.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__inv.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__inv_x20 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__inv_x20 layout**

diff --git a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_20.schematic.png b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_20.schematic.png
deleted file mode 100644
index 68f2c8b..0000000
--- a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_20.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_3.rst b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_3.rst
index 86efd7c..5be5f07 100644
--- a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_3.rst
+++ b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_3.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__inv_3 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__inv_3.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__inv.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__inv_3 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__inv_3 layout**

diff --git a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_3.schematic.png b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_3.schematic.png
deleted file mode 100644
index 68f2c8b..0000000
--- a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_3.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_4.rst b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_4.rst
index 806bba1..b47cddb 100644
--- a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_4.rst
+++ b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__inv_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__inv_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__inv.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__inv_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__inv_4 layout**

diff --git a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_4.schematic.png b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_4.schematic.png
deleted file mode 100644
index 68f2c8b..0000000
--- a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_4.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_8.rst b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_8.rst
index 4b4c93a..e355acf 100644
--- a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_8.rst
+++ b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_8.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__inv_8 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__inv_8.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__inv.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__inv_8 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__inv_8 layout**

diff --git a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_8.schematic.png b/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_8.schematic.png
deleted file mode 100644
index 68f2c8b..0000000
--- a/cells/inv/gf180mcu_fd_sc_mcu9t5v0__inv_8.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz.schematic.svg b/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz.schematic.svg
new file mode 100644
index 0000000..5f71f49
--- /dev/null
+++ b/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="305" height="121.5"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="and" transform="translate(143,29.5)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__invz.v:30$1"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__invz.v:30$1"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="not" transform="translate(78,24.5)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__invz.v:0$3"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__invz.v:0$3"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__invz.v:0$3"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="mux" transform="translate(208,12)" s:width="20" s:height="40" id="cell_$ternary$gf180mcu_fd_sc_mcu9t5v0__invz.v:0$2"><s:alias val="$pmux"/><s:alias val="$mux"/><s:alias val="$_MUX_"/><path d="M0,0 L20,10 L20,30 L0,40 Z" class="cell_$ternary$gf180mcu_fd_sc_mcu9t5v0__invz.v:0$2"/><text x="5" y="32" class="nodelabel cell_$ternary$gf180mcu_fd_sc_mcu9t5v0__invz.v:0$2" s:attribute="">1</text><text x="5" y="13" class="nodelabel cell_$ternary$gf180mcu_fd_sc_mcu9t5v0__invz.v:0$2" s:attribute="">0</text><g s:x="0" s:y="10" s:pid="A"/><g s:x="0" s:y="30" s:pid="B"/><g s:x="10" s:y="35" s:pid="S"/><g s:x="20" s:y="20" s:pid="Y"/></g><g s:type="inputExt" transform="translate(78,89.5)" s:width="30" s:height="20" id="cell_EN"><text x="15" y="-4" class="nodelabel cell_EN" s:attribute="ref">EN</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_EN"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(263,22)" s:width="30" s:height="20" id="cell_ZN"><text x="15" y="-4" class="nodelabel cell_ZN" s:attribute="ref">ZN</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_ZN"/><g s:x="0" s:y="10" s:pid="A"/></g><g s:type="inputExt" transform="translate(12,24.5)" s:width="30" s:height="20" id="cell_I"><text x="15" y="-4" class="nodelabel cell_I" s:attribute="ref">I</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_I"/><g s:x="30" s:y="10" s:pid="Y"/></g><line x1="105" x2="143" y1="34.5" y2="34.5" class="net_5 width_1" style="stroke-width: 1"/><line x1="108" x2="118" y1="99.5" y2="99.5" class="net_2 width_1" style="stroke-width: 1"/><line x1="118" x2="118" y1="99.5" y2="49.5" class="net_2 width_1" style="stroke-width: 1"/><circle cx="118" cy="99.5" r="2" style="fill:#000" class="net_2 width_1"/><line x1="118" x2="143" y1="49.5" y2="49.5" class="net_2 width_1" style="stroke-width: 1"/><line x1="108" x2="218" y1="99.5" y2="99.5" class="net_2 width_1" style="stroke-width: 1"/><line x1="218" x2="218" y1="99.5" y2="47" class="net_2 width_1" style="stroke-width: 1"/><line x1="42" x2="77" y1="34.5" y2="34.5" class="net_4 width_1" style="stroke-width: 1"/><line x1="173" x2="208" y1="42" y2="42" class="net_6 width_1" style="stroke-width: 1"/><line x1="228" x2="263" y1="32" y2="32" class="net_3 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file

diff --git a/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_1.rst b/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_1.rst
index 8990569..fcc75dc 100644
--- a/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_1.rst
+++ b/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__invz_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__invz_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__invz.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__invz_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__invz_1 layout**

diff --git a/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_12.rst b/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_12.rst
index 3ea8236..45eda44 100644
--- a/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_12.rst
+++ b/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_12.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__invz_x12 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__invz_12.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__invz.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__invz_x12 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__invz_x12 layout**

diff --git a/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_16.rst b/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_16.rst
index 14894c6..bee1d3c 100644
--- a/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_16.rst
+++ b/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_16.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__invz_x16 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__invz_16.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__invz.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__invz_x16 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__invz_x16 layout**

diff --git a/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_2.rst b/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_2.rst
index 2d2ee02..7d45798 100644
--- a/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_2.rst
+++ b/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__invz_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__invz_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__invz.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__invz_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__invz_2 layout**

diff --git a/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_3.rst b/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_3.rst
index a3da0c0..ea672df 100644
--- a/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_3.rst
+++ b/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_3.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__invz_3 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__invz_3.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__invz.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__invz_3 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__invz_3 layout**

diff --git a/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_4.rst b/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_4.rst
index 23fa8f1..82f83f5 100644
--- a/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_4.rst
+++ b/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__invz_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__invz_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__invz.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__invz_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__invz_4 layout**

diff --git a/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_8.rst b/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_8.rst
index 9162800..960e80b 100644
--- a/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_8.rst
+++ b/cells/invz/gf180mcu_fd_sc_mcu9t5v0__invz_8.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__invz_8 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__invz_8.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__invz.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__invz_8 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__invz_8 layout**

diff --git a/cells/latq/gf180mcu_fd_sc_mcu9t5v0__latq.schematic.svg b/cells/latq/gf180mcu_fd_sc_mcu9t5v0__latq.schematic.svg
new file mode 100644
index 0000000..c63cb0e
--- /dev/null
+++ b/cells/latq/gf180mcu_fd_sc_mcu9t5v0__latq.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="354" height="239"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="not" transform="translate(86,142)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__latq.v:0$1"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__latq.v:0$1"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__latq.v:0$1"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(247,87)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__latq.v:0$2"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__latq.v:0$2"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__latq.v:0$2"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="generic" transform="translate(173,86.5)" s:width="30" s:height="40" id="cell_x0"><text x="15" y="-4" class="nodelabel cell_x0" s:attribute="ref">udp_gf180mcu_fd_sc_mcu9t5v0_tt_25c_1v80_verilog_mgm_n_iq_latch_udp</text><rect width="30" height="100" s:generic="body" class="cell_x0"/><g transform="translate(0,10)" s:x="0" s:y="10" s:pid="in0" id="port_x0~C"><text x="-3" y="-4" class="inputPortLabel cell_x0">C</text></g><g transform="translate(0,30)" s:x="0" s:y="10" s:pid="in0" id="port_x0~CK"><text x="-3" y="-4" class="inputPortLabel cell_x0">CK</text></g><g transform="translate(0,50)" s:x="0" s:y="10" s:pid="in0" id="port_x0~D"><text x="-3" y="-4" class="inputPortLabel cell_x0">D</text></g><g transform="translate(0,70)" s:x="0" s:y="10" s:pid="in0" id="port_x0~N"><text x="-3" y="-4" class="inputPortLabel cell_x0">N</text></g><g transform="translate(0,90)" s:x="0" s:y="10" s:pid="in0" id="port_x0~P"><text x="-3" y="-4" class="inputPortLabel cell_x0">P</text></g><g transform="translate(30,10)" s:x="30" s:y="10" s:pid="out0" id="port_x0~Q"><text x="5" y="-4" style="fill:#000; stroke:none" class="cell_x0">Q</text></g></g><g s:type="inputExt" transform="translate(77,22)" s:width="30" s:height="20" id="cell_E"><text x="15" y="-4" class="nodelabel cell_E" s:attribute="ref">E</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_E"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,142)" s:width="30" s:height="20" id="cell_D"><text x="15" y="-4" class="nodelabel cell_D" s:attribute="ref">D</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_D"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(312,87)" s:width="30" s:height="20" id="cell_Q"><text x="15" y="-4" class="nodelabel cell_Q" s:attribute="ref">Q</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_Q"/><g s:x="0" s:y="10" s:pid="A"/></g><g s:type="inputExt" transform="translate(77,207)" s:width="30" s:height="20" id="cell_notifier"><text x="15" y="-4" class="nodelabel cell_notifier" s:attribute="ref">notifier</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_notifier"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="constant" transform="translate(77,87)" s:width="30" s:height="20" id="cell_0"><text x="15" y="-4" class="nodelabel cell_0" s:attribute="ref">0</text><s:alias val="$_constant_"/><rect width="30" height="20" class="cell_0"/><g s:x="31" s:y="10" s:pid="Y"/></g><line x1="42" x2="85" y1="152" y2="152" class="net_3 width_1" style="stroke-width: 1"/><line x1="204" x2="246" y1="97" y2="97" class="net_7 width_1" style="stroke-width: 1"/><line x1="108" x2="173" y1="97" y2="97" class="net_8 width_1" style="stroke-width: 1"/><line x1="108" x2="135" y1="97" y2="97" class="net_8 width_1" style="stroke-width: 1"/><line x1="135" x2="135" y1="97" y2="177" class="net_8 width_1" style="stroke-width: 1"/><circle cx="135" cy="97" r="2" style="fill:#000" class="net_8 width_1"/><line x1="135" x2="173" y1="177" y2="177" class="net_8 width_1" style="stroke-width: 1"/><line x1="107" x2="145" y1="32" y2="32" class="net_2 width_1" style="stroke-width: 1"/><line x1="145" x2="145" y1="32" y2="117" class="net_2 width_1" style="stroke-width: 1"/><line x1="145" x2="173" y1="117" y2="117" class="net_2 width_1" style="stroke-width: 1"/><line x1="113" x2="145" y1="152" y2="152" class="net_6 width_1" style="stroke-width: 1"/><line x1="145" x2="145" y1="152" y2="137" class="net_6 width_1" style="stroke-width: 1"/><line x1="145" x2="173" y1="137" y2="137" class="net_6 width_1" style="stroke-width: 1"/><line x1="107" x2="145" y1="217" y2="217" class="net_5 width_1" style="stroke-width: 1"/><line x1="145" x2="145" y1="217" y2="157" class="net_5 width_1" style="stroke-width: 1"/><line x1="145" x2="173" y1="157" y2="157" class="net_5 width_1" style="stroke-width: 1"/><line x1="274" x2="312" y1="97" y2="97" class="net_4 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file

diff --git a/cells/latq/gf180mcu_fd_sc_mcu9t5v0__latq_1.rst b/cells/latq/gf180mcu_fd_sc_mcu9t5v0__latq_1.rst
index 0e413af..b386e7d 100644
--- a/cells/latq/gf180mcu_fd_sc_mcu9t5v0__latq_1.rst
+++ b/cells/latq/gf180mcu_fd_sc_mcu9t5v0__latq_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__latq_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__latq_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__latq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__latq_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__latq_1 layout**

diff --git a/cells/latq/gf180mcu_fd_sc_mcu9t5v0__latq_2.rst b/cells/latq/gf180mcu_fd_sc_mcu9t5v0__latq_2.rst
index 0c90a31..7377a8e 100644
--- a/cells/latq/gf180mcu_fd_sc_mcu9t5v0__latq_2.rst
+++ b/cells/latq/gf180mcu_fd_sc_mcu9t5v0__latq_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__latq_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__latq_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__latq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__latq_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__latq_2 layout**

diff --git a/cells/latq/gf180mcu_fd_sc_mcu9t5v0__latq_4.rst b/cells/latq/gf180mcu_fd_sc_mcu9t5v0__latq_4.rst
index 8151e89..0644efc 100644
--- a/cells/latq/gf180mcu_fd_sc_mcu9t5v0__latq_4.rst
+++ b/cells/latq/gf180mcu_fd_sc_mcu9t5v0__latq_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__latq_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__latq_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__latq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__latq_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__latq_4 layout**

diff --git a/cells/latrnq/gf180mcu_fd_sc_mcu9t5v0__latrnq.schematic.svg b/cells/latrnq/gf180mcu_fd_sc_mcu9t5v0__latrnq.schematic.svg
new file mode 100644
index 0000000..479a3f3
--- /dev/null
+++ b/cells/latrnq/gf180mcu_fd_sc_mcu9t5v0__latrnq.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="288" height="314"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="not" transform="translate(86,22)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__latrnq.v:0$1"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__latrnq.v:0$1"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__latrnq.v:0$1"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="generic" transform="translate(173,111.5)" s:width="30" s:height="40" id="cell_x0"><text x="15" y="-4" class="nodelabel cell_x0" s:attribute="ref">udp_gf180mcu_fd_sc_mcu9t5v0_tt_25c_1v80_verilog_mgm_n_iq_latch_udp</text><rect width="30" height="100" s:generic="body" class="cell_x0"/><g transform="translate(0,10)" s:x="0" s:y="10" s:pid="in0" id="port_x0~C"><text x="-3" y="-4" class="inputPortLabel cell_x0">C</text></g><g transform="translate(0,30)" s:x="0" s:y="10" s:pid="in0" id="port_x0~CK"><text x="-3" y="-4" class="inputPortLabel cell_x0">CK</text></g><g transform="translate(0,50)" s:x="0" s:y="10" s:pid="in0" id="port_x0~D"><text x="-3" y="-4" class="inputPortLabel cell_x0">D</text></g><g transform="translate(0,70)" s:x="0" s:y="10" s:pid="in0" id="port_x0~N"><text x="-3" y="-4" class="inputPortLabel cell_x0">N</text></g><g transform="translate(0,90)" s:x="0" s:y="10" s:pid="in0" id="port_x0~P"><text x="-3" y="-4" class="inputPortLabel cell_x0">P</text></g><g transform="translate(30,10)" s:x="30" s:y="10" s:pid="out0" id="port_x0~Q"><text x="5" y="-4" style="fill:#000; stroke:none" class="cell_x0">Q</text></g></g><g s:type="inputExt" transform="translate(77,87)" s:width="30" s:height="20" id="cell_E"><text x="15" y="-4" class="nodelabel cell_E" s:attribute="ref">E</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_E"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_RN"><text x="15" y="-4" class="nodelabel cell_RN" s:attribute="ref">RN</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_RN"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(77,152)" s:width="30" s:height="20" id="cell_D"><text x="15" y="-4" class="nodelabel cell_D" s:attribute="ref">D</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_D"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(246,112)" s:width="30" s:height="20" id="cell_Q"><text x="15" y="-4" class="nodelabel cell_Q" s:attribute="ref">Q</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_Q"/><g s:x="0" s:y="10" s:pid="A"/></g><g s:type="inputExt" transform="translate(77,217)" s:width="30" s:height="20" id="cell_notifier"><text x="15" y="-4" class="nodelabel cell_notifier" s:attribute="ref">notifier</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_notifier"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="constant" transform="translate(77,282)" s:width="30" s:height="20" id="cell_0"><text x="15" y="-4" class="nodelabel cell_0" s:attribute="ref">0</text><s:alias val="$_constant_"/><rect width="30" height="20" class="cell_0"/><g s:x="31" s:y="10" s:pid="Y"/></g><line x1="42" x2="85" y1="32" y2="32" class="net_3 width_1" style="stroke-width: 1"/><line x1="113" x2="145" y1="32" y2="32" class="net_7 width_1" style="stroke-width: 1"/><line x1="145" x2="145" y1="32" y2="122" class="net_7 width_1" style="stroke-width: 1"/><line x1="145" x2="173" y1="122" y2="122" class="net_7 width_1" style="stroke-width: 1"/><line x1="107" x2="135" y1="97" y2="97" class="net_2 width_1" style="stroke-width: 1"/><line x1="135" x2="135" y1="97" y2="142" class="net_2 width_1" style="stroke-width: 1"/><line x1="135" x2="173" y1="142" y2="142" class="net_2 width_1" style="stroke-width: 1"/><line x1="107" x2="173" y1="162" y2="162" class="net_4 width_1" style="stroke-width: 1"/><line x1="107" x2="135" y1="227" y2="227" class="net_6 width_1" style="stroke-width: 1"/><line x1="135" x2="135" y1="227" y2="182" class="net_6 width_1" style="stroke-width: 1"/><line x1="135" x2="173" y1="182" y2="182" class="net_6 width_1" style="stroke-width: 1"/><line x1="108" x2="145" y1="292" y2="292" class="net_8 width_1" style="stroke-width: 1"/><line x1="145" x2="145" y1="292" y2="202" class="net_8 width_1" style="stroke-width: 1"/><line x1="145" x2="173" y1="202" y2="202" class="net_8 width_1" style="stroke-width: 1"/><line x1="204" x2="246" y1="122" y2="122" class="net_5 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file

diff --git a/cells/latrnq/gf180mcu_fd_sc_mcu9t5v0__latrnq_1.rst b/cells/latrnq/gf180mcu_fd_sc_mcu9t5v0__latrnq_1.rst
index 8bd9f46..fcd7ba5 100644
--- a/cells/latrnq/gf180mcu_fd_sc_mcu9t5v0__latrnq_1.rst
+++ b/cells/latrnq/gf180mcu_fd_sc_mcu9t5v0__latrnq_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__latrnq_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__latrnq_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__latrnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__latrnq_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__latrnq_1 layout**

diff --git a/cells/latrnq/gf180mcu_fd_sc_mcu9t5v0__latrnq_2.rst b/cells/latrnq/gf180mcu_fd_sc_mcu9t5v0__latrnq_2.rst
index b608aee..5858148 100644
--- a/cells/latrnq/gf180mcu_fd_sc_mcu9t5v0__latrnq_2.rst
+++ b/cells/latrnq/gf180mcu_fd_sc_mcu9t5v0__latrnq_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__latrnq_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__latrnq_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__latrnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__latrnq_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__latrnq_2 layout**

diff --git a/cells/latrnq/gf180mcu_fd_sc_mcu9t5v0__latrnq_4.rst b/cells/latrnq/gf180mcu_fd_sc_mcu9t5v0__latrnq_4.rst
index 2080877..863d20c 100644
--- a/cells/latrnq/gf180mcu_fd_sc_mcu9t5v0__latrnq_4.rst
+++ b/cells/latrnq/gf180mcu_fd_sc_mcu9t5v0__latrnq_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__latrnq_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__latrnq_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__latrnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__latrnq_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__latrnq_4 layout**

diff --git a/cells/latrsnq/gf180mcu_fd_sc_mcu9t5v0__latrsnq.schematic.svg b/cells/latrsnq/gf180mcu_fd_sc_mcu9t5v0__latrsnq.schematic.svg
new file mode 100644
index 0000000..48d094d
--- /dev/null
+++ b/cells/latrsnq/gf180mcu_fd_sc_mcu9t5v0__latrsnq.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="288" height="304"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="not" transform="translate(86,272)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__latrsnq.v:0$1"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__latrsnq.v:0$1"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__latrsnq.v:0$1"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(86,22)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__latrsnq.v:0$2"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__latrsnq.v:0$2"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__latrsnq.v:0$2"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="generic" transform="translate(173,111.5)" s:width="30" s:height="40" id="cell_x0"><text x="15" y="-4" class="nodelabel cell_x0" s:attribute="ref">udp_gf180mcu_fd_sc_mcu9t5v0_tt_25c_1v80_verilog_mgm_hn_iq_latch_udp</text><rect width="30" height="100" s:generic="body" class="cell_x0"/><g transform="translate(0,10)" s:x="0" s:y="10" s:pid="in0" id="port_x0~C"><text x="-3" y="-4" class="inputPortLabel cell_x0">C</text></g><g transform="translate(0,30)" s:x="0" s:y="10" s:pid="in0" id="port_x0~CK"><text x="-3" y="-4" class="inputPortLabel cell_x0">CK</text></g><g transform="translate(0,50)" s:x="0" s:y="10" s:pid="in0" id="port_x0~D"><text x="-3" y="-4" class="inputPortLabel cell_x0">D</text></g><g transform="translate(0,70)" s:x="0" s:y="10" s:pid="in0" id="port_x0~N"><text x="-3" y="-4" class="inputPortLabel cell_x0">N</text></g><g transform="translate(0,90)" s:x="0" s:y="10" s:pid="in0" id="port_x0~P"><text x="-3" y="-4" class="inputPortLabel cell_x0">P</text></g><g transform="translate(30,10)" s:x="30" s:y="10" s:pid="out0" id="port_x0~Q"><text x="5" y="-4" style="fill:#000; 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\ No newline at end of file

diff --git a/cells/latrsnq/gf180mcu_fd_sc_mcu9t5v0__latrsnq_1.rst b/cells/latrsnq/gf180mcu_fd_sc_mcu9t5v0__latrsnq_1.rst
index f285302..8762f72 100644
--- a/cells/latrsnq/gf180mcu_fd_sc_mcu9t5v0__latrsnq_1.rst
+++ b/cells/latrsnq/gf180mcu_fd_sc_mcu9t5v0__latrsnq_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__latrsnq_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__latrsnq_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__latrsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__latrsnq_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__latrsnq_1 layout**

diff --git a/cells/latrsnq/gf180mcu_fd_sc_mcu9t5v0__latrsnq_2.rst b/cells/latrsnq/gf180mcu_fd_sc_mcu9t5v0__latrsnq_2.rst
index b2a83ed..8588fef 100644
--- a/cells/latrsnq/gf180mcu_fd_sc_mcu9t5v0__latrsnq_2.rst
+++ b/cells/latrsnq/gf180mcu_fd_sc_mcu9t5v0__latrsnq_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__latrsnq_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__latrsnq_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__latrsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__latrsnq_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__latrsnq_2 layout**

diff --git a/cells/latrsnq/gf180mcu_fd_sc_mcu9t5v0__latrsnq_4.rst b/cells/latrsnq/gf180mcu_fd_sc_mcu9t5v0__latrsnq_4.rst
index a5c24bd..77d185a 100644
--- a/cells/latrsnq/gf180mcu_fd_sc_mcu9t5v0__latrsnq_4.rst
+++ b/cells/latrsnq/gf180mcu_fd_sc_mcu9t5v0__latrsnq_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__latrsnq_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__latrsnq_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__latrsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__latrsnq_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__latrsnq_4 layout**

diff --git a/cells/latsnq/gf180mcu_fd_sc_mcu9t5v0__latsnq.schematic.svg b/cells/latsnq/gf180mcu_fd_sc_mcu9t5v0__latsnq.schematic.svg
new file mode 100644
index 0000000..17ec0a8
--- /dev/null
+++ b/cells/latsnq/gf180mcu_fd_sc_mcu9t5v0__latsnq.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="288" height="304"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="not" transform="translate(86,272)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__latsnq.v:0$1"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__latsnq.v:0$1"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__latsnq.v:0$1"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="generic" transform="translate(173,111.5)" s:width="30" s:height="40" id="cell_x0"><text x="15" y="-4" class="nodelabel cell_x0" s:attribute="ref">udp_gf180mcu_fd_sc_mcu9t5v0_tt_25c_1v80_verilog_mgm_n_iq_latch_udp</text><rect width="30" height="100" s:generic="body" class="cell_x0"/><g transform="translate(0,10)" s:x="0" s:y="10" s:pid="in0" id="port_x0~C"><text x="-3" y="-4" class="inputPortLabel cell_x0">C</text></g><g transform="translate(0,30)" s:x="0" s:y="10" s:pid="in0" id="port_x0~CK"><text x="-3" y="-4" class="inputPortLabel cell_x0">CK</text></g><g transform="translate(0,50)" s:x="0" s:y="10" s:pid="in0" id="port_x0~D"><text x="-3" y="-4" class="inputPortLabel cell_x0">D</text></g><g transform="translate(0,70)" s:x="0" s:y="10" s:pid="in0" id="port_x0~N"><text x="-3" y="-4" class="inputPortLabel cell_x0">N</text></g><g transform="translate(0,90)" s:x="0" s:y="10" s:pid="in0" id="port_x0~P"><text x="-3" y="-4" class="inputPortLabel cell_x0">P</text></g><g transform="translate(30,10)" s:x="30" s:y="10" s:pid="out0" id="port_x0~Q"><text x="5" y="-4" style="fill:#000; stroke:none" class="cell_x0">Q</text></g></g><g s:type="inputExt" transform="translate(77,87)" s:width="30" s:height="20" id="cell_E"><text x="15" y="-4" class="nodelabel cell_E" s:attribute="ref">E</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_E"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(77,152)" s:width="30" s:height="20" id="cell_D"><text x="15" y="-4" class="nodelabel cell_D" s:attribute="ref">D</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_D"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,272)" s:width="30" s:height="20" id="cell_SETN"><text x="15" y="-4" class="nodelabel cell_SETN" s:attribute="ref">SETN</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_SETN"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(246,112)" s:width="30" s:height="20" id="cell_Q"><text x="15" y="-4" class="nodelabel cell_Q" s:attribute="ref">Q</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_Q"/><g s:x="0" s:y="10" s:pid="A"/></g><g s:type="inputExt" transform="translate(77,217)" s:width="30" s:height="20" id="cell_notifier"><text x="15" y="-4" class="nodelabel cell_notifier" s:attribute="ref">notifier</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_notifier"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="constant" transform="translate(77,22)" s:width="30" s:height="20" id="cell_0"><text x="15" y="-4" class="nodelabel cell_0" s:attribute="ref">0</text><s:alias val="$_constant_"/><rect width="30" height="20" class="cell_0"/><g s:x="31" s:y="10" s:pid="Y"/></g><line x1="42" x2="85" y1="282" y2="282" class="net_4 width_1" style="stroke-width: 1"/><line x1="108" x2="145" y1="32" y2="32" class="net_8 width_1" style="stroke-width: 1"/><line x1="145" x2="145" y1="32" y2="122" class="net_8 width_1" style="stroke-width: 1"/><line x1="145" x2="173" y1="122" y2="122" class="net_8 width_1" style="stroke-width: 1"/><line x1="107" x2="135" y1="97" y2="97" class="net_2 width_1" style="stroke-width: 1"/><line x1="135" x2="135" y1="97" y2="142" class="net_2 width_1" style="stroke-width: 1"/><line x1="135" x2="173" y1="142" y2="142" class="net_2 width_1" style="stroke-width: 1"/><line x1="107" x2="173" y1="162" y2="162" class="net_3 width_1" style="stroke-width: 1"/><line x1="107" x2="135" y1="227" y2="227" class="net_6 width_1" style="stroke-width: 1"/><line x1="135" x2="135" y1="227" y2="182" class="net_6 width_1" style="stroke-width: 1"/><line x1="135" x2="173" y1="182" y2="182" class="net_6 width_1" style="stroke-width: 1"/><line x1="113" x2="145" y1="282" y2="282" class="net_7 width_1" style="stroke-width: 1"/><line x1="145" x2="145" y1="282" y2="202" class="net_7 width_1" style="stroke-width: 1"/><line x1="145" x2="173" y1="202" y2="202" class="net_7 width_1" style="stroke-width: 1"/><line x1="204" x2="246" y1="122" y2="122" class="net_5 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file

diff --git a/cells/latsnq/gf180mcu_fd_sc_mcu9t5v0__latsnq_1.rst b/cells/latsnq/gf180mcu_fd_sc_mcu9t5v0__latsnq_1.rst
index 78c632d..4604d30 100644
--- a/cells/latsnq/gf180mcu_fd_sc_mcu9t5v0__latsnq_1.rst
+++ b/cells/latsnq/gf180mcu_fd_sc_mcu9t5v0__latsnq_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__latsnq_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__latsnq_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__latsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__latsnq_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__latsnq_1 layout**

diff --git a/cells/latsnq/gf180mcu_fd_sc_mcu9t5v0__latsnq_2.rst b/cells/latsnq/gf180mcu_fd_sc_mcu9t5v0__latsnq_2.rst
index 01f4002..b772895 100644
--- a/cells/latsnq/gf180mcu_fd_sc_mcu9t5v0__latsnq_2.rst
+++ b/cells/latsnq/gf180mcu_fd_sc_mcu9t5v0__latsnq_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__latsnq_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__latsnq_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__latsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__latsnq_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__latsnq_2 layout**

diff --git a/cells/latsnq/gf180mcu_fd_sc_mcu9t5v0__latsnq_4.rst b/cells/latsnq/gf180mcu_fd_sc_mcu9t5v0__latsnq_4.rst
index 430b510..f888363 100644
--- a/cells/latsnq/gf180mcu_fd_sc_mcu9t5v0__latsnq_4.rst
+++ b/cells/latsnq/gf180mcu_fd_sc_mcu9t5v0__latsnq_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__latsnq_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__latsnq_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__latsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__latsnq_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__latsnq_4 layout**

diff --git a/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2.schematic.svg b/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2.schematic.svg
new file mode 100644
index 0000000..1592c22
--- /dev/null
+++ b/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="380" height="194"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="and" transform="translate(143,82)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__mux2.v:24$1"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__mux2.v:24$1"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="and" transform="translate(143,17)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__mux2.v:32$2"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__mux2.v:32$2"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="and" transform="translate(208,152)" s:width="30" s:height="25" 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diff --git a/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_1.rst b/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_1.rst
index 4c54737..af6379c 100644
--- a/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_1.rst
+++ b/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__mux2_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__mux2_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__mux2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__mux2_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__mux2_1 layout**

diff --git a/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_1.schematic.png b/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_1.schematic.png
deleted file mode 100644
index c1ec339..0000000
--- a/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_2.rst b/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_2.rst
index e286f92..b9ac02f 100644
--- a/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_2.rst
+++ b/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__mux2_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__mux2_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__mux2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__mux2_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__mux2_2 layout**

diff --git a/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_2.schematic.png b/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_2.schematic.png
deleted file mode 100644
index c1ec339..0000000
--- a/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_4.rst b/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_4.rst
index 5bdaa89..b2cfde2 100644
--- a/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_4.rst
+++ b/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__mux2_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__mux2_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__mux2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__mux2_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__mux2_4 layout**

diff --git a/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_4.schematic.png b/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_4.schematic.png
deleted file mode 100644
index c1ec339..0000000
--- a/cells/mux2/gf180mcu_fd_sc_mcu9t5v0__mux2_4.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4.schematic.svg b/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4.schematic.svg
new file mode 100644
index 0000000..479f4a3
--- /dev/null
+++ b/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4.schematic.svg

@@ -0,0 +1,23 @@
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+}
+text {
+  fill:#000;
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+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
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\ No newline at end of file

diff --git a/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_1.rst b/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_1.rst
index fbba4db..1d310aa 100644
--- a/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_1.rst
+++ b/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__mux4_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__mux4_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__mux4.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__mux4_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__mux4_1 layout**

diff --git a/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_1.schematic.png b/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_1.schematic.png
deleted file mode 100644
index 85de14a..0000000
--- a/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_2.rst b/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_2.rst
index 5645343..8d15b7c 100644
--- a/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_2.rst
+++ b/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__mux4_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__mux4_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__mux4.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__mux4_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__mux4_2 layout**

diff --git a/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_2.schematic.png b/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_2.schematic.png
deleted file mode 100644
index 85de14a..0000000
--- a/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_4.rst b/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_4.rst
index f09c266..7155bbc 100644
--- a/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_4.rst
+++ b/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__mux4_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__mux4_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__mux4.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__mux4_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__mux4_4 layout**

diff --git a/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_4.schematic.png b/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_4.schematic.png
deleted file mode 100644
index 85de14a..0000000
--- a/cells/mux4/gf180mcu_fd_sc_mcu9t5v0__mux4_4.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2.schematic.svg b/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2.schematic.svg
new file mode 100644
index 0000000..36c961d
--- /dev/null
+++ b/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2.schematic.svg

@@ -0,0 +1,23 @@
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+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="not" transform="translate(78,22)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nand2.v:0$2"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nand2.v:0$2"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nand2.v:0$2"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(78,87)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nand2.v:0$3"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nand2.v:0$3"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nand2.v:0$3"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="or" transform="translate(143,27)" s:width="30" s:height="25" id="cell_$or$gf180mcu_fd_sc_mcu9t5v0__nand2.v:30$1"><s:alias val="$or"/><s:alias val="$logic_or"/><s:alias val="$_OR_"/><s:alias val="$reduce_or"/><s:alias val="$reduce_bool"/><path d="M0,0 A30 25 0 0 1 0,25 A30 25 0 0 0 30,12.5 A30 25 0 0 0 0,0" class="cell_$or$gf180mcu_fd_sc_mcu9t5v0__nand2.v:30$1"/><g s:x="2" s:y="5" s:pid="A"/><g s:x="2" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,87)" s:width="30" s:height="20" id="cell_A2"><text x="15" y="-4" class="nodelabel cell_A2" s:attribute="ref">A2</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A2"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(208,29.5)" s:width="30" s:height="20" id="cell_ZN"><text x="15" y="-4" class="nodelabel cell_ZN" s:attribute="ref">ZN</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_ZN"/><g s:x="0" s:y="10" s:pid="A"/></g><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_A1"><text x="15" y="-4" class="nodelabel cell_A1" s:attribute="ref">A1</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A1"/><g s:x="30" s:y="10" s:pid="Y"/></g><line x1="42" x2="77" y1="32" y2="32" class="net_4 width_1" style="stroke-width: 1"/><line x1="42" x2="77" y1="97" y2="97" class="net_2 width_1" style="stroke-width: 1"/><line x1="105" x2="145" y1="32" y2="32" class="net_5 width_1" style="stroke-width: 1"/><line x1="105" x2="118" y1="97" y2="97" class="net_6 width_1" style="stroke-width: 1"/><line x1="118" x2="118" y1="97" y2="47" class="net_6 width_1" style="stroke-width: 1"/><line x1="118" x2="145" y1="47" y2="47" class="net_6 width_1" style="stroke-width: 1"/><line x1="173" x2="208" y1="39.5" y2="39.5" class="net_3 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file

diff --git a/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_1.rst b/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_1.rst
index db13a7b..7417751 100644
--- a/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_1.rst
+++ b/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__nand2_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__nand2_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__nand2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__nand2_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__nand2_1 layout**

diff --git a/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_1.schematic.png b/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_1.schematic.png
deleted file mode 100644
index 12f8d31..0000000
--- a/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_2.rst b/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_2.rst
index 1ab8f6f..b8d9334 100644
--- a/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_2.rst
+++ b/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__nand2_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__nand2_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__nand2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__nand2_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__nand2_2 layout**

diff --git a/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_2.schematic.png b/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_2.schematic.png
deleted file mode 100644
index 12f8d31..0000000
--- a/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_4.rst b/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_4.rst
index 2a0ed1d..57e3d0d 100644
--- a/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_4.rst
+++ b/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__nand2_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__nand2_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__nand2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__nand2_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__nand2_4 layout**

diff --git a/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_4.schematic.png b/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_4.schematic.png
deleted file mode 100644
index 12f8d31..0000000
--- a/cells/nand2/gf180mcu_fd_sc_mcu9t5v0__nand2_4.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3.schematic.svg b/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3.schematic.svg
new file mode 100644
index 0000000..ebf3024
--- /dev/null
+++ b/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="316" height="184"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="not" transform="translate(78,22)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nand3.v:0$3"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nand3.v:0$3"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nand3.v:0$3"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(78,87)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nand3.v:0$4"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nand3.v:0$4"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nand3.v:0$4"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(144,152)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nand3.v:0$5"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nand3.v:0$5"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nand3.v:0$5"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="or" transform="translate(143.66666666666666,27)" s:width="30" s:height="25" id="cell_$or$gf180mcu_fd_sc_mcu9t5v0__nand3.v:34$1"><s:alias val="$or"/><s:alias val="$logic_or"/><s:alias val="$_OR_"/><s:alias val="$reduce_or"/><s:alias val="$reduce_bool"/><path d="M0,0 A30 25 0 0 1 0,25 A30 25 0 0 0 30,12.5 A30 25 0 0 0 0,0" class="cell_$or$gf180mcu_fd_sc_mcu9t5v0__nand3.v:34$1"/><g s:x="2" s:y="5" s:pid="A"/><g s:x="2" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="or" transform="translate(209,34.5)" s:width="30" s:height="25" id="cell_$or$gf180mcu_fd_sc_mcu9t5v0__nand3.v:34$2"><s:alias val="$or"/><s:alias val="$logic_or"/><s:alias val="$_OR_"/><s:alias val="$reduce_or"/><s:alias val="$reduce_bool"/><path d="M0,0 A30 25 0 0 1 0,25 A30 25 0 0 0 30,12.5 A30 25 0 0 0 0,0" class="cell_$or$gf180mcu_fd_sc_mcu9t5v0__nand3.v:34$2"/><g s:x="2" s:y="5" s:pid="A"/><g s:x="2" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="inputExt" transform="translate(78,152)" s:width="30" s:height="20" id="cell_A3"><text x="15" y="-4" class="nodelabel cell_A3" s:attribute="ref">A3</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A3"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(274,37)" s:width="30" s:height="20" id="cell_ZN"><text x="15" y="-4" class="nodelabel cell_ZN" s:attribute="ref">ZN</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_ZN"/><g s:x="0" s:y="10" s:pid="A"/></g><g s:type="inputExt" transform="translate(12,87)" s:width="30" s:height="20" id="cell_A2"><text x="15" y="-4" class="nodelabel cell_A2" s:attribute="ref">A2</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A2"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_A1"><text x="15" y="-4" class="nodelabel cell_A1" s:attribute="ref">A1</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A1"/><g s:x="30" s:y="10" s:pid="Y"/></g><line x1="42" x2="77" y1="32" y2="32" class="net_5 width_1" style="stroke-width: 1"/><line x1="42" x2="77" y1="97" y2="97" class="net_4 width_1" style="stroke-width: 1"/><line x1="108" x2="143" y1="162" y2="162" class="net_2 width_1" style="stroke-width: 1"/><line x1="105" x2="145.66666666666666" y1="32" y2="32" class="net_6 width_1" style="stroke-width: 1"/><line x1="105" x2="118" y1="97" y2="97" class="net_7 width_1" style="stroke-width: 1"/><line x1="118" x2="118" y1="97" y2="47" class="net_7 width_1" style="stroke-width: 1"/><line x1="118" x2="145.66666666666666" y1="47" y2="47" class="net_7 width_1" style="stroke-width: 1"/><line x1="173.66666666666666" x2="211" y1="39.5" y2="39.5" class="net_9 width_1" style="stroke-width: 1"/><line x1="171" x2="184" y1="162" y2="162" class="net_8 width_1" style="stroke-width: 1"/><line x1="184" x2="184" y1="162" y2="54.5" class="net_8 width_1" style="stroke-width: 1"/><line x1="184" x2="211" y1="54.5" y2="54.5" class="net_8 width_1" style="stroke-width: 1"/><line x1="239" x2="274" y1="47" y2="47" class="net_3 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file

diff --git a/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_1.rst b/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_1.rst
index 340ca3b..fbcfdfd 100644
--- a/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_1.rst
+++ b/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__nand3_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__nand3_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__nand3.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__nand3_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__nand3_1 layout**

diff --git a/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_1.schematic.png b/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_1.schematic.png
deleted file mode 100644
index ef9d64c..0000000
--- a/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_2.rst b/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_2.rst
index 34b8ec2..9a1bfb7 100644
--- a/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_2.rst
+++ b/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__nand3_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__nand3_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__nand3.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__nand3_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__nand3_2 layout**

diff --git a/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_2.schematic.png b/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_2.schematic.png
deleted file mode 100644
index ef9d64c..0000000
--- a/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_4.rst b/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_4.rst
index 2362ac9..6a2e9ca 100644
--- a/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_4.rst
+++ b/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__nand3_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__nand3_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__nand3.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__nand3_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__nand3_4 layout**

diff --git a/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_4.schematic.png b/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_4.schematic.png
deleted file mode 100644
index ef9d64c..0000000
--- a/cells/nand3/gf180mcu_fd_sc_mcu9t5v0__nand3_4.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4.schematic.svg b/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4.schematic.svg
new file mode 100644
index 0000000..285bae1
--- /dev/null
+++ b/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="382" height="249"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="not" transform="translate(78,22)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nand4.v:0$4"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nand4.v:0$4"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nand4.v:0$4"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(78,87)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nand4.v:0$5"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nand4.v:0$5"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nand4.v:0$5"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(144,152)" s:width="30" s:height="20" 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val="$_OR_"/><s:alias val="$reduce_or"/><s:alias val="$reduce_bool"/><path d="M0,0 A30 25 0 0 1 0,25 A30 25 0 0 0 30,12.5 A30 25 0 0 0 0,0" class="cell_$or$gf180mcu_fd_sc_mcu9t5v0__nand4.v:38$1"/><g s:x="2" s:y="5" s:pid="A"/><g s:x="2" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="or" transform="translate(209.66666666666666,34.5)" s:width="30" s:height="25" id="cell_$or$gf180mcu_fd_sc_mcu9t5v0__nand4.v:38$2"><s:alias val="$or"/><s:alias val="$logic_or"/><s:alias val="$_OR_"/><s:alias val="$reduce_or"/><s:alias val="$reduce_bool"/><path d="M0,0 A30 25 0 0 1 0,25 A30 25 0 0 0 30,12.5 A30 25 0 0 0 0,0" class="cell_$or$gf180mcu_fd_sc_mcu9t5v0__nand4.v:38$2"/><g s:x="2" s:y="5" s:pid="A"/><g s:x="2" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="or" transform="translate(275,42)" s:width="30" s:height="25" id="cell_$or$gf180mcu_fd_sc_mcu9t5v0__nand4.v:38$3"><s:alias val="$or"/><s:alias val="$logic_or"/><s:alias val="$_OR_"/><s:alias val="$reduce_or"/><s:alias val="$reduce_bool"/><path d="M0,0 A30 25 0 0 1 0,25 A30 25 0 0 0 30,12.5 A30 25 0 0 0 0,0" class="cell_$or$gf180mcu_fd_sc_mcu9t5v0__nand4.v:38$3"/><g s:x="2" s:y="5" s:pid="A"/><g s:x="2" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="inputExt" transform="translate(144,217)" s:width="30" s:height="20" id="cell_A4"><text x="15" y="-4" class="nodelabel cell_A4" s:attribute="ref">A4</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A4"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(340,44.5)" s:width="30" s:height="20" id="cell_ZN"><text x="15" y="-4" class="nodelabel cell_ZN" s:attribute="ref">ZN</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_ZN"/><g s:x="0" s:y="10" s:pid="A"/></g><g s:type="inputExt" transform="translate(78,152)" s:width="30" s:height="20" id="cell_A3"><text x="15" y="-4" class="nodelabel cell_A3" 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\ No newline at end of file

diff --git a/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_1.rst b/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_1.rst
index b6a0b8a..0ba0d91 100644
--- a/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_1.rst
+++ b/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__nand4_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__nand4_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__nand4.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__nand4_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__nand4_1 layout**

diff --git a/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_1.schematic.png b/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_1.schematic.png
deleted file mode 100644
index 2816b71..0000000
--- a/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_2.rst b/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_2.rst
index eadf831..eacc796 100644
--- a/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_2.rst
+++ b/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__nand4_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__nand4_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__nand4.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__nand4_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__nand4_2 layout**

diff --git a/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_2.schematic.png b/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_2.schematic.png
deleted file mode 100644
index 2816b71..0000000
--- a/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_4.rst b/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_4.rst
index c61769b..4e31e2d 100644
--- a/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_4.rst
+++ b/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__nand4_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__nand4_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__nand4.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__nand4_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__nand4_4 layout**

diff --git a/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_4.schematic.png b/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_4.schematic.png
deleted file mode 100644
index 2816b71..0000000
--- a/cells/nand4/gf180mcu_fd_sc_mcu9t5v0__nand4_4.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2.schematic.svg b/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2.schematic.svg
new file mode 100644
index 0000000..4339758
--- /dev/null
+++ b/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="250" height="119"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="and" transform="translate(143,27)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__nor2.v:30$1"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__nor2.v:30$1"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="not" transform="translate(78,22)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nor2.v:0$2"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nor2.v:0$2"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nor2.v:0$2"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(78,87)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nor2.v:0$3"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nor2.v:0$3"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nor2.v:0$3"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,87)" s:width="30" s:height="20" id="cell_A2"><text x="15" y="-4" class="nodelabel cell_A2" s:attribute="ref">A2</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A2"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(208,29.5)" s:width="30" s:height="20" id="cell_ZN"><text x="15" y="-4" class="nodelabel cell_ZN" s:attribute="ref">ZN</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_ZN"/><g s:x="0" s:y="10" s:pid="A"/></g><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_A1"><text x="15" y="-4" class="nodelabel cell_A1" s:attribute="ref">A1</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A1"/><g s:x="30" s:y="10" s:pid="Y"/></g><line x1="105" x2="143" y1="32" y2="32" class="net_5 width_1" style="stroke-width: 1"/><line x1="105" x2="118" y1="97" y2="97" class="net_6 width_1" style="stroke-width: 1"/><line x1="118" x2="118" y1="97" y2="47" class="net_6 width_1" style="stroke-width: 1"/><line x1="118" x2="143" y1="47" y2="47" class="net_6 width_1" style="stroke-width: 1"/><line x1="42" x2="77" y1="32" y2="32" class="net_4 width_1" style="stroke-width: 1"/><line x1="42" x2="77" y1="97" y2="97" class="net_2 width_1" style="stroke-width: 1"/><line x1="173" x2="208" y1="39.5" y2="39.5" class="net_3 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file

diff --git a/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_1.rst b/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_1.rst
index b3842b1..c81e886 100644
--- a/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_1.rst
+++ b/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__nor2_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__nor2_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__nor2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__nor2_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__nor2_1 layout**

diff --git a/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_1.schematic.png b/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_1.schematic.png
deleted file mode 100644
index cc8a0fc..0000000
--- a/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_2.rst b/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_2.rst
index a0d9b1e..399be4f 100644
--- a/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_2.rst
+++ b/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__nor2_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__nor2_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__nor2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__nor2_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__nor2_2 layout**

diff --git a/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_2.schematic.png b/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_2.schematic.png
deleted file mode 100644
index cc8a0fc..0000000
--- a/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_4.rst b/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_4.rst
index af65d81..8695b1d 100644
--- a/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_4.rst
+++ b/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__nor2_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__nor2_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__nor2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__nor2_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__nor2_4 layout**

diff --git a/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_4.schematic.png b/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_4.schematic.png
deleted file mode 100644
index cc8a0fc..0000000
--- a/cells/nor2/gf180mcu_fd_sc_mcu9t5v0__nor2_4.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3.schematic.svg b/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3.schematic.svg
new file mode 100644
index 0000000..f2a15a4
--- /dev/null
+++ b/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="316" height="184"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="and" transform="translate(143.66666666666666,27)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__nor3.v:34$1"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__nor3.v:34$1"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="and" transform="translate(209,34.5)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__nor3.v:34$2"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__nor3.v:34$2"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="not" transform="translate(78,22)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nor3.v:0$3"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nor3.v:0$3"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nor3.v:0$3"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(78,87)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nor3.v:0$4"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nor3.v:0$4"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nor3.v:0$4"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(144,152)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nor3.v:0$5"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nor3.v:0$5"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nor3.v:0$5"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(78,152)" s:width="30" s:height="20" id="cell_A3"><text x="15" y="-4" class="nodelabel cell_A3" s:attribute="ref">A3</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A3"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(274,37)" s:width="30" s:height="20" id="cell_ZN"><text x="15" y="-4" class="nodelabel cell_ZN" s:attribute="ref">ZN</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_ZN"/><g s:x="0" s:y="10" s:pid="A"/></g><g s:type="inputExt" transform="translate(12,87)" s:width="30" s:height="20" id="cell_A2"><text x="15" y="-4" class="nodelabel cell_A2" s:attribute="ref">A2</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A2"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_A1"><text x="15" y="-4" class="nodelabel cell_A1" s:attribute="ref">A1</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A1"/><g s:x="30" s:y="10" s:pid="Y"/></g><line x1="105" x2="143.66666666666666" y1="32" y2="32" class="net_6 width_1" style="stroke-width: 1"/><line x1="105" x2="118" y1="97" y2="97" class="net_7 width_1" style="stroke-width: 1"/><line x1="118" x2="118" y1="97" y2="47" class="net_7 width_1" style="stroke-width: 1"/><line x1="118" x2="143.66666666666666" y1="47" y2="47" class="net_7 width_1" style="stroke-width: 1"/><line x1="173.66666666666666" x2="209" y1="39.5" y2="39.5" class="net_8 width_1" style="stroke-width: 1"/><line x1="171" x2="184" y1="162" y2="162" class="net_9 width_1" style="stroke-width: 1"/><line x1="184" x2="184" y1="162" y2="54.5" class="net_9 width_1" style="stroke-width: 1"/><line x1="184" x2="209" y1="54.5" y2="54.5" class="net_9 width_1" style="stroke-width: 1"/><line x1="42" x2="77" y1="32" y2="32" class="net_5 width_1" style="stroke-width: 1"/><line x1="42" x2="77" y1="97" y2="97" class="net_4 width_1" style="stroke-width: 1"/><line x1="108" x2="143" y1="162" y2="162" class="net_2 width_1" style="stroke-width: 1"/><line x1="239" x2="274" y1="47" y2="47" class="net_3 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file

diff --git a/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_1.rst b/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_1.rst
index b9abc43..8f2a69f 100644
--- a/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_1.rst
+++ b/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__nor3_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__nor3_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__nor3.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__nor3_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__nor3_1 layout**

diff --git a/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_1.schematic.png b/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_1.schematic.png
deleted file mode 100644
index 40c2ac4..0000000
--- a/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_2.rst b/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_2.rst
index fe9fdb3..b38b8a7 100644
--- a/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_2.rst
+++ b/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__nor3_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__nor3_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__nor3.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__nor3_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__nor3_2 layout**

diff --git a/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_2.schematic.png b/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_2.schematic.png
deleted file mode 100644
index 40c2ac4..0000000
--- a/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_4.rst b/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_4.rst
index f8db624..ffbcc22 100644
--- a/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_4.rst
+++ b/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__nor3_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__nor3_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__nor3.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__nor3_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__nor3_4 layout**

diff --git a/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_4.schematic.png b/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_4.schematic.png
deleted file mode 100644
index 40c2ac4..0000000
--- a/cells/nor3/gf180mcu_fd_sc_mcu9t5v0__nor3_4.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4.schematic.svg b/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4.schematic.svg
new file mode 100644
index 0000000..1d696b2
--- /dev/null
+++ b/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="382" height="249"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="and" transform="translate(143.66666666666666,27)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__nor4.v:38$1"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__nor4.v:38$1"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="and" transform="translate(209.66666666666666,34.5)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__nor4.v:38$2"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__nor4.v:38$2"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="and" transform="translate(275,42)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__nor4.v:38$3"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__nor4.v:38$3"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="not" transform="translate(78,22)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nor4.v:0$4"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nor4.v:0$4"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nor4.v:0$4"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(78,87)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nor4.v:0$5"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 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class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__nor4.v:0$7"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(144,217)" s:width="30" s:height="20" id="cell_A4"><text x="15" y="-4" class="nodelabel cell_A4" s:attribute="ref">A4</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A4"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(340,44.5)" s:width="30" s:height="20" id="cell_ZN"><text x="15" y="-4" class="nodelabel cell_ZN" s:attribute="ref">ZN</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_ZN"/><g s:x="0" s:y="10" s:pid="A"/></g><g s:type="inputExt" transform="translate(78,152)" s:width="30" s:height="20" id="cell_A3"><text x="15" y="-4" class="nodelabel cell_A3" s:attribute="ref">A3</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A3"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,87)" s:width="30" s:height="20" id="cell_A2"><text x="15" y="-4" class="nodelabel cell_A2" s:attribute="ref">A2</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A2"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_A1"><text x="15" y="-4" class="nodelabel cell_A1" s:attribute="ref">A1</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A1"/><g s:x="30" s:y="10" s:pid="Y"/></g><line x1="105" x2="143.66666666666666" y1="32" y2="32" class="net_7 width_1" style="stroke-width: 1"/><line x1="105" x2="118" y1="97" y2="97" class="net_8 width_1" style="stroke-width: 1"/><line x1="118" x2="118" y1="97" y2="47" class="net_8 width_1" style="stroke-width: 1"/><line x1="118" x2="143.66666666666666" y1="47" y2="47" class="net_8 width_1" style="stroke-width: 1"/><line x1="173.66666666666666" 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style="stroke-width: 1"/><line x1="174" x2="209" y1="227" y2="227" class="net_2 width_1" style="stroke-width: 1"/><line x1="305" x2="340" y1="54.5" y2="54.5" class="net_3 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file

diff --git a/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_1.rst b/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_1.rst
index 17c0f87..b9b6cc4 100644
--- a/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_1.rst
+++ b/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__nor4_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__nor4_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__nor4.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__nor4_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__nor4_1 layout**

diff --git a/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_1.schematic.png b/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_1.schematic.png
deleted file mode 100644
index 314705d..0000000
--- a/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_2.rst b/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_2.rst
index ad103ff..95b7fd8 100644
--- a/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_2.rst
+++ b/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__nor4_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__nor4_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__nor4.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__nor4_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__nor4_2 layout**

diff --git a/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_2.schematic.png b/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_2.schematic.png
deleted file mode 100644
index 314705d..0000000
--- a/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_4.rst b/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_4.rst
index ce89f3b..30953d7 100644
--- a/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_4.rst
+++ b/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__nor4_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__nor4_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__nor4.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__nor4_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__nor4_4 layout**

diff --git a/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_4.schematic.png b/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_4.schematic.png
deleted file mode 100644
index 314705d..0000000
--- a/cells/nor4/gf180mcu_fd_sc_mcu9t5v0__nor4_4.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21.schematic.svg b/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21.schematic.svg
new file mode 100644
index 0000000..9f5a591
--- /dev/null
+++ b/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="316" height="184"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="and" transform="translate(143.66666666666666,27)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__oai21.v:32$1"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__oai21.v:32$1"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="not" transform="translate(78,22)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai21.v:0$3"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai21.v:0$3"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai21.v:0$3"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(78,87)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai21.v:0$4"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai21.v:0$4"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai21.v:0$4"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(144,152)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai21.v:0$5"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai21.v:0$5"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai21.v:0$5"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="or" transform="translate(209,34.5)" s:width="30" s:height="25" id="cell_$or$gf180mcu_fd_sc_mcu9t5v0__oai21.v:38$2"><s:alias val="$or"/><s:alias val="$logic_or"/><s:alias val="$_OR_"/><s:alias val="$reduce_or"/><s:alias val="$reduce_bool"/><path d="M0,0 A30 25 0 0 1 0,25 A30 25 0 0 0 30,12.5 A30 25 0 0 0 0,0" class="cell_$or$gf180mcu_fd_sc_mcu9t5v0__oai21.v:38$2"/><g s:x="2" s:y="5" s:pid="A"/><g s:x="2" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,87)" s:width="30" s:height="20" id="cell_A2"><text x="15" y="-4" class="nodelabel cell_A2" s:attribute="ref">A2</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A2"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(274,37)" s:width="30" s:height="20" id="cell_ZN"><text x="15" y="-4" class="nodelabel cell_ZN" s:attribute="ref">ZN</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_ZN"/><g s:x="0" s:y="10" s:pid="A"/></g><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_A1"><text x="15" y="-4" class="nodelabel cell_A1" s:attribute="ref">A1</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A1"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(78,152)" s:width="30" s:height="20" id="cell_B"><text x="15" y="-4" class="nodelabel cell_B" s:attribute="ref">B</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_B"/><g s:x="30" s:y="10" s:pid="Y"/></g><line x1="105" x2="143.66666666666666" y1="32" y2="32" class="net_6 width_1" style="stroke-width: 1"/><line x1="105" x2="118" y1="97" y2="97" class="net_7 width_1" style="stroke-width: 1"/><line x1="118" x2="118" y1="97" y2="47" class="net_7 width_1" style="stroke-width: 1"/><line x1="118" x2="143.66666666666666" y1="47" y2="47" class="net_7 width_1" style="stroke-width: 1"/><line x1="42" x2="77" y1="32" y2="32" class="net_4 width_1" style="stroke-width: 1"/><line x1="42" x2="77" y1="97" y2="97" class="net_2 width_1" style="stroke-width: 1"/><line x1="108" x2="143" y1="162" y2="162" class="net_5 width_1" style="stroke-width: 1"/><line x1="173.66666666666666" x2="211" y1="39.5" y2="39.5" class="net_8 width_1" style="stroke-width: 1"/><line x1="171" x2="184" y1="162" y2="162" class="net_9 width_1" style="stroke-width: 1"/><line x1="184" x2="184" y1="162" y2="54.5" class="net_9 width_1" style="stroke-width: 1"/><line x1="184" x2="211" y1="54.5" y2="54.5" class="net_9 width_1" style="stroke-width: 1"/><line x1="239" x2="274" y1="47" y2="47" class="net_3 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file

diff --git a/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_1.rst b/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_1.rst
index 23fecd9..b93181f 100644
--- a/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_1.rst
+++ b/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__oai21_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai21_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai21.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai21_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai21_1 layout**

diff --git a/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_1.schematic.png b/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_1.schematic.png
deleted file mode 100644
index f95472c..0000000
--- a/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_2.rst b/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_2.rst
index b93ed8c..00202a9 100644
--- a/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_2.rst
+++ b/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__oai21_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai21_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai21.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai21_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai21_2 layout**

diff --git a/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_2.schematic.png b/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_2.schematic.png
deleted file mode 100644
index f95472c..0000000
--- a/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_4.rst b/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_4.rst
index fc2b64a..f21766a 100644
--- a/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_4.rst
+++ b/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__oai21_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai21_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai21.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai21_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai21_4 layout**

diff --git a/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_4.schematic.png b/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_4.schematic.png
deleted file mode 100644
index f95472c..0000000
--- a/cells/oai21/gf180mcu_fd_sc_mcu9t5v0__oai21_4.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211.schematic.svg b/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211.schematic.svg
new file mode 100644
index 0000000..4aca3e0
--- /dev/null
+++ b/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="382" height="249"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="and" transform="translate(143.66666666666666,27)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__oai211.v:32$1"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__oai211.v:32$1"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="not" transform="translate(78,22)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai211.v:0$4"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai211.v:0$4"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai211.v:0$4"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(78,87)" s:width="30" s:height="20" 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val="$reduce_bool"/><path d="M0,0 A30 25 0 0 1 0,25 A30 25 0 0 0 30,12.5 A30 25 0 0 0 0,0" class="cell_$or$gf180mcu_fd_sc_mcu9t5v0__oai211.v:42$3"/><g s:x="2" s:y="5" s:pid="A"/><g s:x="2" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,87)" s:width="30" s:height="20" id="cell_A2"><text x="15" y="-4" class="nodelabel cell_A2" s:attribute="ref">A2</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A2"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(340,44.5)" s:width="30" s:height="20" id="cell_ZN"><text x="15" y="-4" class="nodelabel cell_ZN" s:attribute="ref">ZN</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_ZN"/><g s:x="0" s:y="10" s:pid="A"/></g><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_A1"><text x="15" y="-4" class="nodelabel cell_A1" s:attribute="ref">A1</text><s:alias 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\ No newline at end of file

diff --git a/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_1.rst b/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_1.rst
index 8b591e4..ceaaadc 100644
--- a/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_1.rst
+++ b/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__oai211_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai211_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai211.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai211_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai211_1 layout**

diff --git a/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_1.schematic.png b/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_1.schematic.png
deleted file mode 100644
index 0382fcc..0000000
--- a/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_2.rst b/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_2.rst
index c44d101..b919ee6 100644
--- a/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_2.rst
+++ b/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__oai211_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai211_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai211.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai211_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai211_2 layout**

diff --git a/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_2.schematic.png b/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_2.schematic.png
deleted file mode 100644
index 0382fcc..0000000
--- a/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_4.rst b/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_4.rst
index 4036a3f..6fbd01f 100644
--- a/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_4.rst
+++ b/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__oai211_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai211_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai211.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai211_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai211_4 layout**

diff --git a/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_4.schematic.png b/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_4.schematic.png
deleted file mode 100644
index 0382fcc..0000000
--- a/cells/oai211/gf180mcu_fd_sc_mcu9t5v0__oai211_4.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22.schematic.svg b/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22.schematic.svg
new file mode 100644
index 0000000..ec5203c
--- /dev/null
+++ b/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="315" height="249"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="and" transform="translate(143,27)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__oai22.v:32$1"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__oai22.v:32$1"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="and" transform="translate(143,157)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__oai22.v:44$2"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__oai22.v:44$2"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="not" transform="translate(78,22)" s:width="30" s:height="20" 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d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai22.v:0$6"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai22.v:0$6"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(78,217)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai22.v:0$7"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai22.v:0$7"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai22.v:0$7"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="or" transform="translate(208,34.5)" s:width="30" s:height="25" id="cell_$or$gf180mcu_fd_sc_mcu9t5v0__oai22.v:46$3"><s:alias val="$or"/><s:alias val="$logic_or"/><s:alias val="$_OR_"/><s:alias val="$reduce_or"/><s:alias val="$reduce_bool"/><path d="M0,0 A30 25 0 0 1 0,25 A30 25 0 0 0 30,12.5 A30 25 0 0 0 0,0" class="cell_$or$gf180mcu_fd_sc_mcu9t5v0__oai22.v:46$3"/><g s:x="2" s:y="5" s:pid="A"/><g s:x="2" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,217)" s:width="30" s:height="20" id="cell_B2"><text x="15" y="-4" class="nodelabel cell_B2" s:attribute="ref">B2</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_B2"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,152)" s:width="30" s:height="20" id="cell_B1"><text x="15" y="-4" class="nodelabel cell_B1" s:attribute="ref">B1</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_B1"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(273,37)" s:width="30" s:height="20" id="cell_ZN"><text x="15" y="-4" class="nodelabel cell_ZN" s:attribute="ref">ZN</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_ZN"/><g s:x="0" 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\ No newline at end of file

diff --git a/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_1.rst b/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_1.rst
index f1539d7..9e55b65 100644
--- a/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_1.rst
+++ b/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__oai22_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai22_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai22.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai22_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai22_1 layout**

diff --git a/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_1.schematic.png b/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_1.schematic.png
deleted file mode 100644
index 76be4ee..0000000
--- a/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_2.rst b/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_2.rst
index f0a3f91..b062459 100644
--- a/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_2.rst
+++ b/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__oai22_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai22_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai22.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai22_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai22_2 layout**

diff --git a/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_2.schematic.png b/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_2.schematic.png
deleted file mode 100644
index 76be4ee..0000000
--- a/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_4.rst b/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_4.rst
index 274008b..f06314c 100644
--- a/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_4.rst
+++ b/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__oai22_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai22_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai22.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai22_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai22_4 layout**

diff --git a/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_4.schematic.png b/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_4.schematic.png
deleted file mode 100644
index 76be4ee..0000000
--- a/cells/oai22/gf180mcu_fd_sc_mcu9t5v0__oai22_4.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221.schematic.svg b/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221.schematic.svg
new file mode 100644
index 0000000..51565e2
--- /dev/null
+++ b/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="381" height="259"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="and" transform="translate(143,27)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__oai221.v:32$1"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__oai221.v:32$1"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="and" transform="translate(143,157)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__oai221.v:44$2"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__oai221.v:44$2"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="not" transform="translate(78,22)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai221.v:0$5"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai221.v:0$5"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai221.v:0$5"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(78,87)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai221.v:0$6"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai221.v:0$6"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai221.v:0$6"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(78,152)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai221.v:0$7"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai221.v:0$7"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai221.v:0$7"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(78,217)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai221.v:0$8"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai221.v:0$8"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai221.v:0$8"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(209,227)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai221.v:0$9"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai221.v:0$9"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai221.v:0$9"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="or" transform="translate(208.66666666666666,34.5)" s:width="30" s:height="25" id="cell_$or$gf180mcu_fd_sc_mcu9t5v0__oai221.v:50$3"><s:alias val="$or"/><s:alias val="$logic_or"/><s:alias val="$_OR_"/><s:alias val="$reduce_or"/><s:alias val="$reduce_bool"/><path d="M0,0 A30 25 0 0 1 0,25 A30 25 0 0 0 30,12.5 A30 25 0 0 0 0,0" class="cell_$or$gf180mcu_fd_sc_mcu9t5v0__oai221.v:50$3"/><g s:x="2" s:y="5" s:pid="A"/><g s:x="2" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="or" transform="translate(274,42)" s:width="30" s:height="25" id="cell_$or$gf180mcu_fd_sc_mcu9t5v0__oai221.v:50$4"><s:alias val="$or"/><s:alias val="$logic_or"/><s:alias val="$_OR_"/><s:alias val="$reduce_or"/><s:alias val="$reduce_bool"/><path d="M0,0 A30 25 0 0 1 0,25 A30 25 0 0 0 30,12.5 A30 25 0 0 0 0,0" class="cell_$or$gf180mcu_fd_sc_mcu9t5v0__oai221.v:50$4"/><g s:x="2" s:y="5" s:pid="A"/><g s:x="2" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,217)" s:width="30" s:height="20" id="cell_B2"><text x="15" y="-4" class="nodelabel cell_B2" s:attribute="ref">B2</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_B2"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,152)" s:width="30" s:height="20" id="cell_B1"><text x="15" y="-4" class="nodelabel cell_B1" s:attribute="ref">B1</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_B1"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(339,44.5)" s:width="30" s:height="20" id="cell_ZN"><text x="15" y="-4" class="nodelabel cell_ZN" s:attribute="ref">ZN</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_ZN"/><g s:x="0" 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\ No newline at end of file

diff --git a/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_1.rst b/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_1.rst
index 7420dbc..dcc1f6d 100644
--- a/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_1.rst
+++ b/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__oai221_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai221_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai221.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai221_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai221_1 layout**

diff --git a/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_1.schematic.png b/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_1.schematic.png
deleted file mode 100644
index c75021d..0000000
--- a/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_2.rst b/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_2.rst
index e95aa6f..8c3e7c0 100644
--- a/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_2.rst
+++ b/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__oai221_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai221_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai221.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai221_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai221_2 layout**

diff --git a/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_2.schematic.png b/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_2.schematic.png
deleted file mode 100644
index c75021d..0000000
--- a/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_4.rst b/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_4.rst
index 84a7381..af7cd42 100644
--- a/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_4.rst
+++ b/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__oai221_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai221_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai221.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai221_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai221_4 layout**

diff --git a/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_4.schematic.png b/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_4.schematic.png
deleted file mode 100644
index c75021d..0000000
--- a/cells/oai221/gf180mcu_fd_sc_mcu9t5v0__oai221_4.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222.schematic.svg b/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222.schematic.svg
new file mode 100644
index 0000000..cc35b65
--- /dev/null
+++ b/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="381" height="379"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="and" transform="translate(143.66666666666666,27)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__oai222.v:32$1"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__oai222.v:32$1"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="and" transform="translate(143.66666666666666,157)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__oai222.v:44$2"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__oai222.v:44$2"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="and" transform="translate(209,287)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__oai222.v:56$3"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__oai222.v:56$3"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="not" transform="translate(144,282)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai222.v:0$10"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai222.v:0$10"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai222.v:0$10"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(144,347)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai222.v:0$11"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai222.v:0$11"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai222.v:0$11"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(78,22)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai222.v:0$6"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai222.v:0$6"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai222.v:0$6"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(78,87)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai222.v:0$7"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai222.v:0$7"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai222.v:0$7"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(78,152)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai222.v:0$8"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai222.v:0$8"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai222.v:0$8"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="not" transform="translate(78,217)" s:width="30" s:height="20" id="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai222.v:0$9"><s:alias val="$_NOT_"/><s:alias val="$not"/><s:alias val="$logic_not"/><path d="M0,0 L0,20 L20,10 Z" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai222.v:0$9"/><circle cx="24" cy="10" r="3" class="cell_$not$gf180mcu_fd_sc_mcu9t5v0__oai222.v:0$9"/><g s:x="-1" s:y="10" s:pid="A"/><g s:x="27" s:y="10" s:pid="Y"/></g><g s:type="or" transform="translate(209,34.5)" s:width="30" s:height="25" id="cell_$or$gf180mcu_fd_sc_mcu9t5v0__oai222.v:58$4"><s:alias val="$or"/><s:alias val="$logic_or"/><s:alias val="$_OR_"/><s:alias val="$reduce_or"/><s:alias val="$reduce_bool"/><path d="M0,0 A30 25 0 0 1 0,25 A30 25 0 0 0 30,12.5 A30 25 0 0 0 0,0" class="cell_$or$gf180mcu_fd_sc_mcu9t5v0__oai222.v:58$4"/><g s:x="2" s:y="5" s:pid="A"/><g s:x="2" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="or" transform="translate(274,42)" s:width="30" s:height="25" id="cell_$or$gf180mcu_fd_sc_mcu9t5v0__oai222.v:58$5"><s:alias val="$or"/><s:alias val="$logic_or"/><s:alias val="$_OR_"/><s:alias val="$reduce_or"/><s:alias val="$reduce_bool"/><path d="M0,0 A30 25 0 0 1 0,25 A30 25 0 0 0 30,12.5 A30 25 0 0 0 0,0" class="cell_$or$gf180mcu_fd_sc_mcu9t5v0__oai222.v:58$5"/><g s:x="2" s:y="5" s:pid="A"/><g s:x="2" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="inputExt" transform="translate(78,347)" s:width="30" s:height="20" id="cell_C2"><text x="15" y="-4" class="nodelabel cell_C2" s:attribute="ref">C2</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_C2"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(78,282)" s:width="30" s:height="20" id="cell_C1"><text x="15" y="-4" class="nodelabel cell_C1" s:attribute="ref">C1</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_C1"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(339,44.5)" s:width="30" s:height="20" id="cell_ZN"><text x="15" y="-4" class="nodelabel cell_ZN" s:attribute="ref">ZN</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_ZN"/><g s:x="0" s:y="10" s:pid="A"/></g><g s:type="inputExt" transform="translate(12,152)" s:width="30" s:height="20" id="cell_B1"><text x="15" y="-4" class="nodelabel cell_B1" s:attribute="ref">B1</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_B1"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,217)" s:width="30" s:height="20" id="cell_B2"><text x="15" y="-4" class="nodelabel cell_B2" s:attribute="ref">B2</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_B2"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,87)" s:width="30" s:height="20" id="cell_A2"><text x="15" y="-4" class="nodelabel cell_A2" s:attribute="ref">A2</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A2"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_A1"><text x="15" y="-4" class="nodelabel cell_A1" s:attribute="ref">A1</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A1"/><g s:x="30" s:y="10" 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\ No newline at end of file

diff --git a/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_1.rst b/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_1.rst
index fad296a..b62a2f5 100644
--- a/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_1.rst
+++ b/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__oai222_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai222_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai222.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai222_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai222_1 layout**

diff --git a/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_1.schematic.png b/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_1.schematic.png
deleted file mode 100644
index c67674b..0000000
--- a/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_2.rst b/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_2.rst
index 632a607..621e500 100644
--- a/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_2.rst
+++ b/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__oai222_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai222_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai222.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai222_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai222_2 layout**

diff --git a/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_2.schematic.png b/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_2.schematic.png
deleted file mode 100644
index c67674b..0000000
--- a/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_4.rst b/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_4.rst
index af9fe19..4023de0 100644
--- a/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_4.rst
+++ b/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__oai222_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai222_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai222.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai222_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai222_4 layout**

diff --git a/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_4.schematic.png b/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_4.schematic.png
deleted file mode 100644
index c67674b..0000000
--- a/cells/oai222/gf180mcu_fd_sc_mcu9t5v0__oai222_4.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31.schematic.svg b/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31.schematic.svg
new file mode 100644
index 0000000..ade34a2
--- /dev/null
+++ b/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="382" height="249"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="and" transform="translate(143.66666666666666,27)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__oai31.v:36$1"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__oai31.v:36$1"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="and" transform="translate(209.66666666666666,34.5)" s:width="30" s:height="25" id="cell_$and$gf180mcu_fd_sc_mcu9t5v0__oai31.v:36$2"><s:alias val="$and"/><s:alias val="$logic_and"/><s:alias val="$_AND_"/><s:alias val="$reduce_and"/><path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$gf180mcu_fd_sc_mcu9t5v0__oai31.v:36$2"/><g s:x="0" s:y="5" s:pid="A"/><g s:x="0" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="not" transform="translate(78,22)" s:width="30" s:height="20" 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diff --git a/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_1.rst b/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_1.rst
index d3f631f..1de6407 100644
--- a/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_1.rst
+++ b/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__oai31_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai31_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai31.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai31_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai31_1 layout**

diff --git a/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_1.schematic.png b/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_1.schematic.png
deleted file mode 100644
index f7bdfd6..0000000
--- a/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_2.rst b/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_2.rst
index c248ba7..77cf0fc 100644
--- a/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_2.rst
+++ b/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__oai31_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai31_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai31.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai31_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai31_2 layout**

diff --git a/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_2.schematic.png b/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_2.schematic.png
deleted file mode 100644
index f7bdfd6..0000000
--- a/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_4.rst b/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_4.rst
index a9763ef..78f6f0f 100644
--- a/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_4.rst
+++ b/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__oai31_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai31_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai31.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai31_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai31_4 layout**

diff --git a/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_4.schematic.png b/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_4.schematic.png
deleted file mode 100644
index f7bdfd6..0000000
--- a/cells/oai31/gf180mcu_fd_sc_mcu9t5v0__oai31_4.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32.schematic.svg b/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32.schematic.svg
new file mode 100644
index 0000000..c3a5d60
--- /dev/null
+++ b/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32.schematic.svg

@@ -0,0 +1,23 @@
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+}
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+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
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+  text-anchor: middle;
+}
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+  text-anchor: end;
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diff --git a/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_1.rst b/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_1.rst
index 25e069e..35e23c9 100644
--- a/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_1.rst
+++ b/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__oai32_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai32_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai32.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai32_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai32_1 layout**

diff --git a/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_1.schematic.png b/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_1.schematic.png
deleted file mode 100644
index 55a96a4..0000000
--- a/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_2.rst b/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_2.rst
index 2942d38..4041e23 100644
--- a/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_2.rst
+++ b/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__oai32_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai32_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai32.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai32_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai32_2 layout**

diff --git a/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_2.schematic.png b/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_2.schematic.png
deleted file mode 100644
index 55a96a4..0000000
--- a/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_4.rst b/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_4.rst
index 151de58..4807b47 100644
--- a/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_4.rst
+++ b/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__oai32_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai32_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai32.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai32_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai32_4 layout**

diff --git a/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_4.schematic.png b/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_4.schematic.png
deleted file mode 100644
index 55a96a4..0000000
--- a/cells/oai32/gf180mcu_fd_sc_mcu9t5v0__oai32_4.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33.schematic.svg b/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33.schematic.svg
new file mode 100644
index 0000000..c233516
--- /dev/null
+++ b/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33.schematic.svg

@@ -0,0 +1,23 @@
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+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
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\ No newline at end of file

diff --git a/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_1.rst b/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_1.rst
index e04c0d5..3d9b731 100644
--- a/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_1.rst
+++ b/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__oai33_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai33_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai33.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai33_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai33_1 layout**

diff --git a/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_1.schematic.png b/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_1.schematic.png
deleted file mode 100644
index bfc83f1..0000000
--- a/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_2.rst b/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_2.rst
index 8870c1e..52de455 100644
--- a/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_2.rst
+++ b/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__oai33_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai33_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai33.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai33_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai33_2 layout**

diff --git a/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_2.schematic.png b/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_2.schematic.png
deleted file mode 100644
index bfc83f1..0000000
--- a/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_4.rst b/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_4.rst
index 8a92628..026e4fb 100644
--- a/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_4.rst
+++ b/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__oai33_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__oai33_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__oai33.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__oai33_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__oai33_4 layout**

diff --git a/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_4.schematic.png b/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_4.schematic.png
deleted file mode 100644
index bfc83f1..0000000
--- a/cells/oai33/gf180mcu_fd_sc_mcu9t5v0__oai33_4.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2.schematic.svg b/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2.schematic.svg
new file mode 100644
index 0000000..a3c6976
--- /dev/null
+++ b/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="184" height="119"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="or" transform="translate(77,27)" s:width="30" s:height="25" id="cell_$or$gf180mcu_fd_sc_mcu9t5v0__or2.v:22$1"><s:alias val="$or"/><s:alias val="$logic_or"/><s:alias val="$_OR_"/><s:alias val="$reduce_or"/><s:alias val="$reduce_bool"/><path d="M0,0 A30 25 0 0 1 0,25 A30 25 0 0 0 30,12.5 A30 25 0 0 0 0,0" class="cell_$or$gf180mcu_fd_sc_mcu9t5v0__or2.v:22$1"/><g s:x="2" s:y="5" s:pid="A"/><g s:x="2" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_A1"><text x="15" y="-4" class="nodelabel cell_A1" s:attribute="ref">A1</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A1"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,87)" s:width="30" s:height="20" id="cell_A2"><text x="15" y="-4" class="nodelabel cell_A2" s:attribute="ref">A2</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A2"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(142,29.5)" s:width="30" s:height="20" id="cell_Z"><text x="15" y="-4" class="nodelabel cell_Z" s:attribute="ref">Z</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_Z"/><g s:x="0" s:y="10" s:pid="A"/></g><line x1="42" x2="79" y1="32" y2="32" class="net_2 width_1" style="stroke-width: 1"/><line x1="42" x2="52" y1="97" y2="97" class="net_3 width_1" style="stroke-width: 1"/><line x1="52" x2="52" y1="97" y2="47" class="net_3 width_1" style="stroke-width: 1"/><line x1="52" x2="79" y1="47" y2="47" class="net_3 width_1" style="stroke-width: 1"/><line x1="107" x2="142" y1="39.5" y2="39.5" class="net_4 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file

diff --git a/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_1.rst b/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_1.rst
index c1a0d6a..edfb9d3 100644
--- a/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_1.rst
+++ b/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__or2_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__or2_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__or2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__or2_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__or2_1 layout**

diff --git a/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_1.schematic.png b/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_1.schematic.png
deleted file mode 100644
index 5451752..0000000
--- a/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_2.rst b/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_2.rst
index 32a6b19..d54e058 100644
--- a/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_2.rst
+++ b/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__or2_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__or2_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__or2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__or2_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__or2_2 layout**

diff --git a/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_2.schematic.png b/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_2.schematic.png
deleted file mode 100644
index 5451752..0000000
--- a/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_4.rst b/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_4.rst
index 6a3dcab..fc2aef4 100644
--- a/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_4.rst
+++ b/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__or2_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__or2_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__or2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__or2_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__or2_4 layout**

diff --git a/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_4.schematic.png b/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_4.schematic.png
deleted file mode 100644
index 5451752..0000000
--- a/cells/or2/gf180mcu_fd_sc_mcu9t5v0__or2_4.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3.schematic.svg b/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3.schematic.svg
new file mode 100644
index 0000000..d8a26d5
--- /dev/null
+++ b/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="249" height="129"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
+}</style><g s:type="or" transform="translate(77,27)" s:width="30" s:height="25" id="cell_$or$gf180mcu_fd_sc_mcu9t5v0__or3.v:22$1"><s:alias val="$or"/><s:alias val="$logic_or"/><s:alias val="$_OR_"/><s:alias val="$reduce_or"/><s:alias val="$reduce_bool"/><path d="M0,0 A30 25 0 0 1 0,25 A30 25 0 0 0 30,12.5 A30 25 0 0 0 0,0" class="cell_$or$gf180mcu_fd_sc_mcu9t5v0__or3.v:22$1"/><g s:x="2" s:y="5" s:pid="A"/><g s:x="2" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="or" transform="translate(142,34.5)" s:width="30" s:height="25" id="cell_$or$gf180mcu_fd_sc_mcu9t5v0__or3.v:22$2"><s:alias val="$or"/><s:alias val="$logic_or"/><s:alias val="$_OR_"/><s:alias val="$reduce_or"/><s:alias val="$reduce_bool"/><path d="M0,0 A30 25 0 0 1 0,25 A30 25 0 0 0 30,12.5 A30 25 0 0 0 0,0" class="cell_$or$gf180mcu_fd_sc_mcu9t5v0__or3.v:22$2"/><g s:x="2" s:y="5" s:pid="A"/><g s:x="2" s:y="20" s:pid="B"/><g s:x="30" s:y="12.5" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_A1"><text x="15" y="-4" class="nodelabel cell_A1" s:attribute="ref">A1</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A1"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(12,87)" s:width="30" s:height="20" id="cell_A2"><text x="15" y="-4" class="nodelabel cell_A2" s:attribute="ref">A2</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A2"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="inputExt" transform="translate(77,97)" s:width="30" s:height="20" id="cell_A3"><text x="15" y="-4" class="nodelabel cell_A3" s:attribute="ref">A3</text><s:alias val="$_inputExt_"/><path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A3"/><g s:x="30" s:y="10" s:pid="Y"/></g><g s:type="outputExt" transform="translate(207,37)" s:width="30" s:height="20" id="cell_Z"><text x="15" y="-4" class="nodelabel cell_Z" s:attribute="ref">Z</text><s:alias val="$_outputExt_"/><path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_Z"/><g s:x="0" s:y="10" s:pid="A"/></g><line x1="42" x2="79" y1="32" y2="32" class="net_2 width_1" style="stroke-width: 1"/><line x1="42" x2="52" y1="97" y2="97" class="net_3 width_1" style="stroke-width: 1"/><line x1="52" x2="52" y1="97" y2="47" class="net_3 width_1" style="stroke-width: 1"/><line x1="52" x2="79" y1="47" y2="47" class="net_3 width_1" style="stroke-width: 1"/><line x1="107" x2="144" y1="39.5" y2="39.5" class="net_6 width_1" style="stroke-width: 1"/><line x1="107" x2="117" y1="107" y2="107" class="net_4 width_1" style="stroke-width: 1"/><line x1="117" x2="117" y1="107" y2="54.5" class="net_4 width_1" style="stroke-width: 1"/><line x1="117" x2="144" y1="54.5" y2="54.5" class="net_4 width_1" style="stroke-width: 1"/><line x1="172" x2="207" y1="47" y2="47" class="net_5 width_1" style="stroke-width: 1"/></svg>
\ No newline at end of file

diff --git a/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_1.rst b/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_1.rst
index e111f3f..a2f3044 100644
--- a/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_1.rst
+++ b/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__or3_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__or3_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__or3.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__or3_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__or3_1 layout**

diff --git a/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_1.schematic.png b/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_1.schematic.png
deleted file mode 100644
index 5914186..0000000
--- a/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_2.rst b/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_2.rst
index 660c05e..d63819a 100644
--- a/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_2.rst
+++ b/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__or3_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__or3_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__or3.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__or3_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__or3_2 layout**

diff --git a/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_2.schematic.png b/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_2.schematic.png
deleted file mode 100644
index 5914186..0000000
--- a/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_4.rst b/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_4.rst
index 8fef925..3857427 100644
--- a/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_4.rst
+++ b/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__or3_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__or3_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__or3.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__or3_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__or3_4 layout**

diff --git a/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_4.schematic.png b/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_4.schematic.png
deleted file mode 100644
index 5914186..0000000
--- a/cells/or3/gf180mcu_fd_sc_mcu9t5v0__or3_4.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4.schematic.svg b/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4.schematic.svg
new file mode 100644
index 0000000..2c363ab
--- /dev/null
+++ b/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4.schematic.svg

@@ -0,0 +1,23 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="314" height="136.5"><style>svg {
+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
+.splitjoinBody {
+  fill:#000;
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diff --git a/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_1.rst b/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_1.rst
index 5149cfe..b44cf16 100644
--- a/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_1.rst
+++ b/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__or4_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__or4_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__or4.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__or4_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__or4_1 layout**

diff --git a/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_1.schematic.png b/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_1.schematic.png
deleted file mode 100644
index 0d4d547..0000000
--- a/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_2.rst b/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_2.rst
index 9792b2b..0eb42ac 100644
--- a/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_2.rst
+++ b/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__or4_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__or4_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__or4.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__or4_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__or4_2 layout**

diff --git a/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_2.schematic.png b/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_2.schematic.png
deleted file mode 100644
index 0d4d547..0000000
--- a/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_4.rst b/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_4.rst
index 5b6c6cb..b847e27 100644
--- a/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_4.rst
+++ b/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__or4_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__or4_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__or4.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__or4_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__or4_4 layout**

diff --git a/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_4.schematic.png b/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_4.schematic.png
deleted file mode 100644
index 0d4d547..0000000
--- a/cells/or4/gf180mcu_fd_sc_mcu9t5v0__or4_4.schematic.png
+++ /dev/null
Binary files differ

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new file mode 100644
index 0000000..963ac41
--- /dev/null
+++ b/cells/sdffq/gf180mcu_fd_sc_mcu9t5v0__sdffq.schematic.svg

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+}
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+  font-size:10px;
+  font-weight: bold;
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+}
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+}
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diff --git a/cells/sdffq/gf180mcu_fd_sc_mcu9t5v0__sdffq_1.rst b/cells/sdffq/gf180mcu_fd_sc_mcu9t5v0__sdffq_1.rst
index 94e4d33..7782038 100644
--- a/cells/sdffq/gf180mcu_fd_sc_mcu9t5v0__sdffq_1.rst
+++ b/cells/sdffq/gf180mcu_fd_sc_mcu9t5v0__sdffq_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffq_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffq_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__sdffq_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffq_1 layout**

diff --git a/cells/sdffq/gf180mcu_fd_sc_mcu9t5v0__sdffq_2.rst b/cells/sdffq/gf180mcu_fd_sc_mcu9t5v0__sdffq_2.rst
index ebc1d51..17fc34e 100644
--- a/cells/sdffq/gf180mcu_fd_sc_mcu9t5v0__sdffq_2.rst
+++ b/cells/sdffq/gf180mcu_fd_sc_mcu9t5v0__sdffq_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffq_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffq_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__sdffq_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffq_2 layout**

diff --git a/cells/sdffq/gf180mcu_fd_sc_mcu9t5v0__sdffq_4.rst b/cells/sdffq/gf180mcu_fd_sc_mcu9t5v0__sdffq_4.rst
index a9f642a..c505e07 100644
--- a/cells/sdffq/gf180mcu_fd_sc_mcu9t5v0__sdffq_4.rst
+++ b/cells/sdffq/gf180mcu_fd_sc_mcu9t5v0__sdffq_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffq_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffq_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__sdffq_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffq_4 layout**

diff --git a/cells/sdffrnq/gf180mcu_fd_sc_mcu9t5v0__sdffrnq.schematic.svg b/cells/sdffrnq/gf180mcu_fd_sc_mcu9t5v0__sdffrnq.schematic.svg
new file mode 100644
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diff --git a/cells/sdffrnq/gf180mcu_fd_sc_mcu9t5v0__sdffrnq_1.rst b/cells/sdffrnq/gf180mcu_fd_sc_mcu9t5v0__sdffrnq_1.rst
index 252ae16..6a6ec6b 100644
--- a/cells/sdffrnq/gf180mcu_fd_sc_mcu9t5v0__sdffrnq_1.rst
+++ b/cells/sdffrnq/gf180mcu_fd_sc_mcu9t5v0__sdffrnq_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffrnq_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffrnq_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffrnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__sdffrnq_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffrnq_1 layout**

diff --git a/cells/sdffrnq/gf180mcu_fd_sc_mcu9t5v0__sdffrnq_2.rst b/cells/sdffrnq/gf180mcu_fd_sc_mcu9t5v0__sdffrnq_2.rst
index d4ab7db..3e9442a 100644
--- a/cells/sdffrnq/gf180mcu_fd_sc_mcu9t5v0__sdffrnq_2.rst
+++ b/cells/sdffrnq/gf180mcu_fd_sc_mcu9t5v0__sdffrnq_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffrnq_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffrnq_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffrnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__sdffrnq_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffrnq_2 layout**

diff --git a/cells/sdffrnq/gf180mcu_fd_sc_mcu9t5v0__sdffrnq_4.rst b/cells/sdffrnq/gf180mcu_fd_sc_mcu9t5v0__sdffrnq_4.rst
index 3470e58..cc713b8 100644
--- a/cells/sdffrnq/gf180mcu_fd_sc_mcu9t5v0__sdffrnq_4.rst
+++ b/cells/sdffrnq/gf180mcu_fd_sc_mcu9t5v0__sdffrnq_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffrnq_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffrnq_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffrnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__sdffrnq_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffrnq_4 layout**

diff --git a/cells/sdffrsnq/gf180mcu_fd_sc_mcu9t5v0__sdffrsnq.schematic.svg b/cells/sdffrsnq/gf180mcu_fd_sc_mcu9t5v0__sdffrsnq.schematic.svg
new file mode 100644
index 0000000..cce0d4a
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diff --git a/cells/sdffrsnq/gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_1.rst b/cells/sdffrsnq/gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_1.rst
index ded8867..7b7a891 100644
--- a/cells/sdffrsnq/gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_1.rst
+++ b/cells/sdffrsnq/gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffrsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_1 layout**

diff --git a/cells/sdffrsnq/gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_2.rst b/cells/sdffrsnq/gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_2.rst
index bc385b4..0cb6451 100644
--- a/cells/sdffrsnq/gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_2.rst
+++ b/cells/sdffrsnq/gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffrsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_2 layout**

diff --git a/cells/sdffrsnq/gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_4.rst b/cells/sdffrsnq/gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_4.rst
index b11a8e2..5e615ab 100644
--- a/cells/sdffrsnq/gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_4.rst
+++ b/cells/sdffrsnq/gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffrsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffrsnq_4 layout**

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new file mode 100644
index 0000000..33197b5
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diff --git a/cells/sdffsnq/gf180mcu_fd_sc_mcu9t5v0__sdffsnq_1.rst b/cells/sdffsnq/gf180mcu_fd_sc_mcu9t5v0__sdffsnq_1.rst
index d92a2a1..2de0edc 100644
--- a/cells/sdffsnq/gf180mcu_fd_sc_mcu9t5v0__sdffsnq_1.rst
+++ b/cells/sdffsnq/gf180mcu_fd_sc_mcu9t5v0__sdffsnq_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffsnq_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffsnq_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__sdffsnq_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffsnq_1 layout**

diff --git a/cells/sdffsnq/gf180mcu_fd_sc_mcu9t5v0__sdffsnq_2.rst b/cells/sdffsnq/gf180mcu_fd_sc_mcu9t5v0__sdffsnq_2.rst
index a96bdd3..deaabc1 100644
--- a/cells/sdffsnq/gf180mcu_fd_sc_mcu9t5v0__sdffsnq_2.rst
+++ b/cells/sdffsnq/gf180mcu_fd_sc_mcu9t5v0__sdffsnq_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffsnq_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffsnq_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__sdffsnq_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffsnq_2 layout**

diff --git a/cells/sdffsnq/gf180mcu_fd_sc_mcu9t5v0__sdffsnq_4.rst b/cells/sdffsnq/gf180mcu_fd_sc_mcu9t5v0__sdffsnq_4.rst
index 5554ba6..63355f5 100644
--- a/cells/sdffsnq/gf180mcu_fd_sc_mcu9t5v0__sdffsnq_4.rst
+++ b/cells/sdffsnq/gf180mcu_fd_sc_mcu9t5v0__sdffsnq_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffsnq_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffsnq_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__sdffsnq.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__sdffsnq_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__sdffsnq_4 layout**

diff --git a/cells/tieh/gf180mcu_fd_sc_mcu9t5v0__tieh.rst b/cells/tieh/gf180mcu_fd_sc_mcu9t5v0__tieh.rst
index bbbebb3..da02328 100644
--- a/cells/tieh/gf180mcu_fd_sc_mcu9t5v0__tieh.rst
+++ b/cells/tieh/gf180mcu_fd_sc_mcu9t5v0__tieh.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__tieh schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__tieh.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__tieh.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__tieh schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__tieh layout**

diff --git a/cells/tieh/gf180mcu_fd_sc_mcu9t5v0__tieh.schematic.png b/cells/tieh/gf180mcu_fd_sc_mcu9t5v0__tieh.schematic.png
deleted file mode 100644
index c119742..0000000
--- a/cells/tieh/gf180mcu_fd_sc_mcu9t5v0__tieh.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/tieh/gf180mcu_fd_sc_mcu9t5v0__tieh.schematic.svg b/cells/tieh/gf180mcu_fd_sc_mcu9t5v0__tieh.schematic.svg
new file mode 100644
index 0000000..95fdf51
--- /dev/null
+++ b/cells/tieh/gf180mcu_fd_sc_mcu9t5v0__tieh.schematic.svg

@@ -0,0 +1,23 @@
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+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
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+  font-size:10px;
+  font-weight: bold;
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+}
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diff --git a/cells/tiel/gf180mcu_fd_sc_mcu9t5v0__tiel.rst b/cells/tiel/gf180mcu_fd_sc_mcu9t5v0__tiel.rst
index 6eb0400..743c5af 100644
--- a/cells/tiel/gf180mcu_fd_sc_mcu9t5v0__tiel.rst
+++ b/cells/tiel/gf180mcu_fd_sc_mcu9t5v0__tiel.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__tiel schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__tiel.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__tiel.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__tiel schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__tiel layout**

diff --git a/cells/tiel/gf180mcu_fd_sc_mcu9t5v0__tiel.schematic.png b/cells/tiel/gf180mcu_fd_sc_mcu9t5v0__tiel.schematic.png
deleted file mode 100644
index 80d1863..0000000
--- a/cells/tiel/gf180mcu_fd_sc_mcu9t5v0__tiel.schematic.png
+++ /dev/null
Binary files differ

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new file mode 100644
index 0000000..11510dd
--- /dev/null
+++ b/cells/tiel/gf180mcu_fd_sc_mcu9t5v0__tiel.schematic.svg

@@ -0,0 +1,23 @@
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+}
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diff --git a/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2.schematic.svg b/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2.schematic.svg
new file mode 100644
index 0000000..9212d2f
--- /dev/null
+++ b/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2.schematic.svg

@@ -0,0 +1,23 @@
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+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
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+    stroke-linecap: round;
+}
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+  text-anchor: middle;
+}
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+}
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diff --git a/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_1.rst b/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_1.rst
index 2511c04..8766a64 100644
--- a/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_1.rst
+++ b/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__xnor2_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__xnor2_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__xnor2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__xnor2_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__xnor2_1 layout**

diff --git a/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_1.schematic.png b/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_1.schematic.png
deleted file mode 100644
index 16d11d5..0000000
--- a/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_2.rst b/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_2.rst
index 25ce541..33b6b69 100644
--- a/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_2.rst
+++ b/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__xnor2_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__xnor2_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__xnor2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__xnor2_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__xnor2_2 layout**

diff --git a/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_2.schematic.png b/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_2.schematic.png
deleted file mode 100644
index 16d11d5..0000000
--- a/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_4.rst b/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_4.rst
index 9c40c9c..95ae7d2 100644
--- a/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_4.rst
+++ b/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__xnor2_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__xnor2_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__xnor2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__xnor2_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__xnor2_4 layout**

diff --git a/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_4.schematic.png b/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_4.schematic.png
deleted file mode 100644
index 16d11d5..0000000
--- a/cells/xnor2/gf180mcu_fd_sc_mcu9t5v0__xnor2_4.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3.schematic.svg b/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3.schematic.svg
new file mode 100644
index 0000000..10ce9fa
--- /dev/null
+++ b/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3.schematic.svg

@@ -0,0 +1,23 @@
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+}
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+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
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+}
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diff --git a/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_1.rst b/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_1.rst
index 2e7cb98..de75ecc 100644
--- a/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_1.rst
+++ b/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__xnor3_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__xnor3_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__xnor3.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__xnor3_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__xnor3_1 layout**

diff --git a/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_1.schematic.png b/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_1.schematic.png
deleted file mode 100644
index a547030..0000000
--- a/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_2.rst b/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_2.rst
index 221737e..d4703de 100644
--- a/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_2.rst
+++ b/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__xnor3_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__xnor3_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__xnor3.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__xnor3_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__xnor3_2 layout**

diff --git a/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_2.schematic.png b/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_2.schematic.png
deleted file mode 100644
index a547030..0000000
--- a/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_4.rst b/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_4.rst
index 50e3fb2..c8bf6b5 100644
--- a/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_4.rst
+++ b/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__xnor3_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__xnor3_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__xnor3.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__xnor3_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__xnor3_4 layout**

diff --git a/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_4.schematic.png b/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_4.schematic.png
deleted file mode 100644
index a547030..0000000
--- a/cells/xnor3/gf180mcu_fd_sc_mcu9t5v0__xnor3_4.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2.schematic.svg b/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2.schematic.svg
new file mode 100644
index 0000000..c928259
--- /dev/null
+++ b/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2.schematic.svg

@@ -0,0 +1,23 @@
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+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
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+  text-anchor: end;
+}
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diff --git a/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_1.rst b/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_1.rst
index d57880a..9a84300 100644
--- a/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_1.rst
+++ b/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__xor2_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__xor2_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__xor2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__xor2_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__xor2_1 layout**

diff --git a/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_1.schematic.png b/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_1.schematic.png
deleted file mode 100644
index 47b7a37..0000000
--- a/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_2.rst b/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_2.rst
index 5859815..d8906d7 100644
--- a/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_2.rst
+++ b/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__xor2_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__xor2_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__xor2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__xor2_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__xor2_2 layout**

diff --git a/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_2.schematic.png b/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_2.schematic.png
deleted file mode 100644
index 47b7a37..0000000
--- a/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_4.rst b/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_4.rst
index f2c922a..7ebaef1 100644
--- a/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_4.rst
+++ b/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__xor2_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__xor2_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__xor2.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__xor2_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__xor2_4 layout**

diff --git a/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_4.schematic.png b/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_4.schematic.png
deleted file mode 100644
index 47b7a37..0000000
--- a/cells/xor2/gf180mcu_fd_sc_mcu9t5v0__xor2_4.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3.schematic.svg b/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3.schematic.svg
new file mode 100644
index 0000000..6f57ec1
--- /dev/null
+++ b/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3.schematic.svg

@@ -0,0 +1,23 @@
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+  stroke:#000;
+  fill:none;
+}
+text {
+  fill:#000;
+  stroke:none;
+  font-size:10px;
+  font-weight: bold;
+  font-family: "Courier New", monospace;
+}
+line {
+    stroke-linecap: round;
+}
+.nodelabel {
+  text-anchor: middle;
+}
+.inputPortLabel {
+  text-anchor: end;
+}
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diff --git a/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_1.rst b/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_1.rst
index 701cbb9..76fb771 100644
--- a/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_1.rst
+++ b/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_1.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__xor3_1 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__xor3_1.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__xor3.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__xor3_1 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__xor3_1 layout**

diff --git a/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_1.schematic.png b/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_1.schematic.png
deleted file mode 100644
index a560040..0000000
--- a/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_1.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_2.rst b/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_2.rst
index cdb7b4f..9ccafc7 100644
--- a/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_2.rst
+++ b/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_2.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__xor3_2 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__xor3_2.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__xor3.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__xor3_2 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__xor3_2 layout**

diff --git a/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_2.schematic.png b/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_2.schematic.png
deleted file mode 100644
index a560040..0000000
--- a/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_2.schematic.png
+++ /dev/null
Binary files differ

diff --git a/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_4.rst b/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_4.rst
index b1460c5..b827e94 100644
--- a/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_4.rst
+++ b/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_4.rst

@@ -9,7 +9,7 @@
 
 **gf180mcu_fd_sc_mcu9t5v0__xor3_4 schematic**
 
-.. image:: gf180mcu_fd_sc_mcu9t5v0__xor3_4.schematic.png
+.. image:: gf180mcu_fd_sc_mcu9t5v0__xor3.schematic.svg
     :alt: gf180mcu_fd_sc_mcu9t5v0__xor3_4 schematic
 
 **gf180mcu_fd_sc_mcu9t5v0__xor3_4 layout**

diff --git a/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_4.schematic.png b/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_4.schematic.png
deleted file mode 100644
index a560040..0000000
--- a/cells/xor3/gf180mcu_fd_sc_mcu9t5v0__xor3_4.schematic.png
+++ /dev/null
Binary files differ
commit	f9d9bc0e90fed0e4ff70f1e0d5898db48228219b	[log] [tgz]
author	Tim 'mithro' Ansell <tansell@google.com>	Fri Aug 12 12:12:29 2022 -0700
committer	GitHub <noreply@github.com>	Fri Aug 12 12:12:29 2022 -0700
tree	f907c98eb0622bfec9b2843ad9c6434deae483bf
parent	13d59fb08242f7073ce88a9aadfb4da2f88b9e87 [diff]
parent	4d71c1fef60c7d751e70e0141c79611252828311 [diff]