| { |
| "cell gf180mcu_fd_sc_mcu9t5v0__nand2_4": { |
| "area": "45.158400", |
| "leakage_power ": [ |
| { |
| "related_pg_pin": "VDD", |
| "when": "!A1&!A2", |
| "value": "0.00051108" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "!A1&A2", |
| "value": "0.00053412" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "A1&!A2", |
| "value": "0.00058206" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "A1&A2", |
| "value": "0.00054486" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "value": "0.00058206" |
| } |
| ], |
| "pg_pin VDD": { |
| "voltage_name": "VDD", |
| "pg_type": "primary_power" |
| }, |
| "pg_pin VSS": { |
| "voltage_name": "VSS", |
| "pg_type": "primary_ground" |
| }, |
| "pin A1": { |
| "capacitance": "0.02585", |
| "direction": "input", |
| "driver_waveform_rise": "driver_waveform_default_rise", |
| "driver_waveform_fall": "driver_waveform_default_fall", |
| "input_voltage": "default", |
| "max_transition": "13.2", |
| "related_ground_pin": "VSS", |
| "related_power_pin": "VDD", |
| "internal_power ": { |
| "when": "!A2", |
| "fall_power pwr_tin_10": { |
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| 0.111, |
| 0.4303, |
| 1.04, |
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| 3.323, |
| 5.077, |
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| 0.08506, |
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| ] |
| }, |
| "rise_power pwr_tin_10": { |
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| ] |
| } |
| } |
| }, |
| "pin A2": { |
| "capacitance": "0.02613", |
| "direction": "input", |
| "driver_waveform_rise": "driver_waveform_default_rise", |
| "driver_waveform_fall": "driver_waveform_default_fall", |
| "input_voltage": "default", |
| "max_transition": "13.2", |
| "related_ground_pin": "VSS", |
| "related_power_pin": "VDD", |
| "internal_power ": { |
| "when": "!A1", |
| "fall_power pwr_tin_10": { |
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| 0.111, |
| 0.4303, |
| 1.04, |
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| 3.323, |
| 5.077, |
| 7.287, |
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| 0.07397, |
| 0.07397, |
| 0.0739, |
| 0.07392, |
| 0.07389, |
| 0.07381 |
| ] |
| }, |
| "rise_power pwr_tin_10": { |
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| 0.4303, |
| 1.04, |
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| 3.323, |
| 5.077, |
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| -0.07383, |
| -0.07384, |
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| ] |
| } |
| } |
| }, |
| "pin ZN": { |
| "direction": "output", |
| "function": "((!A1)|(!A2))", |
| "max_capacitance": "1.606", |
| "max_transition": "13.2", |
| "min_capacitance": "0.001", |
| "output_voltage": "default", |
| "related_ground_pin": "VSS", |
| "related_power_pin": "VDD", |
| "internal_power ": [ |
| { |
| "related_pin": "A1", |
| "when": "A2", |
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| 0.2106, |
| 0.1786 |
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| ] |
| }, |
| "rise_power pwr_tin_oload_10x10": { |
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| 0.7333, |
| 1.483, |
| 2.931 |
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| ] |
| } |
| }, |
| { |
| "related_pin": "A2", |
| "when": "A1", |
| "fall_power pwr_tin_oload_10x10": { |
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| ] |
| }, |
| "rise_power pwr_tin_oload_10x10": { |
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| ] |
| } |
| } |
| ], |
| "timing ": [ |
| { |
| "related_pin": "A1", |
| "timing_sense": "negative_unate", |
| "timing_type": "combinational", |
| "cell_fall tmg_ntin_oload_10x10": { |
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| 0.02, |
| 0.111, |
| 0.4303, |
| 1.04, |
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| 5.077, |
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| [ |
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| ] |
| ] |
| }, |
| "cell_rise tmg_ntin_oload_10x10": { |
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| 0.02, |
| 0.111, |
| 0.4303, |
| 1.04, |
| 1.99, |
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| 5.077, |
| 7.287, |
| 9.985, |
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| 1.214, |
| 1.606 |
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| "values": [ |
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| 8.568, |
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| 13.21 |
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| { |
| "related_pin": "A2", |
| "timing_sense": "negative_unate", |
| "timing_type": "combinational", |
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| 3.665, |
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| 6.175, |
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| 0.111, |
| 0.4303, |
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| 1.99, |
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| 5.077, |
| 7.287, |
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| 4.527, |
| 6.008, |
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| 2.441, |
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| 4.126, |
| 5.332, |
| 6.809, |
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| 1.325, |
| 1.693, |
| 2.255, |
| 2.975, |
| 3.807, |
| 4.768, |
| 5.966, |
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| 2.101, |
| 2.731, |
| 3.544, |
| 4.504, |
| 5.568, |
| 6.774, |
| 8.235, |
| 9.985 |
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| [ |
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| 2.09, |
| 2.565, |
| 3.268, |
| 4.164, |
| 5.236, |
| 6.445, |
| 7.755, |
| 9.224, |
| 10.96 |
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| 2.36, |
| 2.551, |
| 3.088, |
| 3.866, |
| 4.845, |
| 6.017, |
| 7.357, |
| 8.826, |
| 10.39, |
| 12.14 |
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| "fall_transition tmg_ntin_oload_10x10": { |
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| 0.02, |
| 0.111, |
| 0.4303, |
| 1.04, |
| 1.99, |
| 3.323, |
| 5.077, |
| 7.287, |
| 9.985, |
| 13.2 |
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| 0.1252, |
| 0.2409, |
| 0.4032, |
| 0.6168, |
| 0.8858, |
| 1.214, |
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| 0.8405, |
| 1.515, |
| 2.463, |
| 3.703, |
| 5.276, |
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| 0.4078, |
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| 1.516, |
| 2.46, |
| 3.711, |
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| 7.195, |
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| 0.841, |
| 1.514, |
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| 3.709, |
| 5.278, |
| 7.195, |
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| 0.5143, |
| 0.8912, |
| 1.52, |
| 2.46, |
| 3.704, |
| 5.276, |
| 7.201, |
| 9.472 |
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| [ |
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| 0.435, |
| 0.6532, |
| 1.045, |
| 1.631, |
| 2.488, |
| 3.705, |
| 5.272, |
| 7.189, |
| 9.479 |
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| [ |
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| 0.5928, |
| 0.8398, |
| 1.245, |
| 1.848, |
| 2.669, |
| 3.786, |
| 5.283, |
| 7.183, |
| 9.473 |
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| [ |
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| 0.772, |
| 1.062, |
| 1.498, |
| 2.116, |
| 2.958, |
| 4.035, |
| 5.424, |
| 7.225, |
| 9.472 |
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| [ |
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| 0.967, |
| 1.306, |
| 1.797, |
| 2.44, |
| 3.296, |
| 4.403, |
| 5.756, |
| 7.44, |
| 9.563 |
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| [ |
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| 1.183, |
| 1.569, |
| 2.128, |
| 2.825, |
| 3.696, |
| 4.822, |
| 6.204, |
| 7.856, |
| 9.85 |
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| [ |
| 1.242, |
| 1.408, |
| 1.855, |
| 2.485, |
| 3.249, |
| 4.163, |
| 5.304, |
| 6.708, |
| 8.398, |
| 10.36 |
| ] |
| ] |
| }, |
| "rise_transition tmg_ntin_oload_10x10": { |
| "index_1": [ |
| 0.02, |
| 0.111, |
| 0.4303, |
| 1.04, |
| 1.99, |
| 3.323, |
| 5.077, |
| 7.287, |
| 9.985, |
| 13.2 |
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| 0.001, |
| 0.01208, |
| 0.05096, |
| 0.1252, |
| 0.2409, |
| 0.4032, |
| 0.6168, |
| 0.8858, |
| 1.214, |
| 1.606 |
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| 0.3139, |
| 0.6251, |
| 1.216, |
| 2.136, |
| 3.423, |
| 5.12, |
| 7.257, |
| 9.867, |
| 12.98 |
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| [ |
| 0.2249, |
| 0.3136, |
| 0.6241, |
| 1.216, |
| 2.135, |
| 3.425, |
| 5.121, |
| 7.259, |
| 9.87, |
| 12.98 |
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| 0.6241, |
| 1.216, |
| 2.136, |
| 3.425, |
| 5.121, |
| 7.257, |
| 9.867, |
| 12.98 |
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| [ |
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| 0.4516, |
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| 1.22, |
| 2.136, |
| 3.426, |
| 5.124, |
| 7.256, |
| 9.859, |
| 12.98 |
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| [ |
| 0.4752, |
| 0.588, |
| 0.9084, |
| 1.372, |
| 2.155, |
| 3.426, |
| 5.123, |
| 7.259, |
| 9.869, |
| 12.98 |
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| [ |
| 0.6034, |
| 0.7334, |
| 1.115, |
| 1.682, |
| 2.382, |
| 3.472, |
| 5.124, |
| 7.263, |
| 9.874, |
| 12.98 |
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| [ |
| 0.75, |
| 0.8996, |
| 1.331, |
| 1.993, |
| 2.808, |
| 3.772, |
| 5.207, |
| 7.267, |
| 9.872, |
| 12.98 |
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| [ |
| 0.91, |
| 1.087, |
| 1.567, |
| 2.305, |
| 3.251, |
| 4.312, |
| 5.584, |
| 7.394, |
| 9.886, |
| 12.98 |
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| [ |
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| 1.292, |
| 1.831, |
| 2.631, |
| 3.679, |
| 4.906, |
| 6.232, |
| 7.844, |
| 10.06, |
| 13.01 |
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| [ |
| 1.266, |
| 1.504, |
| 2.12, |
| 2.988, |
| 4.116, |
| 5.482, |
| 6.988, |
| 8.602, |
| 10.59, |
| 13.24 |
| ] |
| ] |
| } |
| } |
| ] |
| } |
| } |
| } |
