| { |
| "cell gf180mcu_fd_sc_mcu9t5v0__and3_2": { |
| "area": "31.046400", |
| "leakage_power ": [ |
| { |
| "related_pg_pin": "VDD", |
| "when": "!A1&!A2&!A3", |
| "value": "4.6134e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "!A1&!A2&A3", |
| "value": "4.6134e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "!A1&A2&!A3", |
| "value": "4.6134e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "!A1&A2&A3", |
| "value": "4.6134e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "A1&!A2&!A3", |
| "value": "5.7888e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "A1&!A2&A3", |
| "value": "5.7888e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "A1&A2&!A3", |
| "value": "6.9309e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "A1&A2&A3", |
| "value": "6.4485e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "value": "6.9309e-05" |
| } |
| ], |
| "pg_pin VDD": { |
| "voltage_name": "VDD", |
| "pg_type": "primary_power" |
| }, |
| "pg_pin VSS": { |
| "voltage_name": "VSS", |
| "pg_type": "primary_ground" |
| }, |
| "pin A1": { |
| "capacitance": "0.006257", |
| "direction": "input", |
| "driver_waveform_rise": "driver_waveform_default_rise", |
| "driver_waveform_fall": "driver_waveform_default_fall", |
| "input_voltage": "default", |
| "max_transition": "11.2", |
| "related_ground_pin": "VSS", |
| "related_power_pin": "VDD", |
| "internal_power ": [ |
| { |
| "when": "!A2&!A3", |
| "fall_power pwr_tin_10": { |
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| 0.09717, |
| 0.368, |
| 0.8853, |
| 1.691, |
| 2.822, |
| 4.31, |
| 6.184, |
| 8.473, |
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| ], |
| "values": [ |
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| 0.01848, |
| 0.01851, |
| 0.0185, |
| 0.0185, |
| 0.01849, |
| 0.0185, |
| 0.01847 |
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| }, |
| "rise_power pwr_tin_10": { |
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| 0.09717, |
| 0.368, |
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| -0.01259, |
| -0.01263, |
| -0.01266 |
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| } |
| }, |
| { |
| "when": "!A2&A3", |
| "fall_power pwr_tin_10": { |
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| 0.09717, |
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| 4.31, |
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| "values": [ |
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| 0.01851, |
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| 0.01849, |
| 0.0185 |
| ] |
| }, |
| "rise_power pwr_tin_10": { |
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| 0.09717, |
| 0.368, |
| 0.8853, |
| 1.691, |
| 2.822, |
| 4.31, |
| 6.184, |
| 8.473, |
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| ], |
| "values": [ |
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| -0.0126, |
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| -0.01268 |
| ] |
| } |
| }, |
| { |
| "when": "A2&!A3", |
| "fall_power pwr_tin_10": { |
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| 0.02, |
| 0.09717, |
| 0.368, |
| 0.8853, |
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| 2.822, |
| 4.31, |
| 6.184, |
| 8.473, |
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| 0.01848, |
| 0.0185, |
| 0.0185, |
| 0.0185, |
| 0.0185 |
| ] |
| }, |
| "rise_power pwr_tin_10": { |
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| 0.02, |
| 0.09717, |
| 0.368, |
| 0.8853, |
| 1.691, |
| 2.822, |
| 4.31, |
| 6.184, |
| 8.473, |
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| "values": [ |
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| 0.006702, |
| 0.006666, |
| 0.0066, |
| 0.006553, |
| 0.006439 |
| ] |
| } |
| } |
| ] |
| }, |
| "pin A2": { |
| "capacitance": "0.006112", |
| "direction": "input", |
| "driver_waveform_rise": "driver_waveform_default_rise", |
| "driver_waveform_fall": "driver_waveform_default_fall", |
| "input_voltage": "default", |
| "max_transition": "11.2", |
| "related_ground_pin": "VSS", |
| "related_power_pin": "VDD", |
| "internal_power ": [ |
| { |
| "when": "!A1&!A3", |
| "fall_power pwr_tin_10": { |
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| 0.09717, |
| 0.368, |
| 0.8853, |
| 1.691, |
| 2.822, |
| 4.31, |
| 6.184, |
| 8.473, |
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| "values": [ |
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| 0.02166, |
| 0.02189, |
| 0.02225, |
| 0.02257, |
| 0.02278, |
| 0.02295, |
| 0.02304, |
| 0.02307, |
| 0.02306 |
| ] |
| }, |
| "rise_power pwr_tin_10": { |
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| 0.09717, |
| 0.368, |
| 0.8853, |
| 1.691, |
| 2.822, |
| 4.31, |
| 6.184, |
| 8.473, |
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| ], |
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| -0.01568, |
| -0.01568, |
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| -0.01569 |
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| } |
| }, |
| { |
| "when": "!A1&A3", |
| "fall_power pwr_tin_10": { |
| "index_1": [ |
| 0.02, |
| 0.09717, |
| 0.368, |
| 0.8853, |
| 1.691, |
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| 4.31, |
| 6.184, |
| 8.473, |
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| 0.01573, |
| 0.01574, |
| 0.01572, |
| 0.01573 |
| ] |
| }, |
| "rise_power pwr_tin_10": { |
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| 0.02, |
| 0.09717, |
| 0.368, |
| 0.8853, |
| 1.691, |
| 2.822, |
| 4.31, |
| 6.184, |
| 8.473, |
| 11.2 |
| ], |
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| -0.01569, |
| -0.01569, |
| -0.01571, |
| -0.01569 |
| ] |
| } |
| }, |
| { |
| "when": "A1&!A3", |
| "fall_power pwr_tin_10": { |
| "index_1": [ |
| 0.02, |
| 0.09717, |
| 0.368, |
| 0.8853, |
| 1.691, |
| 2.822, |
| 4.31, |
| 6.184, |
| 8.473, |
| 11.2 |
| ], |
| "values": [ |
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| 0.01827, |
| 0.01824, |
| 0.01826, |
| 0.01826, |
| 0.01825, |
| 0.01824, |
| 0.0182, |
| 0.01814 |
| ] |
| }, |
| "rise_power pwr_tin_10": { |
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| 0.02, |
| 0.09717, |
| 0.368, |
| 0.8853, |
| 1.691, |
| 2.822, |
| 4.31, |
| 6.184, |
| 8.473, |
| 11.2 |
| ], |
| "values": [ |
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| -0.0137, |
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| -0.01377, |
| -0.01379, |
| -0.01385, |
| -0.0139, |
| -0.01401 |
| ] |
| } |
| } |
| ] |
| }, |
| "pin A3": { |
| "capacitance": "0.005924", |
| "direction": "input", |
| "driver_waveform_rise": "driver_waveform_default_rise", |
| "driver_waveform_fall": "driver_waveform_default_fall", |
| "input_voltage": "default", |
| "max_transition": "11.2", |
| "related_ground_pin": "VSS", |
| "related_power_pin": "VDD", |
| "internal_power ": [ |
| { |
| "when": "!A1&!A2", |
| "fall_power pwr_tin_10": { |
| "index_1": [ |
| 0.02, |
| 0.09717, |
| 0.368, |
| 0.8853, |
| 1.691, |
| 2.822, |
| 4.31, |
| 6.184, |
| 8.473, |
| 11.2 |
| ], |
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| 0.01573, |
| 0.01573, |
| 0.01573, |
| 0.01574, |
| 0.01574, |
| 0.01571 |
| ] |
| }, |
| "rise_power pwr_tin_10": { |
| "index_1": [ |
| 0.02, |
| 0.09717, |
| 0.368, |
| 0.8853, |
| 1.691, |
| 2.822, |
| 4.31, |
| 6.184, |
| 8.473, |
| 11.2 |
| ], |
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| -0.01569, |
| -0.01568, |
| -0.0157 |
| ] |
| } |
| }, |
| { |
| "when": "!A1&A2", |
| "fall_power pwr_tin_10": { |
| "index_1": [ |
| 0.02, |
| 0.09717, |
| 0.368, |
| 0.8853, |
| 1.691, |
| 2.822, |
| 4.31, |
| 6.184, |
| 8.473, |
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| 0.01574, |
| 0.01573, |
| 0.01572, |
| 0.01573 |
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| }, |
| "rise_power pwr_tin_10": { |
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| 0.02, |
| 0.09717, |
| 0.368, |
| 0.8853, |
| 1.691, |
| 2.822, |
| 4.31, |
| 6.184, |
| 8.473, |
| 11.2 |
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| -0.01569 |
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| } |
| }, |
| { |
| "when": "A1&!A2", |
| "fall_power pwr_tin_10": { |
| "index_1": [ |
| 0.02, |
| 0.09717, |
| 0.368, |
| 0.8853, |
| 1.691, |
| 2.822, |
| 4.31, |
| 6.184, |
| 8.473, |
| 11.2 |
| ], |
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| 0.01573, |
| 0.01573, |
| 0.01574, |
| 0.01574, |
| 0.01573 |
| ] |
| }, |
| "rise_power pwr_tin_10": { |
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| 0.02, |
| 0.09717, |
| 0.368, |
| 0.8853, |
| 1.691, |
| 2.822, |
| 4.31, |
| 6.184, |
| 8.473, |
| 11.2 |
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| -0.01568, |
| -0.01568, |
| -0.01568, |
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| } |
| } |
| ] |
| }, |
| "pin Z": { |
| "direction": "output", |
| "function": "(A1&A2&A3)", |
| "max_capacitance": "1.131", |
| "max_transition": "11.2", |
| "min_capacitance": "0.001", |
| "output_voltage": "default", |
| "related_ground_pin": "VSS", |
| "related_power_pin": "VDD", |
| "internal_power ": [ |
| { |
| "related_pin": "A1", |
| "when": "A2&A3", |
| "fall_power pwr_tin_oload_10x10": { |
| "index_1": [ |
| 0.02, |
| 0.09717, |
| 0.368, |
| 0.8853, |
| 1.691, |
| 2.822, |
| 4.31, |
| 6.184, |
| 8.473, |
| 11.2 |
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| "index_2": [ |
| 0.001, |
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| 0.03617, |
| 0.08843, |
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| 0.4345, |
| 0.6239, |
| 0.8551, |
| 1.131 |
| ], |
| "values": [ |
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| 0.1533, |
| 0.1551, |
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| 0.1568, |
| 0.157, |
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| ], |
| [ |
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| 0.1553, |
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| 0.1561, |
| 0.1562, |
| 0.1563, |
| 0.1564 |
| ], |
| [ |
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| 0.1485, |
| 0.1499, |
| 0.1518, |
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| 0.154, |
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| [ |
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| [ |
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| [ |
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| [ |
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| [ |
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| 0.1963, |
| 0.1933, |
| 0.192, |
| 0.1919, |
| 0.1921, |
| 0.1923, |
| 0.1925, |
| 0.1925 |
| ], |
| [ |
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| 0.2285, |
| 0.2191, |
| 0.215, |
| 0.2128, |
| 0.2122, |
| 0.212, |
| 0.2121, |
| 0.2122, |
| 0.2122 |
| ], |
| [ |
| 0.2685, |
| 0.2587, |
| 0.2473, |
| 0.2413, |
| 0.2384, |
| 0.2371, |
| 0.2367, |
| 0.2364, |
| 0.2364, |
| 0.2363 |
| ] |
| ] |
| }, |
| "rise_power pwr_tin_oload_10x10": { |
| "index_1": [ |
| 0.02, |
| 0.09717, |
| 0.368, |
| 0.8853, |
| 1.691, |
| 2.822, |
| 4.31, |
| 6.184, |
| 8.473, |
| 11.2 |
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| 1.131 |
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| "values": [ |
| [ |
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| 0.0935, |
| 0.09612, |
| 0.09847, |
| 0.1002, |
| 0.1029, |
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| [ |
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| [ |
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| [ |
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| [ |
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| 0.1103, |
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| [ |
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| 0.1164, |
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| [ |
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| 0.1128, |
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| 0.1285, |
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| [ |
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| [ |
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| [ |
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| 0.1766, |
| 0.1717, |
| 0.1695, |
| 0.1681, |
| 0.1686, |
| 0.173, |
| 0.228, |
| 0.5294 |
| ] |
| ] |
| } |
| }, |
| { |
| "related_pin": "A2", |
| "when": "A1&A3", |
| "fall_power pwr_tin_oload_10x10": { |
| "index_1": [ |
| 0.02, |
| 0.09717, |
| 0.368, |
| 0.8853, |
| 1.691, |
| 2.822, |
| 4.31, |
| 6.184, |
| 8.473, |
| 11.2 |
| ], |
| "index_2": [ |
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