| { |
| "cell gf180mcu_fd_sc_mcu9t5v0__nand2_2": { |
| "area": "25.401600", |
| "leakage_power ": [ |
| { |
| "related_pg_pin": "VDD", |
| "when": "!A1&!A2", |
| "value": "1.305864e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "!A1&A2", |
| "value": "1.311552e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "A1&!A2", |
| "value": "2.1789e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "A1&A2", |
| "value": "2.02734e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "value": "2.1789e-05" |
| } |
| ], |
| "pg_pin VDD": { |
| "voltage_name": "VDD", |
| "pg_type": "primary_power" |
| }, |
| "pg_pin VSS": { |
| "voltage_name": "VSS", |
| "pg_type": "primary_ground" |
| }, |
| "pin A1": { |
| "capacitance": "0.01137", |
| "direction": "input", |
| "driver_waveform_rise": "driver_waveform_default_rise", |
| "driver_waveform_fall": "driver_waveform_default_fall", |
| "input_voltage": "default", |
| "max_transition": "12", |
| "related_ground_pin": "VSS", |
| "related_power_pin": "VDD", |
| "internal_power ": { |
| "when": "!A2", |
| "fall_power pwr_tin_10": { |
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| 0.1027, |
| 0.3929, |
| 0.9472, |
| 1.811, |
| 3.022, |
| 4.617, |
| 6.625, |
| 9.077, |
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| 0.01364, |
| 0.01364, |
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| ] |
| }, |
| "rise_power pwr_tin_10": { |
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| } |
| } |
| }, |
| "pin A2": { |
| "capacitance": "0.01193", |
| "direction": "input", |
| "driver_waveform_rise": "driver_waveform_default_rise", |
| "driver_waveform_fall": "driver_waveform_default_fall", |
| "input_voltage": "default", |
| "max_transition": "12", |
| "related_ground_pin": "VSS", |
| "related_power_pin": "VDD", |
| "internal_power ": { |
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| 0.1027, |
| 0.3929, |
| 0.9472, |
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| 3.022, |
| 4.617, |
| 6.625, |
| 9.077, |
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| ], |
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| 0.01158, |
| 0.01159, |
| 0.01159, |
| 0.01159, |
| 0.01158 |
| ] |
| }, |
| "rise_power pwr_tin_10": { |
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| 0.3929, |
| 0.9472, |
| 1.811, |
| 3.022, |
| 4.617, |
| 6.625, |
| 9.077, |
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| } |
| } |
| }, |
| "pin ZN": { |
| "direction": "output", |
| "function": "((!A1)|(!A2))", |
| "max_capacitance": "0.5598", |
| "max_transition": "12", |
| "min_capacitance": "0.001", |
| "output_voltage": "default", |
| "related_ground_pin": "VSS", |
| "related_power_pin": "VDD", |
| "internal_power ": [ |
| { |
| "related_pin": "A1", |
| "when": "A2", |
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| ] |
| }, |
| "rise_power pwr_tin_oload_10x10": { |
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| 6.625, |
| 9.077, |
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| } |
| }, |
| { |
| "related_pin": "A2", |
| "when": "A1", |
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| }, |
| "rise_power pwr_tin_oload_10x10": { |
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| } |
| } |
| ], |
| "timing ": [ |
| { |
| "related_pin": "A1", |
| "timing_sense": "negative_unate", |
| "timing_type": "combinational", |
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| ] |
| }, |
| "cell_rise tmg_ntin_oload_10x10": { |
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| { |
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| 6.966, |
| 8.369, |
| 10.04 |
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| 3.81, |
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| 6.878, |
| 8.06, |
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| 3.521, |
| 4.466, |
| 5.572, |
| 6.771, |
| 8.032, |
| 9.338, |
| 10.77, |
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| "fall_transition tmg_ntin_oload_10x10": { |
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| 3.022, |
| 4.617, |
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| 2.159, |
| 2.81, |
| 3.563, |
| 4.456, |
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| 6.814, |
| 8.318 |
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| }, |
| "rise_transition tmg_ntin_oload_10x10": { |
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| 0.02, |
| 0.1027, |
| 0.3929, |
| 0.9472, |
| 1.811, |
| 3.022, |
| 4.617, |
| 6.625, |
| 9.077, |
| 12 |
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| 0.3091, |
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| 0.35, |
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| 1.178, |
| 2.022, |
| 3.209, |
| 4.77, |
| 6.732, |
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| [ |
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| 0.3503, |
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| 2.022, |
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| 9.13, |
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| 2.023, |
| 3.21, |
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| 6.73, |
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| 4.771, |
| 6.734, |
| 9.13, |
| 11.99 |
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| [ |
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| 0.5982, |
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| 1.225, |
| 2.026, |
| 3.21, |
| 4.77, |
| 6.736, |
| 9.13, |
| 11.99 |
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| [ |
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| 1.084, |
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| 2.107, |
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| 4.768, |
| 6.732, |
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| [ |
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| 1.861, |
| 2.434, |
| 3.33, |
| 4.782, |
| 6.735, |
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| 12 |
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| 2.269, |
| 2.937, |
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| 4.927, |
| 6.758, |
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| 1.991, |
| 2.702, |
| 3.494, |
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| 5.368, |
| 6.928, |
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| 12 |
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| 1.684, |
| 2.314, |
| 3.146, |
| 4.076, |
| 5.048, |
| 6.082, |
| 7.416, |
| 9.368, |
| 12.04 |
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| ] |
| } |
| } |
| ] |
| } |
| } |
| } |
