{ | |
"cell gf180mcu_fd_sc_mcu7t5v0__latrsnq_4": { | |
"area": "68.051200", | |
"latch IQ2,IQN2": { | |
"enable": "E", | |
"data_in": "D", | |
"clear": "(!RN)", | |
"preset": "(!SETN)", | |
"clear_preset_var1": "H", | |
"clear_preset_var2": "L" | |
}, | |
"leakage_power ": [ | |
{ | |
"related_pg_pin": "VDD", | |
"when": "!D&!E&!RN&!SETN", | |
"value": "0.0003882" | |
}, | |
{ | |
"related_pg_pin": "VDD", | |
"when": "!D&!E&!RN&SETN", | |
"value": "0.000376485" | |
}, | |
{ | |
"related_pg_pin": "VDD", | |
"when": "!D&!E&RN&!SETN", | |
"value": "0.000370185" | |
}, | |
{ | |
"related_pg_pin": "VDD", | |
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"value": "0.00040287" | |
}, | |
{ | |
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"when": "!D&E&!RN&!SETN", | |
"value": "0.00034843" | |
}, | |
{ | |
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"value": "0.000377065" | |
}, | |
{ | |
"related_pg_pin": "VDD", | |
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"value": "0.000350035" | |
}, | |
{ | |
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"value": "0.00037782" | |
}, | |
{ | |
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"value": "0.000388365" | |
}, | |
{ | |
"related_pg_pin": "VDD", | |
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"value": "0.000376655" | |
}, | |
{ | |
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"value": "0.000370185" | |
}, | |
{ | |
"related_pg_pin": "VDD", | |
"when": "D&!E&RN&SETN", | |
"value": "0.00045386" | |
}, | |
{ | |
"related_pg_pin": "VDD", | |
"when": "D&E&!RN&!SETN", | |
"value": "0.00038894" | |
}, | |
{ | |
"related_pg_pin": "VDD", | |
"when": "D&E&!RN&SETN", | |
"value": "0.00041757" | |
}, | |
{ | |
"related_pg_pin": "VDD", | |
"when": "D&E&RN&!SETN", | |
"value": "0.00037076" | |
}, | |
{ | |
"related_pg_pin": "VDD", | |
"when": "D&E&RN&SETN", | |
"value": "0.00041143" | |
}, | |
{ | |
"related_pg_pin": "VDD", | |
"value": "0.00045386" | |
} | |
], | |
"pg_pin VDD": { | |
"voltage_name": "VDD", | |
"pg_type": "primary_power" | |
}, | |
"pg_pin VSS": { | |
"voltage_name": "VSS", | |
"pg_type": "primary_ground" | |
}, | |
"pin D": { | |
"capacitance": "0.003078", | |
"direction": "input", | |
"driver_waveform_rise": "driver_waveform_default_rise", | |
"driver_waveform_fall": "driver_waveform_default_fall", | |
"input_voltage": "default", | |
"max_transition": "4", | |
"related_ground_pin": "VSS", | |
"related_power_pin": "VDD", | |
"internal_power ": [ | |
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{ | |
"related_pin": "E", | |
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}, | |
{ | |
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1.125, | |
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0.94, | |
0.857, | |
0.776, | |
0.697 | |
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"clock": "true", | |
"direction": "input", | |
"driver_waveform_rise": "driver_waveform_default_rise", | |
"driver_waveform_fall": "driver_waveform_default_fall", | |
"input_voltage": "default", | |
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"related_ground_pin": "VSS", | |
"related_power_pin": "VDD", | |
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{ | |
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1.017, | |
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1.017, | |
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3.029, | |
4 | |
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0.01601, | |
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0.2288, | |
0.3268, | |
0.4446 | |
] | |
} | |
} | |
], | |
"timing ": [ | |
{ | |
"related_pin": "E", | |
"sdf_cond": "ENABLE_NOT_D_AND_RN_AND_SETN === 1'b1", | |
"timing_type": "min_pulse_width", | |
"when": "!D&RN&SETN", | |
"rise_constraint scalar": { | |
"values": [ | |
0.544 | |
] | |
} | |
}, | |
{ | |
"related_pin": "E", | |
"sdf_cond": "ENABLE_D_AND_RN_AND_SETN === 1'b1", | |
"timing_type": "min_pulse_width", | |
"when": "D&RN&SETN", | |
"rise_constraint scalar": { | |
"values": [ | |
0.485 | |
] | |
} | |
} | |
] | |
}, | |
"pin Q": { | |
"direction": "output", | |
"function": "IQ2", | |
"max_capacitance": "0.9591", | |
"max_transition": "4", | |
"min_capacitance": "0.001", | |
"output_voltage": "default", | |
"related_ground_pin": "VSS", | |
"related_power_pin": "VDD", | |
"internal_power ": [ | |
{ | |
"related_pin": "D", | |
"when": "E&RN&SETN", | |
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0.04747, | |
0.1439, | |
0.328, | |
0.6149, | |
1.017, | |
1.547, | |
2.214, | |
3.029, | |
4 | |
], | |
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0.001, | |
0.007613, | |
0.03083, | |
0.07515, | |
0.1442, | |
0.2411, | |
0.3686, | |
0.5293, | |
0.7254, | |
0.9591 | |
], | |
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[ | |
0.9899, | |
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0.9434, | |
0.9265, | |
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0.904 | |
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[ | |
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0.9163, | |
0.9112, | |
0.9081, | |
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0.9042, | |
0.9033 | |
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[ | |
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0.9246, | |
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0.9075, | |
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0.903 | |
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[ | |
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0.9301, | |
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0.9079 | |
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[ | |
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0.9457, | |
0.9375, | |
0.9325, | |
0.9291, | |
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0.9244 | |
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[ | |
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0.9595, | |
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[ | |
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1.051, | |
1.035, | |
1.025, | |
1.019, | |
1.016, | |
1.014, | |
1.013, | |
1.011 | |
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[ | |
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1.091, | |
1.087, | |
1.085, | |
1.083, | |
1.083 | |
], | |
[ | |
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1.196, | |
1.186, | |
1.18, | |
1.177, | |
1.174, | |
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1.172 | |
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[ | |
1.373, | |
1.354, | |
1.323, | |
1.304, | |
1.293, | |
1.287, | |
1.283, | |
1.281, | |
1.28, | |
1.278 | |
] | |
] | |
}, | |
"rise_power pwr_tin_oload_10x10": { | |
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0.02, | |
0.04747, | |
0.1439, | |
0.328, | |
0.6149, | |
1.017, | |
1.547, | |
2.214, | |
3.029, | |
4 | |
], | |
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0.001, | |
0.007613, | |
0.03083, | |
0.07515, | |
0.1442, | |
0.2411, | |
0.3686, | |
0.5293, | |
0.7254, | |
0.9591 | |
], | |
"values": [ | |
[ | |
0.9102, | |
0.8972, | |
0.8768, | |
0.8614, | |
0.8534, | |
0.8499, | |
0.8522, | |
0.8542, | |
0.8572, | |
0.8607 | |
], | |
[ | |
0.9093, | |
0.8954, | |
0.8747, | |
0.8578, | |
0.8521, | |
0.8519, | |
0.8477, | |
0.8507, | |
0.8587, | |
0.8602 | |
], | |
[ | |
0.9088, | |
0.895, | |
0.872, | |
0.8589, | |
0.8507, | |
0.8484, | |
0.8467, | |
0.8497, | |
0.8552, | |
0.8607 | |
], | |
[ | |
0.913, | |
0.8992, | |
0.8789, | |
0.8637, | |
0.8549, | |
0.8534, | |
0.8542, | |
0.8607, | |
0.8602, | |
0.8687 | |
], | |
[ | |
0.9279, | |
0.9148, | |
0.8914, | |
0.8782, | |
0.8696, | |
0.8679, | |
0.8682, | |
0.8752, | |
0.8777, | |
0.8792 | |
], | |
[ | |
0.9558, | |
0.944, | |
0.9221, | |
0.9063, | |
0.8979, | |
0.8959, | |
0.8962, | |
0.9017, | |
0.9052, | |
0.9062 | |
], | |
[ | |
1, | |
0.9878, | |
0.9625, | |
0.9506, | |
0.943, | |
0.9374, | |
0.9407, | |
0.9412, | |
0.9457, | |
0.9497 | |
], | |
[ | |
1.062, | |
1.048, | |
1.027, | |
1.008, | |
1.001, | |
1.004, | |
1.001, | |
1.002, | |
1.004, | |
1.01 | |
], | |
[ | |
1.141, | |
1.129, | |
1.106, | |
1.089, | |
1.077, | |
1.075, | |
1.081, | |
1.084, | |
1.086, | |
1.088 | |
], | |
[ | |
1.236, | |
1.222, | |
1.198, | |
1.181, | |
1.171, | |
1.165, | |
1.166, | |
1.18, | |
1.182, | |
1.19 | |
] | |
] | |
} | |
}, | |
{ | |
"related_pin": "E", | |
"when": "RN&SETN", | |
"fall_power pwr_tin_oload_10x10": { | |
"index_1": [ | |
0.02, | |
0.04747, | |
0.1439, | |
0.328, | |
0.6149, | |
1.017, | |
1.547, | |
2.214, | |
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