{ | |
"cell gf180mcu_fd_sc_mcu7t5v0__latrsnq_4": { | |
"area": "68.051200", | |
"latch IQ2,IQN2": { | |
"enable": "E", | |
"data_in": "D", | |
"clear": "(!RN)", | |
"preset": "(!SETN)", | |
"clear_preset_var1": "H", | |
"clear_preset_var2": "L" | |
}, | |
"leakage_power ": [ | |
{ | |
"related_pg_pin": "VDD", | |
"when": "!D&!E&!RN&!SETN", | |
"value": "4.88016e-05" | |
}, | |
{ | |
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"value": "4.806e-05" | |
}, | |
{ | |
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"value": "4.69638e-05" | |
}, | |
{ | |
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"value": "6.24672e-05" | |
}, | |
{ | |
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}, | |
{ | |
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}, | |
{ | |
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}, | |
{ | |
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}, | |
{ | |
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}, | |
{ | |
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{ | |
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{ | |
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}, | |
{ | |
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"value": "4.88844e-05" | |
}, | |
{ | |
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}, | |
{ | |
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}, | |
{ | |
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}, | |
{ | |
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} | |
], | |
"pg_pin VDD": { | |
"voltage_name": "VDD", | |
"pg_type": "primary_power" | |
}, | |
"pg_pin VSS": { | |
"voltage_name": "VSS", | |
"pg_type": "primary_ground" | |
}, | |
"pin D": { | |
"capacitance": "0.002783", | |
"direction": "input", | |
"driver_waveform_rise": "driver_waveform_default_rise", | |
"driver_waveform_fall": "driver_waveform_default_fall", | |
"input_voltage": "default", | |
"max_transition": "12", | |
"related_ground_pin": "VSS", | |
"related_power_pin": "VDD", | |
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}, | |
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{ | |
"related_pin": "E", | |
"sdf_cond": "ENABLE_NOT_D_AND_RN_AND_SETN === 1'b1", | |
"timing_type": "min_pulse_width", | |
"when": "!D&RN&SETN", | |
"rise_constraint scalar": { | |
"values": [ | |
2.141 | |
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} | |
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{ | |
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"rise_constraint scalar": { | |
"values": [ | |
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} | |
} | |
] | |
}, | |
"pin Q": { | |
"direction": "output", | |
"function": "IQ2", | |
"max_capacitance": "0.8307", | |
"max_transition": "12", | |
"min_capacitance": "0.001", | |
"output_voltage": "default", | |
"related_ground_pin": "VSS", | |
"related_power_pin": "VDD", | |
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{ | |
"related_pin": "D", | |
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1.811, | |
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9.077, | |
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[ | |
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[ | |
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[ | |
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[ | |
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[ | |
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[ | |
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[ | |
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[ | |
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