| { | |
| "cell gf180mcu_fd_sc_mcu7t5v0__latrsnq_1": { | |
| "area": "52.684800", | |
| "latch IQ2,IQN2": { | |
| "enable": "E", | |
| "data_in": "D", | |
| "clear": "(!RN)", | |
| "preset": "(!SETN)", | |
| "clear_preset_var1": "H", | |
| "clear_preset_var2": "L" | |
| }, | |
| "leakage_power ": [ | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!D&!E&!RN&!SETN", | |
| "value": "0.0009621" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!D&!E&!RN&SETN", | |
| "value": "0.000920745" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!D&!E&RN&!SETN", | |
| "value": "0.000907155" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!D&!E&RN&SETN", | |
| "value": "0.0009666" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!D&E&!RN&!SETN", | |
| "value": "0.00089712" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!D&E&!RN&SETN", | |
| "value": "0.000904635" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!D&E&RN&!SETN", | |
| "value": "0.00094257" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!D&E&RN&SETN", | |
| "value": "0.00092655" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "D&!E&!RN&!SETN", | |
| "value": "0.000964665" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "D&!E&!RN&SETN", | |
| "value": "0.00092331" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "D&!E&RN&!SETN", | |
| "value": "0.000907155" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "D&!E&RN&SETN", | |
| "value": "0.001005705" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "D&E&!RN&!SETN", | |
| "value": "0.0009486" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "D&E&!RN&SETN", | |
| "value": "0.00095607" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "D&E&RN&!SETN", | |
| "value": "0.000891" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "D&E&RN&SETN", | |
| "value": "0.00093357" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "value": "0.001005705" | |
| } | |
| ], | |
| "pg_pin VDD": { | |
| "voltage_name": "VDD", | |
| "pg_type": "primary_power" | |
| }, | |
| "pg_pin VSS": { | |
| "voltage_name": "VSS", | |
| "pg_type": "primary_ground" | |
| }, | |
| "pin D": { | |
| "capacitance": "0.003125", | |
| "direction": "input", | |
| "driver_waveform_rise": "driver_waveform_default_rise", | |
| "driver_waveform_fall": "driver_waveform_default_fall", | |
| "input_voltage": "default", | |
| "max_transition": "7", | |
| "related_ground_pin": "VSS", | |
| "related_power_pin": "VDD", | |
| "internal_power ": [ | |
| { | |
| "when": "!E&!RN&!SETN", | |
| "fall_power pwr_tin_10": { | |
| "index_1": [ | |
| 0.02, | |
| 0.06818, | |
| 0.2373, | |
| 0.5602, | |
| 1.063, | |
| 1.769, | |
| 2.698, | |
| 3.869, | |
| 5.297, | |
| 7 | |
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| "values": [ | |
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| 0.02249, | |
| 0.0226, | |
| 0.02269 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
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| ] | |
| } | |
| }, | |
| { | |
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| "fall_power pwr_tin_10": { | |
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| 0.02248, | |
| 0.02261, | |
| 0.0227 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
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| ] | |
| } | |
| }, | |
| { | |
| "when": "!E&RN&!SETN", | |
| "fall_power pwr_tin_10": { | |
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| 0.02, | |
| 0.06818, | |
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| 0.5602, | |
| 1.063, | |
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| 2.698, | |
| 3.869, | |
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| 7 | |
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| "values": [ | |
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| 0.01567, | |
| 0.01565, | |
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| ] | |
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| "rise_power pwr_tin_10": { | |
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| 7 | |
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| ] | |
| } | |
| }, | |
| { | |
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| "fall_power pwr_tin_10": { | |
| "index_1": [ | |
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| 0.06818, | |
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| 1.063, | |
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| 2.698, | |
| 3.869, | |
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| 7 | |
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| "values": [ | |
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| 0.01687, | |
| 0.01688, | |
| 0.01688 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
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| } | |
| }, | |
| { | |
| "when": "E&!RN&!SETN", | |
| "fall_power pwr_tin_10": { | |
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| 0.02, | |
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| 0.5602, | |
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| 2.698, | |
| 3.869, | |
| 5.297, | |
| 7 | |
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| "values": [ | |
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| 0.01704, | |
| 0.01705, | |
| 0.01704, | |
| 0.01702 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
| "index_1": [ | |
| 0.02, | |
| 0.06818, | |
| 0.2373, | |
| 0.5602, | |
| 1.063, | |
| 1.769, | |
| 2.698, | |
| 3.869, | |
| 5.297, | |
| 7 | |
| ], | |
| "values": [ | |
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| ] | |
| } | |
| }, | |
| { | |
| "when": "E&!RN&SETN", | |
| "fall_power pwr_tin_10": { | |
| "index_1": [ | |
| 0.02, | |
| 0.06818, | |
| 0.2373, | |
| 0.5602, | |
| 1.063, | |
| 1.769, | |
| 2.698, | |
| 3.869, | |
| 5.297, | |
| 7 | |
| ], | |
| "values": [ | |
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| 0.01705, | |
| 0.01705, | |
| 0.01704, | |
| 0.01703 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
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| 0.02, | |
| 0.06818, | |
| 0.2373, | |
| 0.5602, | |
| 1.063, | |
| 1.769, | |
| 2.698, | |
| 3.869, | |
| 5.297, | |
| 7 | |
| ], | |
| "values": [ | |
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| ] | |
| } | |
| }, | |
| { | |
| "when": "E&RN&!SETN", | |
| "fall_power pwr_tin_10": { | |
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| 0.02, | |
| 0.06818, | |
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| 0.5602, | |
| 1.063, | |
| 1.769, | |
| 2.698, | |
| 3.869, | |
| 5.297, | |
| 7 | |
| ], | |
| "values": [ | |
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| 0.1651, | |
| 0.1643, | |
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| 0.1738, | |
| 0.1889, | |
| 0.2125, | |
| 0.2449, | |
| 0.2863, | |
| 0.337 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
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| 0.02, | |
| 0.06818, | |
| 0.2373, | |
| 0.5602, | |
| 1.063, | |
| 1.769, | |
| 2.698, | |
| 3.869, | |
| 5.297, | |
| 7 | |
| ], | |
| "values": [ | |
| 0.03845, | |
| 0.03772, | |
| 0.03704, | |
| 0.03858, | |
| 0.04452, | |
| 0.05642, | |
| 0.07558, | |
| 0.1025, | |
| 0.1377, | |
| 0.1815 | |
| ] | |
| } | |
| } | |
| ], | |
| "timing ": [ | |
| { | |
| "related_pin": "E", | |
| "sdf_cond": "ENABLE_RN_AND_SETN === 1'b1", | |
| "timing_type": "hold_falling", | |
| "when": "RN&SETN", | |
| "fall_constraint cnst_ctin_rtin_10x10": { | |
| "index_1": [ | |
| 0.02, | |
| 0.06818, | |
| 0.2373, | |
| 0.5602, | |
| 1.063, | |
| 1.769, | |
| 2.698, | |
| 3.869, | |
| 5.297, | |
| 7 | |
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| "index_2": [ | |
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| 1.769, | |
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| 3.869, | |
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| 7 | |
| ], | |
| "values": [ | |
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| [ | |
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| [ | |
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| [ | |
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| [ | |
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| ], | |
| [ | |
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| ], | |
| [ | |
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| -0.823, | |
| -0.707, | |
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| ], | |
| [ | |
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| ], | |
| [ | |
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| [ | |
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| -1.396, | |
| -1.25, | |
| -1.103 | |
| ] | |
| ] | |
| }, | |
| "rise_constraint cnst_ctin_rtin_10x10": { | |
| "index_1": [ | |
| 0.02, | |
| 0.06818, | |
| 0.2373, | |
| 0.5602, | |
| 1.063, | |
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| 2.698, | |
| 3.869, | |
| 5.297, | |
| 7 | |
| ], | |
| "index_2": [ | |
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| 1.063, | |
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| 7 | |
| ], | |
| "values": [ | |
| [ | |
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| [ | |
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| ], | |
| [ | |
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| ], | |
| [ | |
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| ], | |
| [ | |
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| ], | |
| [ | |
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| [ | |
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| [ | |
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| ], | |
| [ | |
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| ], | |
| [ | |
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| -1.515, | |
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| ] | |
| ] | |
| } | |
| }, | |
| { | |
| "related_pin": "E", | |
| "sdf_cond": "ENABLE_RN_AND_SETN === 1'b1", | |
| "timing_type": "setup_falling", | |
| "when": "RN&SETN", | |
| "fall_constraint cnst_ctin_rtin_10x10": { | |
| "index_1": [ | |
| 0.02, | |
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| } | |
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| "timing ": [ | |
| { | |
| "related_pin": "E", | |
| "sdf_cond": "ENABLE_NOT_D_AND_RN_AND_SETN === 1'b1", | |
| "timing_type": "min_pulse_width", | |
| "when": "!D&RN&SETN", | |
| "rise_constraint scalar": { | |
| "values": [ | |
| 0.926 | |
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| }, | |
| { | |
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| "values": [ | |
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| } | |
| ] | |
| }, | |
| "pin Q": { | |
| "direction": "output", | |
| "function": "IQ2", | |
| "max_capacitance": "0.2469", | |
| "max_transition": "7", | |
| "min_capacitance": "0.001", | |
| "output_voltage": "default", | |
| "related_ground_pin": "VSS", | |
| "related_power_pin": "VDD", | |
| "internal_power ": [ | |
| { | |
| "related_pin": "D", | |
| "when": "E&RN&SETN", | |
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