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| 0.0933, | |
| 0.09334, | |
| 0.09319 | |
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| "rise_power pwr_tin_10": { | |
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| 0.02, | |
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| 1.01, | |
| 1.443, | |
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| }, | |
| { | |
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| }, | |
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| "driver_waveform_fall": "driver_waveform_default_fall", | |
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| "max_transition": "2.6", | |
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| "related_power_pin": "VDD", | |
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| { | |
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| { | |
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| { | |
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| 0.09169 | |
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| { | |
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| 0.04911, | |
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| } | |
| } | |
| ] | |
| }, | |
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| "capacitance": "0.007489", | |
| "direction": "input", | |
| "driver_waveform_rise": "driver_waveform_default_rise", | |
| "driver_waveform_fall": "driver_waveform_default_fall", | |
| "input_voltage": "default", | |
| "max_transition": "2.6", | |
| "related_ground_pin": "VSS", | |
| "related_power_pin": "VDD", | |
| "internal_power ": [ | |
| { | |
| "when": "!A1&!A2&B", | |
| "fall_power pwr_tin_10": { | |
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| 0.02, | |
| 0.03781, | |
| 0.1003, | |
| 0.2197, | |
| 0.4057, | |
| 0.6666, | |
| 1.01, | |
| 1.443, | |
| 1.971, | |
| 2.6 | |
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| "values": [ | |
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| 0.09119, | |
| 0.09096, | |
| 0.09088, | |
| 0.09092 | |
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| }, | |
| "rise_power pwr_tin_10": { | |
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| 0.6666, | |
| 1.01, | |
| 1.443, | |
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| }, | |
| { | |
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| 0.4057, | |
| 0.6666, | |
| 1.01, | |
| 1.443, | |
| 1.971, | |
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| 0.09091 | |
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| "rise_power pwr_tin_10": { | |
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| 0.6666, | |
| 1.01, | |
| 1.443, | |
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| }, | |
| { | |
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| "fall_power pwr_tin_10": { | |
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| 0.02, | |
| 0.03781, | |
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| 0.4057, | |
| 0.6666, | |
| 1.01, | |
| 1.443, | |
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| "values": [ | |
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| 0.09087, | |
| 0.09084, | |
| 0.09102, | |
| 0.09093 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
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| 0.02, | |
| 0.03781, | |
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| 0.4057, | |
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| 1.01, | |
| 1.443, | |
| 1.971, | |
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| "values": [ | |
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| } | |
| }, | |
| { | |
| "when": "A1&A2&!B", | |
| "fall_power pwr_tin_10": { | |
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| 1.01, | |
| 1.443, | |
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| "values": [ | |
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| 0.09183, | |
| 0.09174 | |
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| }, | |
| "rise_power pwr_tin_10": { | |
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| 1.01, | |
| 1.443, | |
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| ] | |
| } | |
| }, | |
| { | |
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| 0.4057, | |
| 0.6666, | |
| 1.01, | |
| 1.443, | |
| 1.971, | |
| 2.6 | |
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| "values": [ | |
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| 0.09098, | |
| 0.09075, | |
| 0.09098 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
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| 0.4057, | |
| 0.6666, | |
| 1.01, | |
| 1.443, | |
| 1.971, | |
| 2.6 | |
| ], | |
| "values": [ | |
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| -0.08998 | |
| ] | |
| } | |
| } | |
| ] | |
| }, | |
| "pin ZN": { | |
| "direction": "output", | |
| "function": "(((!A1)&(!B)&(!C))|((!A2)&(!B)&(!C)))", | |
| "max_capacitance": "0.1676", | |
| "max_transition": "2.6", | |
| "min_capacitance": "0.001", | |
| "output_voltage": "default", | |
| "related_ground_pin": "VSS", | |
| "related_power_pin": "VDD", | |
| "internal_power ": [ | |
| { | |
| "related_pin": "A1", | |
| "when": "A2&!B&!C", | |
| "fall_power pwr_tin_oload_10x10": { | |
| "index_1": [ | |
| 0.02, | |
| 0.03781, | |
| 0.1003, | |
| 0.2197, | |
| 0.4057, | |
| 0.6666, | |
| 1.01, | |
| 1.443, | |
| 1.971, | |
| 2.6 | |
| ], | |
| "index_2": [ | |
| 0.001, | |
| 0.00215, | |
| 0.006187, | |
| 0.0139, | |
| 0.02591, | |
| 0.04276, | |
| 0.06494, | |
| 0.09287, | |
| 0.127, | |
| 0.1676 | |
| ], | |
| "values": [ | |
| [ | |
| 0.006522, | |
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| 0.01277, | |
| 0.01309, | |
| 0.01329, | |
| 0.01343 | |
| ], | |
| [ | |
| 0.01029, | |
| 0.0107, | |
| 0.012, | |
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| 0.0155, | |
| 0.01602, | |
| 0.01637, | |
| 0.01669, | |
| 0.01681 | |
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| [ | |
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| 0.0249, | |
| 0.02441, | |
| 0.02412, | |
| 0.0239 | |
| ], | |
| [ | |
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| 0.04354, | |
| 0.04036, | |
| 0.03778, | |
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| ], | |
| [ | |
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| 0.07304, | |
| 0.06603, | |
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| [ | |
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| 0.2251, | |
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| 0.148, | |
| 0.132, | |
| 0.118, | |
| 0.1061 | |
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| [ | |
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| [ | |
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| 0.3602, | |
| 0.3249, | |
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| [ | |
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| 0.6486, | |
| 0.5939, | |
| 0.5415, | |
| 0.493, | |
| 0.4483 | |
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| [ | |
| 1.108, | |
| 1.1, | |
| 1.074, | |
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| 0.7744, | |
| 0.7107, | |
| 0.6514 | |
| ] | |
| ] | |
| }, | |
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