| { |
| "cell gf180mcu_fd_sc_mcu7t5v0__latq_4": { |
| "area": "61.465600", |
| "latch IQ1,IQN1": { |
| "enable": "E", |
| "data_in": "(!D)" |
| }, |
| "leakage_power ": [ |
| { |
| "related_pg_pin": "VDD", |
| "when": "!D&!E", |
| "value": "5.40108e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "!D&E", |
| "value": "3.524148e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "D&!E", |
| "value": "7.221636e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "D&E", |
| "value": "3.395358e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "value": "7.221636e-05" |
| } |
| ], |
| "pg_pin VDD": { |
| "voltage_name": "VDD", |
| "pg_type": "primary_power" |
| }, |
| "pg_pin VSS": { |
| "voltage_name": "VSS", |
| "pg_type": "primary_ground" |
| }, |
| "pin D": { |
| "capacitance": "0.002522", |
| "direction": "input", |
| "driver_waveform_rise": "driver_waveform_default_rise", |
| "driver_waveform_fall": "driver_waveform_default_fall", |
| "input_voltage": "default", |
| "max_transition": "21", |
| "related_ground_pin": "VSS", |
| "related_power_pin": "VDD", |
| "internal_power ": { |
| "when": "!E", |
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| "index_1": [ |
| 0.02, |
| 0.1648, |
| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
| 21 |
| ], |
| "values": [ |
| 0.001617, |
| 0.001619, |
| 0.001617, |
| 0.001619, |
| 0.001622, |
| 0.001621, |
| 0.001621, |
| 0.00162, |
| 0.001621, |
| 0.00137 |
| ] |
| }, |
| "rise_power pwr_tin_10": { |
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| 0.02, |
| 0.1648, |
| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
| 21 |
| ], |
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| -0.001496, |
| -0.0015, |
| -0.001501, |
| -0.001503, |
| -0.001504, |
| -0.001369 |
| ] |
| } |
| }, |
| "timing ": [ |
| { |
| "related_pin": "E", |
| "timing_type": "hold_falling", |
| "fall_constraint cnst_ctin_rtin_10x10": { |
| "index_1": [ |
| 0.02, |
| 0.1648, |
| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
| 21 |
| ], |
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| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
| 21 |
| ], |
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| -5.994, |
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| -4.096, |
| -2.966, |
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| -7.274, |
| -6.768, |
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| -5.183, |
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| -3.03, |
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| [ |
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| -9.027, |
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| -6.655, |
| -5.64, |
| -4.503, |
| -3.312, |
| -2.071 |
| ], |
| [ |
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| -10.03, |
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| -8.535, |
| -7.653, |
| -6.639, |
| -5.503, |
| -4.285, |
| -3.027 |
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| [ |
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| -11.06, |
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| -8.971, |
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| -6.829, |
| -5.587, |
| -4.273 |
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| [ |
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| -13.01, |
| -12.72, |
| -12.21, |
| -11.5, |
| -10.64, |
| -9.624, |
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| -7.23, |
| -5.866 |
| ], |
| [ |
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| -14.74, |
| -14.24, |
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| -12.66, |
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| ], |
| [ |
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| -17.15, |
| -16.65, |
| -15.94, |
| -15.07, |
| -14.06, |
| -12.91, |
| -11.63, |
| -10.19 |
| ] |
| ] |
| }, |
| "rise_constraint cnst_ctin_rtin_10x10": { |
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| 0.02, |
| 0.1648, |
| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
| 21 |
| ], |
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| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
| 21 |
| ], |
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| -1.161, |
| -0.864, |
| -0.303, |
| 0.539, |
| 1.69, |
| 3.069, |
| 4.659, |
| 6.441, |
| 8.421 |
| ], |
| [ |
| -1.295, |
| -1.222, |
| -0.929, |
| -0.361, |
| 0.479, |
| 1.626, |
| 3.018, |
| 4.596, |
| 6.377, |
| 8.365 |
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| [ |
| -1.481, |
| -1.404, |
| -1.111, |
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| 1.442, |
| 2.83, |
| 4.413, |
| 6.196, |
| 8.178 |
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| [ |
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| -1.453, |
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| -0.045, |
| 1.102, |
| 2.489, |
| 4.069, |
| 5.85, |
| 7.842 |
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| [ |
| -2.353, |
| -2.277, |
| -1.991, |
| -1.433, |
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| 0.568, |
| 1.955, |
| 3.535, |
| 5.324, |
| 7.316 |
| ], |
| [ |
| -3.105, |
| -3.031, |
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| -1.332, |
| -0.177, |
| 1.211, |
| 2.798, |
| 4.584, |
| 6.585 |
| ], |
| [ |
| -4.021, |
| -3.944, |
| -3.669, |
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| 0.298, |
| 1.892, |
| 3.686, |
| 5.688 |
| ], |
| [ |
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| -4.7, |
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| -2.12, |
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| 0.872, |
| 2.675, |
| 4.693 |
| ], |
| [ |
| -6.176, |
| -6.1, |
| -5.822, |
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| -4.425, |
| -3.253, |
| -1.841, |
| -0.238, |
| 1.567, |
| 3.584 |
| ], |
| [ |
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| -7.309, |
| -7.033, |
| -6.492, |
| -5.634, |
| -4.461, |
| -3.048, |
| -1.439, |
| 0.378, |
| 2.396 |
| ] |
| ] |
| } |
| }, |
| { |
| "related_pin": "E", |
| "timing_type": "setup_falling", |
| "fall_constraint cnst_ctin_rtin_10x10": { |
| "index_1": [ |
| 0.02, |
| 0.1648, |
| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
| 21 |
| ], |
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| 0.02, |
| 0.1648, |
| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
| 21 |
| ], |
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| 9.213, |
| 8.915, |
| 8.405, |
| 7.753, |
| 6.987, |
| 6.133, |
| 5.206, |
| 4.265, |
| 3.396 |
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| [ |
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| 9.276, |
| 8.98, |
| 8.479, |
| 7.817, |
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| 6.197, |
| 5.269, |
| 4.327, |
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| [ |
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| 9.246, |
| 8.739, |
| 8.085, |
| 7.315, |
| 6.46, |
| 5.532, |
| 4.587, |
| 3.714 |
| ], |
| [ |
| 10.1, |
| 10.01, |
| 9.714, |
| 9.21, |
| 8.551, |
| 7.784, |
| 6.926, |
| 5.99, |
| 5.027, |
| 4.146 |
| ], |
| [ |
| 10.81, |
| 10.72, |
| 10.43, |
| 9.914, |
| 9.249, |
| 8.485, |
| 7.62, |
| 6.684, |
| 5.703, |
| 4.797 |
| ], |
| [ |
| 11.79, |
| 11.7, |
| 11.41, |
| 10.9, |
| 10.23, |
| 9.461, |
| 8.601, |
| 7.646, |
| 6.658, |
| 5.726 |
| ], |
| [ |
| 13.09, |
| 13, |
| 12.7, |
| 12.19, |
| 11.53, |
| 10.75, |
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| 8.918, |
| 7.921, |
| 6.956 |
| ], |
| [ |
| 14.72, |
| 14.63, |
| 14.34, |
| 13.83, |
| 13.16, |
| 12.37, |
| 11.49, |
| 10.53, |
| 9.529, |
| 8.522 |
| ], |
| [ |
| 16.72, |
| 16.63, |
| 16.34, |
| 15.83, |
| 15.16, |
| 14.36, |
| 13.48, |
| 12.52, |
| 11.48, |
| 10.42 |
| ], |
| [ |
| 18.17, |
| 18.56, |
| 18.71, |
| 18.22, |
| 17.54, |
| 16.75, |
| 15.86, |
| 14.87, |
| 13.8, |
| 12.69 |
| ] |
| ] |
| }, |
| "rise_constraint cnst_ctin_rtin_10x10": { |
| "index_1": [ |
| 0.02, |
| 0.1648, |
| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
| 21 |
| ], |
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| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
| 21 |
| ], |
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| [ |
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| [ |
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| ], |
| [ |
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| 2.884, |
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| [ |
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| [ |
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| [ |
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| 1.535, |
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| [ |
| 7, |
| 6.931, |
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| [ |
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| 5.286, |
| 3.874, |
| 2.258, |
| 0.455, |
| -1.547 |
| ] |
| ] |
| } |
| } |
| ] |
| }, |
| "pin E": { |
| "capacitance": "0.003115", |
| "clock": "true", |
| "direction": "input", |
| "driver_waveform_rise": "driver_waveform_default_rise", |
| "driver_waveform_fall": "driver_waveform_default_fall", |
| "input_voltage": "default", |
| "max_transition": "21", |
| "min_pulse_width_high": "9.576", |
| "related_ground_pin": "VSS", |
| "related_power_pin": "VDD", |
| "internal_power ": [ |
| { |
| "when": "!D", |
| "fall_power pwr_tin_10": { |
| "index_1": [ |
| 0.02, |
| 0.1648, |
| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
| 21 |
| ], |
| "values": [ |
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| 0.02071, |
| 0.02062, |
| 0.01923 |
| ] |
| }, |
| "rise_power pwr_tin_10": { |
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| 0.02, |
| 0.1648, |
| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
| 21 |
| ], |
| "values": [ |
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| 0.01235, |
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| 0.01225, |
| 0.0124 |
| ] |
| } |
| }, |
| { |
| "when": "D", |
| "fall_power pwr_tin_10": { |
| "index_1": [ |
| 0.02, |
| 0.1648, |
| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
| 21 |
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| 0.02085, |
| 0.01953 |
| ] |
| }, |
| "rise_power pwr_tin_10": { |
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| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
| 21 |
| ], |
| "values": [ |
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| 0.0123, |
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| 0.01222, |
| 0.01234 |
| ] |
| } |
| } |
| ], |
| "timing ": [ |
| { |
| "related_pin": "E", |
| "sdf_cond": "ENABLE_NOT_D === 1'b1", |
| "timing_type": "min_pulse_width", |
| "when": "!D", |
| "rise_constraint scalar": { |
| "values": [ |
| 9.576 |
| ] |
| } |
| }, |
| { |
| "related_pin": "E", |
| "sdf_cond": "ENABLE_D === 1'b1", |
| "timing_type": "min_pulse_width", |
| "when": "D", |
| "rise_constraint scalar": { |
| "values": [ |
| 4.019 |
| ] |
| } |
| } |
| ] |
| }, |
| "pin Q": { |
| "direction": "output", |
| "function": "IQN1", |
| "max_capacitance": "0.6563", |
| "max_transition": "21", |
| "min_capacitance": "0.001", |
| "output_voltage": "default", |
| "related_ground_pin": "VSS", |
| "related_power_pin": "VDD", |
| "internal_power ": [ |
| { |
| "related_pin": "D", |
| "when": "E", |
| "fall_power pwr_tin_oload_10x10": { |
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| 0.02, |
| 0.1648, |
| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
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| 15.88, |
| 21 |
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