| { |
| "cell gf180mcu_fd_sc_mcu7t5v0__latq_2": { |
| "area": "48.294400", |
| "latch IQ1,IQN1": { |
| "enable": "E", |
| "data_in": "(!D)" |
| }, |
| "leakage_power ": [ |
| { |
| "related_pg_pin": "VDD", |
| "when": "!D&!E", |
| "value": "4.57893e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "!D&E", |
| "value": "2.702808e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "D&!E", |
| "value": "5.751e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "D&E", |
| "value": "2.608038e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "value": "5.751e-05" |
| } |
| ], |
| "pg_pin VDD": { |
| "voltage_name": "VDD", |
| "pg_type": "primary_power" |
| }, |
| "pg_pin VSS": { |
| "voltage_name": "VSS", |
| "pg_type": "primary_ground" |
| }, |
| "pin D": { |
| "capacitance": "0.002563", |
| "direction": "input", |
| "driver_waveform_rise": "driver_waveform_default_rise", |
| "driver_waveform_fall": "driver_waveform_default_fall", |
| "input_voltage": "default", |
| "max_transition": "21", |
| "related_ground_pin": "VSS", |
| "related_power_pin": "VDD", |
| "internal_power ": { |
| "when": "!E", |
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| "index_1": [ |
| 0.02, |
| 0.1648, |
| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
| 21 |
| ], |
| "values": [ |
| 0.001617, |
| 0.001616, |
| 0.001618, |
| 0.001621, |
| 0.001622, |
| 0.001621, |
| 0.001622, |
| 0.001621, |
| 0.001621, |
| 0.00137 |
| ] |
| }, |
| "rise_power pwr_tin_10": { |
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| 0.02, |
| 0.1648, |
| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
| 21 |
| ], |
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| -0.001495, |
| -0.0015, |
| -0.001501, |
| -0.001503, |
| -0.001505, |
| -0.001369 |
| ] |
| } |
| }, |
| "timing ": [ |
| { |
| "related_pin": "E", |
| "timing_type": "hold_falling", |
| "fall_constraint cnst_ctin_rtin_10x10": { |
| "index_1": [ |
| 0.02, |
| 0.1648, |
| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
| 21 |
| ], |
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| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
| 21 |
| ], |
| "values": [ |
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| [ |
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| [ |
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| 0.584 |
| ], |
| [ |
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| -6.601, |
| -5.91, |
| -5.059, |
| -4.101, |
| -3.089, |
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| -0.414 |
| ], |
| [ |
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| -7.226, |
| -6.379, |
| -5.411, |
| -4.348, |
| -3.16, |
| -1.721 |
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| [ |
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| -10.08, |
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| -8.881, |
| -8.042, |
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| -5.961, |
| -4.743, |
| -3.334 |
| ], |
| [ |
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| -12.08, |
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| -10.04, |
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| ], |
| [ |
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| -14.67, |
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| -13.89, |
| -13.19, |
| -12.33, |
| -11.32, |
| -10.18, |
| -8.889, |
| -7.448 |
| ] |
| ] |
| }, |
| "rise_constraint cnst_ctin_rtin_10x10": { |
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| 0.02, |
| 0.1648, |
| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
| 21 |
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| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
| 21 |
| ], |
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| -0.309, |
| -0.02, |
| 0.511, |
| 1.345, |
| 2.486, |
| 3.874, |
| 5.445, |
| 7.237, |
| 9.238 |
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| [ |
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| -0.368, |
| -0.086, |
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| 1.286, |
| 2.43, |
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| 7.18, |
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| [ |
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| 3.622, |
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| 6.994, |
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| [ |
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| -0.612, |
| -0.075, |
| 0.762, |
| 1.902, |
| 3.284, |
| 4.86, |
| 6.648, |
| 8.647 |
| ], |
| [ |
| -1.522, |
| -1.437, |
| -1.147, |
| -0.608, |
| 0.232, |
| 1.379, |
| 2.756, |
| 4.344, |
| 6.132, |
| 8.132 |
| ], |
| [ |
| -2.231, |
| -2.155, |
| -1.864, |
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| 0.685, |
| 2.073, |
| 3.661, |
| 5.457, |
| 7.463 |
| ], |
| [ |
| -3.041, |
| -2.968, |
| -2.688, |
| -2.131, |
| -1.274, |
| -0.117, |
| 1.279, |
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| 4.673, |
| 6.684 |
| ], |
| [ |
| -3.942, |
| -3.871, |
| -3.584, |
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| 3.805, |
| 5.829 |
| ], |
| [ |
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| -4.839, |
| -4.56, |
| -4.011, |
| -3.146, |
| -1.973, |
| -0.564, |
| 1.046, |
| 2.862, |
| 4.885 |
| ], |
| [ |
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| -5.865, |
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| -5.042, |
| -4.182, |
| -2.999, |
| -1.578, |
| 0.033, |
| 1.858, |
| 3.882 |
| ] |
| ] |
| } |
| }, |
| { |
| "related_pin": "E", |
| "timing_type": "setup_falling", |
| "fall_constraint cnst_ctin_rtin_10x10": { |
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| 0.02, |
| 0.1648, |
| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
| 21 |
| ], |
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| 0.02, |
| 0.1648, |
| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
| 21 |
| ], |
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| 6.229, |
| 6.141, |
| 5.842, |
| 5.34, |
| 4.696, |
| 3.969, |
| 3.196, |
| 2.458, |
| 2.056, |
| 2.099 |
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| [ |
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| 5.903, |
| 5.397, |
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| 4.032, |
| 3.258, |
| 2.523, |
| 2.129, |
| 2.171 |
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| [ |
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| 6.461, |
| 6.164, |
| 5.658, |
| 5.024, |
| 4.292, |
| 3.515, |
| 2.779, |
| 2.388, |
| 2.421 |
| ], |
| [ |
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| 6.93, |
| 6.627, |
| 6.129, |
| 5.482, |
| 4.76, |
| 3.967, |
| 3.215, |
| 2.786, |
| 2.783 |
| ], |
| [ |
| 7.717, |
| 7.632, |
| 7.327, |
| 6.829, |
| 6.182, |
| 5.452, |
| 4.658, |
| 3.887, |
| 3.374, |
| 3.259 |
| ], |
| [ |
| 8.692, |
| 8.604, |
| 8.303, |
| 7.806, |
| 7.153, |
| 6.423, |
| 5.626, |
| 4.831, |
| 4.21, |
| 3.922 |
| ], |
| [ |
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| 9.597, |
| 9.096, |
| 8.446, |
| 7.704, |
| 6.902, |
| 6.088, |
| 5.324, |
| 4.807 |
| ], |
| [ |
| 11.61, |
| 11.52, |
| 11.22, |
| 10.72, |
| 10.07, |
| 9.327, |
| 8.516, |
| 7.649, |
| 6.791, |
| 6.03 |
| ], |
| [ |
| 13.59, |
| 13.51, |
| 13.21, |
| 12.71, |
| 12.06, |
| 11.31, |
| 10.47, |
| 9.565, |
| 8.623, |
| 7.669 |
| ], |
| [ |
| 15.91, |
| 15.82, |
| 15.53, |
| 15.04, |
| 14.38, |
| 13.62, |
| 12.75, |
| 11.81, |
| 10.79, |
| 9.721 |
| ] |
| ] |
| }, |
| "rise_constraint cnst_ctin_rtin_10x10": { |
| "index_1": [ |
| 0.02, |
| 0.1648, |
| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
| 21 |
| ], |
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| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
| 21 |
| ], |
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| 1.321, |
| 1.035, |
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| 1.094, |
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| [ |
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| 1.254, |
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| [ |
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| 0.991, |
| 0.117, |
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| -7.787 |
| ], |
| [ |
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| 2.049, |
| 1.481, |
| 0.609, |
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| [ |
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| 2.731, |
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| 0.127, |
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| [ |
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| [ |
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| 0.391, |
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| [ |
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| [ |
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| 4.977, |
| 3.801, |
| 2.37, |
| 0.756, |
| -1.068, |
| -3.088 |
| ] |
| ] |
| } |
| } |
| ] |
| }, |
| "pin E": { |
| "capacitance": "0.003113", |
| "clock": "true", |
| "direction": "input", |
| "driver_waveform_rise": "driver_waveform_default_rise", |
| "driver_waveform_fall": "driver_waveform_default_fall", |
| "input_voltage": "default", |
| "max_transition": "21", |
| "min_pulse_width_high": "6.487", |
| "related_ground_pin": "VSS", |
| "related_power_pin": "VDD", |
| "internal_power ": [ |
| { |
| "when": "!D", |
| "fall_power pwr_tin_10": { |
| "index_1": [ |
| 0.02, |
| 0.1648, |
| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
| 21 |
| ], |
| "values": [ |
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| 0.0208, |
| 0.02075, |
| 0.02069, |
| 0.01932 |
| ] |
| }, |
| "rise_power pwr_tin_10": { |
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| 0.02, |
| 0.1648, |
| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
| 21 |
| ], |
| "values": [ |
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| 0.01254, |
| 0.01244, |
| 0.01236, |
| 0.01232, |
| 0.01227, |
| 0.01239 |
| ] |
| } |
| }, |
| { |
| "when": "D", |
| "fall_power pwr_tin_10": { |
| "index_1": [ |
| 0.02, |
| 0.1648, |
| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
| 21 |
| ], |
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| 0.02091, |
| 0.02084, |
| 0.02079, |
| 0.02072, |
| 0.0195 |
| ] |
| }, |
| "rise_power pwr_tin_10": { |
| "index_1": [ |
| 0.02, |
| 0.1648, |
| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
| 21 |
| ], |
| "values": [ |
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| 0.01251, |
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| 0.01233, |
| 0.01228, |
| 0.01222, |
| 0.01236 |
| ] |
| } |
| } |
| ], |
| "timing ": [ |
| { |
| "related_pin": "E", |
| "sdf_cond": "ENABLE_NOT_D === 1'b1", |
| "timing_type": "min_pulse_width", |
| "when": "!D", |
| "rise_constraint scalar": { |
| "values": [ |
| 6.487 |
| ] |
| } |
| }, |
| { |
| "related_pin": "E", |
| "sdf_cond": "ENABLE_D === 1'b1", |
| "timing_type": "min_pulse_width", |
| "when": "D", |
| "rise_constraint scalar": { |
| "values": [ |
| 3.302 |
| ] |
| } |
| } |
| ] |
| }, |
| "pin Q": { |
| "direction": "output", |
| "function": "IQN1", |
| "max_capacitance": "0.3305", |
| "max_transition": "21", |
| "min_capacitance": "0.001", |
| "output_voltage": "default", |
| "related_ground_pin": "VSS", |
| "related_power_pin": "VDD", |
| "internal_power ": [ |
| { |
| "related_pin": "D", |
| "when": "E", |
| "fall_power pwr_tin_oload_10x10": { |
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| 0.02, |
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| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
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| 15.88, |
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