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| -0.05606, | |
| -0.05608, | |
| -0.05612 | |
| ] | |
| } | |
| }, | |
| { | |
| "when": "A1&A2&!A3&B1", | |
| "fall_power pwr_tin_10": { | |
| "index_1": [ | |
| 0.02, | |
| 0.06818, | |
| 0.2373, | |
| 0.5602, | |
| 1.063, | |
| 1.769, | |
| 2.698, | |
| 3.869, | |
| 5.297, | |
| 7 | |
| ], | |
| "values": [ | |
| 0.05669, | |
| 0.05675, | |
| 0.0567, | |
| 0.05661, | |
| 0.05662, | |
| 0.05676, | |
| 0.05677, | |
| 0.05673, | |
| 0.05673, | |
| 0.05675 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
| "index_1": [ | |
| 0.02, | |
| 0.06818, | |
| 0.2373, | |
| 0.5602, | |
| 1.063, | |
| 1.769, | |
| 2.698, | |
| 3.869, | |
| 5.297, | |
| 7 | |
| ], | |
| "values": [ | |
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| -0.05611 | |
| ] | |
| } | |
| }, | |
| { | |
| "when": "A1&A2&A3&B1", | |
| "fall_power pwr_tin_10": { | |
| "index_1": [ | |
| 0.02, | |
| 0.06818, | |
| 0.2373, | |
| 0.5602, | |
| 1.063, | |
| 1.769, | |
| 2.698, | |
| 3.869, | |
| 5.297, | |
| 7 | |
| ], | |
| "values": [ | |
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| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
| "index_1": [ | |
| 0.02, | |
| 0.06818, | |
| 0.2373, | |
| 0.5602, | |
| 1.063, | |
| 1.769, | |
| 2.698, | |
| 3.869, | |
| 5.297, | |
| 7 | |
| ], | |
| "values": [ | |
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| ] | |
| } | |
| } | |
| ] | |
| }, | |
| "pin ZN": { | |
| "direction": "output", | |
| "function": "(((!A1)&(!A2)&(!A3))|((!B1)&(!B2)))", | |
| "max_capacitance": "0.1244", | |
| "max_transition": "7", | |
| "min_capacitance": "0.001", | |
| "output_voltage": "default", | |
| "related_ground_pin": "VSS", | |
| "related_power_pin": "VDD", | |
| "internal_power ": [ | |
| { | |
| "related_pin": "A1", | |
| "when": "!A2&!A3&!B1&B2", | |
| "fall_power pwr_tin_oload_10x10": { | |
| "index_1": [ | |
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| 1.063, | |
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| 2.698, | |
| 3.869, | |
| 5.297, | |
| 7 | |
| ], | |