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| "cell gf180mcu_fd_sc_mcu7t5v0__oai32_2": { | |
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| }, | |
| "pin A3": { | |
| "capacitance": "0.009543", | |
| "direction": "input", | |
| "driver_waveform_rise": "driver_waveform_default_rise", | |
| "driver_waveform_fall": "driver_waveform_default_fall", | |
| "input_voltage": "default", | |
| "max_transition": "7.4", | |
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| "related_power_pin": "VDD", | |
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| { | |
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| { | |
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| "rise_power pwr_tin_10": { | |
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| { | |
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| "rise_power pwr_tin_10": { | |
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| { | |
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| "rise_power pwr_tin_10": { | |
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| { | |
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| "rise_power pwr_tin_10": { | |
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| } | |
| } | |
| ] | |
| }, | |
| "pin B1": { | |
| "capacitance": "0.00877", | |
| "direction": "input", | |
| "driver_waveform_rise": "driver_waveform_default_rise", | |
| "driver_waveform_fall": "driver_waveform_default_fall", | |
| "input_voltage": "default", | |
| "max_transition": "7.4", | |
| "related_ground_pin": "VSS", | |
| "related_power_pin": "VDD", | |
| "internal_power ": [ | |
| { | |
| "when": "!A1&!A2&!A3&!B2", | |
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| "rise_power pwr_tin_10": { | |
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| -0.03633, | |
| -0.03651, | |
| -0.03668, | |
| -0.03672, | |
| -0.03677, | |
| -0.03681 | |
| ] | |
| } | |
| }, | |
| { | |
| "when": "A1&A2&!A3&B1", | |
| "fall_power pwr_tin_10": { | |
| "index_1": [ | |
| 0.02, | |
| 0.07094, | |
| 0.2497, | |
| 0.5912, | |
| 1.123, | |
| 1.87, | |
| 2.852, | |
| 4.089, | |
| 5.6, | |
| 7.4 | |
| ], | |
| "values": [ | |
| 0.03723, | |
| 0.03719, | |
| 0.03713, | |
| 0.03712, | |
| 0.03709, | |
| 0.03718, | |
| 0.03718, | |
| 0.03718, | |
| 0.03718, | |
| 0.03718 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
| "index_1": [ | |
| 0.02, | |
| 0.07094, | |
| 0.2497, | |
| 0.5912, | |
| 1.123, | |
| 1.87, | |
| 2.852, | |
| 4.089, | |
| 5.6, | |
| 7.4 | |
| ], | |
| "values": [ | |
| -0.02943, | |
| -0.03163, | |
| -0.03476, | |
| -0.03589, | |
| -0.03627, | |
| -0.03651, | |
| -0.03667, | |
| -0.03672, | |
| -0.03676, | |
| -0.03681 | |
| ] | |
| } | |
| }, | |
| { | |
| "when": "A1&A2&A3&B1", | |
| "fall_power pwr_tin_10": { | |
| "index_1": [ | |
| 0.02, | |
| 0.07094, | |
| 0.2497, | |
| 0.5912, | |
| 1.123, | |
| 1.87, | |
| 2.852, | |
| 4.089, | |
| 5.6, | |
| 7.4 | |
| ], | |
| "values": [ | |
| 0.03723, | |
| 0.03716, | |
| 0.03721, | |
| 0.03715, | |
| 0.03714, | |
| 0.03722, | |
| 0.03718, | |
| 0.03719, | |
| 0.03719, | |
| 0.03719 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
| "index_1": [ | |
| 0.02, | |
| 0.07094, | |
| 0.2497, | |
| 0.5912, | |
| 1.123, | |
| 1.87, | |
| 2.852, | |
| 4.089, | |
| 5.6, | |
| 7.4 | |
| ], | |
| "values": [ | |
| -0.0294, | |
| -0.03161, | |
| -0.0347, | |
| -0.03591, | |
| -0.03634, | |
| -0.03654, | |
| -0.03666, | |
| -0.03672, | |
| -0.03677, | |
| -0.03679 | |
| ] | |
| } | |
| } | |
| ] | |
| }, | |
| "pin ZN": { | |
| "direction": "output", | |
| "function": "(((!A1)&(!A2)&(!A3))|((!B1)&(!B2)))", | |
| "max_capacitance": "0.1955", | |
| "max_transition": "7.4", | |
| "min_capacitance": "0.001", | |
| "output_voltage": "default", | |
| "related_ground_pin": "VSS", | |
| "related_power_pin": "VDD", | |
| "internal_power ": [ | |
| { | |
| "related_pin": "A1", | |
| "when": "!A2&!A3&!B1&B2", | |
| "fall_power pwr_tin_oload_10x10": { | |
| "index_1": [ | |
| 0.02, | |
| 0.07094, | |
| 0.2497, | |
| 0.5912, | |
| 1.123, | |
| 1.87, | |
| 2.852, | |
| 4.089, | |
| 5.6, | |
| 7.4 | |
| ], | |
| "index_2" |