{ | |
"cell gf180mcu_fd_sc_mcu7t5v0__oai32_1": { | |
"area": "26.342400", | |
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"value": "8.1e-05" | |
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{ | |
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"value": "0.0001543455" | |
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{ | |
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{ | |
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{ | |
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"value": "8.1e-05" | |
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{ | |
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{ | |
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{ | |
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{ | |
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{ | |
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{ | |
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{ | |
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{ | |
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{ | |
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{ | |
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{ | |
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{ | |
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{ | |
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{ | |
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"value": "8.30475e-05" | |
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{ | |
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"value": "8.30475e-05" | |
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{ | |
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"value": "8.1e-05" | |
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{ | |
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{ | |
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{ | |
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{ | |
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{ | |
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{ | |
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{ | |
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{ | |
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{ | |
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{ | |
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{ | |
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"value": "8.30475e-05" | |
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{ | |
"related_pg_pin": "VDD", | |
"value": "0.0001622655" | |
} | |
], | |
"pg_pin VDD": { | |
"voltage_name": "VDD", | |
"pg_type": "primary_power" | |
}, | |
"pg_pin VSS": { | |
"voltage_name": "VSS", | |
"pg_type": "primary_ground" | |
}, | |
"pin A1": { | |
"capacitance": "0.004956", | |
"direction": "input", | |
"driver_waveform_rise": "driver_waveform_default_rise", | |
"driver_waveform_fall": "driver_waveform_default_fall", | |
"input_voltage": "default", | |
"max_transition": "5", | |
"related_ground_pin": "VSS", | |
"related_power_pin": "VDD", | |
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{ | |
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{ | |
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{ | |
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{ | |
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0.7644, | |
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3.785, | |
5 | |
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{ | |
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5 | |
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5 | |
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{ | |
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5 | |
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5 | |
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{ | |
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5 | |
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3.785, | |
5 | |
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{ | |
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0.7644, | |
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5 | |
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0.7644, | |
1.268, | |
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2.766, | |
3.785, | |
5 | |
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{ | |
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0.7644, | |
1.268, | |
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3.785, | |
5 | |
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0.02042, | |
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"rise_power pwr_tin_10": { | |
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0.05437, | |
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0.4054, | |
0.7644, | |
1.268, | |
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2.766, | |
3.785, | |
5 | |
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}, | |
{ | |
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0.7644, | |
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5 | |
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0.02047, | |
0.02043, | |
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}, | |
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0.05437, | |
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0.7644, | |
1.268, | |
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3.785, | |
5 | |
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5 | |
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"driver_waveform_fall": "driver_waveform_default_fall", | |
"input_voltage": "default", | |
"max_transition": "5", | |
"related_ground_pin": "VSS", | |
"related_power_pin": "VDD", | |
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{ | |
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{ | |
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5 | |
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3.785, | |
5 | |
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{ | |
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5 | |
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5 | |
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{ | |
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5 | |
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5 | |
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{ | |
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] | |
}, | |
"pin A3": { | |
"capacitance": "0.004548", | |
"direction": "input", | |
"driver_waveform_rise": "driver_waveform_default_rise", | |
"driver_waveform_fall": "driver_waveform_default_fall", | |
"input_voltage": "default", | |
"max_transition": "5", | |
"related_ground_pin": "VSS", | |
"related_power_pin": "VDD", | |
"internal_power ": [ | |
{ | |
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5 | |
], | |
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{ | |
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"capacitance": "0.00505", | |
"direction": "input", | |
"driver_waveform_rise": "driver_waveform_default_rise", | |
"driver_waveform_fall": "driver_waveform_default_fall", | |
"input_voltage": "default", | |
"max_transition": "5", | |
"related_ground_pin": "VSS", | |
"related_power_pin": "VDD", | |
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{ | |
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0.4054, | |
0.7644, | |
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1.931, | |
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5 | |
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0.02048, | |
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{ | |
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{ | |
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5 | |
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-0.009754, | |
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"capacitance": "0.004841", | |
"direction": "input", | |
"driver_waveform_rise": "driver_waveform_default_rise", | |
"driver_waveform_fall": "driver_waveform_default_fall", | |
"input_voltage": "default", | |
"max_transition": "5", | |
"related_ground_pin": "VSS", | |
"related_power_pin": "VDD", | |
"internal_power ": [ | |
{ | |
"when": "!A1&!A2&!A3&!B1", | |
"fall_power pwr_tin_10": { | |
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0.175, | |
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0.7644, | |
1.268, | |
1.931, | |
2.766, | |
3.785, | |
5 | |
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0.03515, | |
0.03507, | |
0.03501, | |
0.03506, | |
0.03497, | |
0.03498, | |
0.03492, | |
0.03494, | |
0.03492 | |
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"rise_power pwr_tin_10": { | |
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0.05437, | |
0.175, | |
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0.7644, | |
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3.785, | |
5 | |
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0.04458, | |
0.04457, | |
0.0444, | |
0.04444, | |
0.04426, | |
0.04417, | |
0.04399, | |
0.04392 | |
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{ | |
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0.02, | |
0.05437, | |
0.175, | |
0.4054, | |
0.7644, | |
1.268, | |
1.931, | |
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3.785, | |
5 | |
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0.03507, | |
0.03511, | |
0.03501, | |
0.03502, | |
0.03497 | |
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0.7644, | |
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3.785, | |
5 | |
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{ | |
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0.7644, | |
1.268, | |
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3.785, | |
5 | |
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0.7644, | |
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3.785, | |
5 | |
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{ | |
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0.7644, | |
1.268, | |
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3.785, | |
5 | |
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3.785, | |
5 | |
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{ | |
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0.4054, | |
0.7644, | |
1.268, | |
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3.785, | |
5 | |
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1.268, | |
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2.766, | |
3.785, | |
5 | |
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{ | |
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0.05437, | |
0.175, | |
0.4054, | |
0.7644, | |
1.268, | |
1.931, | |
2.766, | |
3.785, | |
5 | |
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0.03108, | |
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0.03117, | |
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0.175, | |
0.4054, | |
0.7644, | |
1.268, | |
1.931, | |
2.766, | |
3.785, | |
5 | |
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] | |
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}, | |
{ | |
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0.02, | |
0.05437, | |
0.175, | |
0.4054, | |
0.7644, | |
1.268, | |
1.931, | |
2.766, | |
3.785, | |
5 | |
], | |
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0.03108, | |
0.03114, | |
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0.03119, | |
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0.0312, | |
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"rise_power pwr_tin_10": { | |
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0.175, | |
0.4054, | |
0.7644, | |
1.268, | |
1.931, | |
2.766, | |
3.785, | |
5 | |
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}, | |
{ | |
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0.02, | |
0.05437, | |
0.175, | |
0.4054, | |
0.7644, | |
1.268, | |
1.931, | |
2.766, | |
3.785, | |
5 | |
], | |
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0.03121, | |
0.03125 | |
] | |
}, | |
"rise_power pwr_tin_10": { | |
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0.02, | |
0.05437, | |
0.175, | |
0.4054, | |
0.7644, | |
1.268, | |
1.931, | |
2.766, | |
3.785, | |
5 | |
], | |
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] | |
} | |
}, | |
{ | |
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0.02, | |
0.05437, | |
0.175, | |
0.4054, | |
0.7644, | |
1.268, | |
1.931, | |
2.766, | |
3.785, | |
5 | |
], | |
"values": [ | |
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0.03114, | |
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0.03108, | |
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0.03124, | |
0.03121 | |
] | |
}, | |
"rise_power pwr_tin_10": { | |
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0.02, | |
0.05437, | |
0.175, | |
0.4054, | |
0.7644, | |
1.268, | |
1.931, | |
2.766, | |
3.785, | |
5 | |
], | |
"values": [ | |
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-0.03051, | |
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-0.03071, | |
-0.03072, | |
-0.03078 | |
] | |
} | |
} | |
] | |
}, | |
"pin ZN": { | |
"direction": "output", | |
"function": "(((!A1)&(!A2)&(!A3))|((!B1)&(!B2)))", | |
"max_capacitance": "0.0841", | |
"max_transition": "5", | |
"min_capacitance": "0.001", | |
"output_voltage": "default", | |
"related_ground_pin": "VSS", | |
"related_power_pin": "VDD", | |
"internal_power ": [ | |
{ | |
"related_pin": "A1", | |
"when": "!A2&!A3&!B1&B2", | |
"fall_power pwr_tin_oload_10x10": { | |
"index_1": [ | |
0.02, | |
0.05437, | |
0.175, | |
0.4054, | |
0.7644, | |
1.268, | |
1.931, | |
2.766, | |
3.785, | |
5 | |
],< |