| { | |
| "cell gf180mcu_fd_sc_mcu7t5v0__oai22_1": { | |
| "area": "21.952000", | |
| "leakage_power ": [ | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!A1&!A2&!B1&!B2", | |
| "value": "0.00010044" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!A1&!A2&!B1&B2", | |
| "value": "0.0001009" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!A1&!A2&B1&!B2", | |
| "value": "0.0001009" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!A1&!A2&B1&B2", | |
| "value": "0.0001009" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!A1&A2&!B1&!B2", | |
| "value": "0.00018058" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!A1&A2&!B1&B2", | |
| "value": "0.000174255" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!A1&A2&B1&!B2", | |
| "value": "0.000138625" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!A1&A2&B1&B2", | |
| "value": "0.000138625" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "A1&!A2&!B1&!B2", | |
| "value": "0.00018058" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "A1&!A2&!B1&B2", | |
| "value": "0.000138625" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "A1&!A2&B1&!B2", | |
| "value": "0.00010299" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "A1&!A2&B1&B2", | |
| "value": "0.00010299" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "A1&A2&!B1&!B2", | |
| "value": "0.000180975" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "A1&A2&!B1&B2", | |
| "value": "0.000138625" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "A1&A2&B1&!B2", | |
| "value": "0.00010299" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "A1&A2&B1&B2", | |
| "value": "0.00010299" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "value": "0.000180975" | |
| } | |
| ], | |
| "pg_pin VDD": { | |
| "voltage_name": "VDD", | |
| "pg_type": "primary_power" | |
| }, | |
| "pg_pin VSS": { | |
| "voltage_name": "VSS", | |
| "pg_type": "primary_ground" | |
| }, | |
| "pin A1": { | |
| "capacitance": "0.004946", | |
| "direction": "input", | |
| "driver_waveform_rise": "driver_waveform_default_rise", | |
| "driver_waveform_fall": "driver_waveform_default_fall", | |
| "input_voltage": "default", | |
| "max_transition": "4", | |
| "related_ground_pin": "VSS", | |
| "related_power_pin": "VDD", | |
| "internal_power ": [ | |
| { | |
| "when": "!A2&!B1&!B2", | |
| "fall_power pwr_tin_10": { | |
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| 0.02, | |
| 0.04747, | |
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| 0.328, | |
| 0.6149, | |
| 1.017, | |
| 1.547, | |
| 2.214, | |
| 3.029, | |
| 4 | |
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| "values": [ | |
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| ] | |
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| "rise_power pwr_tin_10": { | |
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| }, | |
| { | |
| "when": "A2&!B1&!B2", | |
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| 1.017, | |
| 1.547, | |
| 2.214, | |
| 3.029, | |
| 4 | |
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| 0.04392, | |
| 0.04387 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
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| 2.214, | |
| 3.029, | |
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| }, | |
| { | |
| "when": "A2&!B1&B2", | |
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| 0.328, | |
| 0.6149, | |
| 1.017, | |
| 1.547, | |
| 2.214, | |
| 3.029, | |
| 4 | |
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| 0.02631 | |
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| "rise_power pwr_tin_10": { | |
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| }, | |
| { | |
| "when": "A2&B1&!B2", | |
| "fall_power pwr_tin_10": { | |
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| 0.328, | |
| 0.6149, | |
| 1.017, | |
| 1.547, | |
| 2.214, | |
| 3.029, | |
| 4 | |
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| 0.02631 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
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| 1.547, | |
| 2.214, | |
| 3.029, | |
| 4 | |
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| }, | |
| { | |
| "when": "A2&B1&B2", | |
| "fall_power pwr_tin_10": { | |
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| 0.328, | |
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| 1.017, | |
| 1.547, | |
| 2.214, | |
| 3.029, | |
| 4 | |
| ], | |
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| 0.02633, | |
| 0.02632, | |
| 0.02631 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
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| 0.02, | |
| 0.04747, | |
| 0.1439, | |
| 0.328, | |
| 0.6149, | |
| 1.017, | |
| 1.547, | |
| 2.214, | |
| 3.029, | |
| 4 | |
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| ] | |
| } | |
| } | |
| ] | |
| }, | |
| "pin A2": { | |
| "capacitance": "0.004807", | |
| "direction": "input", | |
| "driver_waveform_rise": "driver_waveform_default_rise", | |
| "driver_waveform_fall": "driver_waveform_default_fall", | |
| "input_voltage": "default", | |
| "max_transition": "4", | |
| "related_ground_pin": "VSS", | |
| "related_power_pin": "VDD", | |
| "internal_power ": [ | |
| { | |
| "when": "!A1&!B1&!B2", | |
| "fall_power pwr_tin_10": { | |
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| 0.02, | |
| 0.04747, | |
| 0.1439, | |
| 0.328, | |
| 0.6149, | |
| 1.017, | |
| 1.547, | |
| 2.214, | |
| 3.029, | |
| 4 | |
| ], | |
| "values": [ | |
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| 0.04378, | |
| 0.04378, | |
| 0.04377 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
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| 2.214, | |
| 3.029, | |
| 4 | |
| ], | |
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| ] | |
| } | |
| }, | |
| { | |
| "when": "A1&!B1&!B2", | |
| "fall_power pwr_tin_10": { | |
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| 0.02, | |
| 0.04747, | |
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| 0.328, | |
| 0.6149, | |
| 1.017, | |
| 1.547, | |
| 2.214, | |
| 3.029, | |
| 4 | |
| ], | |
| "values": [ | |
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| 0.04381, | |
| 0.04381, | |
| 0.04377 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
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| 0.02, | |
| 0.04747, | |
| 0.1439, | |
| 0.328, | |
| 0.6149, | |
| 1.017, | |
| 1.547, | |
| 2.214, | |
| 3.029, | |
| 4 | |
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| }, | |
| { | |
| "when": "A1&!B1&B2", | |
| "fall_power pwr_tin_10": { | |
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| 0.02, | |
| 0.04747, | |
| 0.1439, | |
| 0.328, | |
| 0.6149, | |
| 1.017, | |
| 1.547, | |
| 2.214, | |
| 3.029, | |
| 4 | |
| ], | |
| "values": [ | |
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| 0.03927, | |
| 0.03932, | |
| 0.03925 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
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| 0.02, | |
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| 0.328, | |
| 0.6149, | |
| 1.017, | |
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| 2.214, | |
| 3.029, | |
| 4 | |
| ], | |
| "values": [ | |
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| ] | |
| } | |
| }, | |
| { | |
| "when": "A1&B1&!B2", | |
| "fall_power pwr_tin_10": { | |
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| 0.02, | |
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| 0.6149, | |
| 1.017, | |
| 1.547, | |
| 2.214, | |
| 3.029, | |
| 4 | |
| ], | |
| "values": [ | |
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| 0.03929 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
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| 0.02, | |
| 0.04747, | |
| 0.1439, | |
| 0.328, | |
| 0.6149, | |
| 1.017, | |
| 1.547, | |
| 2.214, | |
| 3.029, | |
| 4 | |
| ], | |
| "values": [ | |
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| ] | |
| } | |
| }, | |
| { | |
| "when": "A1&B1&B2", | |
| "fall_power pwr_tin_10": { | |
| "index_1": [ | |
| 0.02, | |
| 0.04747, | |
| 0.1439, | |
| 0.328, | |
| 0.6149, | |
| 1.017, | |
| 1.547, | |
| 2.214, | |
| 3.029, | |
| 4 | |
| ], | |
| "values": [ | |
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| 0.03926, | |
| 0.03927, | |
| 0.03925 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
| "index_1": [ | |
| 0.02, | |
| 0.04747, | |
| 0.1439, | |
| 0.328, | |
| 0.6149, | |
| 1.017, | |
| 1.547, | |
| 2.214, | |
| 3.029, | |
| 4 | |
| ], | |
| "values": [ | |
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| ] | |
| } | |
| } | |
| ] | |
| }, | |
| "pin B1": { | |
| "capacitance": "0.004849", | |
| "direction": "input", | |
| "driver_waveform_rise": "driver_waveform_default_rise", | |
| "driver_waveform_fall": "driver_waveform_default_fall", | |
| "input_voltage": "default", | |
| "max_transition": "4", | |
| "related_ground_pin": "VSS", | |
| "related_power_pin": "VDD", | |
| "internal_power ": [ | |
| { | |
| "when": "!A1&!A2&!B2", | |
| "fall_power pwr_tin_10": { | |
| "index_1": [ | |
| 0.02, | |
| 0.04747, | |
| 0.1439, | |
| 0.328, | |
| 0.6149, | |
| 1.017, | |
| 1.547, | |
| 2.214, | |
| 3.029, | |
| 4 | |
| ], | |
| "values": [ | |
| 0.04227, | |
| 0.04013, | |
| 0.0397, | |
| 0.03957, | |
| 0.03946, | |
| 0.03941, | |
| 0.0394, | |
| 0.03936, | |
| 0.03934, | |
| 0.03931 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
| "index_1": [ | |
| 0.02, | |
| 0.04747, | |
| 0.1439, | |
| 0.328, | |
| 0.6149, | |
| 1.017, | |
| 1.547, | |
| 2.214, | |
| 3.029, | |
| 4 | |
| ], | |
| "values": [ | |
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| ] | |
| } | |
| }, | |
| { | |
| "when": "!A1&!A2&B2", | |
| "fall_power pwr_tin_10": { | |
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| 0.02, | |
| 0.04747, | |
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| 0.328, | |
| 0.6149, | |
| 1.017, | |
| 1.547, | |
| 2.214, | |
| 3.029, | |
| 4 | |
| ], | |
| "values": [ | |
| 0.03965, | |
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| 0.03946, | |
| 0.03944, | |
| 0.03942 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
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| 0.02, | |
| 0.04747, | |
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| 0.328, | |
| 0.6149, | |
| 1.017, | |
| 1.547, | |
| 2.214, | |
| 3.029, | |
| 4 | |
| ], | |
| "values": [ | |
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| } | |
| }, | |
| { | |
| "when": "!A1&A2&B2", | |
| "fall_power pwr_tin_10": { | |
| "index_1": [ | |
| 0.02, | |
| 0.04747, | |
| 0.1439, | |
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