23aa2fe36f589a57cdf76cb8eabadc9a45af8a1a - globalfoundries-pdk/libs/gf180mcu_fd_pr

commit: 23aa2fe36f589a57cdf76cb8eabadc9a45af8a1a
[log] [tgz]
author: mohanad0mohamed <mohanad_mohamed@mabrains.com>
Tue Aug 09 16:00:08 2022 +0200
committer: Tim 'mithro' Ansell <tansell@google.com>
Sat Aug 20 16:08:38 2022 -0700
tree: f3311ab924aea739d2e771fcc925a88e64e2e662
parent: 9e7459c2e94f6f8a198883e38ffaaab0fb97bf3f [diff]

Edits in LVS and DRC

rules/klayout/drc/rule_decks/10v_ldnmos.drc[Added - diff]
rules/klayout/drc/rule_decks/10v_ldpmos.drc[Added - diff]
rules/klayout/drc/rule_decks/3.3v_sram.drc[Added - diff]
rules/klayout/drc/rule_decks/5v_sram.drc[Added - diff]
rules/klayout/drc/rule_decks/comp.drc[Added - diff]
rules/klayout/drc/rule_decks/contact.drc[Added - diff]
rules/klayout/drc/rule_decks/dnwell.drc[Added - diff]
rules/klayout/drc/rule_decks/drc_bjt.drc[Added - diff]
rules/klayout/drc/rule_decks/dualgate.drc[Added - diff]
rules/klayout/drc/rule_decks/dummy_exclude_layers.drc[Added - diff]
rules/klayout/drc/rule_decks/efuse.drc[Added - diff]
rules/klayout/drc/rule_decks/esd.drc[Added - diff]
rules/klayout/drc/rule_decks/geometry_rules.drc[Added - diff]
rules/klayout/drc/rule_decks/h_poly_resistor.drc[Added - diff]
rules/klayout/drc/rule_decks/lvpwell.drc[Added - diff]
rules/klayout/drc/rule_decks/lvs_bjt.drc[Added - diff]
rules/klayout/drc/rule_decks/mcell.drc[Added - diff]
rules/klayout/drc/rule_decks/metal1.drc[Added - diff]
rules/klayout/drc/rule_decks/metal2.drc[Added - diff]
rules/klayout/drc/rule_decks/metal3.drc[Added - diff]
rules/klayout/drc/rule_decks/metal4.drc[Added - diff]
rules/klayout/drc/rule_decks/metal5.drc[Added - diff]
rules/klayout/drc/rule_decks/metaltop.drc[Added - diff]
rules/klayout/drc/rule_decks/mim_capacitor_option_a_.drc[Added - diff]
rules/klayout/drc/rule_decks/mim_capacitor_option_b.drc[Added - diff]
rules/klayout/drc/rule_decks/n+_poly_resistor.drc[Added - diff]
rules/klayout/drc/rule_decks/native_vt_nmos.drc[Added - diff]
rules/klayout/drc/rule_decks/nplus.drc[Added - diff]
rules/klayout/drc/rule_decks/nwell.drc[Added - diff]
rules/klayout/drc/rule_decks/otp_mk.drc[Added - diff]
rules/klayout/drc/rule_decks/p+_poly_resistor.drc[Added - diff]
rules/klayout/drc/rule_decks/poly2.drc[Added - diff]
rules/klayout/drc/rule_decks/pplus.drc[Added - diff]
rules/klayout/drc/rule_decks/sab.drc[Added - diff]
rules/klayout/drc/rule_decks/via1.drc[Added - diff]
rules/klayout/drc/rule_decks/via2.drc[Added - diff]
rules/klayout/drc/rule_decks/via3.drc[Added - diff]
rules/klayout/drc/rule_decks/via4.drc[Added - diff]
rules/klayout/drc/rule_decks/via5.drc[Added - diff]
rules/klayout/drc/rule_decks/ymtp_mk.drc[Added - diff]
rules/klayout/drc/run_drc_parallel.py[Added - diff]
rules/klayout/lvs/gf180mcu.lvs[diff]
rules/klayout/lvs/testing/run_regression.py[diff]

43 files changed

tree: f3311ab924aea739d2e771fcc925a88e64e2e662