ULL/klayout/lvs/rule_decks/moscap_derivations.lvs

################################################################################################
# Copyright 2023 GlobalFoundries PDK Authors
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
#     https://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
################################################################################################

#==================================
# ------ MOSCAP DERIVATIONS -------
#==================================

logger.info('Starting MOSCAP DERIVATIONS')

moscap_exclude = sab.join(esd).join(polyfuse)
                    .join(cap_mk).join(diode_mk).join(nat)
                    .join(v5_xtor).join(drc_bjt).join(lvs_bjt)
                    .join(fhres).join(fusewindow_d).join(piscap)
                    .join(mim_l_mk).join(fusetop).join(resistor)

moscap_ngate = nplus.and(tgate).interacting(mos_cap_mk)
moscap_pgate = pplus.and(tgate).interacting(mos_cap_mk)

# nmoscap_1p8 capacitor
nmos_gate_1p8 = moscap_ngate.not(nwell).not(dnwell).not(dv2).not(dualgate)

# nmoscap_1p8_dw capacitor
nmos_gate_1p8_dw = moscap_ngate.and(dnwell).not(nwell).not(dv2).not(dualgate)

# pmoscap_1p8 capacitor
pmos_gate_1p8 = pgate.not(dnwell).and(nwell).not(dv2).not(dualgate)

# pmoscap_1p8_dw capacitor
pmos_gate_1p8_dw = pgate.and(dnwell).not(dv2).not(dualgate)

# nmoscap_6p0 capacitor
nmoscap_6p0_g = moscap_ngate.not(nwell).not(dnwell).and(dv2).not(dualgate)

# nmoscap_6p0_dw capacitor
nmoscap_6p0_dw_g = moscap_ngate.and(dnwell).not(nwell).and(dv2).not(dualgate)

# pmoscap_6p0 capacitor
pmoscap_6p0_g = pgate.not(dnwell).and(nwell).and(dv2).not(dualgate)

# pmoscap_6p0_dw capacitor
pmoscap_6p0_dw_g = pgate.and(dnwell).and(dv2).not(dualgate)

# nmoscap_1p8_nwell capacitor
nmoscap_1p8_nwell_g = moscap_ngate.not(dnwell).and(nwell).not(dv2).not(dualgate)

# nmoscap_1p8_dnwell capacitor
nmoscap_1p8_dnwell_g = moscap_ngate.and(nwell).and(dnwell).not(dv2).not(dualgate)

# nmoscap_6p0_nwell capacitor
nmoscap_6p0_nwell_g = moscap_ngate.not(dnwell).and(nwell).and(dv2).not(dualgate)

# nmoscap_6p0_dnwell capacitor
nmoscap_6p0_dnwell_g = moscap_ngate.and(nwell).and(dnwell).and(dv2).not(dualgate)