BCDLite/klayout/lvs/rule_decks/moscap_derivations.lvs

################################################################################################
# Copyright 2023 GlobalFoundries PDK Authors
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
#     https://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
################################################################################################

#==================================
# ------ MOSCAP DERIVATIONS -------
#==================================

logger.info('Starting MOSCAP DERIVATIONS')

#=======================
# --- MOSCAP EXCLUDE ---
#=======================

moscap_exclude = resistor.join(esd).join(sab)
                         .join(dni).join(pwhv).join(fusewindow_d)
                         .join(polyfuse).join(schottky_diode).join(piscap)
                         .join(zener).join(res_mk).join(diode_mk)
                         .join(v5_xtor).join(drc_bjt).join(nat)
                         .join(fhres).join(mvsd).join(mvpsd)
                         .join(elmd_mk).join(elmd2_mk).join(lvs_rf)
                         .join(lvs_source).join(mk_35v).join(lvs_35v)
                         .join(well_diode_mk).join(esd_hbm_mk).join(mos_mk_type1)
                         .join(swfet_mk).join(hvnddd).join(hvpddd)
                         .join(hvpolyrs).join(ldmos_xtor)

ngate_lv = ngate.not(dualgate2_d).and(mos_cap_mk)
ngate_mv = ngate.and(dualgate2_d).and(mos_cap_mk)

ngate_lv_nw = ngate_lv.and(nwell)
ngate_lv_n_nw = ngate_lv.not(nwell)

ngate_mv_nw = ngate_mv.and(nwell)
ngate_mv_n_nw = ngate_mv.not(nwell)

pgate_lv = pgate.not(dualgate2_d).and(mos_cap_mk)
pgate_mv = pgate.and(dualgate2_d).and(mos_cap_mk)

#=====================
# --- NMOS 1P8 CAP ---
#=====================

# cap_nmos_01v8 capacitor: 1.8V inversion-mode NMOS capacitor (outside DNWELL) [nmoscap_1p8]
cap_nmos_01v8_g = ngate_lv_n_nw.not(dnwell)

# cap_nmos_01v8_dn capacitor: 1.8V inversion-mode NMOS capacitor (inside DNWELL) [nmoscap_1p8_dw]
cap_nmos_01v8_dn_g = ngate_lv_n_nw.and(dnwell)

#=====================
# --- PMOS 1P8 CAP ---
#=====================

# cap_pmos_01v8 capacitor: 1.8V inversion-mode PMOS capacitor (outside DNWELL) [pmoscap_1p8]
cap_pmos_01v8_g = pgate_lv.and(nwell).not(dnwell)

# cap_pmos_01v8_dn capacitor: 1.8V inversion-mode PMOS capacitor (inside DNWELL) [pmoscap_1p8_dw]
cap_pmos_01v8_dn_g = pgate_lv.and(dnwell)

#=====================
# --- NMOS 6P0 CAP ---
#=====================

# cap_nmos_06v0 capacitor: 6.0V inversion-mode NMOS capacitor (outside DNWELL) [nmoscap_6p0]
cap_nmos_06v0_g = ngate_mv_n_nw.not(dnwell)

# cap_nmos_06v0_dn capacitor: 6.0V inversion-mode NMOS capacitor (inside DNWELL) [nmoscap_6p0_dw]
cap_nmos_06v0_dn_g = ngate_mv_n_nw.and(dnwell)

#=====================
# --- PMOS 6P0 CAP ---
#=====================

# cap_pmos_06v0 capacitor: 6.0V inversion-mode PMOS capacitor (outside DNWELL) [pmoscap_6p0]
cap_pmos_06v0_g = pgate_mv.and(nwell).not(dnwell)

# cap_pmos_06v0_dn capacitor: 6.0V inversion-mode PMOS capacitor (inside DNWELL) [pmoscap_6p0_dw]
cap_pmos_06v0_dn_g = pgate_mv.and(dnwell)

#===========================
# --- NMOS-NWELL 1P8 CAP ---
#===========================

# cap_nmos_01v8_nwell capacitor: 1.8V NMOS in Nwell capacitor (outside DNWELL) [nmoscap_1p8_nwell]
cap_nmos_01v8_nwell_g = ngate_lv_nw.not(dnwell)

#============================
# --- NMOS-DNWELL 1P8 CAP ---
#============================

# cap_nmos_01v8_dnwell capacitor: 1.8V NMOS in Nwell capacitor (inside DNWELL) [nmoscap_1p8_dnwell]
cap_nmos_01v8_dnwell_g = ngate_lv_nw.and(dnwell)

#===========================
# --- NMOS-NWELL 6P0 CAP ---
#===========================

# cap_nmos_06v0_nwell capacitor: 6V NMOS in Nwell capacitor (outside DNWELL) [nmoscap_6p0_nwell]
cap_nmos_06v0_nwell_g = ngate_mv_nw.not(dnwell)

#============================
# --- NMOS-DNWELL 6P0 CAP ---
#============================

# cap_nmos_06v0_dnwell capacitor: 6V NMOS in Nwell capacitor (inside DNWELL) [nmoscap_6p0_dnwell]
cap_nmos_06v0_dnwell_g = ngate_mv_nw.and(dnwell)