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RULE NO.,DESCRIPTION,LAYOUT RULE
Layer,NW = NWELL -- Nwell
NW.1a,Width,0.86
NW.1b,Width of NWELL resistor1,2.10
NW.2a,Space (equi-potential wells),0.60
NW.2b,Space (different potential wells),1.40
NW.3,"RES_MK overlap of Nwell resistor (guideline)
(This is only for the LVS purpose to distinguish between Nwell
resistor & the Nwell for PMOS)",0.50