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RULE NO. ,DESCRIPTION ,LAYOUT RULE
Layer ,DN --- DNWELL,
DN.1 ,Min. DNWELL Width. ,1.7
DN.2a ,"Min. DNWELL Space [Same Potential]. Merge if the space is less
than 2.5um.",2.5
DN.2b ,M"in. DNWELL Space [Diff Potential] in LV and MV area (For 30V
LDMOS DNWELL spacing please refer to LDP.15).",5.42
DN.3 ,"Each DNWELL shall be directly surrounded by PCOMP guard ring
tied to the P-substrate potential.",