docs/BCDLite/physical_verification/design_manual/drm_04_3.rst

4.3 Mask Layer Numbering
===========================================

The following table matches the mask or reticle layer numbers to the drawn and generated layers


 .. csv-table:: Drawn layers
    :file: tables_clear/4.3_mask_layer_numbering.csv
    :widths: 100, 200, 400, 100, 100,100


.. note::

    1. PIB data polarity is chrome for mask used in FAB2. PIB data polarity is clear for mask used in FAB6.

    2. These layers are used for analog process.

    3. These layers are reserved for future usage.

    4. This layer L54 is used for Thin gate VT implant mask if thin gate native VT transistors are required (If Thin gate
       Native VT NMOS is used then L61 cannot be used for VT implant as it is used for LDD). If thin gate native VT is not
       required then L61 can be used both for VT and LDD implant.

    5. Pad layer used both for bond pad and metal fuse open.

    6. In case “Cu ball type wire bond” is used, the MetalTop or METAL_SHIELD should be Thick MetalTop Option
       (section 7.16) or Thick METAL_SHIELD Option (section 7.22) respectively.

    7. Layer LPN is for LVP VT implant when 4.2V Hybrid devices are used.