| ################################################################################################ |
| # Copyright 2022 GlobalFoundries PDK Authors |
| # |
| # Licensed under the Apache License, Version 2.0 (the 'License'); |
| # you may not use this file except in compliance with the License. |
| # You may obtain a copy of the License at |
| # |
| # https://www.apache.org/licenses/LICENSE-2.0 |
| # |
| # Unless required by applicable law or agreed to in writing, software |
| # distributed under the License is distributed on an 'AS IS' BASIS, |
| # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| # See the License for the specific language governing permissions and |
| # limitations under the License. |
| ################################################################################################ |
| |
| |
| if FEOL |
| |
| #================================================ |
| #--------------------LVPWELL--------------------- |
| #================================================ |
| |
| # Rule LPW.1_LV: Min. LVPWELL Width. is 0.6µm |
| logger.info('Executing rule LPW.1_LV') |
| lpw1_l1 = lvpwell.inside(dnwell).not_interacting(dualgate_2).width(0.6.um, euclidian).polygons(0.001) |
| lpw1_l1.output('LPW.1_LV', 'LPW.1_LV : Min. LVPWELL Width. : 0.6µm') |
| lpw1_l1.forget |
| |
| # Rule LPW.1_MV: Min. LVPWELL Width. is 0.74µm |
| logger.info('Executing rule LPW.1_MV') |
| lpw1_l1 = lvpwell.inside(dnwell).overlapping(dualgate_2).width(0.74.um, euclidian).polygons(0.001) |
| lpw1_l1.output('LPW.1_MV', 'LPW.1_MV : Min. LVPWELL Width. : 0.74µm') |
| lpw1_l1.forget |
| |
| if CONNECTIVITY_RULES |
| logger.info('CONNECTIVITY_RULES section') |
| |
| connected_lvpwell_LV, unconnected_lvpwell_LV = conn_space(lvpwell_dn, 0.86, 1.4, euclidian) |
| |
| connected_lvpwell_MV, unconnected_lvpwell_MV = conn_space(lvpwell_dn, 0.86, 1.7, euclidian) |
| |
| # Rule LPW.2a_LV: Min. LVPWELL to LVWELL Space (Inside DNWELL) [Different potential]. is 1.4µm |
| logger.info('Executing rule LPW.2a_LV') |
| lpw2a_l1 = unconnected_lvpwell_LV.not_interacting(dualgate_2) |
| lpw2a_l1.output('LPW.2a_LV', 'LPW.2a_LV : Min. LVPWELL to LVWELL Space (Inside DNWELL) [Different potential]. : 1.4µm') |
| lpw2a_l1.forget |
| |
| # Rule LPW.2a_MV: Min. LVPWELL to LVPWELL Space (Inside DNWELL) [Different potential]. is 1.7µm |
| logger.info('Executing rule LPW.2a_MV') |
| lpw2a_l1 = unconnected_lvpwell_MV.overlapping(dualgate_2) |
| lpw2a_l1.output('LPW.2a_MV', 'LPW.2a_MV : Min. LVPWELL to LVPWELL Space (Inside DNWELL) [Different potential]. : 1.7µm') |
| lpw2a_l1.forget |
| |
| # Rule LPW.2b_LV: Min. LVPWELL to LVPWELL Space [Equi potential]. is 0.86µm |
| logger.info('Executing rule LPW.2b_LV') |
| lpw2b_l1 = connected_lvpwell_LV.not_interacting(dualgate_2) |
| lpw2b_l1.output('LPW.2b_LV', 'LPW.2b_LV : Min. LVPWELL to LVPWELL Space [Equi potential]. : 0.86µm') |
| lpw2b_l1.forget |
| |
| # Rule LPW.2b_MV: Min. LVPWELL to LVPWELL Space [Equi potential]. is 0.86µm |
| logger.info('Executing rule LPW.2b_MV') |
| lpw2b_l1 = connected_lvpwell_MV.overlapping(dualgate_2) |
| lpw2b_l1.output('LPW.2b_MV', 'LPW.2b_MV : Min. LVPWELL to LVPWELL Space [Equi potential]. : 0.86µm') |
| lpw2b_l1.forget |
| |
| else |
| logger.info('CONNECTIVITY_RULES disabled section') |
| |
| # Rule LPW.2a_LV: Min. LVPWELL to LVWELL Space (Inside DNWELL) [Different potential]. is 1.4µm |
| logger.info('Executing rule LPW.2a_LV') |
| lpw2a_l1 = lvpwell.inside(dnwell).not_interacting(dualgate_2).isolated(1.4.um, euclidian).polygons(0.001) |
| lpw2a_l1.output('LPW.2a_LV', 'LPW.2a_LV : Min. LVPWELL to LVWELL Space (Inside DNWELL) [Different potential]. : 1.4µm') |
| lpw2a_l1.forget |
| |
| # Rule LPW.2a_MV: Min. LVPWELL to LVPWELL Space (Inside DNWELL) [Different potential]. is 1.7µm |
| logger.info('Executing rule LPW.2a_MV') |
| lpw2a_l1 = lvpwell.inside(dnwell).overlapping(dualgate_2).isolated(1.7.um, euclidian).polygons(0.001) |
| lpw2a_l1.output('LPW.2a_MV', 'LPW.2a_MV : Min. LVPWELL to LVPWELL Space (Inside DNWELL) [Different potential]. : 1.7µm') |
| lpw2a_l1.forget |
| |
| end #CONNECTIVITY_RULES |
| |
| # Rule LPW.3_LV: Min. DNWELL enclose LVPWELL. is 2.5µm |
| logger.info('Executing rule LPW.3_LV') |
| lpw3_l1 = dnwell.enclosing(lvpwell.not_interacting(dualgate_2), 2.5.um, euclidian).polygons(0.001) |
| lpw3_l2 = lvpwell.not_interacting(dualgate_2).not_outside(dnwell).not(dnwell) |
| lpw3_l = lpw3_l1.or(lpw3_l2) |
| lpw3_l.output('LPW.3_LV', 'LPW.3_LV : Min. DNWELL enclose LVPWELL. : 2.5µm') |
| lpw3_l1.forget |
| lpw3_l2.forget |
| lpw3_l.forget |
| |
| # Rule LPW.3_MV: Min. DNWELL enclose LVPWELL. is 2.5µm |
| logger.info('Executing rule LPW.3_MV') |
| lpw3_l1 = dnwell.enclosing(lvpwell.overlapping(dualgate_2), 2.5.um, euclidian).polygons(0.001) |
| lpw3_l2 = lvpwell.overlapping(dualgate_2).not_outside(dnwell).not(dnwell) |
| lpw3_l = lpw3_l1.or(lpw3_l2) |
| lpw3_l.output('LPW.3_MV', 'LPW.3_MV : Min. DNWELL enclose LVPWELL. : 2.5µm') |
| lpw3_l1.forget |
| lpw3_l2.forget |
| lpw3_l.forget |
| |
| # rule LPW.4_LV is not a DRC check |
| |
| # rule LPW.4_MV is not a DRC check |
| |
| # Rule LPW.5_LV: LVPWELL resistors must be surrounded/overlapped by DNWELL. |
| logger.info('Executing rule LPW.5_LV') |
| lpw5_l1 = lvpwell.not_interacting(dualgate_2).inside(res_mk).not_overlapping(dnwell) |
| lpw5_l1.output('LPW.5_LV', 'LPW.5_LV : LVPWELL resistors must be surrounded/overlapped by DNWELL.') |
| lpw5_l1.forget |
| |
| # Rule LPW.5_MV: LVPWELL resistors must be surrounded/overlapped by DNWELL. |
| logger.info('Executing rule LPW.5_MV') |
| lpw5_l1 = lvpwell.overlapping(dualgate_2).inside(res_mk).not_overlapping(dnwell) |
| lpw5_l1.output('LPW.5_MV', 'LPW.5_MV : LVPWELL resistors must be surrounded/overlapped by DNWELL.') |
| lpw5_l1.forget |
| |
| # Rule LPW.11: Min. (LVPWELL outside DNWELL) space to DNWELL. is 1.5µm |
| logger.info('Executing rule LPW.11') |
| lpw11_l1 = lvpwell.outside(dnwell).separation(dnwell, 1.5.um, euclidian).polygons(0.001) |
| lpw11_l1.output('LPW.11', 'LPW.11 : Min. (LVPWELL outside DNWELL) space to DNWELL. : 1.5µm') |
| lpw11_l1.forget |
| |
| # Rule LPW.12: LVPWELL cannot overlap with Nwell. |
| logger.info('Executing rule LPW.12') |
| lpw12_l1 = lvpwell.outside(dnwell).not_outside(nwell) |
| lpw12_l1.output('LPW.12', 'LPW.12 : LVPWELL cannot overlap with Nwell.') |
| lpw12_l1.forget |
| |
| |
| end #FEOL |
