IC/klayout/lvs/rule_decks/diode_derivations.lvs

################################################################################################
# Copyright 2023 GlobalFoundries PDK Authors
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
#     https://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
################################################################################################

#================================
# ----- DIODE DERIVATIONS -------
#================================

logger.info('Starting DIODE DERIVATIONS')

diode_exclude = poly2.join(dnwell).join(res_mk)
                     .join(sab).join(lvs_bjt)

#=====================
# --- NP 1P8 DIODE ---
#=====================

# diode_nd2ps_01v8: Model for 1.8V thin gate N+/Psub diode [diode_np_1p8]
diode_np_1p8_terminal_n = ncomp.and(diode_mk).not(nwell).not(dualgate).not(nat).not(diode_exclude)

diode_np_1p8_terminal_p = diode_mk.interacting(pcomp).not(nwell).not(dualgate).not(nat).not(diode_exclude)

# diode_nd2ps_01v8_nvt: Model for 1.8V thin gate N+/Psub native diode [diode_np_1p8_nat]
diode_np_1p8_nat_terminal_n = ncomp.and(diode_mk).and(nat).not(nwell).not(dualgate).not(diode_exclude)

diode_np_1p8_nat_terminal_p = diode_mk.interacting(pcomp).not(nwell).not(dualgate).and(nat).not(diode_exclude)
    
#=====================
# --- PN 1P8 DIODE ---
#=====================

# diode_pd2nw_01v8: Model for 1.8V thin gate P+/Nwell diode: [diode_pn_1p8]
diode_pn_1p8_terminal_p = pcomp.and(diode_mk).and(nwell).not(dualgate).not(diode_exclude)

#=====================
# --- NP 3P0 DIODE ---
#=====================

# diode_nd2ps_03v3: Model for 3.3V thick gate N+/Psub diode: [diode_np_3p3]
diode_np_3p3_terminal_n = ncomp.and(diode_mk).and(dualgate).not(nwell).not(nat).not(diode_exclude)

diode_np_3p3_terminal_p = diode_mk.interacting(pcomp).and(dualgate).not(nwell).not(nat).not(diode_exclude)

# diode_nd2ps_03v3_nvt: Model for 3.3V thick gate N+/Psub native diode [diode_np_3p3_nat]
diode_np_3p3_nat_terminal_n = ncomp.and(diode_mk).and(dualgate).and(nat).not(nwell).not(diode_exclude)

diode_np_3p3_nat_terminal_p = diode_mk.interacting(pcomp).and(dualgate).and(nat).not(nwell).not(diode_exclude)

#=====================
# --- PN 3P0 DIODE ---
#=====================

# diode_pd2nw_03v3: Model for 3.3V thick gate P+/Nwell diode: [diode_pn_3p3]
diode_pn_3p3_terminal_p = pcomp.and(diode_mk).and(nwell).and(dualgate).not(diode_exclude)

#==================
# --- NWP DIODE ---
#==================

# diode_nw2ps: Model Nwell/psub diode: [diode_nwp]
diode_nwp_terminal_p = pcomp.and(well_diode_mk).not(lvs_bjt).not(nat).not(res_mk).not(res_mk_type1)
diode_nwp_terminal_n = well_diode_mk.covering(nwell.covering(ncomp))

#====================
# --- DNWPW DIODE ---
#====================

# diode_pw2dw: Model for Pwell/Deep Nwell junction [diode_dnwpw]
diode_dnwpw_terminal_p = pcomp.and(dnwell).and(well_diode_mk).and(diode_mk).not(lvs_bjt).not(nat).not(res_mk_type1)

#====================
# --- DNWPS DIODE ---
#====================

# diode_dw2ps: Model for Deep Nwell/Psub junction [diode_dnwps]
diode_dnwps_terminal_p = ptap.extents.interacting(well_diode_mk).interacting(diode_mk)
                                     .covering(ncomp.and(dnwell)).not(nat).not(res_mk_type1)
diode_dnwps_terminal_n = dnwell.and(ptap.holes).not_covering(pcomp)