| ################################################################################################ |
| # Copyright 2022 GlobalFoundries PDK Authors |
| # |
| # Licensed under the Apache License, Version 2.0 (the 'License'); |
| # you may not use this file except in compliance with the License. |
| # You may obtain a copy of the License at |
| # |
| # https://www.apache.org/licenses/LICENSE-2.0 |
| # |
| # Unless required by applicable law or agreed to in writing, software |
| # distributed under the License is distributed on an 'AS IS' BASIS, |
| # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| # See the License for the specific language governing permissions and |
| # limitations under the License. |
| ################################################################################################ |
| |
| if FEOL |
| |
| #================================================ |
| #--------------------DUALGATE-------------------- |
| #================================================ |
| |
| # Rule DV.1: Min. Dualgate width. is 0.7µm |
| logger.info('Executing rule DV.1') |
| dv1_l1 = dualgate.width(0.7.um, euclidian).polygons(0.001) |
| dv1_l1.output('DV.1', 'DV.1 : Min. Dualgate width. : 0.7µm') |
| dv1_l1.forget |
| |
| # Rule DV.2: Min. Dualgate Space. Merge if Space is less than this design rule. is 0.44µm |
| logger.info('Executing rule DV.2') |
| dv2_l1 = dualgate.space(0.44.um, euclidian).polygons(0.001) |
| dv2_l1.output('DV.2', 'DV.2 : Min. Dualgate Space. Merge if Space is less than this design rule. : 0.44µm') |
| dv2_l1.forget |
| |
| # Rule DV.3: Extension beyond active is 0.24µm |
| logger.info('Executing rule DV.3') |
| dv3_l1 = dualgate.enclosing(comp, 0.24.um, euclidian).polygons(0.001) |
| dv3_l2 = comp.not_outside(dualgate).not(dualgate) |
| dv3_l = dv3_l1.or(dv3_l2) |
| dv3_l.output('DV.3', 'DV.3 : Extension beyond active : 0.24µm') |
| dv3_l1.forget |
| dv3_l2.forget |
| dv3_l.forget |
| |
| # Rule DV.4: Min. Dualgate to COMP space [unrelated]. is 0.24µm |
| logger.info('Executing rule DV.4') |
| dv4_l1 = dualgate.separation(comp.outside(dualgate), 0.24.um, euclidian).polygons(0.001) |
| dv4_l1.output('DV.4', 'DV.4 : Min. Dualgate to COMP space [unrelated]. : 0.24µm') |
| dv4_l1.forget |
| |
| compdv5 = comp.interacting(dualgate) |
| # Rule DV.5: Space from Dualgate on active to 1.8V transistor gate sharing the same active. is 0.4µm |
| logger.info('Executing rule DV.5') |
| dv5_l1 = dualgate.interacting(comp).separation(tgate.interacting(compdv5).outside(dualgate), 0.4.um, euclidian).polygons(0.001) |
| dv5_l1.output('DV.5', 'DV.5 : Space from Dualgate on active to 1.8V transistor gate sharing the same active. : 0.4µm') |
| compdv5.forget |
| dv5_l1.forget |
| |
| # Rule DV.6: Overlap of 3.3V transistor gate. is 0.4µm |
| logger.info('Executing rule DV.6') |
| dv6_l1 = dualgate.enclosing(tgate, 0.4.um, euclidian).polygons(0.001) |
| dv6_l2 = tgate.not_outside(dualgate).not(dualgate) |
| dv6_l = dv6_l1.or(dv6_l2).overlapping(dualgate) |
| dv6_l.output('DV.6', 'DV.6 : Overlap of 3.3V transistor gate. : 0.4µm') |
| dv6_l1.forget |
| dv6_l2.forget |
| dv6_l.forget |
| |
| end #FEOL |
