BCDLite/klayout/lvs/rule_decks/mos_extraction.lvs

################################################################################################
# Copyright 2022 GlobalFoundries PDK Authors
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
#     https://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
################################################################################################

#================================
# ----- MOSFET EXTRACTION -------
#================================

logger.info('Starting MOSFET EXTRACTION')

# =======================
# ---- LV MOS Devices ----
# =======================
logger.info('Starting LV MOS EXTRACTION')

# LV NMOS transistor outside DNWELL
logger.info('Extracting LV NMOS transistor outside DNWELL')
extract_devices(mos4('nmos_1p8'),
                { 'SD' => nsd, 'G' => nmos_1p8_g, 'tS' => nsd, 'tD' => nsd,
                 'tG' => poly2_con, 'W' => sub })

# LV NMOS transistor inside DNWELL
logger.info('Extracting LV NMOS transistor inside DNWELL')
extract_devices(mos4('nmos_1p8_dw'),
                { 'SD' => nsd, 'G' => nmos_1p8_dw_g, 'tS' => nsd, 'tD' => nsd,
                 'tG' => poly2_con, 'W' => lvpwell_con })

# LV NAT NMOS transistor outside DNWELL
logger.info('Extracting LV NAT NMOS transistor outside DNWELL')
extract_devices(mos4('nmos_1p8_nat'),
                { 'SD' => nsd, 'G' => nmos_1p8_nat_g, 'tS' => nsd, 'tD' => nsd,
                 'tG' => poly2_con, 'W' => sub })

# LV NMOS with drain sab outside DNWELL
logger.info('Extracting LV NMOS with drain sab outside DNWELL')
extract_devices(mos4('nmos_1p8_sab'),
                { 'S' => nsd, 'D' => nsd_sab, 'G' => nmos_1p8_sab_g, 'tS' => nsd, 
                'tD' => nsd_sab, 'tG' => poly2_con, 'W' => sub })

# LV NMOS with drain sab inside DNWELL
logger.info('Extracting LV NMOS with drain sab inside DNWELL')
extract_devices(mos4('nmos_1p8_dw_sab'),
                { 'S' => nsd, 'D' => nsd_sab, 'G' => nmos_1p8_dw_sab_g, 'tS' => nsd, 
                'tD' => nsd_sab, 'tG' => poly2_con, 'W' => lvpwell_con })

# LV PMOS transistor outside DNWELL
logger.info('Extracting LV PMOS transistor outside DNWELL')
extract_devices(mos4('pmos_1p8'),
                { 'SD' => psd, 'G' => pmos_1p8_g, 'tS' => psd, 'tD' => psd,
                 'tG' => poly2_con, 'W' => nwell_con })

# LV PMOS transistor inside DNWELL
logger.info('Extracting LV PMOS transistor inside DNWELL')
extract_devices(mos4('pmos_1p8_dw'),
                { 'SD' => psd_dw, 'G' => pmos_1p8_dw_g, 'tS' => psd_dw, 'tD' => psd_dw,
                 'tG' => poly2_con, 'W' => dnwell })


# ========================
# ---- MV MOS Devices ----
# ========================
logger.info('Starting MV MOS EXTRACTION')

# 5V NMOS transistor outside DNWELL
logger.info('Extracting 5V NMOS transistor outside DNWELL')
extract_devices(mos4('nmos_5p0'),
                { 'SD' => nsd, 'G' => nmos_5p0_g, 'tS' => nsd, 'tD' => nsd,
                 'tG' => poly2_con, 'W' => sub })

# 5V NMOS transistor inside DNWELL
logger.info('Extracting 5V NMOS transistor inside DNWELL')
extract_devices(mos4('nmos_5p0_dw'),
                { 'SD' => nsd, 'G' => nmos_5p0_dw_g, 'tS' => nsd, 'tD' => nsd,
                 'tG' => poly2_con, 'W' => lvpwell_con })

# 5V PMOS transistor outside DNWELL
logger.info('Extracting 5V PMOS transistor outside DNWELL')
extract_devices(mos4('pmos_5p0'),
                { 'SD' => psd, 'G' => pmos_5p0_g, 'tS' => psd, 'tD' => psd,
                 'tG' => poly2_con, 'W' => nwell_con })

# 5V PMOS transistor inside DNWELL
logger.info('Extracting 5V PMOS transistor inside DNWELL')
extract_devices(mos4('pmos_5p0_dw'),
                { 'SD' => psd_dw, 'G' => pmos_5p0_dw_g, 'tS' => psd_dw, 'tD' => psd_dw,
                 'tG' => poly2_con, 'W' => dnwell })

# 6V NMOS transistor outside DNWELL
logger.info('Extracting 6V NMOS transistor outside DNWELL')
extract_devices(mos4('nmos_6p0'),
                { 'SD' => nsd, 'G' => nmos_6p0_g, 'tS' => nsd, 'tD' => nsd,
                 'tG' => poly2_con, 'W' => sub })

# 6V NMOS transistor inside DNWELL
logger.info('Extracting 6V NMOS transistor inside DNWELL')
extract_devices(mos4('nmos_6p0_dw'),
                { 'SD' => nsd, 'G' => nmos_6p0_dw_g, 'tS' => nsd, 'tD' => nsd,
                 'tG' => poly2_con, 'W' => lvpwell_con })

# 6V PMOS transistor outside DNWELL
logger.info('Extracting 6V PMOS transistor outside DNWELL')
extract_devices(mos4('pmos_6p0'),
                { 'SD' => psd, 'G' => pmos_6p0_g, 'tS' => psd, 'tD' => psd,
                 'tG' => poly2_con, 'W' => nwell_con })

# 6V PMOS transistor inside DNWELL
logger.info('Extracting 6V PMOS transistor inside DNWELL')
extract_devices(mos4('pmos_6p0_dw'),
                { 'SD' => psd_dw, 'G' => pmos_6p0_dw_g, 'tS' => psd_dw, 'tD' => psd_dw,
                 'tG' => poly2_con, 'W' => dnwell })

# 6V NAT NMOS transistor outside DNWELL
logger.info('Extracting 6V NAT NMOS transistor outside DNWELL')
extract_devices(mos4('nmos_6p0_nat'),
                { 'SD' => nsd, 'G' => nmos_6p0_nat_g, 'tS' => nsd, 'tD' => nsd,
                 'tG' => poly2_con, 'W' => sub })

# 6V NAT PMOS transistor inside DNWELL
logger.info('Extracting 6V NAT PMOS transistor inside DNWELL')
extract_devices(mos4('pmos_6p0_nat_dw'),
                { 'SD' => psd_dw, 'G' => pmos_6p0_nat_dw_g, 'tS' => psd_dw, 'tD' => psd_dw,
                 'tG' => poly2_con, 'W' => dnwell })

# 6V Extended LDD NMOS
logger.info('Extracting 6V Extended LDD NMOS')
extract_devices(mos4('nmos_eldd'),
                { 'S' => nsd, 'D' => nsd_sab, 'G' => nmos_eldd_g, 'tS' => nsd, 
                'tD' => nsd_sab, 'tG' => poly2_con, 'W' => lvpwell_con })

# 6V DDD MV NMOS
logger.info('Extracting 6V DDD MV NMOS')
extract_devices(mos4('nmos_ddd'),
                { 'S' => nsd, 'D' => nsd_sab, 'G' => nmos_ddd_g, 'tS' => nsd, 
                'tD' => nsd_sab, 'tG' => poly2_con, 'W' => lvpwell_con })

# 6V NMOS with drain sab outside DNWELL
logger.info('Extracting 6V NMOS with drain sab outside DNWELL')
extract_devices(mos4('nmos_6p0_sab'),
                { 'S' => nsd, 'D' => nsd_sab, 'G' => nmos_6p0_sab_g, 'tS' => nsd, 
                'tD' => nsd_sab, 'tG' => poly2_con, 'W' => sub })

# 6V NMOS with drain sab inside DNWELL 
logger.info('Extracting 6V NMOS with drain sab inside DNWELL')
extract_devices(mos4('nmos_6p0_dw_sab'),
                { 'S' => nsd, 'D' => nsd_sab, 'G' => nmos_6p0_dw_sab_g, 'tS' => nsd, 
                'tD' => nsd_sab, 'tG' => poly2_con, 'W' => lvpwell_con })

# 5V NMOS with drain sab outside DNWELL
logger.info('Extracting 5V NMOS with drain sab outside DNWELL')
extract_devices(mos4('nmos_5p0_sab'),
                { 'S' => nsd, 'D' => nsd_sab, 'G' => nmos_5p0_sab_g, 'tS' => nsd, 
                'tD' => nsd_sab, 'tG' => poly2_con, 'W' => sub })

# 5V NMOS with drain sab inside DNWELL 
logger.info('Extracting 5V NMOS with drain sab inside DNWELL')
extract_devices(mos4('nmos_5p0_dw_sab'),
                { 'S' => nsd, 'D' => nsd_sab, 'G' => nmos_5p0_dw_sab_g, 'tS' => nsd, 
                'tD' => nsd_sab, 'tG' => poly2_con, 'W' => lvpwell_con })