docs/BCDLite/physical_verification/design_manual/tables_clear/7.10_SAB.csv

RULE NO. ,DESCRIPTION ,LAYOUT RULE
Layer ,SB --- Salicide Block,
SB.1 ,Min. SAB Width ,0.43
SB.2 ,Min. SAB Space outside ELMD2_MK ,0.43
SB.3 ,"Min. SAB Space to COMP [Unrelated] except under
ESD_HBM_MK interact MOS_MK_TYPE4",0.22
SB.4 ,Min. SAB Space to contact outside ELMD2_MK ,0.22
SB.5a, Min. SAB Space to Poly2 [Unrelated] on field ,0.30
SB.5b, Min. SAB Space to Poly2 [Unrelated] on COMP ,0.40
SB.6 ,Min. SAB extend beyond COMP [related] ,0.22
SB.7 ,Min. COMP extend beyond SAB [related] ,0.22
SB.8 ,Non-salicided contacts are forbidden
SB.9 ,Min. SAB extension beyond unsalicided Poly2 ,0.22
SB.10 ,"Min. Poly2 extend beyond SAB [related] except under
ESD_HBM_MK interact MOS_MK_TYPE4",0.22
SB.11 ,Min. SAB enclose with COMP ,0.22
SB.12 ,Min. SAB enclose with Poly2 except under ESD_HBM_MK layer ,0.22
SB.13 ,Min. SAB area 2.0μm²
SB.14a ,"Min. Space from unsalicided Nplus Poly2 to unsalicided Pplus Poly2
(Unsalicided Nplus Poly2 must not fall within a square of 0.56μm x
0.56μm at unsalicided Pplus Poly2 corners)",0.56
SB.14b ,"Min. Space from unsalicided Nplus Poly2 to P-channel gate
(Unsalicided Nplus Poly2 must not fall within a square of 0.56μm x
0.56μm at P-channel gate corners)",0.56
SB.15a, Min. Space from unsalicided Poly2 to unrelated Nplus/Pplus ,0.18
SB.15b ,"Min. Space from unsalicided Poly2 to unrelated Nplus/Pplus along
Poly2 line",0.32
SB.16 ,"SAB layer cannot exist on 1.8V, 6V and 30V CMOS transistor’s
active area of the core circuit (Excluding the transistors used for ESD
purpose). It can only exist on CMOS transistors marked by LVS_IO
.. OTP_MK.. ELMD_MK.. ELMD2_MK.. DNI.. ESD_HBM_MK"
SB.17a ,"(a) If SAB touches (Poly2 AND Nplus) then Nplus must also
enclose (Poly2 AND SAB) except the case of poly diode
(Poly outside COMP enclosed by Diode_MK layer)
Minimum Nplus enclosure (Poly2 AND SAB)",0.1
SB.17b ,"(b) If SAB touches NCOMP then Nplus must enclose (NCOMP
AND SAB).
Minimum Nplus enclosure (NCOMP AND SAB)",0.1