| ; Technology File gf018hv_green |
| ; Generated on Apr 29 10:07:40 2011 |
| ; with @(#)$CDS: virtuoso version 6.1.4-64b 12/02/2010 23:19 (sjfdl064) $ |
| |
| |
| ;******************************** |
| ; CONTROLS |
| ;******************************** |
| controls( |
| techParams( |
| ;( parameter value ) |
| ;( ---------- ----- ) |
| ( maskGrid 0.005 ) |
| ( cadGrid 0.005 ) |
| ( drcGrid 0.005 ) |
| ( mfgGrid 0.005 ) |
| ( scale 1.0 ) |
| ( rsh_nplus_u 60 ) |
| ( rend_nplus_u 1.85e-05 ) |
| ( dw_nplus_u -5e-08 ) |
| ( dl_nplus_u 2e-11 ) |
| ( rsh_pplus_u 185 ) |
| ( rend_pplus_u 5e-05 ) |
| ( dw_pplus_u 2.75e-08 ) |
| ( dl_pplus_u 5e-11 ) |
| ( rsh_nplus_s 6.3 ) |
| ( rend_nplus_s 6e-06 ) |
| ( dw_nplus_s -1.25e-08 ) |
| ( dl_nplus_s 3.5e-11 ) |
| ( rsh_pplus_s 7 ) |
| ( rend_pplus_s 6.5e-06 ) |
| ( dw_pplus_s -5e-08 ) |
| ( dl_pplus_s 3.5e-11 ) |
| ( rsh_nwell 1000 ) |
| ( rend_nwell 0.00025 ) |
| ( dw_nwell 2.22e-07 ) |
| ( dl_nwell 1.02e-08 ) |
| ( rsh_npolyf_u 310 ) |
| ( rend_npolyf_u 4e-05 ) |
| ( dw_npolyf_u 2.65e-08 ) |
| ( dl_npolyf_u 8.48e-11 ) |
| ( rsh_ppolyf_u 350 ) |
| ( rend_ppolyf_u 6e-05 ) |
| ( dw_ppolyf_u 2.55e-08 ) |
| ( dl_ppolyf_u 2e-11 ) |
| ( rsh_npolyf_s 6.8 ) |
| ( rend_npolyf_s 5.5e-06 ) |
| ( dw_npolyf_s 6.5e-09 ) |
| ( dl_npolyf_s 1.5e-11 ) |
| ( rsh_ppolyf_s 7.3 ) |
| ( rend_ppolyf_s 5e-06 ) |
| ( dw_ppolyf_s 7.5e-09 ) |
| ( dl_ppolyf_s 1.5e-10 ) |
| ( rsh_ppolyf_u_1k 1000 ) |
| ( rend_ppolyf_u_1k 8.545e-05 ) |
| ( dw_ppolyf_u_1k 1.48e-08 ) |
| ( dl_ppolyf_u_1k 3.85e-11 ) |
| ( rsh_ppolyf_u_2k 2000 ) |
| ( rend_ppolyf_u_2k 3.316e-05 ) |
| ( dw_ppolyf_u_2k 2.256e-08 ) |
| ( dl_ppolyf_u_2k -9.32e-08 ) |
| ( rsh_ppolyf_u_3k 3000 ) |
| ( rend_ppolyf_u_3k 3.316e-05 ) |
| ( dw_ppolyf_u_3k 2.256e-08 ) |
| ( dl_ppolyf_u_3k -9.32e-08 ) |
| ( rsh_ppolyf_u_1k_6p0 1000 ) |
| ( rend_ppolyf_u_1k_6p0 8.545e-05 ) |
| ( dw_ppolyf_u_1k_6p0 1.48e-08 ) |
| ( dl_ppolyf_u_1k_6p0 3.85e-11 ) |
| ( rsh_ppolyf_u_2k_6p0 2000 ) |
| ( rend_ppolyf_u_2k_6p0 3.316e-05 ) |
| ( dw_ppolyf_u_2k_6p0 2.256e-08 ) |
| ( dl_ppolyf_u_2k_6p0 -9.32e-08 ) |
| ( rsh_rm1 0.09 ) |
| ( rend_rm1 0 ) |
| ( dw_rm1 0 ) |
| ( dl_rm1 0 ) |
| ( rsh_rm2 0.09 ) |
| ( rend_rm2 0 ) |
| ( dw_rm2 0 ) |
| ( dl_rm2 0 ) |
| ( rsh_rm3 0.09 ) |
| ( rend_rm3 0 ) |
| ( dw_rm3 0 ) |
| ( dl_rm3 0 ) |
| ( rsh_tm6k 0.06 ) |
| ( rend_tm6k 0 ) |
| ( dw_tm6k 0 ) |
| ( dl_tm6k 0 ) |
| ( rsh_tm9k 0.04 ) |
| ( rend_tm9k 0 ) |
| ( dw_tm9k 0 ) |
| ( dl_tm9k 0 ) |
| ( rsh_tm30k 0.0095 ) |
| ( rend_tm30k 0 ) |
| ( dw_tm30k 0 ) |
| ( dl_tm30k 0 ) |
| ( metalStack "6LM" ) |
| ( topmetal "9kA" ) |
| ) ;techParams |
| |
| viewTypeUnits( |
| ;( viewType userUnit dbuperuu ) |
| ;( -------- -------- -------- ) |
| ) ;viewTypeUnits |
| |
| mfgGridResolution( |
| ( 0.005000 ) |
| ) ;mfgGridResolution |
| |
| refTechLibs( |
| ; techLibName |
| ; ----------- |
| ) ;refTechLibs |
| |
| processFamily( |
| ) ;processFamily |
| |
| distanceMeasure( |
| ) ;distanceMeasure |
| |
| ) ;controls |
| |
| |
| ;******************************** |
| ; LAYER DEFINITION |
| ;******************************** |
| layerDefinitions( |
| |
| techPurposes( |
| ;( PurposeName Purpose# Abbreviation ) |
| ;( ----------- -------- ------------ ) |
| ;User-Defined Purposes: |
| ( dummy 1 dummy ) |
| ( Blockage 2 Blockage ) |
| ( marking 5 marking ) |
| ( metal1 11 m1 ) |
| ( metal2 12 m2 ) |
| ( metal3 13 m3 ) |
| ( metal4 14 m4 ) |
| ( metal5 15 m5 ) |
| ( metaltop 16 mt ) |
| ( VSIA 63 VSIA ) |
| ;System-Reserved Purposes: |
| ) ;techPurposes |
| |
| techLayers( |
| ;( LayerName Layer# Abbreviation ) |
| ;( --------- ------ ------------ ) |
| ;User-Defined Layers: |
| ( PR_BNDRY 0 PR_BNDRY ) |
| ( Latchup_MK 1 Latchup_MK ) |
| ( ZEROVT 4 ZEROVT ) |
| ( NAT_VT 5 NAT_VT ) |
| ( DNWELL 12 DNWELL ) |
| ( LVPWELL 13 LVPWELL ) |
| ( ALIGNMENT_VISIBILITY 14 ALIGN_VIS ) |
| ( D_CAP 17 D_CAP ) |
| ( ZST 18 ZST ) |
| ( NWELL 21 NWELL ) |
| ( COMP 22 COMP ) |
| ( ESD 24 ESD ) |
| ( CDPWELL 25 CDPWELL ) |
| ( POLY2 30 POLY2 ) |
| ( PPLUS 31 PPLUS ) |
| ( NPLUS 32 NPLUS ) |
| ( CNT 33 CNT ) |
| ( METAL1 34 METAL1 ) |
| ( VIA1 35 VIA1 ) |
| ( METAL2 36 METAL2 ) |
| ( PAD 37 PAD ) |
| ( VIA2 38 VIA2 ) |
| ( NCAP 39 NCAP ) |
| ( VIA3 40 VIA3 ) |
| ( VIA4 41 VIA4 ) |
| ( METAL3 42 METAL3 ) |
| ( METAL4 46 METAL4 ) |
| ( SAB 49 SAB ) |
| ( METALTOP 53 METALTOP ) |
| ( DUALGATE 55 DUALGATE ) |
| ( TEXT 58 TEXT ) |
| ( RESISTOR 62 RESISTOR ) |
| ( LVS_RF 63 LVS_RF ) |
| ( FHRES 64 FHRES ) |
| ( FUSETOP 75 FUSETOP ) |
| ( FUSEWINDOW_D 77 FUSEWINDOW_D ) |
| ( POLYFUSE 78 POLYFUSE ) |
| ( Schottky_diode 79 Schottky_diode ) |
| ( ZENER 80 ZENER ) |
| ( METAL5 81 METAL5 ) |
| ( VIA5 82 VIA5 ) |
| ( PRES 83 PRES ) |
| ( SRAM 97 SRAM ) |
| ( Border 98 Border ) |
| ( G1cell1 101 G1cell1 ) |
| ( G1cell2 102 G1cell2 ) |
| ( G1cell3 103 G1cell3 ) |
| ( G2cell1 104 G2cell1 ) |
| ( G2cell2 105 G2cell2 ) |
| ( G2cell3 106 G2cell3 ) |
| ( G3cell1 107 G3cell1 ) |
| ( SramCore 108 SramCore ) |
| ( G3cell3 109 G3cell3 ) |
| ( RES_MRK 110 RES_MRK ) |
| ( NDMY 111 NDMY ) |
| ( PMNDMY 112 PMNDMY ) |
| ( OPC_drc 113 OPC_drc ) |
| ( OTP_MK 114 OTP_MK ) |
| ( DIODE_MK 115 DIODE_MK ) |
| ( M_DIO 116 M_DIO ) |
| ( CAP_MK 117 CAP_MK ) |
| ( LVS_BJT 118 LVS_BJT ) |
| ( LVS_IO 119 LVS_IO ) |
| ( MOS_CAP_MK 120 MOS_CAP_MK ) |
| ( LVS_PSUB2 121 LVS_PSUB2 ) |
| ( IND_MRK 126 IND_MRK ) |
| ( boundary 127 boundary ) |
| ( LVS_DRAIN 129 LVS_DRAIN ) |
| ( V5_XTOR 130 V5_XTOR ) |
| ( GA_MK 131 GA_MK ) |
| ( PA_MK 132 PA_MK ) |
| ( MIM_L_MK 133 MIM_L_MK ) |
| ( DRC_BJT 134 DRC_BJT ) |
| ( MTPMARK 135 MTPMARK ) |
| ( HVPOLYRS 136 HVPOLYRS ) |
| ( UBMPPeri 145 UBMPPeri ) |
| ( UBMPArray 146 UBMPArray ) |
| ( UBMEPlate 147 UBMEPlate ) |
| ( PROBE_MK 148 PROBE_MK ) |
| ( GUARD_RING_MK 149 GUARD_RING_MK ) |
| ( ESD_MK 150 ESD_MK ) |
| ( LVS_Source 151 LVS_Source ) |
| ( WELL_DIODE_MK 152 WELL_DIODE_MK ) |
| ( MVSD 153 MVSD ) |
| ( MVPSD 154 MVPSD ) |
| ( LDMOS_XTOR 155 LDMOS_XTOR ) |
| ( PLFUSE 156 PLFUSE ) |
| ( EFUSE_MK 157 EFUSE_MK ) |
| ( EMCELL_FEOL_MK 158 MCELL_FEOL_MK) |
| ( YMTP_MK 159 YMTP_MK ) |
| ;System-Reserved Layers: |
| ( Unrouted 200 Unroute ) |
| ( Row 201 Row ) |
| ( Group 202 Group ) |
| ( Cannotoccupy 203 noOcupy ) |
| ( Canplace 204 Canplac ) |
| ( hardFence 205 hardFnc ) |
| ( softFence 206 softFnc ) |
| ( y0 207 y0 ) |
| ( y1 208 y1 ) |
| ( y2 209 y2 ) |
| ( y3 210 y3 ) |
| ( y4 211 y4 ) |
| ( y5 212 y5 ) |
| ( y6 213 y6 ) |
| ( y7 214 y7 ) |
| ( y8 215 y8 ) |
| ( y9 216 y9 ) |
| ( designFlow 217 dsnFlow ) |
| ( stretch 218 stretch ) |
| ( edgeLayer 219 edgeLyr ) |
| ( changedLayer 220 chngLyr ) |
| ( unset 221 unset ) |
| ( unknown 222 unknown ) |
| ( spike 223 spike ) |
| ( hiz 224 hiz ) |
| ( resist 225 resist ) |
| ( drive 226 drive ) |
| ( supply 227 supply ) |
| ( wire 228 wire ) |
| ( pin 229 pin ) |
| ( text 230 text ) |
| ( device 231 device ) |
| ( border 232 border ) |
| ( snap 233 snap ) |
| ( align 234 align ) |
| ( prBoundary 235 prBndry ) |
| ( instance 236 instnce ) |
| ( annotate 237 anotate ) |
| ( marker 238 marker ) |
| ( select 239 select ) |
| ( substrate 240 substra ) |
| ( grid 251 grid ) |
| ( axis 252 axis ) |
| ( hilite 253 hilite ) |
| ( background 254 bkground ) |
| ) ;techLayers |
| |
| techLayerPurposePriorities( |
| ;layers are ordered from lowest to highest priority |
| ;( LayerName Purpose ) |
| ;( --------- ------- ) |
| ( ZEROVT drawing ) |
| ( NAT_VT drawing ) |
| ( DNWELL drawing ) |
| ( LVPWELL drawing ) |
| ( NWELL drawing ) |
| ( COMP drawing ) |
| ( COMP grid ) |
| ( COMP blockage ) |
| ( COMP label ) |
| ( COMP dummy ) |
| ( ESD drawing ) |
| ( CDPWELL drawing ) |
| ( POLY2 drawing ) |
| ( POLY2 grid ) |
| ( POLY2 blockage ) |
| ( POLY2 label ) |
| ( POLY2 dummy ) |
| ( PPLUS drawing ) |
| ( NPLUS drawing ) |
| ( CNT drawing ) |
| ( CNT grid ) |
| ( CNT blockage ) |
| ( METAL1 drawing ) |
| ( METAL1 track ) |
| ( METAL1 grid ) |
| ( METAL1 blockage ) |
| ( METAL1 slot ) |
| ( METAL1 label ) |
| ( METAL1 dummy ) |
| ( METAL1 Blockage ) |
| ( METAL1 net ) |
| ( METAL1 boundary ) |
| ( METAL1 pin ) |
| ( VIA1 drawing ) |
| ( VIA1 grid ) |
| ( VIA1 blockage ) |
| ( VIA1 net ) |
| ( VIA1 boundary ) |
| ( VIA1 label ) |
| ( METAL2 drawing ) |
| ( METAL2 track ) |
| ( METAL2 grid ) |
| ( METAL2 blockage ) |
| ( METAL2 slot ) |
| ( METAL2 label ) |
| ( METAL2 dummy ) |
| ( METAL2 Blockage ) |
| ( METAL2 net ) |
| ( METAL2 boundary ) |
| ( METAL2 pin ) |
| ( VIA2 drawing ) |
| ( VIA2 grid ) |
| ( VIA2 blockage ) |
| ( VIA2 net ) |
| ( VIA2 boundary ) |
| ( VIA2 label ) |
| ( METAL3 drawing ) |
| ( METAL3 track ) |
| ( METAL3 grid ) |
| ( METAL3 blockage ) |
| ( METAL3 slot ) |
| ( METAL3 label ) |
| ( METAL3 dummy ) |
| ( METAL3 Blockage ) |
| ( METAL3 net ) |
| ( METAL3 boundary ) |
| ( METAL3 pin ) |
| ( VIA3 drawing ) |
| ( VIA3 grid ) |
| ( VIA3 blockage ) |
| ( VIA3 net ) |
| ( VIA3 boundary ) |
| ( VIA3 label ) |
| ( METAL4 drawing ) |
| ( METAL4 track ) |
| ( METAL4 grid ) |
| ( METAL4 blockage ) |
| ( METAL4 slot ) |
| ( METAL4 label ) |
| ( METAL4 dummy ) |
| ( METAL4 Blockage ) |
| ( METAL4 net ) |
| ( METAL4 boundary ) |
| ( METAL4 pin ) |
| ( VIA4 drawing ) |
| ( VIA4 grid ) |
| ( VIA4 blockage ) |
| ( VIA4 net ) |
| ( VIA4 boundary ) |
| ( VIA4 label ) |
| ( METAL5 drawing ) |
| ( METAL5 track ) |
| ( METAL5 grid ) |
| ( METAL5 blockage ) |
| ( METAL5 slot ) |
| ( METAL5 label ) |
| ( METAL5 dummy ) |
| ( METAL5 Blockage ) |
| ( METAL5 net ) |
| ( METAL5 boundary ) |
| ( METAL5 pin ) |
| ( VIA5 drawing ) |
| ( VIA5 grid ) |
| ( VIA5 blockage ) |
| ( VIA5 net ) |
| ( VIA5 boundary ) |
| ( VIA5 label ) |
| ( METALTOP drawing ) |
| ( METALTOP track ) |
| ( METALTOP grid ) |
| ( METALTOP blockage ) |
| ( METALTOP slot ) |
| ( METALTOP label ) |
| ( METALTOP dummy ) |
| ( METALTOP Blockage ) |
| ( METALTOP net ) |
| ( METALTOP boundary ) |
| ( METALTOP pin ) |
| ( PAD drawing ) |
| ( NCAP drawing ) |
| ( SAB drawing ) |
| ( DUALGATE drawing ) |
| ( TEXT drawing ) |
| ( RESISTOR drawing ) |
| ( FHRES drawing ) |
| ( LVS_RF drawing ) |
| ( Border marking ) |
| ( FUSETOP drawing ) |
| ( FUSEWINDOW_D drawing ) |
| ( POLYFUSE drawing ) |
| ( Schottky_diode drawing ) |
| ( ZENER drawing ) |
| ( PRES drawing ) |
| ( G1cell1 drawing ) |
| ( G1cell2 drawing ) |
| ( G1cell3 drawing ) |
| ( G2cell1 drawing ) |
| ( G2cell2 drawing ) |
| ( G2cell3 drawing ) |
| ( G3cell1 drawing ) |
| ( SramCore marking ) |
| ( G3cell3 drawing ) |
| ( RES_MRK drawing ) |
| ( RES_MRK metal1 ) |
| ( RES_MRK metal2 ) |
| ( RES_MRK metal3 ) |
| ( RES_MRK metal4 ) |
| ( RES_MRK metal5 ) |
| ( RES_MRK metaltop ) |
| ( NDMY drawing ) |
| ( PMNDMY drawing ) |
| ( OPC_drc drawing ) |
| ( OTP_MK drawing ) |
| ( DIODE_MK drawing ) |
| ( M_DIO drawing ) |
| ( CAP_MK drawing ) |
| ( MOS_CAP_MK drawing ) |
| ( LVS_BJT drawing ) |
| ( LVS_IO drawing ) |
| ( LVS_PSUB2 marking ) |
| ( ALIGNMENT_VISIBILITY drawing ) |
| ( D_CAP drawing ) |
| ( ZST drawing ) |
| ( IND_MRK drawing ) |
| ( SRAM drawing ) |
| ( PR_BNDRY drawing ) |
| ( Latchup_MK marking ) |
| ( boundary drawing ) |
| ( background drawing ) |
| ( grid drawing ) |
| ( grid drawing1 ) |
| ( annotate drawing ) |
| ( annotate drawing1 ) |
| ( annotate drawing2 ) |
| ( annotate drawing3 ) |
| ( annotate drawing4 ) |
| ( annotate drawing5 ) |
| ( annotate drawing6 ) |
| ( annotate drawing7 ) |
| ( annotate drawing8 ) |
| ( annotate drawing9 ) |
| ( instance drawing ) |
| ( instance label ) |
| ( prBoundary drawing ) |
| ( prBoundary boundary ) |
| ( prBoundary label ) |
| ( align drawing ) |
| ( hardFence drawing ) |
| ( softFence drawing ) |
| ( text drawing ) |
| ( text drawing1 ) |
| ( text drawing2 ) |
| ( border drawing ) |
| ( device drawing ) |
| ( device label ) |
| ( device drawing1 ) |
| ( device drawing2 ) |
| ( device annotate ) |
| ( wire drawing ) |
| ( wire label ) |
| ( wire flight ) |
| ( pin label ) |
| ( pin drawing ) |
| ( pin annotate ) |
| ( axis drawing ) |
| ( edgeLayer drawing ) |
| ( edgeLayer pin ) |
| ( snap drawing ) |
| ( stretch drawing ) |
| ( y0 drawing ) |
| ( y1 drawing ) |
| ( y2 drawing ) |
| ( y3 drawing ) |
| ( y4 drawing ) |
| ( y5 drawing ) |
| ( y6 drawing ) |
| ( y7 drawing ) |
| ( y8 drawing ) |
| ( y9 drawing ) |
| ( hilite drawing ) |
| ( hilite drawing1 ) |
| ( hilite drawing2 ) |
| ( hilite drawing3 ) |
| ( hilite drawing4 ) |
| ( hilite drawing5 ) |
| ( hilite drawing6 ) |
| ( hilite drawing7 ) |
| ( hilite drawing8 ) |
| ( hilite drawing9 ) |
| ( select drawing ) |
| ( drive drawing ) |
| ( hiz drawing ) |
| ( resist drawing ) |
| ( spike drawing ) |
| ( supply drawing ) |
| ( unknown drawing ) |
| ( unset drawing ) |
| ( designFlow drawing ) |
| ( designFlow drawing1 ) |
| ( designFlow drawing2 ) |
| ( designFlow drawing3 ) |
| ( designFlow drawing4 ) |
| ( designFlow drawing5 ) |
| ( designFlow drawing6 ) |
| ( designFlow drawing7 ) |
| ( designFlow drawing8 ) |
| ( designFlow drawing9 ) |
| ( changedLayer tool0 ) |
| ( changedLayer tool1 ) |
| ( marker warning ) |
| ( marker error ) |
| ( Row drawing ) |
| ( Row label ) |
| ( Group drawing ) |
| ( Group label ) |
| ( Cannotoccupy drawing ) |
| ( Cannotoccupy boundary ) |
| ( Canplace drawing ) |
| ( Unrouted drawing ) |
| ( Unrouted drawing1 ) |
| ( Unrouted drawing2 ) |
| ( Unrouted drawing3 ) |
| ( Unrouted drawing4 ) |
| ( Unrouted drawing5 ) |
| ( Unrouted drawing6 ) |
| ( Unrouted drawing7 ) |
| ( Unrouted drawing8 ) |
| ( Unrouted drawing9 ) |
| ( Row boundary ) |
| ( Unrouted track ) |
| ( marker annotate ) |
| ( marker info ) |
| ( marker ackWarn ) |
| ( marker soError ) |
| ( marker soCritical ) |
| ( marker critical ) |
| ( marker fatal ) |
| ( Group boundary ) |
| ( y0 flight ) |
| ( y1 flight ) |
| ( y2 flight ) |
| ( y3 flight ) |
| ( y4 flight ) |
| ( y5 flight ) |
| ( y6 flight ) |
| ( y7 flight ) |
| ( y8 flight ) |
| ( y9 flight ) |
| ( border boundary ) |
| ( snap grid ) |
| ( LVS_DRAIN drawing ) |
| ( V5_XTOR drawing ) |
| ( GA_MK drawing ) |
| ( PA_MK drawing ) |
| ( MIM_L_MK drawing ) |
| ( DRC_BJT drawing ) |
| ( MTPMARK drawing ) |
| ( HVPOLYRS drawing ) |
| ( UBMPPeri drawing ) |
| ( UBMPArray drawing ) |
| ( UBMEPlate drawing ) |
| ( PROBE_MK drawing ) |
| ( GUARD_RING_MK drawing ) |
| ( ESD_MK marking ) |
| ( LVS_Source marking ) |
| ( WELL_DIODE_MK marking ) |
| ( LDMOS_XTOR marking ) |
| ( PLFUSE marking ) |
| ( EFUSE_MK marking ) |
| ( EMCELL_FEOL_MK marking ) |
| ( YMTP_MK marking ) |
| ( MVSD drawing ) |
| ( MVPSD drawing ) |
| ( snap boundary ) |
| ) ;techLayerPurposePriorities |
| |
| techDisplays( |
| ;( LayerName Purpose Packet Vis Sel Con2ChgLy DrgEnbl Valid ) |
| ;( --------- ------- ------ --- --- --------- ------- ----- ) |
| ( ZEROVT drawing orangedots_S t t t t nil ) |
| ( NAT_VT drawing creamslash_S t t t t t ) |
| ( DNWELL drawing CannotoccupyBnd t t t t t ) |
| ( LVPWELL drawing deviceLbl t t t t t ) |
| ( NWELL drawing nwell t t t t t ) |
| ( COMP drawing tox t t t t t ) |
| ( COMP grid tox t nil nil nil nil ) |
| ( COMP blockage tox t nil t t nil ) |
| ( COMP label toxBnd t t t t t ) |
| ( COMP dummy toxBnd t t t t t ) |
| ( ESD drawing esd3v t t t t t ) |
| ( CDPWELL drawing pwell t t t t nil ) |
| ( POLY2 drawing poly2 t t t t t ) |
| ( POLY2 grid poly2 t nil nil nil nil ) |
| ( POLY2 blockage poly2 t nil t t nil ) |
| ( POLY2 label poly2Net t t t t t ) |
| ( POLY2 dummy poly2 t t t t t ) |
| ( PPLUS drawing pplus t t t t t ) |
| ( NPLUS drawing nplus t t t t t ) |
| ( CNT drawing cw t t t t t ) |
| ( CNT grid cw t nil nil nil nil ) |
| ( CNT blockage cw t nil t t nil ) |
| ( METAL1 drawing m1 t t t t t ) |
| ( METAL1 track m1 nil nil t t nil ) |
| ( METAL1 grid m1 t nil nil nil nil ) |
| ( METAL1 blockage m1 t nil t t nil ) |
| ( METAL1 slot m1Net t t t t t ) |
| ( METAL1 label m1Net t t t t t ) |
| ( METAL1 dummy m1 t t t t t ) |
| ( METAL1 Blockage m1 t t t t t ) |
| ( METAL1 net m1Net nil nil t t nil ) |
| ( METAL1 boundary m1Bnd nil nil t t nil ) |
| ( METAL1 pin m1Pin nil nil t t nil ) |
| ( VIA1 drawing v1 t t t t t ) |
| ( VIA1 grid v1 t nil nil nil nil ) |
| ( VIA1 blockage v1 t nil t t nil ) |
| ( VIA1 net v1Net nil nil t t nil ) |
| ( VIA1 boundary v1Bnd nil nil t t nil ) |
| ( VIA1 label v1Net t t t t t ) |
| ( METAL2 drawing m2 t t t t t ) |
| ( METAL2 track m2 nil nil t t nil ) |
| ( METAL2 grid m2 t nil nil nil nil ) |
| ( METAL2 blockage m2 t nil t t nil ) |
| ( METAL2 slot m2Net t t t t t ) |
| ( METAL2 label m2Net t t t t t ) |
| ( METAL2 dummy m2 t t t t t ) |
| ( METAL2 Blockage m2 t t t t t ) |
| ( METAL2 net m2Net nil nil t t nil ) |
| ( METAL2 boundary m2Bnd nil nil t t nil ) |
| ( METAL2 pin m2Pin nil nil t t nil ) |
| ( VIA2 drawing v2 t t t t t ) |
| ( VIA2 grid v2 t nil nil nil nil ) |
| ( VIA2 blockage v2 t nil t t nil ) |
| ( VIA2 net v2Net nil nil t t nil ) |
| ( VIA2 boundary v2Bnd nil nil t t nil ) |
| ( VIA2 label v2Net t t t t t ) |
| ( METAL3 drawing m3 t t t t t ) |
| ( METAL3 track m3 nil nil t t nil ) |
| ( METAL3 grid m3 t nil nil nil nil ) |
| ( METAL3 blockage m3 t nil t t nil ) |
| ( METAL3 slot m3Net t t t t t ) |
| ( METAL3 label m3Net t t t t t ) |
| ( METAL3 dummy m3 t t t t t ) |
| ( METAL3 Blockage m3 t t t t t ) |
| ( METAL3 net m3Net nil nil t t nil ) |
| ( METAL3 boundary m3Bnd nil nil t t nil ) |
| ( METAL3 pin m3Pin nil nil t t nil ) |
| ( VIA3 drawing v3 t t t t t ) |
| ( VIA3 grid v3 t nil nil nil nil ) |
| ( VIA3 blockage v3 t nil t t nil ) |
| ( VIA3 net v3Net nil nil t t nil ) |
| ( VIA3 boundary v3Bnd nil nil t t nil ) |
| ( VIA3 label v3Net t t t t t ) |
| ( METAL4 drawing m4 t t t t t ) |
| ( METAL4 track m4 nil nil t t nil ) |
| ( METAL4 grid m4 t nil nil nil nil ) |
| ( METAL4 blockage m4 t nil t t nil ) |
| ( METAL4 slot m4Net t t t t t ) |
| ( METAL4 label m4Net t t t t t ) |
| ( METAL4 dummy m4 t t t t t ) |
| ( METAL4 Blockage m4 t t t t t ) |
| ( METAL4 net m4Net nil nil t t nil ) |
| ( METAL4 boundary m4Bnd nil nil t t nil ) |
| ( METAL4 pin m4Pin nil nil t t nil ) |
| ( VIA4 drawing v4 t t t t t ) |
| ( VIA4 grid v4 t nil nil nil nil ) |
| ( VIA4 blockage v4 t nil t t nil ) |
| ( VIA4 net v4Net nil nil t t nil ) |
| ( VIA4 boundary v4Bnd nil nil t t nil ) |
| ( VIA4 label v4Net t t t t t ) |
| ( METAL5 drawing m5 t t t t t ) |
| ( METAL5 track m5 nil nil t t nil ) |
| ( METAL5 grid m5 t nil nil nil nil ) |
| ( METAL5 blockage m5 t nil t t nil ) |
| ( METAL5 slot m5Net t t t t t ) |
| ( METAL5 label m5Net t t t t t ) |
| ( METAL5 dummy m5 t t t t t ) |
| ( METAL5 Blockage m5 t t t t t ) |
| ( METAL5 net m5Net nil nil t t nil ) |
| ( METAL5 boundary m5Bnd nil nil t t nil ) |
| ( METAL5 pin m5Pin nil nil t t nil ) |
| ( VIA5 drawing creamslash_S t t t t t ) |
| ( VIA5 grid creamslash_S t nil nil nil nil ) |
| ( VIA5 blockage creamslash_S t nil t t nil ) |
| ( VIA5 net v5Net nil nil t t nil ) |
| ( VIA5 boundary v5Bnd nil nil t t nil ) |
| ( VIA5 label v5Net t t t t t ) |
| ( METALTOP drawing m6 t t t t t ) |
| ( METALTOP track m6 nil nil t t nil ) |
| ( METALTOP grid m6 t nil nil nil nil ) |
| ( METALTOP blockage m6 t nil t t nil ) |
| ( METALTOP slot m6Net t t t t t ) |
| ( METALTOP label m6Net t t t t t ) |
| ( METALTOP dummy m6 t t t t t ) |
| ( METALTOP Blockage m6 t t t t t ) |
| ( METALTOP net m6Net nil nil t t nil ) |
| ( METALTOP boundary m6Bnd nil nil t t nil ) |
| ( METALTOP pin m6Pin nil nil t t nil ) |
| ( PAD drawing pinkdaggerdashed t t t t t ) |
| ( NCAP drawing tanshortDash_L t t t t nil ) |
| ( SAB drawing rpo t t t t t ) |
| ( DUALGATE drawing hvolt t t t t t ) |
| ( TEXT drawing text t t t t t ) |
| ( RESISTOR drawing orangeX_S t t t t t ) |
| ( FHRES drawing orangeX_S t t t t t ) |
| ( LVS_RF drawing rcell t t t t t ) |
| ( Border marking text t t t t t ) |
| ( FUSETOP drawing limedot4shortDash t t t t t ) |
| ( FUSEWINDOW_D drawing greentriangle_S t t t t t ) |
| ( POLYFUSE drawing cyandot4shortDash t t t t t ) |
| ( Schottky_diode drawing orangedots_S t t t t t ) |
| ( ZENER drawing greendot4_S t t t t t ) |
| ( PRES drawing cyandot4thickLine2 t t t t nil ) |
| ( G1cell1 drawing cyandot4thickLine2 t t t t t ) |
| ( G1cell2 drawing cyandot4shortDash t t t t t ) |
| ( G1cell3 drawing orangedots_S t t t t t ) |
| ( G2cell1 drawing golddot4shortDash t t t t t ) |
| ( G2cell2 drawing greendot4_S t t t t t ) |
| ( G2cell3 drawing magentathickLine2_L t t t t t ) |
| ( G3cell1 drawing goldx_S t t t t t ) |
| ( SramCore marking limedot4_S t t t t t ) |
| ( G3cell3 drawing limeXthickLine2 t t t t t ) |
| ( RES_MRK drawing drcdummy t t t t t ) |
| ( RES_MRK metal1 drcdummy t t t t t ) |
| ( RES_MRK metal2 drcdummy t t t t t ) |
| ( RES_MRK metal3 drcdummy t t t t t ) |
| ( RES_MRK metal4 drcdummy t t t t t ) |
| ( RES_MRK metal5 drcdummy t t t t t ) |
| ( RES_MRK metaltop drcdummy t t t t t ) |
| ( NDMY drawing thickox t t t t t ) |
| ( PMNDMY drawing thickox t t t t t ) |
| ( OPC_drc drawing devbody t t t t t ) |
| ( OTP_MK drawing devbody t t t t t ) |
| ( DIODE_MK drawing devbody t t t t t ) |
| ( M_DIO drawing limedot4_S t t t t t ) |
| ( CAP_MK drawing magentadot2_S t t t t t ) |
| ( MOS_CAP_MK drawing zbip t t t t t ) |
| ( LVS_BJT drawing zbip t t t t t ) |
| ( LVS_IO drawing limedot4shortDash t t t t t ) |
| ( LVS_PSUB2 marking pfield t t t t t ) |
| ( ALIGNMENT_VISIBILITY drawing reddashed_L t t t t nil ) |
| ( D_CAP drawing grid1 t t t t t ) |
| ( ZST drawing hilite9 t t t t t ) |
| ( IND_MRK drawing tanthickLine2_L t t t t t ) |
| ( SRAM drawing siprot t t t t nil ) |
| ( PR_BNDRY drawing prBoundary t t t t t ) |
| ( Latchup_MK marking grid t t t t t ) |
| ( boundary drawing reddashed_L t t t t nil ) |
| ( background drawing background t nil t nil nil ) |
| ( grid drawing grid t nil t nil nil ) |
| ( grid drawing1 grid1 t nil t nil nil ) |
| ( annotate drawing annotate t t t t nil ) |
| ( annotate drawing1 annotate1 t t t t nil ) |
| ( annotate drawing2 annotate2 t t t t nil ) |
| ( annotate drawing3 annotate3 t t t t nil ) |
| ( annotate drawing4 annotate4 t t t t nil ) |
| ( annotate drawing5 annotate5 t t t t nil ) |
| ( annotate drawing6 annotate6 t t t t nil ) |
| ( annotate drawing7 annotate7 t t t t nil ) |
| ( annotate drawing8 annotate8 t t t t nil ) |
| ( annotate drawing9 annotate9 t t t t nil ) |
| ( instance drawing instance t t t t nil ) |
| ( instance label instanceLbl t t t t nil ) |
| ( prBoundary drawing prBoundary t t t t t ) |
| ( prBoundary boundary prBoundaryBnd t nil t t nil ) |
| ( prBoundary label prBoundaryLbl t t t t nil ) |
| ( align drawing defaultPacket t t t t nil ) |
| ( hardFence drawing hardFence t t t t nil ) |
| ( softFence drawing softFence t t t t nil ) |
| ( text drawing text t t t t nil ) |
| ( text drawing1 text1 t t t t nil ) |
| ( text drawing2 text2 t t t t nil ) |
| ( border drawing border t t t t nil ) |
| ( device drawing device t t t t nil ) |
| ( device label deviceLbl t t t t nil ) |
| ( device drawing1 device1 t t t t nil ) |
| ( device drawing2 device2 t t t t nil ) |
| ( device annotate deviceAnt t t t t nil ) |
| ( wire drawing wire t t t t nil ) |
| ( wire label wireLbl t t t t nil ) |
| ( wire flight wireFlt t t t t nil ) |
| ( pin label pinLbl t t t t nil ) |
| ( pin drawing pin t t t t nil ) |
| ( pin annotate pinAnt t t t t nil ) |
| ( axis drawing axis t nil t t nil ) |
| ( edgeLayer drawing edgeLayer t t t t nil ) |
| ( edgeLayer pin edgeLayerPin t t t t nil ) |
| ( snap drawing snap t t t t nil ) |
| ( stretch drawing stretch t t t t nil ) |
| ( y0 drawing y0 t t t t nil ) |
| ( y1 drawing y1 t t t t nil ) |
| ( y2 drawing y2 t t t t nil ) |
| ( y3 drawing y3 t t t t nil ) |
| ( y4 drawing y4 t t t t nil ) |
| ( y5 drawing y5 t t t t nil ) |
| ( y6 drawing y6 t t t t nil ) |
| ( y7 drawing y7 t t t t nil ) |
| ( y8 drawing y8 t t t t nil ) |
| ( y9 drawing y9 t t t t nil ) |
| ( hilite drawing hilite t t t t nil ) |
| ( hilite drawing1 hilite1 t t t t nil ) |
| ( hilite drawing2 hilite2 t t t t nil ) |
| ( hilite drawing3 hilite3 t t t t nil ) |
| ( hilite drawing4 hilite4 t t t t nil ) |
| ( hilite drawing5 hilite5 t t t t nil ) |
| ( hilite drawing6 hilite6 t t t t nil ) |
| ( hilite drawing7 hilite7 t t t t nil ) |
| ( hilite drawing8 hilite8 t t t t nil ) |
| ( hilite drawing9 hilite9 t t t t nil ) |
| ( select drawing select t t t t nil ) |
| ( drive drawing drive t t t t nil ) |
| ( hiz drawing hiz t t t t nil ) |
| ( resist drawing resist t t t t nil ) |
| ( spike drawing spike t t t t nil ) |
| ( supply drawing supply t t t t nil ) |
| ( unknown drawing unknown t t t t nil ) |
| ( unset drawing unset t t t t nil ) |
| ( designFlow drawing designFlow t nil nil nil t ) |
| ( designFlow drawing1 designFlow1 t nil nil nil t ) |
| ( designFlow drawing2 designFlow2 t nil nil nil t ) |
| ( designFlow drawing3 designFlow3 t nil nil nil t ) |
| ( designFlow drawing4 designFlow4 t nil nil nil t ) |
| ( designFlow drawing5 designFlow5 t nil nil nil t ) |
| ( designFlow drawing6 designFlow6 t nil nil nil t ) |
| ( designFlow drawing7 designFlow7 t nil nil nil t ) |
| ( designFlow drawing8 designFlow8 t nil nil nil t ) |
| ( designFlow drawing9 designFlow9 t nil nil nil t ) |
| ( changedLayer tool0 changedLayerTl0 t nil t nil nil ) |
| ( changedLayer tool1 changedLayerTl1 t nil t nil nil ) |
| ( marker warning markerWarn t t t t nil ) |
| ( marker error markerErr t t t t nil ) |
| ( Row drawing Row t t t t nil ) |
| ( Row label RowLbl t t t t nil ) |
| ( Group drawing Group t t t t nil ) |
| ( Group label GroupLbl t t t t nil ) |
| ( Cannotoccupy drawing Cannotoccupy t t t t nil ) |
| ( Cannotoccupy boundary CannotoccupyBnd t t t t nil ) |
| ( Canplace drawing Canplace t t t t nil ) |
| ( Unrouted drawing Unrouted t t t t nil ) |
| ( Unrouted drawing1 Unrouted1 t t t t nil ) |
| ( Unrouted drawing2 Unrouted2 t t t t nil ) |
| ( Unrouted drawing3 Unrouted3 t t t t nil ) |
| ( Unrouted drawing4 Unrouted4 t t t t nil ) |
| ( Unrouted drawing5 Unrouted5 t t t t nil ) |
| ( Unrouted drawing6 Unrouted6 t t t t nil ) |
| ( Unrouted drawing7 Unrouted7 t t t t nil ) |
| ( Unrouted drawing8 Unrouted8 t t t t nil ) |
| ( Unrouted drawing9 Unrouted9 t t t t nil ) |
| ( Row boundary RowBnd t t t t nil ) |
| ( Unrouted track UnroutedTrk t t t t nil ) |
| ( marker annotate markerAno t t t t nil ) |
| ( marker info markerInf t t t t nil ) |
| ( marker ackWarn markerAck t t t t nil ) |
| ( marker soError markerSer t t t t nil ) |
| ( marker soCritical markerScr t t t t nil ) |
| ( marker critical markerCrt t t t t nil ) |
| ( marker fatal markerFat t t t t nil ) |
| ( Group boundary GroupBnd t nil t t nil ) |
| ( y0 flight y0Flt t t t t nil ) |
| ( y1 flight y1Flt t t t t nil ) |
| ( y2 flight y2Flt t t t t nil ) |
| ( y3 flight y3Flt t t t t nil ) |
| ( y4 flight y4Flt t t t t nil ) |
| ( y5 flight y5Flt t t t t nil ) |
| ( y6 flight y6Flt t t t t nil ) |
| ( y7 flight y7Flt t t t t nil ) |
| ( y8 flight y8Flt t t t t nil ) |
| ( y9 flight y9Flt t t t t nil ) |
| ( border boundary area t nil t t nil ) |
| ( snap grid snap t nil t nil nil ) |
| ( LVS_DRAIN drawing lvs_drain t t t t t ) |
| ( V5_XTOR drawing v5_xtor t t t t t ) |
| ( GA_MK drawing ga_mk t t t t t ) |
| ( PA_MK drawing pa_mk t t t t t ) |
| ( MIM_L_MK drawing m1 t t t t t ) |
| ( DRC_BJT drawing m2 t t t t t ) |
| ( MTPMARK drawing m2 t t t t t ) |
| ( HVPOLYRS drawing m2 t t t t t ) |
| ( UBMPPeri drawing m1 t t t t t ) |
| ( UBMPArray drawing m2 t t t t t ) |
| ( UBMEPlate drawing m3 t t t t t ) |
| ( PROBE_MK drawing m4 t t t t t ) |
| ( GUARD_RING_MK drawing m5 t t t t t ) |
| ( ESD_MK marking m1 t t t t t ) |
| ( LVS_Source marking m2 t t t t t ) |
| ( WELL_DIODE_MK marking m3 t t t t t ) |
| ( PLFUSE marking plfuse t t t t t ) |
| ( EFUSE_MK marking efusemk t t t t t ) |
| ( EMCELL_FEOL_MK marking emcellmk t t t t t ) |
| ( YMTP_MK marking ymtpmk t t t t t ) |
| ( LDMOS_XTOR marking ldmosxtor t t t t t ) |
| ( MVSD drawing mvsd t t t t t ) |
| ( MVPSD drawing mvpsd t t t t t ) |
| ( snap boundary snap t nil t t nil ) |
| ) ;techDisplays |
| |
| techLayerProperties( |
| ;( PropName Layer1 [ Layer2 ] PropValue ) |
| ;( -------- ------ ---------- --------- ) |
| ( sheetResistance NWELL 1050.000000 ) |
| ( sheetResistance POLY2 50.000000 ) |
| ( sheetResistance PPLUS 150.000000 ) |
| ( sheetResistance NPLUS 80.000000 ) |
| ( areaCapacitance METAL1 3.020000e-05 ) |
| ( edgeCapacitance METAL1 3.963000e-11 ) |
| ( sheetResistance METAL1 0.083000 ) |
| ( routingOffset METAL1 0 ) |
| ( routingPitch METAL1 0.460000 ) |
| ( areaCapacitance METAL2 1.330000e-05 ) |
| ( edgeCapacitance METAL2 2.467000e-11 ) |
| ( sheetResistance METAL2 0.080000 ) |
| ( routingOffset METAL2 0 ) |
| ( routingPitch METAL2 0.560000 ) |
| ( areaCapacitance METAL3 8.870000e-06 ) |
| ( edgeCapacitance METAL3 1.828000e-11 ) |
| ( sheetResistance METAL3 0.080000 ) |
| ( routingOffset METAL3 0 ) |
| ( routingPitch METAL3 0.560000 ) |
| ( areaCapacitance METAL4 6.480000e-06 ) |
| ( edgeCapacitance METAL4 1.410000e-11 ) |
| ( sheetResistance METAL4 0.051000 ) |
| ( routingOffset METAL4 0 ) |
| ( routingPitch METAL4 0.560000 ) |
| ( areaCapacitance METAL5 5.160000e-06 ) |
| ( edgeCapacitance METAL5 1.204000e-11 ) |
| ( sheetResistance METAL5 0.041000 ) |
| ( routingOffset METAL5 0 ) |
| ( routingPitch METAL5 0.560000 ) |
| ) ;techLayerProperties |
| |
| techDerivedLayers( |
| ;( DerivedLayerName # composition ) |
| ;( ---------------- ------ ------------ ) |
| ) ;techDerivedLayers |
| |
| ) ;layerDefinitions |
| |
| |
| ;******************************** |
| ; LAYER RULES |
| ;******************************** |
| layerRules( |
| |
| equivalentLayers( |
| ;( list of layers ) |
| ;( -------------- ) |
| ) ;equivalentLayers |
| |
| functions( |
| ;( layer function [maskNumber]) |
| ;( ----- -------- ------------) |
| ( COMP "metal" 0 ) |
| ( POLY2 "metal" 1 ) |
| ( CNT "cut" 2 ) |
| ( METAL1 "metal" 3 ) |
| ( VIA1 "cut" 4 ) |
| ( METAL2 "metal" 5 ) |
| ( VIA2 "cut" 6 ) |
| ( METAL3 "metal" 7 ) |
| ( VIA3 "cut" 8 ) |
| ( METAL4 "metal" 9 ) |
| ( VIA4 "cut" 10 ) |
| ( METAL5 "metal" 11 ) |
| ( VIA5 "cut" 12 ) |
| ( METALTOP "metal" 13 ) |
| ) ;functions |
| |
| mfgResolutions( |
| ;( layer mfgResolution ) |
| ;( ----- ------------- ) |
| ) ;mfgResolutions |
| |
| routingDirections( |
| ;( layer direction ) |
| ;( ----- --------- ) |
| ( METAL1 "horizontal" ) |
| ( METAL2 "vertical" ) |
| ( METAL3 "horizontal" ) |
| ( METAL4 "vertical" ) |
| ( METAL5 "horizontal" ) |
| ( METALTOP "vertical" ) |
| ) ;routingDirections |
| |
| incompatibleLayers( |
| ;( layer incompatibleLayers ) |
| ;( ----- ------------------ ) |
| ) ;incompatibleLayers |
| |
| labelLayers( |
| ;( textLayer layers ) |
| ;( --------- ---------------------------------- ) |
| ) ;labelLayers |
| |
| stampLabelLayers( |
| ;( textLayer layers ) |
| ;( --------- ---------------------------------- ) |
| ) ;stampLabelLayers |
| |
| backsideLayers( |
| ; layerName1 layerName2 ... |
| ; ---------------------------------------------------------------------- |
| |
| ) ;backsideLayers |
| |
| currentDensity( |
| ;( rule layer1 layer2 value ) |
| ;( ---- ------ ------ ----- ) |
| ) ;currentDensity |
| |
| currentDensityTables( |
| ;( rule layer1 |
| ; (( index1Definitions [index2Definitions]) [defaultValue] ) |
| ; (table)) |
| ;( ----------------------------------------------------------------------) |
| ) ;currentDensityTables |
| |
| cutClasses( |
| ;( layerName ) |
| ;( (cutClassName (width length)) ) |
| ;( ---------------------------------------------------------------------- ) |
| ) ;cutClasses |
| |
| ) ;layerRules |
| |
| |
| ;******************************** |
| ; VIADEFS |
| ;******************************** |
| viaDefs( |
| |
| standardViaDefs( |
| ;( viaDefName layer1 layer2 (cutLayer cutWidth cutHeight [resistancePerCut]) |
| ; (cutRows cutCol (cutSpace)) |
| ; (layer1Enc) (layer2Enc) (layer1Offset) (layer2Offset) (origOffset) |
| ; [implant1 (implant1Enc) [implant2 (implant2Enc) [well/substrate]]]) |
| ;( -------------------------------------------------------------------------- ) |
| ( M1_PSUB COMP METAL1 ("CNT" 0.22 0.22) |
| (1 1 (0.25 0.25)) |
| (0.115 0.115) (0.06 0.06) (0.0 0.0) (0.0 0.0) (0.0 0.0) |
| PPLUS (0.16 0.16) |
| ) |
| ( MT_M5 METAL5 METALTOP ("VIA5" 0.26 0.26) |
| (1 1 (0.45 0.45)) |
| (0.06 0.06) (0.09 0.09) (0.0 0.0) (0.0 0.0) (0.0 0.0) |
| ) |
| ( M5_M4 METAL4 METAL5 ("VIA4" 0.26 0.26) |
| (1 1 (0.26 0.26)) |
| (0.06 0.06) (0.06 0.06) (0.0 0.0) (0.0 0.0) (0.0 0.0) |
| ) |
| ( M4_M3 METAL3 METAL4 ("VIA3" 0.26 0.26) |
| (1 1 (0.26 0.26)) |
| (0.06 0.06) (0.06 0.06) (0.0 0.0) (0.0 0.0) (0.0 0.0) |
| ) |
| ( M3_M2 METAL2 METAL3 ("VIA2" 0.26 0.26) |
| (1 1 (0.26 0.26)) |
| (0.06 0.06) (0.06 0.06) (0.0 0.0) (0.0 0.0) (0.0 0.0) |
| ) |
| ( M2_M1 METAL1 METAL2 ("VIA1" 0.26 0.26) |
| (1 1 (0.26 0.26)) |
| (0.06 0.06) (0.06 0.06) (0.0 0.0) (0.0 0.0) (0.0 0.0) |
| ) |
| ( M1_POLY2 POLY2 METAL1 ("CNT" 0.22 0.22) |
| (1 1 (0.25 0.25)) |
| (0.1 0.1) (0.06 0.06) (0.0 0.0) (0.0 0.0) (0.0 0.0) |
| ) |
| ( M1_PACTIVE COMP METAL1 ("CNT" 0.22 0.22) |
| (1 1 (0.25 0.25)) |
| (0.115 0.115) (0.06 0.06) (0.0 0.0) (0.0 0.0) (0.0 0.0) |
| PPLUS (0.16 0.16) |
| ) |
| ( M1_NWELL COMP METAL1 ("CNT" 0.22 0.22) |
| (1 1 (0.25 0.25)) |
| (0.115 0.115) (0.06 0.06) (0.0 0.0) (0.0 0.0) (0.0 0.0) |
| NPLUS (0.16 0.16) NWELL (0.47 0.47) |
| ) |
| ( M1_NACTIVE COMP METAL1 ("CNT" 0.22 0.22) |
| (1 1 (0.25 0.25)) |
| (0.115 0.115) (0.06 0.06) (0.0 0.0) (0.0 0.0) (0.0 0.0) |
| NPLUS (0.16 0.16) |
| ) |
| ) ;standardViaDefs |
| |
| customViaDefs( |
| ;( viaDefName libName cellName viewName layer1 layer2 resistancePerCut) |
| ;( ---------- ------- -------- -------- ------ ------ ----------------) |
| ( M2_M1_via gf018hv_green M2_M1 via METAL1 METAL2 0.0) |
| ( M3_M2_via gf018hv_green M3_M2 via METAL2 METAL3 0.0) |
| ( M4_M3_via gf018hv_green M4_M3 via METAL3 METAL4 0.0) |
| ( M5_M4_via gf018hv_green M5_M4 via METAL4 METAL5 0.0) |
| ( MT_M5_via gf018hv_green MT_M5 via METAL5 METALTOP 0.0) |
| ) ;customViaDefs |
| |
| standardViaVariants( |
| ;( viaVariantName viaDefName (cutLayer cutWidth cutHeight) |
| ; (cutRows cutCol (cutSpace)) |
| ; (layer1Enc) (layer2Enc) (layer1Offset) (layer2Offset) (origOffset) |
| ; (implant1Enc) (implant2Enc) (cut_pattern) ) |
| ;( -------------------------------------------------------------------------- ) |
| ) ;standardViaVariants |
| |
| customViaVariants( |
| ;(viaVariantName viaDefName (paramName paramValue) ...) |
| ;( -------------------------------------------------------------------------- ) |
| ) ;customViaVariants |
| |
| ) ;viaDefs |
| |
| |
| |
| ;******************************** |
| ; CONSTRAINT GROUPS |
| ;******************************** |
| constraintGroups( |
| |
| ;( group [override] ) |
| ;( ----- ---------- ) |
| ( "default" nil |
| ) ;default |
| |
| ;( group [override] ) |
| ;( ----- ---------- ) |
| ( "virtuosoDefaultExtractorSetup" nil |
| |
| interconnect( |
| ( validLayers (METALTOP VIA5 METAL5 VIA4 METAL4 VIA3 METAL3 VIA2 METAL2 VIA1 METAL1 CNT POLY2 COMP ) ) |
| ) ;interconnect |
| ) ;virtuosoDefaultExtractorSetup |
| |
| ;( group [override] ) |
| ;( ----- ---------- ) |
| ( "LEFDefaultRouteSpec" nil |
| |
| interconnect( |
| ( validLayers (METAL1 METAL2 METAL3 METAL4 METAL5 METALTOP ) ) |
| ( validVias (M2_M1_via M3_M2_via M4_M3_via M5_M4_via MT_M5_via ) ) |
| ) ;interconnect |
| |
| routingGrids( |
| ( verticalPitch "METAL1" 0.46 ) |
| ( horizontalPitch "METAL1" 0.46 ) |
| ( verticalOffset "METAL1" 0.23 ) |
| ( verticalPitch "METAL2" 0.56 ) |
| ( horizontalPitch "METAL2" 0.56 ) |
| ( horizontalOffset "METAL2" 0.28 ) |
| ( verticalPitch "METAL3" 0.56 ) |
| ( horizontalPitch "METAL3" 0.56 ) |
| ( verticalOffset "METAL3" 0.28 ) |
| ( verticalPitch "METAL4" 0.56 ) |
| ( horizontalPitch "METAL4" 0.56 ) |
| ( horizontalOffset "METAL4" 0.28 ) |
| ( verticalPitch "METAL5" 0.56 ) |
| ( horizontalPitch "METAL5" 0.56 ) |
| ( verticalOffset "METAL5" 0.28 ) |
| ( verticalPitch "METALTOP" 0.9 ) |
| ( horizontalPitch "METALTOP" 0.9 ) |
| ( horizontalOffset "METALTOP" 0.45 ) |
| ) ;routingGrids |
| ) ;LEFDefaultRouteSpec |
| |
| ;( group [override] ) |
| ;( ----- ---------- ) |
| ( "foundry" nil |
| |
| spacings( |
| ( minWidth "NWELL" 0.86 ) |
| ( minSpacing "NWELL" 3.0 ) |
| ( minSameNetSpacing "NWELL" 1.0 ) |
| ( minWidth "COMP" 0.22 ) |
| ( minSpacing "COMP" 0.6 ) |
| ( minSameNetSpacing "COMP" 0.28 ) |
| ( minArea "COMP" 0.2025 ) |
| ( minWidth "DUALGATE" 0.7 ) |
| ( minSpacing "DUALGATE" 0.44 ) |
| ( minWidth "PPLUS" 0.4 ) |
| ( minSpacing "PPLUS" 0.4 ) |
| ( minArea "PPLUS" 0.35 ) |
| ( minWidth "NPLUS" 0.4 ) |
| ( minSpacing "NPLUS" 0.4 ) |
| ( minArea "NPLUS" 0.35 ) |
| ( minWidth "CNT" 0.22 ) |
| ( minSpacing "CNT" 0.25 ) |
| ( minWidth "METAL1" 0.23 ) |
| ( minSpacing "METAL1" 0.23 ) |
| ( minArea "METAL1" 0.1444 ) |
| ( minWidth "VIA1" 0.26 ) |
| ( minSpacing "VIA1" 0.26 ) |
| ( minWidth "METAL2" 0.28 ) |
| ( minSpacing "METAL2" 0.28 ) |
| ( minArea "METAL2" 0.1444 ) |
| ( minWidth "VIA2" 0.26 ) |
| ( minSpacing "VIA2" 0.26 ) |
| ( minWidth "METAL3" 0.28 ) |
| ( minSpacing "METAL3" 0.28 ) |
| ( minArea "METAL3" 0.1444 ) |
| ( minWidth "VIA3" 0.26 ) |
| ( minSpacing "VIA3" 0.26 ) |
| ( minWidth "METAL4" 0.28 ) |
| ( minSpacing "METAL4" 0.28 ) |
| ( minArea "METAL4" 0.1444 ) |
| ( minWidth "VIA4" 0.26 ) |
| ( minSpacing "VIA4" 0.26 ) |
| ( minWidth "METAL5" 0.28 ) |
| ( minSpacing "METAL5" 0.28 ) |
| ( minArea "METAL5" 0.1444 ) |
| ( minWidth "VIA5" 0.26 ) |
| ( minSpacing "VIA5" 0.26 ) |
| ( minWidth "PAD" 86.0 ) |
| ( minSpacing "PAD" 15.0 ) |
| ( minWidth "METALTOP" 0.44 ) |
| ( minSpacing "METALTOP" 0.46 ) |
| ( minArea "METALTOP" 0.5625 ) |
| ( minSpacing "POLY2" 0.25 ) |
| ( minWidth "POLY2" 0.18 ) |
| ( minWidth "ESD" 0.6 ) |
| ( minSpacing "ESD" 0.6 ) |
| ( minSameNetSpacing "PPLUS" 0.4 ) |
| ( minSameNetSpacing "NPLUS" 0.4 ) |
| ( minArea "CNT" 0.0484 ) |
| ( minSameNetSpacing "CNT" 0.25 ) |
| ( minSameNetSpacing "METAL1" 0.23 ) |
| ( minSameNetSpacing "VIA1" 0.26 ) |
| ( minSameNetSpacing "METAL2" 0.28 ) |
| ( minSameNetSpacing "METAL3" 0.28 ) |
| ( minSameNetSpacing "METAL4" 0.28 ) |
| ( minSameNetSpacing "METAL5" 0.28 ) |
| ( minSameNetSpacing "PAD" 15.0 ) |
| ( minWidth "SAB" 0.43 ) |
| ( minSpacing "SAB" 0.43 ) |
| ( minArea "SAB" 2.0 ) |
| ( minSpacing "NWELL" "COMP" 0.6 ) |
| ( minSpacing "NWELL" "NPLUS" 0.43 ) |
| ( minSpacing "NWELL" "PPLUS" 0.12 ) |
| ( minSpacing "DUALGATE" "COMP" 0.24 ) |
| ( minSpacing "DUALGATE" "POLY2" 0.4 ) |
| ( minSpacing "PPLUS" "COMP" 0.35 ) |
| ( minSpacing "NPLUS" "COMP" 0.16 ) |
| ( minSpacing "COMP" "CNT" 0.4 ) |
| ( minSpacing "POLY2" "CNT" 0.16 ) |
| ( minSpacing "POLY2" "COMP" 0.1 ) |
| ( minSpacing "ESD" "NPLUS" 0.3 ) |
| ( minSpacing "ESD" "PPLUS" 0.3 ) |
| ( minSpacing "ESD" "COMP" 0.6 ) |
| ( minSpacing "SAB" "COMP" 0.22 ) |
| ( minSpacing "SAB" "CNT" 0.22 ) |
| ( minSpacing "SAB" "POLY2" 0.3 ) |
| ( minSpacing "SAB" "NPLUS" 0.32 ) |
| ) ;spacings |
| |
| orderedSpacings( |
| ( minExtensionDistance "NWELL" "NPLUS" 0.12 ) |
| ( minExtensionDistance "NWELL" "COMP" 0.43 ) |
| ( minExtensionDistance "PPLUS" "POLY2" 0.23 ) |
| ( minExtensionDistance "NPLUS" "POLY2" 0.23 ) |
| ( minExtensionDistance "DUALGATE" "COMP" 0.24 ) |
| ( minExtensionDistance "DUALGATE" "PPLUS" 0.24 ) |
| ( minExtensionDistance "DUALGATE" "POLY2" 0.4 ) |
| ( minExtensionDistance "POLY2" "COMP" 0.22 ) |
| ( minExtensionDistance "COMP" "POLY2" 0.24 ) |
| ( minExtensionDistance "PPLUS" "COMP" 0.16 ) |
| ( minExtensionDistance "NPLUS" "COMP" 0.16 ) |
| ( minExtensionDistance "POLY2" "CNT" 0.1 ) |
| ( minExtensionDistance "COMP" "CNT" 0.1 ) |
| ( minExtensionDistance "PPLUS" "CNT" 0.1 ) |
| ( minExtensionDistance "NPLUS" "CNT" 0.1 ) |
| ( minExtensionDistance "NPLUS" "NWELL" 0.0 ) |
| ( minExtensionDistance "METAL1" "CNT" 0.06 ) |
| ( minExtensionDistance "METAL1" "VIA1" 0.06 ) |
| ( minExtensionDistance "METAL2" "VIA1" 0.06 ) |
| ( minExtensionDistance "METAL2" "VIA2" 0.06 ) |
| ( minExtensionDistance "METAL3" "VIA2" 0.06 ) |
| ( minExtensionDistance "METAL3" "VIA3" 0.06 ) |
| ( minExtensionDistance "METAL4" "VIA3" 0.06 ) |
| ( minExtensionDistance "METAL4" "VIA4" 0.06 ) |
| ( minExtensionDistance "METAL5" "VIA4" 0.06 ) |
| ( minExtensionDistance "METAL5" "VIA5" 0.06 ) |
| ( minExtensionDistance "METAL1" "PAD" 5.0 ) |
| ( minExtensionDistance "METAL2" "PAD" 5.0 ) |
| ( minExtensionDistance "METAL3" "PAD" 5.0 ) |
| ( minExtensionDistance "METAL4" "PAD" 5.0 ) |
| ( minExtensionDistance "METAL5" "PAD" 5.0 ) |
| ( minExtensionDistance "METALTOP" "PAD" 5.0 ) |
| ( minExtensionDistance "METALTOP" "VIA5" 0.06 ) |
| ( minExtensionDistance "ESD" "COMP" 0.25 ) |
| ( minExtensionDistance "NWELL" "NWELL" 0.0 ) |
| ( minExtensionDistance "NWELL" "PPLUS" 1.2 ) |
| ( minExtensionDistance "SAB" "COMP" 0.22 ) |
| ( minExtensionDistance "COMP" "SAB" 0.22 ) |
| ( minExtensionDistance "SAB" "POLY2" 0.22 ) |
| ) ;orderedSpacings |
| |
| spacings( |
| ( stackable "VIA1" "VIA2" t ) |
| ( stackable "VIA2" "VIA3" t ) |
| ( stackable "VIA3" "VIA4" t ) |
| ( stackable "VIA4" "VIA5" t ) |
| ) ;spacings |
| |
| antennaModels( |
| ;( model ) |
| ;( ----- ) |
| ( "default" |
| antenna( |
| ( areaRatio "POLY2" 100.0 ) |
| ( diffAreaRatio "POLY2" 100.0 ) |
| ) ;antenna |
| antenna( |
| ( areaRatio "CNT" 2.0 ) |
| ( diffAreaRatio "CNT" 2.0 ) |
| ) ;antenna |
| antenna( |
| ( areaRatio "METAL1" 400.0 ) |
| ( diffAreaRatio "METAL1" 400.0 ) |
| ) ;antenna |
| antenna( |
| ( areaRatio "VIA1" 10.0 ) |
| ( diffAreaRatio "VIA1" 10.0 ) |
| ) ;antenna |
| antenna( |
| ( areaRatio "METAL2" 400.0 ) |
| ( diffAreaRatio "METAL2" 400.0 ) |
| ) ;antenna |
| antenna( |
| ( areaRatio "VIA2" 10.0 ) |
| ( diffAreaRatio "VIA2" 10.0 ) |
| ) ;antenna |
| antenna( |
| ( areaRatio "METAL3" 400.0 ) |
| ( diffAreaRatio "METAL3" 400.0 ) |
| ) ;antenna |
| antenna( |
| ( areaRatio "VIA3" 10.0 ) |
| ( diffAreaRatio "VIA3" 10.0 ) |
| ) ;antenna |
| antenna( |
| ( areaRatio "METAL4" 400.0 ) |
| ( diffAreaRatio "METAL4" 400.0 ) |
| ) ;antenna |
| antenna( |
| ( areaRatio "VIA4" 10.0 ) |
| ( diffAreaRatio "VIA4" 10.0 ) |
| ) ;antenna |
| antenna( |
| ( areaRatio "METAL5" 400.0 ) |
| ( diffAreaRatio "METAL5" 400.0 ) |
| ) ;antenna |
| antenna( |
| ( areaRatio "VIA5" 10.0 ) |
| ( diffAreaRatio "VIA5" 10.0 ) |
| ) ;antenna |
| antenna( |
| ( areaRatio "METALTOP" 400.0 ) |
| ( diffAreaRatio "METALTOP" 400.0 ) |
| ) ;antenna |
| cumulativeMetalAntenna( |
| ( areaRatio 0.0 ) |
| ) ;cumulativeMetalAntenna |
| cumulativeViaAntenna( |
| ( areaRatio 0.0 ) |
| ) ;cumulativeViaAntenna |
| ) ;default |
| ( "second" |
| antenna( |
| ( areaRatio "POLY2" 10.0 ) |
| ( diffAreaRatio "POLY2" 10.0 ) |
| ) ;antenna |
| antenna( |
| ( areaRatio "CNT" 2.0 ) |
| ( diffAreaRatio "CNT" 2.0 ) |
| ) ;antenna |
| antenna( |
| ( areaRatio "METAL1" 150.0 ) |
| ( diffAreaRatio "METAL1" 150.0 ) |
| ) ;antenna |
| antenna( |
| ( areaRatio "VIA1" 10.0 ) |
| ( diffAreaRatio "VIA1" 10.0 ) |
| ) ;antenna |
| antenna( |
| ( areaRatio "METAL2" 150.0 ) |
| ( diffAreaRatio "METAL2" 150.0 ) |
| ) ;antenna |
| antenna( |
| ( areaRatio "VIA2" 10.0 ) |
| ( diffAreaRatio "VIA2" 10.0 ) |
| ) ;antenna |
| antenna( |
| ( areaRatio "METAL3" 150.0 ) |
| ( diffAreaRatio "METAL3" 150.0 ) |
| ) ;antenna |
| antenna( |
| ( areaRatio "VIA3" 10.0 ) |
| ( diffAreaRatio "VIA3" 10.0 ) |
| ) ;antenna |
| antenna( |
| ( areaRatio "METAL4" 150.0 ) |
| ( diffAreaRatio "METAL4" 150.0 ) |
| ) ;antenna |
| antenna( |
| ( areaRatio "VIA4" 10.0 ) |
| ( diffAreaRatio "VIA4" 10.0 ) |
| ) ;antenna |
| antenna( |
| ( areaRatio "METAL5" 150.0 ) |
| ( diffAreaRatio "METAL5" 150.0 ) |
| ) ;antenna |
| antenna( |
| ( areaRatio "VIA5" 10.0 ) |
| ( diffAreaRatio "VIA5" 10.0 ) |
| ) ;antenna |
| antenna( |
| ( areaRatio "METALTOP" 150.0 ) |
| ( diffAreaRatio "METALTOP" 150.0 ) |
| ) ;antenna |
| cumulativeMetalAntenna( |
| ( areaRatio 0.0 ) |
| ) ;cumulativeMetalAntenna |
| cumulativeViaAntenna( |
| ( areaRatio 0.0 ) |
| ) ;cumulativeViaAntenna |
| ) ;second |
| ) ;antennaModels |
| |
| spacings( |
| ;( constraint layer1 [layer2] value ) |
| ;( ---------- ------ -------- ----- ) |
| ( minWidthRes "NWELL" 2.0 ) |
| ( minSpaceLowResP2 "POLY2" 0.65 ) |
| ( mwULP "POLY2" 0.2 ) |
| ( msRes "POLY2" 0.75 ) |
| ( minWidthThickGate "POLY2" 0.35 ) |
| ( defWidth "CNT" 0.4 ) |
| ( routingPitch "METAL1" 0.46 ) |
| ( routingOffset "METAL1" 0 ) |
| ( routingPitch "METAL2" 0.56 ) |
| ( routingOffset "METAL2" 0 ) |
| ( routingPitch "METAL3" 0.56 ) |
| ( routingOffset "METAL3" 0 ) |
| ( routingPitch "METAL4" 0.56 ) |
| ( routingOffset "METAL4" 0 ) |
| ( routingPitch "METAL5" 0.56 ) |
| ( routingOffset "METAL5" 0 ) |
| ( minEncosureS "NPLUS" "COMP" 0.18 ) |
| ( minOverlap "RES_MRK" "NWELL" 0.5 ) |
| ( minOverlap "NWELL" "PPLUS" 0.43 ) |
| ( minOverlap "PPLUS" "COMP" 0.45 ) |
| ( minOverlap "NPLUS" "COMP" 0.45 ) |
| ( minExtCap "POLY2" "COMP" 0.22 ) |
| ( minOverlap "NAT_VT" "POLY2" 4 ) |
| ) ;spacings |
| |
| electrical( |
| ;( constraint layer1 [layer2] value ) |
| ;( ---------- ------ -------- ----- ) |
| ( contactRes "NPLUS" 2.20704 ) |
| ( contactRes "PPLUS" 4.38988 ) |
| ( contactRes "POLY2" 1.27292 ) |
| ) ;electrical |
| |
| orderedElectrical( |
| ;( constraint layer1 layer2 value ) |
| ;( ---------- ------ ------ ------ ) |
| ( areaCap "METAL1" "COMP" 4.13e-05 ) |
| ( areaCap "METAL2" "COMP" 1.49e-05 ) |
| ( areaCap "METAL2" "METAL1" 3.58e-05 ) |
| ( areaCap "METAL3" "COMP" 9.4e-06 ) |
| ( areaCap "METAL3" "METAL1" 1.47e-05 ) |
| ( areaCap "METAL3" "METAL2" 4.07e-05 ) |
| ( areaCap "METAL4" "COMP" 6.81e-06 ) |
| ( areaCap "METAL4" "METAL1" 8.91e-06 ) |
| ( areaCap "METAL4" "METAL2" 1.46e-05 ) |
| ( areaCap "METAL4" "METAL3" 3.53e-05 ) |
| ( areaCap "METAL5" "COMP" 5.41e-06 ) |
| ( areaCap "METAL5" "METAL1" 6.56e-06 ) |
| ( areaCap "METAL5" "METAL2" 9.1e-06 ) |
| ( areaCap "METAL5" "METAL3" 1.43e-05 ) |
| ( areaCap "METAL5" "METAL4" 3.83e-05 ) |
| ( edgeCapacitance "METAL1" "COMP" 5.448e-11 ) |
| ( edgeCapacitance "METAL2" "COMP" 2.688e-11 ) |
| ( edgeCapacitance "METAL2" "METAL1" 4.536e-11 ) |
| ( edgeCapacitance "METAL3" "COMP" 1.932e-11 ) |
| ( edgeCapacitance "METAL3" "METAL1" 2.664e-11 ) |
| ( edgeCapacitance "METAL3" "METAL2" 4.862e-11 ) |
| ( edgeCapacitance "METAL4" "COMP" 1.478e-11 ) |
| ( edgeCapacitance "METAL4" "METAL1" 1.842e-11 ) |
| ( edgeCapacitance "METAL4" "METAL2" 2.673e-11 ) |
| ( edgeCapacitance "METAL4" "METAL3" 4.516e-11 ) |
| ( edgeCapacitance "METAL5" "COMP" 1.236e-11 ) |
| ( edgeCapacitance "METAL5" "METAL1" 1.448e-11 ) |
| ( edgeCapacitance "METAL5" "METAL2" 1.931e-11 ) |
| ( edgeCapacitance "METAL5" "METAL3" 2.743e-11 ) |
| ( edgeCapacitance "METAL5" "METAL4" 5.207e-11 ) |
| ( sheetRes "NWELL" "COMP" 1050 ) |
| ) ;orderedElectrical |
| ) ;foundry |
| ) ;constraintGroups |
| |
| |
| ;******************************** |
| ; DEVICES |
| ;******************************** |
| devices( |
| tcCreateCDSDeviceClass() |
| |
| ; |
| ; no cdsVia devices |
| ; |
| |
| ; |
| ; no cdsMos devices |
| ; |
| |
| ; |
| ; no cdsResistor devices |
| ; |
| ; |
| ; no ruleContact devices |
| ; |
| |
| |
| multipartPathTemplates( |
| ; ( name [masterPath] [offsetSubpaths] [encSubPaths] [subRects] ) |
| ; |
| ; masterPath: |
| ; (layer [width] [choppable] [endType] [beginExt] [endExt] [justify] [offset] |
| ; [connectivity]) |
| ; |
| ; offsetSubpaths: |
| ; (layer [width] [choppable] [separation] [justification] [begOffset] [endOffset] |
| ; [connectivity]) |
| ; |
| ; encSubPaths: |
| ; (layer [enclosure] [choppable] [separation] [begOffset] [endOffset] |
| ; [connectivity]) |
| ; |
| ; subRects: |
| ; (layer [width] [length] [choppable] [separation] [justification] [space] [begOffset] [endOffset] [gap] |
| ; [connectivity] [beginSegOffset] [endSegOffset]) |
| ; |
| ; connectivity: |
| ; ([I/O type] [pin] [accDir] [dispPinName] [height] [ layer] |
| ; [layer] [justification] [font] [textOptions] [orientation] |
| ; [refHandle] [offset]) |
| ; |
| ; ( --------------------------------------------------------------------- ) |
| (PguardRing |
| (("COMP" "drawing") 0.45 nil) |
| ((("METAL1" "drawing") 0.34 t nil nil -0.055 -0.16) |
| (("PPLUS" "drawing") 0.77 nil nil nil 0.16) |
| ) |
| nil |
| ((("CNT" "drawing") nil nil t nil nil nil -0.175 -0.295) |
| ) |
| ) |
| (WellguardRing |
| (("COMP" "drawing") 0.45 nil) |
| ((("METAL1" "drawing") 0.34 t nil nil -0.055 -0.105) |
| (("NPLUS" "drawing") 0.77 nil nil nil 0.16) |
| (("NWELL" "drawing") 1.28 nil nil nil 0.415 0.415) |
| ) |
| nil |
| ((("CNT" "drawing") nil nil t nil nil nil -0.175 -0.295) |
| ) |
| ) |
| ) ;multipartPathTemplates |
| |
| |
| ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
| ; |
| ; Opus Symbolic Device Class Definition |
| ; |
| ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
| |
| ; |
| ; no other device classes |
| ; |
| |
| ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
| ; |
| ; Opus Symbolic Device Declaration |
| ; |
| ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
| |
| |
| ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
| ; |
| ; Device Extraction Declaration |
| ; |
| ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
| |
| |
| ) ;devices |
| |
| |
| ;******************************** |
| ; LE RULES |
| ;******************************** |
| leRules( |
| |
| leLswLayers( |
| ;( layer purpose ) |
| ;( ----- ------- ) |
| ) ;leLswLayers |
| |
| ) ;leRules |
| |
| |
| ;******************************** |
| ; SITEDEFS |
| ;******************************** |
| siteDefs( |
| |
| scalarSiteDefs( |
| ;( siteDefName type width height symInX symInY symInR90) |
| ;( ----------- ---- ----- ------ ------ ------ -------) |
| ) ;scalarSiteDefs |
| |
| arraySiteDefs( |
| ; ( name type |
| ; ((siteDefName dx dy orientation) ...) |
| ; [symX] [symY] [symR90] ) |
| |
| ) ;arraySiteDefs |
| |
| ) ;siteDefs |
| |
| |
| ;******************************** |
| ; VIASPECS |
| ;******************************** |
| |
| viaSpecs( |
| ;(layer1 layer2 (viaDefName ...) |
| ; [( |
| ; (layer1MinWidth layer1MaxWidth layer2MinWidth layer2MaxWidth |
| ; (viaDefName ...)) |
| ; ... |
| ; )]) |
| ;( ------------------------------------------------------------------------ ) |
| ) ;viaSpecs |
